JP2011232804A - Bios system and pac with the same bios system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress manufacturing costs, and to improve a processing speed in a BIOS system and a PAC equipped with this BIOS system.SOLUTION: A PAC is provided with a BIOS system configured of a CPU, BIOS data storage memory and a memory access control circuit part or the like. This memory has a first storage area and a second storage area for storing BIOS data. Each storage area is configured to store a completion flag for determining whether or not the BIOS data have been normally written. The memory access control circuit part is configured to, when receiving the reading request of the BIOS data from the CPU (S31: YES), read each completion flag (S32), and to, when the completion flag of the first storage area is "0"(S33: YES), read the BIOS data from the first storage area, and to transfer it (S34), and to, when the completion flag of the second storage area is "0"(S35: YES), read the BIOS data from the second storage area, and to transfer it (S36).

Description

The present invention relates to a BIOS system capable of rewriting BIOS (Basic Input / Output System) data, and a PAC (Pro) equipped with this BIOS system.
Grammable Automation Controller).

Conventionally, BIOS data is sometimes rewritten in order to eliminate or update a defect in BIOS data used when PAC or the like is activated. To rewrite BIOS data, use P
BIOS data rewriting software provided by manufacturers such as AC, OS (Operati
It is common to use BIOS data rewriting software or the like that operates on (ng System). By the way, during rewriting of data, rewriting of BIOS data may fail due to power-off of the device. In that case, since the BIOS data is data indispensable for starting up the PAC or the like due to its nature, the PAC or the like may not be started up again.

On the other hand, there is known a BIOS rewriting method that uses two memories for storing BIOS data and rewrites only the BIOS data in one memory when rewriting the BIOS data. In this rewriting method, when rewriting of BIOS data fails, B
P using the BIOS data in the other memory where the IOS data was not rewritten
Start AC and rewrite BIOS data again. However, in this method, since it is necessary to use two memories for storing the BIOS data, there arises a new problem that the manufacturing cost of the PAC cannot be suppressed.

On the other hand, Patent Document 1 is provided with an address switching circuit for switching the connection destinations of the upper and lower parts of the same capacity in the nonvolatile memory element for storing the BIOS data, and the BIOS data is the minimum necessary for starting the apparatus. A BIOS data rewrite control circuit divided into a basic part and an extended part is disclosed. In this rewrite control circuit, when the basic part is rewritten, the new basic part is written in the old extended part, and after the writing is completed, the upper and lower parts of the nonvolatile memory element are replaced in a circuit, and the old basic part is stored. Write a new extension to non-volatile memory. Since this rewrite control circuit uses only one memory for storing the BIOS data, the manufacturing cost can be reduced. However, this BIOS data rewrite control circuit requires an address switching circuit for switching between the upper part and the lower part of the address of the memory, so that the manufacturing cost cannot be suppressed.

Further, Patent Document 2 discloses an information processing apparatus that uses a memory having a storage area that is twice or more the BIOS data size, and each holds BIOS data for the two divided areas A and B of the memory. Yes. This apparatus has an address switching circuit for making only half the area of the memory accessible from the system side and making both areas selectively accessible.

However, the information processing apparatus also requires an address switching circuit, so that the manufacturing cost cannot be suppressed. In the BIOS data rewriting method of this apparatus, when the BIOS data is read from one of the divided areas in the memory, a checksum is calculated, and as a result, it is determined whether the BIOS data is invalid. . That is, even when illegal BIOS data is read, it is necessary to calculate the checksum to determine whether or not it is illegal. Therefore, it takes time to start the BIOS data, and the process cannot be performed quickly. There's a problem.

JP-A-8-69376 JP 2000-148467 A

The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a BIOS system capable of suppressing the manufacturing cost and improving the processing speed, and a PAC including the BIOS system.

In order to achieve the above object, the invention of claim 1 is a PAC (Programmable A).
BIOS (Basic Inpu) used for the automation controller
t / Output System) A BIOS system comprising a memory having a plurality of BIOS data storage areas capable of storing data, and a data read / write means for reading / writing data from / to each of the plurality of BIOS data storage areas. Stores a completion flag for determining whether or not the BIOS data has been normally written in each of the plurality of BIOS data storage areas, and the data read / write means has the plurality of BIOS data
When writing the BIOS data to any of the data storage areas, if the writing of the BIOS data is normally completed, the completion flag corresponding to the BIOS data storage area in which the BIOS data is written is rewritten to the write completion state, and Rewrite the completion flag corresponding to the BIOS data storage area in which no BIOS data has been written into the incomplete write state,
When reading BIOS data from the plurality of BIOS data storage areas, the plurality of BI data
Of the OS data storage area, the BIOS data stored in the BIOS data storage area in which the completion flag is in the write completion state is read.

  A second aspect of the present invention is a PAC comprising the BIOS system according to the first aspect.

According to the present invention, when the BIOS data is read, the BIOS data stored in the BIOS data storage area whose completion flag is in the write completion state is read. Therefore, the writing is normal without performing the checksum calculation. The completed BIOS data can be read. Therefore, since normal BIOS data can be read quickly, the processing speed can be improved. Further, since only one memory for storing the BIOS data is used, the manufacturing cost of the PAC can be suppressed as compared with the case where two or more memories are used. Further, when accessing the BIOS data storage area in the memory, the conventional address switching circuit is not required, so that the manufacturing cost of the PAC can be suppressed.

The block diagram which shows schematic structure of PAC provided with the BIOS system which concerns on one Embodiment of this invention. Explanatory drawing which shows the structure of the BIOS data storage memory of the said BIOS system. The flowchart which shows the procedure of the BIOS data writing process in the said PAC. The flowchart which shows the procedure of the 1st storage area write process in the said BIOS data write process. The flowchart which shows the procedure of the 2nd storage area write process in the said BIOS data write process. The flowchart which shows the procedure of the BIOS data reading process in the said PAC.

Hereinafter, a BIOS (Basic Input / Output) according to an embodiment of the present invention will be described.
System) system and PAC (Programm) equipped with this BIOS system
(bable Automation Controller) will be described with reference to FIGS. FIG. 1 shows a schematic configuration of a PAC 1 including a BIOS system 1a. FIG. 2 shows a schematic configuration of a storage area in the BIOS data storage memory 16.

The PAC 1 includes a central processing unit (hereinafter referred to as a CPU) 11 and a RAM (Random A).
(access memory) 12, a keyboard 13 operated by the user, and a display device 14 for displaying video and messages. The PAC 1 includes a hard disk drive (hereinafter referred to as HDD) 15 for recording various data, a BIOS data storage memory (memory) 16, and a BIOS data storage memory access control circuit unit (data read / write means) 17. And a system bus 18.

CPU 11, RAM 12, keyboard 13, display device 14, HDD 15, and BI
The OS data storage memory access control circuit unit 17 is connected via a system bus 18. The BIOS system 1a includes a CPU 11, a BIOS data storage memory 16,
It is composed of a BIOS data storage memory access control circuit unit 17 and the like. The HDD 15 stores a program such as an OS (Operating System).

The BIOS data storage memory 16 is a flash memory that can rewrite data. As shown in FIG. 2, the BIOS data storage memory 16 includes a first storage area (BIOS data storage area) 16a capable of storing the BIOS data 22 and a second storage area (BIOS data storage) capable of storing the BIOS data 32. Region) 16b. First storage area 16
In a, a completion flag 2 for determining whether or not the BIOS data 22 has been normally written.
1 is further stored. The second storage area 16b further stores a completion flag 31 for determining whether or not the BIOS data 32 has been normally written.

The BIOS data 22 and 32 are rewritable data. BIOS data 22, 3
2 is read by the BIOS data storage memory access control circuit unit 17 when the PAC 1 is activated, developed on the RAM 12, and then executed by the CPU 11. Thereby, the BIOS data 22 and 32 are stored in the peripheral devices (keyboard 13 and display device 1 to the OS).
4 and the HDD 15 etc.) and the like, the functions unique to the PAC1 system are provided.

The completion flag 21 and the completion flag 31 store either “0” or “1”. For example, when the writing of the BIOS data 22 and 32 is normally completed (hereinafter referred to as “write completion state”), the completion flags 21 and 31 store a value of “0”. On the other hand, when the writing of the BIOS data 22 and 32 is not normally completed (hereinafter referred to as “writing incomplete state”), the value “1” is stored.

The BIOS data storage memory access control circuit unit 17 reads / writes data from / to each of the first storage area 16a and the second storage area 16b of the BIOS data storage memory 16. Specifically, the BIOS data storage memory access control circuit unit 17
In response to the BIOS data write request from the CPU 11, the BIOS data 22, 32 is written based on the contents of the completion flags 21, 31 (BIOS data write processing). The BIOS data storage memory access control circuit unit 17 receives the BI from the CPU 11.
In response to the OS data read request, a process of reading the BIOS data 22 and 32 (a BIOS data read process) is performed based on the contents of the completion flags 21 and 31.

Next, the BIOS data writing process will be described with reference to the flowchart shown in FIG. First, when there is a BIOS data write request from the CPU 11 (YES in S1), the BIOS data storage memory access control circuit unit 17 completes the completion flag 21 in the first storage area 16a and the completion flag 31 in the second storage area 16b. Are read (S2).

When the completion flag 21 is “1” (YES in S3), that is, when the BIOS data 22 is “incomplete write state”, the BIOS data storage memory access control circuit unit 17 stores the first storage area. Write processing (S4) is performed.

On the other hand, the completion flag 21 of the first storage area 16a is not “1” (NO in S3), the second
When the completion flag 31 of the storage area 16b is “1” (YES in S5), that is, B
When the IOS data 32 is in the “write incomplete state”, the BIOS data storage memory access control circuit unit 17 performs the second storage area write process (S6).

On the other hand, the completion flag 31 of the second storage area 16b is not “1” (NO in S5), and BI
The OS data storage memory access control circuit unit 17 performs the first storage area write process (S7), which is the same process as in S4.

Next, the first storage area writing process in S4 and S7 will be described with reference to the flowchart shown in FIG. First, the BIOS data storage memory access control circuit unit 17 erases the BIOS data 22 in the first storage area 16a (S11), and the first storage area 16
The new BIOS data 22 is written to a (S12).

Then, the BIOS data storage memory access control circuit unit 17 has a first storage area 16.
The completion flag 21 of a is rewritten to “0” (S13), and the completion flag 3 of the second storage area 16b
1 is rewritten to “1” (S14). Since the BIOS data storage memory 16 is a flash memory, the value of the completion flag 31 becomes “1” by erasing the data of the completion flag 31.

Next, the second storage area writing process in S6 will be described with reference to the flowchart shown in FIG. First, the BIOS data storage memory access control circuit unit 17 erases the BIOS data 32 in the second storage area 16b (S21), and writes new BIOS data 32 in the second storage area 16b (S22).

The BIOS data storage memory access control circuit unit 17 is connected to the second storage area 16.
The completion flag 31 of b is rewritten to “0” (S23), and the completion flag 2 of the first storage area 16a is rewritten.
1 is rewritten to “1” (S24). Since the BIOS data storage memory 16 is a flash memory, the value of the completion flag 21 becomes “1” by erasing the data of the completion flag 21.

Next, the BIOS data reading process will be described with reference to the flowchart shown in FIG. First, the BIOS data storage memory access control circuit unit 17 receives the B from the CPU 11.
If there is a request to read IOS data (YES in S31), the completion flag 21 in the first storage area 16a and the completion flag 31 in the second storage area 16b are read (S32).

If the completion flag 21 of the first storage area 16a is “0” (YES in S33),
The BIOS data storage memory access control circuit unit 17 starts from the first storage area 16a to the BI.
The OS data 22 is read and transferred to the RAM 12 (S34).

On the other hand, when the completion flag 21 is not “0” (NO in S33) and the completion flag 31 is “0” (YES in S35), the BIOS data storage memory access control circuit unit 17 starts from the second storage area 16b. The BIOS data 32 is read and transferred to the RAM 12 (S36).

As described above, in the BIOS system 1a according to the present embodiment and the PAC1 including the BIOS system 1a, the BIOS data 22 and 32 are read and written based on the contents of the completion flags 21 and 31. That is, the BIOS data storage memory access control circuit unit 17 writes the BIOS data to either the first storage area 16a or the second storage area 16b of the BIOS data storage memory 16. At this time, the BIOS data storage memory access control circuit unit 17 sets the completion flags 21 and 31 corresponding to the storage areas 16a and 16b in which the BIOS data 22 and 32 are normally written to the “write completion state” (“0
]). The BIOS data storage memory access control circuit unit 17
The completion flags 21 and 31 corresponding to the storage areas 16a and 16b in which the IOS data 22 and 32 are not written are rewritten to “unwritten state” (“1”).

When the BIOS data storage memory access control circuit unit 17 reads the BIOS data 22 and 32 from the BIOS data storage memory 16, the completion flags 21 and 31 are stored in the storage areas 16a and 16b in which the write completion state is set. Stored BIOS data 2
2 and 32 are read. Therefore, the BIOS data 22 in which writing has been normally completed based on the contents of the completion flags 21 and 31 without calculating a checksum or the like as in the prior art.
, 32 can be easily read out. Therefore, normal BIOS data can be read quickly, and the processing speed can be improved.

Even if one BIOS data 22, 32 is defective, the other normal BI data
When the OS data 22 and 32 are read, the BIOS data 22 and 32 are damaged and the PA
It is possible to prevent a problem that C1 cannot be activated.

Further, since only one BIOS data storage memory 16 for storing the BIOS data 22 and 32 is used, the manufacturing cost of the PAC 1 can be suppressed as compared with the case where two or more memories are used. Further, since the conventional address switching circuit is not required when accessing the BIOS data 22 and 32 in the BIOS data storage memory 16, the manufacturing cost of the PAC1 can be suppressed.

In addition, this invention is not restricted to the structure of the said embodiment, A various deformation | transformation is possible in the range which does not change the meaning of invention. For example, in the above embodiment, the BIOS storage memory includes the BI
Three or more storage areas for storing OS data may be provided. Further, the completion flag is not limited to being stored in each of the first storage area and the second storage area, and may be stored in the BIOS storage memory.

1 PAC
1a BIOS system 16 BIOS data storage memory (memory)
17 BIOS data storage memory access control circuit (data read / write means)
21, 31 Completion flag 22, 32 BIOS data 16a First storage area (BIOS data storage area)
16b Second storage area (BIOS data storage area)

Claims (2)

PAC (Programmable Automation Controller)
A memory having a plurality of BIOS data storage areas capable of storing BIOS (Basic Input / Output System) data used for
In a BIOS system comprising data read / write means for reading / writing data from / to each of the plurality of BIOS data storage areas,
The memory stores a completion flag for determining whether or not the BIOS data is normally written in each of the plurality of BIOS data storage areas;
The data read / write means includes
When writing the BIOS data to any one of the plurality of BIOS data storage areas, if the writing of the BIOS data is normally completed, the BI in which the BIOS data is written is written.
The completion flag corresponding to the OS data storage area is rewritten to the write completion state, and the BI
Rewrite the completion flag corresponding to the BIOS data storage area where OS data has not been written to the incomplete write state,
When reading BIOS data from the plurality of BIOS data storage areas,
A BIOS system that reads BIOS data stored in a BIOS data storage area in which the completion flag is in a write completion state in the IOS data storage area.   A PAC comprising the BIOS system according to claim 1.

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