JP2004172345A - Method for generating power supply terminal pattern and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for generating a power supply terminal pattern capable of realizing excellent contact independently of rotational angular positions of laid-out macros. <P>SOLUTION: The method for generating the power supply terminal pattern includes the steps of deciding the layout of the inside of the macros, deciding the layout of terminal cores on which positioning of power supply terminals for power supply is based at an uppermost layer of the macros, and generating the pattern of the power supply terminal on the basis of the terminal cores depending on layout information of the macros in a chip. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention generally relates to a method of designing a semiconductor device, and more particularly to a method of generating a macro power supply terminal pattern in a semiconductor device.
[Prior art]
In a conventional semiconductor device design, for a hard macro such as a RAM or a ROM, for example, the layout of the internal circuit wiring and the like are determined, and finally, the layout of the terminals of the power supply wiring section in the uppermost layer is determined and determined. Register information about the layout in the library. The data registered in the library is fixed, and the layout of the power supply terminals (power supply wiring in the uppermost layer) is fixed for each macro.
[0002]
FIG. 1 is a diagram illustrating a conventional method for designing a macro of a semiconductor device.
[0003]
In FIG. 1, in step ST1, a macro layout other than the power supply terminal is determined. That is, the wiring of the internal circuit other than the power supply terminal, which is the wiring for power supply in the uppermost layer, is determined.
[0004]
FIG. 2A is a diagram illustrating an example of the internal configuration of a macro. The macro 10 shown in FIG. 2A is a memory macro, and includes memory cell arrays 11 and 12, and an R / W amplifier & I / O circuit 13. Here, in the memory cell arrays 11 and 12, it is assumed that bit lines extend in a direction indicated by an arrow. Such an internal arrangement / wiring is determined in step ST1 of FIG.
[0005]
In step ST2, a power supply terminal layout is determined. That is, the layout of the power supply terminal, which is the power supply wiring in the uppermost layer, is determined.
[0006]
FIG. 2B is a diagram illustrating a layout of power supply terminals provided in the uppermost layer of the macro in FIG. 2A. As shown in FIG. 2B, the power supply voltage terminal (VD) 14 and the ground voltage terminal (VS) 15 are formed in a comb tooth shape in the same direction as the bit line extending direction. As for the R / W amplifier & I / O circuit 13 which consumes a large amount of current, a large number of contacts can be made to the VD 14 and the VS 15, so that a sufficient current density can be provided.
[0007]
In step ST3, the determined macro layout information is registered in a library and made public so that it can be used in the subsequent chip design process. Thus, the macro design is completed, and thereafter the chip design is performed.
[0008]
In step ST4, macros are arranged on the chip, and power supply wiring is performed for each macro.
[0009]
FIG. 3 is a diagram showing the connection between the arranged macro and the power supply wiring.
[0010]
In FIG. 3, the macro 10 shown in FIGS. 2 (a) and 2 (b) is arranged in a positional relationship of 0 ° rotation with respect to the horizontal direction of the drawing, and separately, it is rotated by 90 ° with respect to the horizontal direction of the drawing. Are arranged in a positional relationship of. Power supply wirings 20 and 21 (21 is on the ground side) are arranged so as to cross over the two macros 10. Here, the power supply terminal in the uppermost layer of the macro 10 corresponds to, for example, the third layer, and the power supply wirings 20 and 21 correspond to the fourth layer.
[0011]
The power supply line 20 and the VD 14 are connected by a contact 22, and the ground side power supply line 21 and the VS 15 are connected by a contact 23.
[0012]
In the related art, there is one that avoids locally changing a wiring layer of a power supply potential and a ground potential even when a logic cell is arranged in a rotating manner (Patent Document 1).
[0013]
[Patent Document 1]
JP-A-07-045799
[Problems to be solved by the invention]
In the macro 10 arranged in a positional relationship of 0 ° rotation shown on the left side of FIG. 3, there are five contacts 22 between the power supply wiring 20 and VD14, and between the ground-side power supply wiring 21 and VS15. There are also five contacts 23. On the other hand, in the macro 10 arranged in a 90 ° rotation positional relationship shown on the right side of FIG. 3, the number of contacts 22 between the power supply wiring 20 and the VD 14 is one, and There is one contact 23 with the VS15. Therefore, in the macro 10 arranged in a 90 ° rotation positional relationship, there is a problem that the power supply becomes insufficient.
[0015]
Such a problem is caused by the fact that the layout of the power supply terminals (wiring for power supply in the uppermost layer) is fixed for each macro, and the pattern of the power supply terminals does not change regardless of the position of the rotation angle. I do. For this reason, for example, when the contacts are arranged in a positional relationship of 0 ° rotation, good contacts can be realized, but in the case of being arranged in a positional relationship of 90 ° rotation, the contacts become insufficient.
[0016]
In view of the above, it is an object of the present invention to provide a power supply terminal pattern generation method capable of realizing a good contact regardless of the rotation angle position of a macro to be arranged.
[Means for Solving the Problems]
The power supply terminal pattern generation method according to the present invention determines a layout inside a macro, determines a layout of a terminal core serving as a basis for positioning a power supply terminal for power supply in the uppermost layer of the macro, and determines the layout within the chip. The method includes the steps of generating a pattern of the power supply terminal based on the terminal core according to macro arrangement information.
[0017]
In the power supply terminal pattern generation method, the layout of the terminal core as a base for positioning is determined in advance, and then the power supply terminal pattern is generated according to the arrangement information of the macro. In this case, the power supply terminal pattern is generated such that the power supply terminal extends in the direction of the rotation angle of 90 °. The power supply terminal pattern can be generated such that the power supply terminal extends in the direction of. In this manner, by generating the pattern of the power supply terminal according to the rotation angle of the arrangement, it is possible to change the extension direction of the power supply terminal according to the rotation angle of the arrangement, and to provide an appropriate contact with the power supply wiring. It becomes possible.
[0018]
In addition, the semiconductor device according to the present invention includes a first macro connected to a first power supply wiring extending in a predetermined direction and provided at a rotation position at a first angle in the predetermined direction, and a first macro extending in the predetermined direction. A second macro connected to a second power supply wiring which is the same as or different from the first power supply wiring, and provided at a rotation position at a second angle different from the first angle in the predetermined direction; One macro includes a first power supply terminal pattern connected to the first power supply wiring in the uppermost layer, and a first circuit that is an internal circuit except for the first power supply terminal pattern. The second macro includes a second power supply terminal pattern connected to the second power supply wiring in the uppermost layer, and a second circuit which is all internal circuits except the second power supply terminal pattern, The first power terminal pattern and the second power terminal pattern Unlike, characterized in that the circuit of the first circuit and the second are the same.
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0019]
FIG. 4 is a diagram showing a method for designing a macro of a semiconductor device according to the present invention.
[0020]
In FIG. 4, in step ST1, a macro layout other than the power supply terminal is determined. That is, the wiring of the internal circuit other than the power supply terminal, which is the wiring for power supply in the uppermost layer, is determined. Thereby, for example, the arrangement and wiring inside the macro as shown in FIG. 2A are determined.
[0021]
In step ST2, the layout of the terminal core is determined. Here, the terminal core is a terminal portion corresponding to a position where a power supply terminal, which is a wiring for power supply in the uppermost layer, is to be arranged. When a power supply terminal pattern is generated at a later stage, the power supply terminal pattern is By passing through the location of the terminal core, it provides a basis for positioning.
[0022]
FIG. 5 is a diagram showing a layout of a terminal core provided in the uppermost layer of the macro in FIG. As shown in FIG. 5, the power supply voltage terminal core 31 and the ground voltage terminal core 32 have, for example, a square shape, and are provided at positions where the power supply voltage terminal and the ground voltage terminal are to be arranged. That is, for example, a position to be contacted to supply power to the lower layer is determined according to the arrangement state of the lower layer circuit / wiring, and the power supply terminal core 31 and the ground voltage terminal core are determined based on the determined position. 32 are generated.
[0023]
In step ST3 of FIG. 4, the determined macro layout information is registered in a library and made public so that it can be used in the subsequent chip design process. Thus, the macro design is completed, and thereafter the chip design is performed.
[0024]
In step ST4, a power terminal pattern in the macro is generated for each macro based on information for arranging the macro on the chip. That is, if it is obtained as macro arrangement information that a certain macro is arranged at a certain position in the chip with a rotation angle of 0 ° with respect to the power supply wiring, the power supply terminal is turned in the direction of the rotation angle of 90 ° in the uppermost layer in the macro. The power supply terminal pattern is generated such that the power supply terminal extends. When it is obtained as macro placement information that a certain macro is arranged at a certain position in the chip at a rotation angle of 90 ° with respect to the power supply wiring, the power supply terminal is turned in the direction of the rotation angle of 90 ° in the uppermost layer in the macro. The power supply terminal pattern is generated such that the power supply terminal extends.
[0025]
At this time, a power supply voltage terminal core 31 and a ground voltage terminal core 32 are used as a basis for generating a power supply terminal pattern. Specifically, the power supply terminal pattern is generated such that the power supply terminal passes through the position of the power supply voltage terminal core 31 or the position of the ground voltage terminal core 32.
[0026]
In this manner, by generating the pattern of the power supply terminal according to the rotation angle of the arrangement, it is possible to change the extension direction of the power supply terminal according to the rotation angle of the arrangement, and to provide an appropriate contact with the power supply wiring. It becomes possible.
[0027]
Further, in step ST5, macros are arranged on the chip, and power supply wiring is performed for each macro.
[0028]
FIG. 6 is a diagram showing connections between the arranged macros and the power supply wiring.
[0029]
In FIG. 6, the macro 10 shown in FIG. 5 is arranged with a positional relationship of 0 ° rotation with respect to the horizontal direction of the drawing, and separately arranged with a positional relationship of 90 ° rotation with respect to the horizontal direction of the drawing. Power supply wires 40 and 41 (41 is on the ground side) are arranged so as to cross over the two macros 10. Here, the power supply terminal in the uppermost layer of the macro 10 corresponds to, for example, the third layer, and the power supply wirings 40 and 41 correspond to the fourth layer.
[0030]
The power supply voltage terminal (VD) 34 and the ground voltage terminal (VS) 35 are passed through the power supply voltage terminal core 31 and the ground voltage terminal core 32, respectively, or are respectively connected to the power supply voltage terminal core 31 and the ground voltage. Generated so as to include the terminal core 32. The direction in which the power supply voltage terminal 34 and the ground voltage terminal 35 are generated is such that the comb-shaped portions of the terminals are orthogonal to the power supply wires 40 and 41. The power supply wiring 40 and the power supply voltage terminal 34 are connected by a contact 42, and the ground power supply wiring 41 and the ground voltage terminal 35 are connected by a contact 43.
[0031]
In the macro 10 arranged in a 0 ° rotation positional relationship shown on the left side of FIG. 6, there are five contacts 42 between the power supply wiring 40 and the power supply voltage terminal 34, and the ground-side power supply wiring 41 and the ground. There are also five contacts 43 between the terminal 35 for voltage. Further, in the macro 10 arranged in a 90 ° rotation positional relationship shown on the right side of FIG. 6, the number of contacts 42 between the power supply wiring 40 and the power supply voltage terminal 34 is three, and the ground-side power supply wiring 41 There are also three contacts 43 between the terminal and the ground voltage terminal 35. Therefore, a sufficient amount of power can be supplied not only to the macro 10 arranged in a positional relationship of 0 ° rotation but also to the macro 10 arranged in a positional relationship of 90 ° rotation.
[0032]
As described above, in the present invention, when a certain macro is arranged at a rotation angle of 0 ° with respect to the power supply wiring, the power supply terminal extends in a direction of a rotation angle of 90 ° in the uppermost layer in the macro. When the power supply terminal pattern is generated at a rotation angle of 90 ° with respect to the power supply wiring, the power supply terminal pattern is generated so that the power supply terminal extends in the direction of the rotation angle of 90 ° in the uppermost layer in the macro. I do. At this time, by using the power supply terminal core and the ground voltage terminal core as the basis for generating the power supply terminal pattern, the layout of the power supply terminal can be easily determined and the pattern can be generated. In this manner, by generating the pattern of the power supply terminal according to the rotation angle of the arrangement, it is possible to change the extension direction of the power supply terminal according to the rotation angle of the arrangement, and to provide an appropriate contact with the power supply wiring. It becomes possible.
[0033]
FIG. 7 is a diagram illustrating an example of a semiconductor device designed and manufactured by a conventional semiconductor device design method. FIG. 8 is a diagram showing an example of a semiconductor device designed and manufactured by the semiconductor device design method according to the present invention.
[0034]
The semiconductor device of FIG. 7 includes a semiconductor chip 51, a plurality of macros 52 having the same internal layout, a power supply voltage terminal 53 and a ground voltage terminal 54 in the macro 52, a power supply voltage pad 55, a ground voltage pad 56, and a power supply voltage wiring. 57, and a ground voltage wiring 58.
[0035]
Since the plurality of macros 52 having the same internal layout are macros designed by the conventional design method shown in FIG. 1, all the macros 52 including the layout of the power supply terminal which is the power supply wiring of the uppermost layer are used. Are identical to each other. In the macro 52 arranged in a 0 ° rotation positional relationship shown on the left side of FIG. 7, the power supply wiring and the power supply terminal in the macro are orthogonal to each other. As a result, there are five contacts between the power supply wiring 57 and the power supply voltage terminal 53, and there are also five contacts between the ground side power supply wiring 58 and the ground voltage terminal 54.
[0036]
On the other hand, in the macro 52 arranged in a 90 ° rotation positional relationship shown on the right side of FIG. 7, the power supply wiring and the macro power supply terminal are in a parallel relationship. Therefore, there is only one contact between the power supply wiring 57 and the power supply voltage terminal 53, and there is only one contact between the ground side power supply wiring 58 and the ground voltage terminal 54. Therefore, in the macro 10 arranged in a 90 ° rotation positional relationship, there is a problem that the power supply becomes insufficient.
[0037]
The semiconductor device of FIG. 8 includes a semiconductor chip 61, a plurality of macros 62 having the same internal layout, a power supply voltage terminal 63 and a ground voltage terminal 64 in the macro 62, a power supply voltage pad 65, a ground voltage pad 66, and a power supply voltage wiring. 67, and a ground voltage wiring 68.
[0038]
Since the plurality of macros 62 having the same internal layout are macros designed by the design method according to the present invention shown in FIG. 4, the layout excluding the layout of the power supply terminal which is the power supply wiring of the uppermost layer is the same. They are identical to each other. When the macro 62 is arranged on the semiconductor chip 61, a power terminal pattern in the macro 62 is generated according to a relative rotation position with respect to the power wirings 67 and 68.
[0039]
In the macro 62 arranged at a 0 ° rotation positional relationship shown on the left side of FIG. 8, the power supply wiring and the macro power supply terminals are orthogonal to each other. As a result, there are five contacts between the power supply wiring 67 and the power supply voltage terminal 63, and there are also five contacts between the ground-side power supply wiring 68 and the ground voltage terminal 64.
[0040]
Also, in the macro 62 arranged in a 90 ° rotational positional relationship shown on the right side of FIG. 8, the power supply wiring and the power supply terminal in the macro are orthogonal to each other. Therefore, there are four contacts between the power supply wiring 67 and the power supply voltage terminal 63, and there are also four contacts between the ground-side power supply wiring 68 and the ground voltage terminal 64.
[0041]
Therefore, sufficient power can be supplied to both the macro 62 arranged in a positional relationship of 0 ° rotation and the macro 62 arranged in a positional relationship of 90 ° rotation. As described above, the semiconductor chip designed and manufactured by the design method of the present invention is configured such that, in a macro having the same layout except for the layout of the power supply terminals, the pattern differs according to the difference in the relative angle with respect to the power supply wiring. The power supply terminal layout in the macro is set.
[0042]
FIG. 9 is a diagram showing a configuration of an apparatus for executing a semiconductor device design method (power supply terminal pattern generation method) according to the present invention.
[0043]
As shown in FIG. 9, an apparatus for executing the semiconductor device design method according to the present invention is realized by a computer such as a personal computer or an engineering workstation. 9 includes a computer 510, a display device 520 connected to the computer 510, a communication device 523, and an input device. The input device includes, for example, a keyboard 521 and a mouse 522. The computer 510 includes a CPU 511, a RAM 512, a ROM 513, a secondary storage device 514 such as a hard disk, a replaceable medium storage device 515, and an interface 516.
[0044]
The keyboard 521 and the mouse 522 provide an interface with the user, and input various commands for operating the computer 510, a user response to requested data, and the like. The display device 520 displays a result processed by the computer 510 and the like, and performs various data displays to enable a dialogue with a user when operating the computer 510. The communication device 523 performs communication with a remote place, and includes, for example, a modem and a network interface.
[0045]
The semiconductor device design method according to the present invention is provided as a computer program that can be executed by the computer 510. This computer program is stored in a storage medium M that can be mounted on the exchangeable medium storage device 515, and is loaded from the storage medium M to the RAM 512 or the secondary storage device 514 via the exchangeable medium storage device 515. Alternatively, the computer program is stored in a storage medium (not shown) at a remote location, and is loaded from the storage medium into the RAM 512 or the secondary storage device 514 via the communication device 523 and the interface 516.
[0046]
Upon receiving a program execution instruction from the user via the keyboard 521 and / or the mouse 522, the CPU 511 loads the program from the storage medium M, the remote storage medium, or the secondary storage device 514 to the RAM 512. The CPU 511 uses the free storage space of the RAM 512 as a work area, executes the program loaded in the RAM 512, and proceeds with the process while appropriately interacting with the user. The ROM 513 stores a control program for controlling the basic operation of the computer 510.
[0047]
By executing the computer program in this way, the semiconductor device design method (power supply terminal pattern generation method) described in the above embodiment can be executed.
[0048]
In the description of the above embodiment, the power supply terminal pattern has a comb-tooth shape as an example, but the shape of the power supply terminal pattern is not limited to the comb-tooth shape and may be any shape. For example, as shown as a macro 10A in FIG. 10, a configuration in which a plurality of power supply terminal patterns 71 and 72 each having a rectangular shape may be formed. In this case, for example, the power supply terminal pattern may be generated such that the direction of the long side of the rectangle is different according to the difference in the relative angle of the macro arrangement with respect to the power supply wiring.
[0049]
As described above, the present invention has been described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the claims.
[0050]
The present invention includes the following.
(Supplementary Note 1) a) Determine the internal layout of the macro,
b) determining the layout of the terminal cores that serve as the basis for positioning the power supply terminals for power supply in the top layer of the macro;
c) a method of generating a power supply terminal pattern in a semiconductor device, comprising the steps of: generating a pattern of the power supply terminal based on the terminal core in accordance with arrangement information of the macro in a chip.
(Supplementary note 2) The power supply terminal pattern generation method according to supplementary note 1, wherein in the step c), the power supply terminal pattern is generated such that the power supply terminal includes the position of the terminal core.
(Supplementary Note 3) The step c) includes, when the macro is arranged at a rotation position of 0 degree in the extension direction with respect to the extension direction of the power supply wiring for supplying power to the macro, the first power supply terminal When a pattern is generated and the macro is arranged at a rotation position of 90 degrees in the extension direction, a pattern of a second power terminal different from the pattern of the first power terminal is generated. The power supply terminal pattern generation method described.
(Supplementary Note 4) In the step c), the pattern of the first power supply terminal is generated such that a main extension direction of the pattern of the first power supply terminal is orthogonal to the extension direction of the power supply wiring. The power supply terminal pattern generation method according to claim 3, wherein the second power supply terminal pattern is generated such that a main extension direction of the second power supply terminal pattern is orthogonal to the extension direction of the power supply wiring.
(Supplementary note 5) The power supply terminal pattern generation method according to supplementary note 1, wherein the pattern of the power supply terminal has a shape of a comb tooth.
(Supplementary note 6) The power supply terminal pattern generation method according to supplementary note 1, wherein the power supply terminal pattern has a shape composed of a plurality of rectangles.
(Supplementary Note 7) A first macro connected to a first power supply wiring extending in a predetermined direction and provided at a rotation position at a first angle in the predetermined direction,
A second power supply extending in the predetermined direction and connected to a second power supply wiring which is the same as or different from the first power supply wiring and provided at a rotation position at a second angle different from the first angle in the predetermined direction; Wherein the first macro is:
A first power supply terminal pattern connected to the first power supply wiring in the uppermost layer;
The second macro includes a first circuit which is all internal circuits except for the first power supply terminal pattern,
A second power terminal pattern connected to the second power wiring in the uppermost layer;
A second circuit which is an internal circuit except for the second power supply terminal pattern, wherein the first power supply terminal pattern and the second power supply terminal pattern are different, and the first circuit and the second A semiconductor device, wherein the two circuits are the same.
(Supplementary Note 8) The main extension direction of the first power supply terminal pattern is orthogonal to the extension direction of the first power supply wiring, and the main extension direction of the second power supply terminal pattern is the second power supply wiring. 8. The semiconductor device according to claim 7, wherein the semiconductor device is perpendicular to the extending direction.
(Supplementary note 9) The semiconductor device according to supplementary note 7, wherein the pattern of the first and second power supply terminals has a comb shape.
(Supplementary Note 10) The semiconductor device according to supplementary note 7, wherein the pattern of the first and second power supply terminals has a shape composed of a plurality of rectangles.
(Supplementary note 11) The semiconductor device according to supplementary note 7, wherein the first angle is 0 ° and the second angle is 90 °.
【The invention's effect】
In the power supply terminal pattern generation method according to the present invention, the layout of the terminal cores as the basis for positioning is determined, and then the power supply terminal pattern is generated according to the macro arrangement information. When arranged at 0 °, a power supply terminal pattern is generated so that the power supply terminal extends in the direction of the rotation angle of 90 °. The power supply terminal pattern can be generated such that the power supply terminal extends in the direction of 90 °.
[0051]
In this way, by generating the pattern of the power supply terminal according to the rotation angle of the arrangement, it is possible to change the extension direction of the power supply terminal according to the rotation angle of the arrangement, and to provide an appropriate contact with the power supply wiring. It becomes possible.
[Brief description of the drawings]
FIG. 1 is a diagram showing a conventional method for designing a macro of a semiconductor device.
2A is a diagram illustrating an example of an internal configuration of a macro, and FIG. 2B is a diagram illustrating a layout of a power supply terminal provided in an uppermost layer of the macro in FIG.
FIG. 3 is a diagram showing connections between arranged macros and power supply wirings.
FIG. 4 is a diagram showing a method for designing a macro of a semiconductor device according to the present invention.
FIG. 5 is a diagram showing a layout of a terminal core provided in the uppermost layer of the macro in FIG.
FIG. 6 is a diagram showing a connection between a placed macro and a power supply wiring.
FIG. 7 is a diagram showing an example of a semiconductor device designed and manufactured by a conventional semiconductor device design method.
FIG. 8 is a diagram showing an example of a semiconductor device designed and manufactured by the semiconductor device design method according to the present invention.
FIG. 9 is a diagram showing a configuration of an apparatus for executing a semiconductor device design method according to the present invention.
FIG. 10 is a diagram showing another example of a power supply terminal pattern of a macro.
[Explanation of symbols]
10 Macro 31 Power supply voltage terminal core 32 Ground voltage terminal core 34 Power supply voltage terminal (VD)
35 Ground voltage terminal (VS)
40, 41 Power supply wiring 42, 43 Contact 51 Semiconductor chip 52 Macro 53 Power supply terminal 54 Ground voltage terminal 55 Power supply voltage pad 56 Ground voltage pad 57 Power supply voltage wiring 58 Ground voltage wiring

Claims (10)

a) Determine the internal layout of the macro,
b) determining the layout of the terminal cores that serve as the basis for positioning the power supply terminals for power supply in the top layer of the macro;
c) a method of generating a power supply terminal pattern in a semiconductor device, comprising the steps of: generating a pattern of the power supply terminal based on the terminal core in accordance with arrangement information of the macro in a chip. The method according to claim 1, wherein in step c), the power terminal pattern is generated such that the power terminal includes the position of the terminal core. In the step c), a pattern of a first power supply terminal is generated when the macro is arranged at a rotation position of 0 degree in the extension direction with respect to the extension direction of the power supply wiring for supplying power to the macro. 2. The power supply according to claim 1, wherein when the macro is arranged at a rotation position of 90 degrees in the extension direction, a pattern of the second power supply terminal different from the pattern of the first power supply terminal is generated. Terminal pattern generation method. The step c) includes generating the first power supply terminal pattern such that a main extension direction of the pattern of the first power supply terminal is orthogonal to the extension direction of the power supply wiring. 4. The power supply terminal pattern generation method according to claim 3, wherein the pattern of the second power supply terminal is generated such that a main extension direction of the pattern is orthogonal to the extension direction of the power supply wiring. 2. The power terminal pattern generation method according to claim 1, wherein the power terminal pattern has a comb shape. 2. The method according to claim 1, wherein the power terminal pattern has a shape composed of a plurality of rectangles. A first macro connected to a first power supply wiring extending in a predetermined direction and provided at a rotation position at a first angle in the predetermined direction;
A second power supply extending in the predetermined direction and connected to a second power supply wiring which is the same as or different from the first power supply wiring and provided at a rotation position at a second angle different from the first angle in the predetermined direction; Wherein the first macro is:
A first power supply terminal pattern connected to the first power supply wiring in the uppermost layer;
The second macro includes a first circuit which is all internal circuits except for the first power supply terminal pattern, and the second macro includes:
A second power terminal pattern connected to the second power wiring in the uppermost layer;
A second circuit which is an internal circuit except for the second power supply terminal pattern, wherein the first power supply terminal pattern and the second power supply terminal pattern are different, and the first circuit and the second 2. A semiconductor device, wherein the two circuits are the same. The main extension direction of the first power supply terminal pattern is orthogonal to the extension direction of the first power supply wiring, and the main extension direction of the second power supply terminal pattern is the extension direction of the second power supply wiring. The semiconductor device according to claim 7, wherein the semiconductor device is orthogonal to. 8. The semiconductor device according to claim 7, wherein the patterns of the first and second power supply terminals have a comb shape. 8. The semiconductor device according to claim 7, wherein said first and second power supply terminal patterns have a shape composed of a plurality of rectangles.

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