JP2004165902A - Image processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To make processing fast by suppressing an increase in the circuit scale that a quantization table occupies. <P>SOLUTION: The quantization table 109 is not present at each JPEG compression part 110, but shared by a common memory means. The quantization table 109 contains a plurality of quantization tables and a specified quantization table is selected with a select signal inputted from a quantization table selection part 108 to output a quantization value to a quantization part 103. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an image processing apparatus that performs image processing, and more particularly, to an image processing apparatus that processes a divided image obtained by dividing an original image.
[0002]
[Prior art]
Conventionally, in order to increase the processing speed of image processing, image data is divided into rectangular image units, and a plurality of image processing units are used to process the rectangular images in parallel, thereby achieving a desired processing speed. (For example, see Patent Document 1).
[0003]
Further, in order to further increase the speed, it is necessary to realize an image processing unit including more image processing units.
[0004]
[Patent Document 1]
JP-A-2002-8002
[0005]
[Problems to be solved by the invention]
However, each image processing unit needs to prepare its own quantization table, and by increasing the number of image processing units, it is necessary to prepare a quantization table for the increased number. The occupied circuit scale was increasing.
[0006]
SUMMARY OF THE INVENTION It is an object of the present invention to provide an image processing apparatus which solves the above-described problems and suppresses an increase in the circuit size occupied by a quantization table and can increase the processing speed.
[0007]
[Means for Solving the Problems]
An image processing apparatus for processing a divided image obtained by dividing an original image, comprising: storage means for storing a table for processing the divided image; and data obtained by adding processing information to the divided image. Input means for inputting a packet; and a plurality of image processing means for performing image processing on the divided image of the data packet input by the input means in accordance with the table, wherein the plurality of image processing means perform processing of the data packet. By selecting the table according to the information and using the table for the image processing, the same table in the storage unit is shared.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
<First embodiment>
FIG. 1 shows a first embodiment of the present invention. This is an example of a multifunction system 1001 and is connected to a LAN (local area network) 1010 as shown in FIG.
[0009]
Referring to FIG. 4, a multifunction system 1001 includes a scanner 2070 (FIG. 1) and a printer 2095 (FIG. 1). The image read from the scanner 2070 flows to the LAN 1010, and the image received from the LAN 1010 is transmitted to the printer 2095 by the printer 2095. It can be printed out. Further, an image read from the scanner 2070 can be transmitted to the PSTN or ISDN 1030 by a facsimile transmission unit (not shown), and an image received from the PSTN or ISDN can be printed out by the printer 2095.
[0010]
A database server 1002 manages the binary image and the multi-valued image read by the multifunction system 1001 as a database. Reference numeral 1003 denotes a database client of the database server 1002, which can browse / search image data stored in the database 1002. An e-mail server 1004 can receive an image read by the multifunction system 1001 as an e-mail attachment. Reference numeral 1005 denotes an e-mail client, which can receive and browse the e-mail received by the e-mail server 1004, and transmit an e-mail.
[0011]
A WWW server 1006 provides an HTML document to the LAN 1010, and can print out the HTML document provided by the WWW server 1006 by the multifunction system 1001. A router 1007 connects the LAN 1010 to the Internet / intranet 1012. Devices similar to the database server 1002, WWW server 1006, electronic mail server 1004, and multifunction system 1001 are connected to the Internet / intranet as 1020, 1021, 1022, and 1023, respectively. The multifunction system 1001 can transmit and receive to and from the FAX device 1031 via the PSTN or ISDN 1030.
[0012]
A printer 1040 is connected to the LAN 1010 and can print out an image read by the multifunction system 1001.
[0013]
Next, FIG. 1 will be described. In FIG. 1, reference numeral 2000 denotes a control device which is connected to a scanner 2070 which is an image input device and a printer 2095 which is an image output device. On the other hand, by connecting to a LAN 1010 and a public line WAN 2051, image information and device It performs input / output of information and image development of PDL data. The control device 2000 includes an operation unit UI 2012, a RAM 2002, a ROM 2003, a system control unit 2150, an image processing unit 2149, a printer image processing unit 2115, a scanner image processing unit 2114, a rendering unit 2060, and a disk unit. It has a controller 2144, an external storage device 2004, a modem 2050, and a PHY / PMD circuit 2146.
[0014]
A RAM 2002 is a system work memory for the CPU 2001 (FIG. 2), and is also an image memory for temporarily storing image data. This embodiment shows an example in which a direct RDRAM is adopted. The ROM 2003 is a boot ROM, and stores a system boot program.
[0015]
The rendering unit 2060 develops a PDL code or an intermediate display list into a bitmap image.
[0016]
Next, the system control unit 2150 will be described. The system control unit 2150 includes a CPU 2001, an image ring interface (1) 2147, an image ring interface (2) 2148, a CPU bus 2126, a system bus bridge 2007, a sub bus switch 2128, and an image DMA (1) 2130. , An image compression unit 2131, an image DMA (2) 2132, a font expansion unit 3134, a sorting unit 2135, a bitmap tracing unit 2136, an image expansion unit 2133, a font expansion unit 2134, and a LAN controller 2010. , A USB interface 2138, a general-purpose serial port 2139, an interrupt controller 2140, a GPIO interface 2141, an operation unit I / F 2006, and a MAC circuit 2145.
[0017]
The CPU 2001 is a processor that controls the entire system. This embodiment shows an example in which two CPUs are used. These two CPUs are connected to a common CPU bus 2126 and further to a system bus bridge 2007. The system bus bridge 2007 is a bus switch. In addition to the CPU 2001, a CPU bus 2126, a RAM controller 2124, a ROM controller 2125, an IO bus 12127, a sub bus switch 2128, an IO bus 22129, and an image ring The interface (1) 2147 and the image ring interface (2) 2148 are connected.
[0018]
The sub bus switch 2128 is a second bus switch, and is connected to the image DMA 12130, the image DMA 22132, the font decompression unit 3134, the sort circuit 2135, and the bitmap trace unit 2136, and is output from these DMAs. It arbitrates for memory access requests and connects to the system bus bridge 2007.
[0019]
The RAM controller 2124 controls the RAM 2002. The ROM controller 2125 controls the ROM 2003.
[0020]
The image DMA 12130 is connected to the image compression unit 3131, controls the image compression unit 2131 based on information set via the register access ring 2137, reads out uncompressed data on the RAM 2002, compresses the uncompressed data, and outputs the uncompressed data. In this embodiment, an example in which JPEG is adopted as a compression algorithm is shown.
[0021]
The image DMA (2) 2132 is connected to the image decompression unit 2133, controls the image decompression unit 2133 based on information set via the register access ring 2137, and reads, decompresses, and decompresses compressed data in the RAM 2002. In the present embodiment, post-data write-back is performed. An example is shown in which JPEG is adopted as a decompression algorithm.
[0022]
The font decompression unit 2134 decompresses the compressed font data stored in the ROM 2003 or the RAM 2002 based on a font code included in PDL data transferred from the outside via the LAN controller 2010 or the like. This embodiment shows an example in which the FBE algorithm is adopted.
[0023]
The sort circuit 2135 is a circuit that rearranges the order of the objects in the display list generated at the stage of expanding the PDL data.
[0024]
The bitmap trace circuit 2136 is a circuit that extracts edge information from bitmap data.
[0025]
The IO bus (1) 2127 is a kind of internal IO bus, and is connected to a controller of a USB bus which is a standard bus, a USB interface 2138, a general-purpose serial port 2139, an interrupt controller 2140, and a GPIO interface 2141. I have. The IO bus (1) 2127 includes a bus arbiter (not shown).
[0026]
The operation unit interface 2006 is an interface unit with the operation unit UI 2012, and outputs image data to be displayed on the operation unit UI 2012 to the operation unit UI 2012. In addition, it plays a role of transmitting information input by the system user from the operation unit UI 2012 to the CPU 2001.
[0027]
The IO bus (2) 2129 is a kind of internal IO bus, and the general-purpose bus interfaces (1) and (2) 2142 and the LAN controller 2010 are connected. The IO bus (2) 2129 includes a bus arbiter (not shown). The general-purpose bus interface 2142 is a bus bridge composed of two identical bus interfaces and supporting a standard IO bus. In this embodiment, an example in which the PCI bus 2143 is adopted is shown. The LAN controller 2010 is connected to the LAN 1010 via the MAC circuit 2145 and the PHY / PMD circuit 2146, and inputs and outputs information.
[0028]
An image ring interface (1) 2147 and an image ring interface (2) 2148 connect the system bus bridge 2007 and the image ring 2008 for transferring image data at a high speed, and process the tiled compressed data into the RAM 2002 and the tile image processing. DMA controller for transferring data between the units 2149.
[0029]
An HDD 2004 is a hard disk drive and stores system software and image data. It is connected to one PCI bus 2143 via a disk controller 2144. The modem 2050 is connected to the public line 2051 and inputs and outputs information.
[0030]
Next, the image processing unit 2149 will be described. The image processing unit 2149 includes a tile image processing unit 2149, a command processing unit 2104, a status processing unit 2105, a tile compression unit 2106, a status processing unit 2105, a rendering unit interface 2110, an image input interface 2112, an image An output interface 2113, a multi-level conversion unit 2119, a binarization unit 2118, a color space conversion unit 2117, an image rotation unit 203 and 0, a resolution conversion unit 2116, an image input interface 2112, and an image output interface 2113; , An image rotation unit 2030, a resolution conversion unit 2116, a color space conversion unit 2117, a binarization unit 2118, a multi-value conversion unit 2119, an external bus interface unit 2120, and a memory control unit 2122.
[0031]
The image ring 2008 is an image ring (1) and an image ring (2) configured by a combination of a pair of unidirectional connection paths. The image ring 2008 includes a tile decompression unit 2103, a command processing unit 2104, a status processing unit 2105, and a tile processing unit in the tile image processing unit 2149 via the image ring interface (3) 2101 and the tile image interface (3) 2102. It is connected to the compression unit 2106. In the present embodiment, an example is shown in which two sets of tile decompression units 2103 and three sets of tile compression units are mounted.
[0032]
The tile expansion unit 2103 is connected to the image ring interfaces (1) to (3) 2147, 2148, 2101 and 2102, and is also connected to the tile bus 2107 and expands the compressed image data input from the image ring 2008. A bus bridge for transferring to the tile bus 2107. In the present embodiment, an example is shown in which a decompression algorithm based on JPEG and Packbits method is adopted.
[0033]
The tile compression unit 2106 is connected to the tile bus 2107 in addition to the connections to the image ring interfaces (1) to (3) 2147, 2148, 2101 and 1022, and compresses the image data before compression input from the tile bus 2107. And a bus bridge for transferring to the image ring 2008. In the present embodiment, as in the case of the tile decompression unit 2103, an example is shown in which a compression algorithm based on JPEG and PackBits is adopted.
[0034]
The command processing unit 2104 is connected to the register setting bus 2109 in addition to the connections to the image ring interfaces (1) to (3) 2147, 2148, 2101 and 2102, and is issued from the CPU 2001 input through the image ring 2008. The register setting request is written to the corresponding block connected to the register setting bus 2109. Further, based on a register read request issued from the CPU 2001, information is read from the corresponding register via the register setting bus 2109. The image is transferred to the image ring interface (3) 2102.
[0035]
The status processing unit 2105 monitors information of each image processing unit, generates an interrupt packet for issuing an interrupt to the CPU 2001, and outputs the generated interrupt packet to the image ring interface (3) 2102.
[0036]
The tile bus 2107 includes, in addition to the above blocks, a rendering unit interface 2110, an image input interface 2112, an image output interface 2113, a multi-level conversion unit 2119, a binarization unit 2118, a color space conversion unit 2117, The image rotation unit 2030 and the resolution conversion unit 2116 are connected.
[0037]
The rendering unit interface 2110 is an interface for inputting the bitmap image generated by the rendering unit 2060. The rendering unit 2060 and the rendering unit interface 2110 are connected by a general video signal 2111. The rendering unit interface 2110 has a connection to a memory bus 2108 and a register setting bus 2109 in addition to the tile bus 2107, and converts an input raster image into a tile image according to a predetermined method set via the register setting bus 2109. At the same time, the clock is synchronized and output to the tile bus 2107.
[0038]
The image input interface 2112 receives the raster image data subjected to the correction image processing by the scanner image processing unit 2114 as input, and converts the structure into a tile image and synchronizes the clock by a predetermined method set via the register setting bus 2109. And outputs it to the tile bus 2107.
[0039]
The image output interface 2113 receives the tile image data from the tile bus 2107 as input, converts the structure into a raster image, changes the clock rate, and outputs the raster image to the printer image processing unit 2115.
[0040]
The image rotating unit 2030 rotates image data. The resolution conversion unit 2116 changes the resolution of an image. The color space conversion unit 2117 converts a color space of a color and grayscale image. The binarizing unit 2118 binarizes a multi-level color or grayscale image. The multi-value conversion unit 2119 converts a binary image into multi-value data.
[0041]
The external bus interface unit 2120 receives write and read requests issued by the CPU 2001 via the image ring interfaces (1) to (3) 2147, 2148, 2101 and 2102, the command processing unit 2104, and the register setting bus 2109. This is a bus bridge for converting and outputting to the external bus (3) 2121. In this embodiment, the external bus (3) 2121 is connected to the printer image processing unit 2115 and the scanner image processing unit 2114.
[0042]
The memory control unit 2122 is connected to the memory bus 2108 and writes image data into the image memory (1) and the image memory (2) 2123 by a preset address division according to a request from each image processing unit. Operations such as reading and refreshing are performed as necessary. In this embodiment, an example in which an SDRAM is used as an image memory will be described.
[0043]
The scanner image processing unit 2114 performs corrected image processing on image data scanned by the scanner 2070, which is an image input device. The printer image processing unit performs correction image processing for printer output, and outputs the result to the printer 2095.
[0044]
[Tile image packet format]
The control device 2000 transfers the image data, the command from the CPU 2001, and the interrupt information issued from each block in a packetized format. In the present embodiment, three different types of packets are used: a data packet shown in FIG. 5, a command packet shown in FIG. 6, and an interrupt packet shown in FIG.
[0045]
(Data packet (Fig. 5))
In the present embodiment, the image data is divided into image data 3002 of 32 pixels × 32 pixels and handled. The required header information 3001 and additional image information 3003 are added to the image in tile units to form a data packet.
[0046]
Next, information included in the header information 3001 will be described. Packets are distinguished into data packets, command packets, and interrupt packets based on the value of PacketTypeID 3023 in PcktType 3004 in header information 3001. In the present embodiment, as a 3-bit PacketTypeID,
001b or 101b: Data packet
010b: Command packet
100b: Interrupt packet
Is assigned.
[0047]
The PcktType 3004 includes a RepeatFlag 3022. If the image data and the image additional information 3003 of the data packet and the predetermined information in the header information 3001 are the same as the data packet transmitted immediately before, the RepeatFlag 3022 Is set to 1. In this case, the transfer of the packet is performed only for the header information 3001.
[0048]
The ChipID 3005 indicates the ID of a chip to which a packet is to be transmitted.
[0049]
ImageType 3006 indicates the type of image data. In the present embodiment, the type of image data is defined as follows by using the upper two bits of the ImageType 8 bits.
00b: One pixel of image data is represented by 1 bit.
01b: One pixel of image data is represented by an 8-bit one component.
10b: One pixel of image data is represented by 8 bits and 3 components, for a total of 24 bits.
11b: One pixel of image data is represented by 8 bits and 4 components, for a total of 32 bits.
[0050]
Page ID 3007 indicates a page including the data packet, and Job ID 3008 stores a Job ID to be managed by software.
[0051]
The arrangement order of the data packets on the page is represented by YnXn, which is a combination of the tile coordinates 3009 in the Y direction and the tile coordinates 3010 in the X direction.
[0052]
The data packet includes a data packet in which image data and image additional information of the packet are compressed, and an uncompressed data packet. In the present embodiment, as a compression algorithm, an example is shown in which JPEG is used when image data includes a multi-valued color multi-valued gray scale, binary data is used, and pack bits are used as image additional information.
[0053]
According to the above method, the case where the image data and the image additional information are compressed and the case where the image additional information is not compressed are as follows. It represents that.
[0054]
Also, a Q-TableID 3028 for storing the type of quantization table used when performing compression processing by JPEG is prepared in the compression flag 3017. If there are a plurality of quantization tables, this value is used when data is compressed and decompressed. , The quantization table to be used is switched.
[0055]
The process instruction 3011 is set to the processing order every 8 bits left-justified, and each processing unit shifts the process instruction to the left by 8 bits after the processing. The Process Instruction 3011 stores eight sets of a Unit ID 3024 and a Mode 3025. The Unit ID 3024 specifies each processing unit of the image processing unit 2149, and the Mode 3025 specifies an operation mode in each processing unit. Thus, one packet can be processed continuously up to eight units.
[0056]
PacketByteLength3012 indicates the total number of bytes of the packet.
[0057]
ImageDataByteLength 3015 represents the number of bytes of the image data, ZDataByteLength 3016 represents the number of bytes of the image additional information, and ImageDataOffset 3013 and ZDataOffset 3014 represent the offset value of each data from the head of the packet.
[0058]
SourceID 3018 indicates a source from which the image data and the image additional information have been generated.
[0059]
Ztype 3020 indicates the effective bit width in the image additional information, and the image additional information other than the bits indicated by Ztype 3020 is invalid information. If the Ztype 3020 is 0, it indicates that all the input image additional information is invalid.
[0060]
The ThumbnailData 3021 stores a value representative of the image data of the data packet or less, hereinafter referred to as a thumbnail value. In the present embodiment, the configuration is such that up to four thumbnail values can be stored in ThumbnailData 3021.
[0061]
The Misc 3019 stores necessary information other than the above information. In the present embodiment, a Char-flag 3029 and a Q-TableSel 3030 are prepared. The Char-flag 3029 stores an area signal to which the data packet belongs. The Q-TableSel 3030 stores information for changing a quantization table used at the time of compression and decompression according to the JPEG method.
[0062]
(Packet table (Fig. 8))
FIG. 8 shows a state where the data packet is stored in the RAM 2002. Each data packet is managed by a packet table 6001. The components of the packet table 6001 are as follows. By adding 0 bits to the values of the table, a packet start address 6002 and a packet Byte Length 6005 are obtained.
[0063]
Packet Address Pointer 27 bits + 5b00000 = Packet Top Address
Packet Length 11 bits + 5b00000 = Byte Length of Packet
Note that the packet table 6001 and the chain table 6010 are not divided.
[0064]
The packet table 6001 is always arranged in the scanning direction, and Yn / Xn = 000/00000 / 0011,000 / 002. . . . It is arranged in the order. The entry of the packet table 6001 uniquely indicates one tile. The next entry of Yn / Xmax is Yn + 1 / X0.
[0065]
When a packet in which the RepeatFlag 3002 in the header information 3001 is set is input, the packet is not written in the memory, and the same Packet Address Pointer and Packet Length as the first entry are stored in the packet table entry. . One packet data is indicated by two table entries. In this case, the Repeat Flag 6003 of the second table entry is set.
[0066]
When a packet is divided into a plurality by the Chain DMA, a Divide Flag 6004 is set, and a Chain Block number 6006 of the Chain Block containing the head of the packet is set.
[0067]
An entry of the chain table 6010 is composed of a Chain Block Address 6011 and a Chain Block Length 6012, and 0 is stored in the last entry of the table as both Address and Length.
[0068]
(Command packet format (Fig. 6))
The command packet format is for accessing the register setting bus 2109. By using this packet, the COU 2001 can also access the image memory 2123.
[0069]
The ChipID 4004 stores an ID representing the image processing unit 2149 to which the command packet is to be transmitted. Page ID 4007 and Job ID 4008 store a Page ID and a Job ID for management by software. Packet ID 4009 is represented in one dimension. Only X-coordinate of Data Packet is used.
[0070]
The packet byte length 4010 is fixed at 128 bytes. The packet data section 4002 can store a maximum of 12 commands using a set of an address 4011 and data 4012 as one command. The type of command, write or read, is indicated by CmdType 4005, and the number of commands is indicated by Cmdnum 4006.
[0071]
(Interrupt packet format (Fig. 7))
The interrupt packet format is for notifying an interrupt from the image processing unit 2149 to the CPU 2001. After transmitting the interrupt packet, the status processing unit 2105 must not transmit the interrupt packet until the transmission is permitted next time.
[0072]
The packet byte length 5006 is fixed at 128 bytes. The packet data section 5002 stores status information 5007 of each internal module of the image processing section 2149. The status processing unit 2105 can collect status information of each module in the image processing unit 2149 and send it to the system control unit 2150 collectively.
[0073]
The ID representing the system control unit 2150 that is the destination of the interrupt packet is stored in the ChipID 5004, and the ID representing the image processing unit 2149 that is the source of the interrupt packet is stored in the IntChipID 5005.
[0074]
[Tile compression unit]
FIG. 9 shows the configuration of each compression unit of the tile compression units (1), (2), and (3) 2106 in FIG. The tile compression units (1), (2), and (3) 2106 have the same configuration. In FIG. 9, reference numeral 201 denotes a tile bus interface unit which performs handshake with the tile bus 2107, acquires header information input from the tile bus 2107, image data and image additional information, and Output each data to the processing block. The tile bus interface unit 201 analyzes the header information sent from the tile bus 2107, and if there is any inconsistency in the header information, outputs an interrupt signal corresponding to the inconsistency to a register setting unit 206 described later, and then resets. Stop operation until signal is input.
[0075]
On the other hand, if there is no inconsistency in the header information, the data is transferred to the header information holding unit 202, the first compression processing unit 203, and the second compression processing unit 204, and the header information holding unit 202 stores the header information of the packet. The first and second compression processing units perform compression processing in each compression method. The first and second compression processing units 203 and 204 generate an error signal and report the error signal to the register setting unit 206 when there is a problem during the compression processing.
[0076]
Reference numeral 205 denotes an image ring output unit that acquires processing information, image data, and image additional information from the header information holding unit 202, the first compression processing unit 203, and the second compression processing unit 204, and converts the acquired information into header information. After setting a predetermined value, the data packet of FIG. 5 is generated and output to the image ring interface 2102.
[0077]
Reference numeral 206 denotes a register setting unit which is used to make settings relating to processing inside the tile compression unit 2106. In order to cause the tile compression unit 2106 to perform predetermined compression processing, the register setting unit 206 requires a predetermined value. Need to be set. These settings are performed by using a command packet to send from the system control unit 2150 to the command processing unit 2104 of the image processing unit 2149, and from the command processing unit 2104 to the tile compression unit 2106 via the register setting bus 2109. .
[0078]
The value set in the register setting unit 206 is sent to each compression processing unit, and a process determined by referring to those set values is performed. It should be noted that not only a value is set to the register setting unit 206 using a command packet, but also a setting value held by the register setting unit 206 can be output to the system control unit 2150 using a command packet. .
[0079]
Further, the register setting unit 206 has a register corresponding to an interrupt signal input from the tile bus interface unit 201, and the first compression processing unit 203 and the second compression processing unit 204. After being input, the corresponding register value is set, and then an interrupt signal for notifying the status processing unit 2105 that an interrupt has occurred and a status signal indicating in which block the interrupt has occurred are output.
[0080]
Reference numeral 207 denotes a register setting bus interface unit, which is a block for converting addresses and setting values input to the tile compression unit from the register setting bus 2109 into a format that can be received by the register setting unit 206 and sending the converted data. Note that the register setting bus interface unit 207 not only receives the register setting value from the register setting bus 2109 but also reads the setting value corresponding to the address indicated by the register setting bus from the register setting unit 206 and outputs it to the register setting bus 210. It is also possible.
[0081]
Reference numeral 208 denotes a quantization table, which stores a quantization data sequence to be referred to during a quantization process during a compression process described later. This quantization table 208 can be read / written from the register setting unit 206, and can be read independently of the header information holding unit 202 and the first and second compression processing units 203 and 204. Is a RAM means having three lead ports.
[0082]
[First and second compression processing units 203 and 204]
FIG. 10 shows the internal configuration of the first and second compression processing units 203 and 204 of FIG. In the present embodiment, a case where the image data has an 8-bit configuration, a 24-bit configuration, or a 32-bit configuration, that is, a case where the image data is compressed by the first compression processing unit 203 will be described. However, this description applies to the other compression processing units.
[0083]
In FIG. 10, reference numeral 101 denotes a first data buffer for storing image data sent from the tile bus interface unit 201. When a predetermined amount of data is sent, a JPEG compression buffer connected to the subsequent stage is connected. The image data is output to the unit 110 in a predetermined order. Here, the ImageType 3006 of the header information is input to the first data buffer 101 from the header information holding unit 202, and the order of the image data output to the JPEG compression unit 110 is controlled by the ImageType.
[0084]
Reference numeral 110 denotes a JPEG compression unit. In the present embodiment, the JPEG compression unit 110 compresses image data according to the JPEG method. It should be noted that the JPEG compression unit 110 has three more processing blocks.
[0085]
Reference numeral 102 denotes a DCT conversion unit which, when 64 data are input from the first data buffer 101, performs a discrete cosine transform (DCT) on the input data to convert the input data into frequency components. At this time, the DC component value generated by the discrete cosine transform is output to a thumbnail generation unit 107 described later together with the latch signal. The discrete cosine transform is performed every time 64 data are input, and each time the latch signal and the DC component value are output to the thumbnail generation unit 107. When an error occurs during the DCT conversion operation, the DCT conversion unit 102 outputs an error interrupt signal from the DCT conversion unit 102 to the register setting unit 206.
[0086]
Reference numeral 103 denotes a quantization unit that quantizes the frequency components output from the DCT transformation unit 102 using a predetermined quantization value to generate quantized data. The quantization value is input from a quantization table described later, and the quantization value to be used is determined by analyzing the header information from the header information holding unit 202. When a result of the quantization performed by the quantization unit 103 becomes a value other than a predetermined value, an error interrupt signal is output to the register setting unit 206.
[0087]
A Huffman encoding unit 104 performs a predetermined encoding on the quantized data output from the quantization unit 103 to generate encoded data, and outputs the encoded data to the second data buffer 105. When data that cannot be encoded is input to the Huffman encoding unit 104, an error interrupt signal is output from the Huffman encoding unit 104 to the register setting unit 206.
[0088]
The second data buffer 105 is for storing the encoded data encoded by the Huffman encoding unit 104. When the encoded data for one tile is acquired from the Huffman encoding unit 104, the second data buffer 105 stores the encoded data in the buffer. The capacity of the converted data is output to the image ring output unit 205 as Data Byte Length1. Also, the coded data stored in the second data buffer 105 is output to the image ring output unit 205 according to the request of the image ring output unit 205.
[0089]
A data comparison unit 106 compares the image data input from the tile bus interface unit 201 with the image data stored in the first data buffer 101. The image data sent from the tile bus interface unit 201 is stored in the first data buffer 101, and at the same time, the data comparison unit 106 compares the image data with the image data stored in the portion where the image data is stored.
[0090]
Since the image data sent to the first compression processing unit 203 is stored in the first data buffer 101 immediately before the tile input from the tile bus interface unit 201, the data comparison is performed by the above operation. The unit 106 compares the image data sent from the tile bus interface unit 201 with the image data of the immediately preceding tile in the first compression processing unit 203.
[0091]
When the comparison of the image data for one tile is completed by the data comparing unit 106, the comparison result Compare result 1 is output from the data comparing unit 106 to the image ring output unit 206.
[0092]
Reference numeral 107 denotes a thumbnail generation unit which obtains a DC component value in synchronization with a latch signal output from the DCT conversion unit 102, generates a thumbnail value for each tile by performing calculation and normalization, and generates a thumbnail value for each tile. Output to 205. Note that ImageType 3006 is input from the header holding unit 202 to the thumbnail generation unit 107, and the thumbnail generation unit 107 detects the order of the DC component values sent from the DCT conversion unit 102 by referring to the ImageType, and Generate a thumbnail value for each. The generated thumbnail value is output to the image ring output unit 206, and is stored in a predetermined format in the Thumbnail Data 3021 part of the header information acquired from the header information holding unit 202 in the image ring output unit. After that, the image data is output to the image ring interface 2104 as a data packet together with the image data compressed by the first compression processing unit 203 and the image additional information compressed by the second compression processing unit 204.
[0093]
Reference numeral 109 denotes a quantization table which stores a quantization value for performing quantization in the quantization unit 103. A plurality of quantization tables are stored in the quantization table 109. A predetermined quantization table is selected by a selection signal input from a quantization table selection unit 108 described later, and the quantization Output the coded value. Here, the quantization table is not provided one by one in each JPEG compression unit 110, but is shared by a common memory unit.
[0094]
Reference numeral 108 denotes a quantization table selection unit that outputs a quantization table selection signal to the quantization table 109 to select a predetermined table from a plurality of tables stored in the quantization table 109. ImageType 3006, Mode 3025, and Q-Table Sel 3030 are input from the header information holding unit 202 to the quantization table selection unit 108, and the quantization table selection unit 108 determines a quantization table to be used from these pieces of header information. When the quantization table to be used is determined, the quantization table selection unit 109 outputs a quantization table selection signal to the quantization table 109 so as to select the determined quantization table, and Q-representing the selected quantization table. The table ID is output to the image ring output unit 205.
[0095]
<Second embodiment>
This embodiment differs from the first embodiment in the image processing method. That is, in the first embodiment, JPEG compression is performed, but in the present embodiment, JPEG-compressed image data is expanded.
[0096]
FIG. 11 shows the configuration of the tile extension unit 2103 of FIG. In FIG. 11, reference numeral 705 denotes an image ring input unit, which inputs header information, image data, and image additional information to the header information holding unit 702, the first decompression processing unit 703, and the second decompression processing unit 704.
[0097]
The image ring input unit 705 analyzes the header information sent from the image ring interface (3) 2101 and, if there is any inconsistency in the header information, sends an interrupt signal corresponding to the inconsistency to a register setting unit 706 described later. After that, the operation is stopped until the reset signal is input. On the other hand, if there is no inconsistency in the header information, the data is transferred in the order of the first decompression processing unit 703 and the second decompression processing unit 704, and the first and second decompression processing units 703 and 704 perform image decompression processing in parallel. I do. The first and second expansion processing units 703 and 704 have the same configuration. If the first decompression processing unit 703 detects an abnormal operation while performing the decompression processing in the first decompression processing unit 703, the first decompression processing unit 703 outputs an interrupt signal corresponding to the content of the abnormal operation. After outputting to the register setting unit 706, the operation is stopped until a reset signal is input. A tile bus interface unit 701 performs handshaking with the tile bus 2107, outputs header information, image data, and image additional information to the tile bus 2107, and processes blocks connected to the tile bus 2107. Output each data to.
[0098]
Reference numeral 706 denotes a register setting unit for making settings relating to processing inside the tile expansion unit 2103. In order for the tile expansion unit 2103 to perform predetermined expansion processing, the register setting unit 706 requires a predetermined value. Need to be set. These settings are performed by using a command packet to send from the system control unit 2150 to the command processing unit 2104 of the image processing unit 2149, and from the command processing unit 2104 to the tile expansion unit 2103 via the register setting bus 2109. The value set in the register setting unit 706 is sent to the first decompression processing unit 703 and the second decompression processing unit 704, and both decompression processing units perform processing determined by referring to those set values. It should be noted that not only the value is set to the register setting unit 706 using the command packet, but also the set value held by the register setting unit 706 can be output to the system control unit 2150 using the command packet. .
[0099]
The register setting unit 706 has registers corresponding to interrupt signals input from the tile bus interface unit 701, the first decompression unit 703, and the second decompression unit 704, and receives an interrupt signal from any of the blocks. Then, after setting the value of the corresponding register, it outputs an interrupt signal notifying to the status processing unit 2105 that the interrupt has occurred, and a status signal indicating in which block the interrupt has occurred.
[0100]
Reference numeral 707 denotes a register setting bus interface, which is a block for converting an address and a setting value input from the register setting bus 2109 to the tile decompression unit into a format that can be received by the register setting unit 706 and sending the converted value. Note that the register setting bus interface unit 707 not only receives the register setting value from the register setting bus 2109 but also reads the setting value corresponding to the address indicated by the register setting bus 2109 from the register setting unit 706 and sends it to the register setting bus 2109. It is also possible to output.
[0101]
A quantization table 708 stores a quantization value for performing inverse quantization in the inverse quantization unit 803. A plurality of quantization tables are stored in the quantization table 708. A predetermined quantization table is selected by a selection signal input from a quantization table selection unit 808 described later, and the quantization table is quantized by the inverse quantization unit 803. Output the value. Here, the quantization table is not provided one by one in each JPEG compression unit 810, but is used by sharing a common memory unit.
[0102]
[Image expansion unit]
FIG. 12 shows the configuration of the first and second decompression processing units 703 and 704 of FIG. A case where the image data has an 8-bit configuration, a 24-bit configuration, or a 32-bit configuration, that is, a case where the image data is decompressed by the first decompression processing unit 703 will be described. However, the description is the same for the second decompression processing unit.
[0103]
In FIG. 12, reference numeral 801 denotes a first data buffer for storing image data sent from the image ring input unit 705. When a predetermined amount of data is sent, a JPEG decompression device connected to the subsequent stage is sent. Image data is output to unit 810 in a predetermined order. To the first data buffer 801, ImageType 3006 of the header information is input from the header information holding unit 702, and is used for JPEG decompression processing in the JPEG decompression unit 810. In the JPEG decompression unit 810, there are three processing blocks.
[0104]
Reference numeral 802 denotes a Huffman decoding unit that performs predetermined decoding when JPEG compressed data is input from the data buffer 801, and outputs the result to the inverse quantization unit 803. An inverse quantization unit 803 performs inverse quantization on the data output from the Huffman decoding unit 802 using a predetermined quantization value. Note that the inverse quantization value is input from a quantization table described later, and the quantization value to be used is determined by analyzing the header information from the header information holding unit 702. Reference numeral 804 denotes a DCT inverse transform unit that performs DCT inverse transform of the frequency component from the inverse quantization unit 803.
[0105]
Reference numeral 805 denotes a second data buffer for storing the decompressed image data, and when acquiring the image data for one tile, outputs it to the tile bus interface unit 701. A quantization table 809 stores a quantization value for performing inverse quantization in the inverse quantization unit 803. A plurality of quantization tables are stored in the quantization table 809. A predetermined quantization table is selected by a selection signal input from a quantization table selection unit 808 described later, and the quantization table is quantized by the inverse quantization unit 803. Output the value.
[0106]
A quantization table selection unit 808 selects a predetermined table from a plurality of tables stored in the quantization table 809 by outputting a quantization table selection signal to the quantization table 809. Image Type 3006, Mode 3025, and Q-Table Sel 3030 are input from the header information holding unit 702 to the quantization table selection unit 808, and Q-Table ID is input from the image ring input unit 705. The unit 808 determines a quantization table to be used from the header information. When the quantization table to be used is determined, the quantization table selection unit 808 outputs a quantization table selection signal to the quantization table 809 so as to select the determined quantization table. It is to be noted that the quantization table 809 is not provided one by one in each JPEG decompression unit 801 but is used by sharing a common memory unit.
[0107]
As described above, by using the selection information of the quantization table in the header information added to the image data, it is not necessary to reset the image processing mode via the CPU, and the image compressed by the image compression unit is not required. When data is expanded by the image expansion unit, an appropriate quantization table can be selected. In addition, as a multi-function process, for example, when simultaneously performing a process of rotating another image in the memory while writing out an image in the memory and writing back to the memory, the image processing is performed on a tile basis. , And an appropriate quantization table is automatically selected for each tile, so that parallel operation is facilitated.
[0108]
That is, a data packet for printing is generated from the image data for printing in the RAM 2002, and a print output process is performed on the route of the RAM 2002 → the image ring interface 2101 → the tile expansion unit 2103 → the image output interface 2113 → the printer 2095. Then, a data packet for rotation is generated from the image data for rotation in the RAM 2002, and an image rotation process is performed by taking a route of RAM 2002 → image ring interface 2101 → tile expansion unit 2103 → image rotation unit 2030 → image ring interface 2101 → RAM 2002. .
[0109]
At this time, in each expansion unit of the tile expansion unit 2103, for example, the first expansion processing unit selects a quantization table suitable for print output according to the header information of the data packet for printing, and expands the tile image. 2 The expansion processing unit can expand the tile image by selecting a quantization table suitable for the rotation processing according to the header information of the data packet for rotation. Note that, for one processing unit, each processing may be assigned in a time-division manner, such as switching a table for each sequentially input data packet.
[0110]
(Other embodiments)
In the above embodiment, the present invention has been described by taking the controller of the digital copying machine as an example. However, the present invention is not limited to this, and may be applied to other image processing apparatuses such as a printer, a scanner, and an expansion card for connecting to a PC. It goes without saying that is also applicable. The present invention is also applied to the compression / transmission / reception / expansion units of each unit even when image data communication between units (for example, a scanner unit and a printer unit) is performed in serial data communication in the form of packet data. be able to.
[0111]
In the above-described embodiment, the present invention has been described by taking compression processing and decompression processing as examples. However, the present invention is not limited to this, and uses tables such as binarization processing, color conversion processing, and resolution conversion processing. Needless to say, the present invention can be similarly applied to other image processing capable of performing the above processing.
[0112]
Hereinafter, examples of embodiments of the present invention will be listed.
[0113]
Embodiment 1 An image processing apparatus that processes a divided image obtained by dividing an original image,
Storage means for storing a table for processing the divided image,
Input means for inputting a data packet obtained by adding processing information to the divided image;
A plurality of image processing means for performing image processing on the divided image of the data packet input by the input means according to the table,
The image processing apparatus, wherein the plurality of image processing units share the same table in the storage unit by selecting the table according to the processing information of the data packet and using the table for the image processing.
[0114]
[Second Embodiment] In the first embodiment, the image processing unit may perform an image compression process by selecting and using a quantization table stored in the storage unit according to mode switching information included in the processing information. An image processing apparatus characterized by the above-mentioned.
[0115]
[Embodiment 3] In Embodiment 1, the image processing unit may perform image expansion processing by selecting and using a quantization table stored in the storage unit according to mode switching information included in the processing information. An image processing apparatus characterized by the above-mentioned.
[0116]
[Embodiment 4] An image processing apparatus according to any one of Embodiments 1 to 3, further comprising a generation unit configured to generate the divided image by dividing the original image into image data in units of rectangular images. .
[0117]
[Embodiment 5] An image processing method for processing a divided image obtained by dividing an original image,
An input step of inputting a data packet obtained by adding processing information to the divided image;
A plurality of image processing steps of performing image processing on the divided image of the data packet input in the input step according to a table stored in storage means,
In the image processing method, the plurality of image processing steps share the same table in the storage unit by selecting the table according to processing information of the data packet and using the table for the image processing.
[0118]
[Embodiment 6] An image processing method for processing a divided image obtained by dividing an original image,
An input step of inputting a data packet obtained by adding processing information to the divided image;
A plurality of image processing steps of performing image processing on the divided image of the data packet input in the input step according to a table stored in storage means,
In the image processing method, the plurality of image processing steps share the same table in the storage unit by selecting the table according to processing information of the data packet and using the table for the image processing.
[0119]
[Embodiment 7] An image processing method for processing a divided image obtained by dividing an original image,
An input step of inputting a first data packet obtained by adding processing information to the divided image of the first original image, and a second data packet obtained by adding processing information to the divided image of the second original image;
A plurality of image processing steps of performing image processing on the divided images of the first and second data packets input in the input step according to the table,
The plurality of image processing steps select a first table according to the processing information of the first data packet, process the divided image, and select a second table according to the processing information of the second data packet. An image processing method, comprising: performing a parallel process of a process relating to a first original image and a process relating to a second original image by processing a divided image.
[0120]
【The invention's effect】
As described above, according to the present invention, the selection of the quantization table at the time of compressing and expanding the tile image is performed without using the CPU by using the quantization table selection information in the header information added to the image data. By doing so, the load on the CPU is reduced, and the parallel operation of image processing is facilitated while increasing the processing speed of image processing.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a block diagram illustrating an example of a configuration of a system control unit 2150 in FIG.
FIG. 3 is a block diagram illustrating a configuration of an image processing unit 2149 of FIG. 1;
FIG. 4 is a diagram illustrating an example in which the multifunction system in FIG. 1 is connected to a LAN 1010.
FIG. 5 is a diagram illustrating an example of a format of a data packet.
FIG. 6 is a diagram illustrating an example of a format of a command packet.
FIG. 7 is a diagram illustrating an example of a format of an interrupt packet.
FIG. 8 is a diagram illustrating an example of a format of a packet table and a chain table.
9 is a block diagram illustrating an example of a configuration of a tile compression unit (1), (2), (3) 2106 in FIG.
FIG. 10 is a block diagram illustrating an example of a configuration of first to third compression processing units 202, 203, and 204 in FIG. 9;
11 is a block diagram illustrating an example of a configuration of a tile expansion unit 2103 in FIG.
FIG. 12 is a block diagram illustrating an example of a configuration of first to third decompression processing units 702, 703, and 704 in FIG. 11;
[Explanation of symbols]
201 Tile bus interface
202 Header information holding unit
203 first compression processing unit
204 second compression processing unit
205 Image ring input unit
206 Register section
207 Register setting bus interface
2000 control unit
2106 Tile compression unit
2149 Image processing unit
2150 System control unit

Claims (1)

An image processing apparatus for processing a divided image obtained by dividing an original image,
Storage means for storing a table for processing the divided image,
Input means for inputting a data packet obtained by adding processing information to the divided image;
A plurality of image processing means for performing image processing on the divided image of the data packet input by the input means according to the table,
The image processing apparatus, wherein the plurality of image processing units share the same table in the storage unit by selecting the table according to the processing information of the data packet and using the table for the image processing.

Images