JP2003069831A - Image processor, image display method and computer program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To quickly show an image on a display in order to facilitate a selection operation of the image data of an original image desired by a user. SOLUTION: In an image processor for dividing the image data into tiles composed of 1024 pixels in total obtained by multiplying horizontally scanned 32 pixels by vertically scanned 32 pixels and performing image processing in the unit of a tile, a thumbnail value is pregenerated in each related tile before displaying a reduced image. If the employed image data compressing method is a JPEG method, a direct current component value generated during compression is utilized to generate a thumbnail.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the field of image processing for compressing / decompressing image data.

[0002]

2. Description of the Related Art Conventionally, in the field of image processing for compressing / decompressing image data, prior to printing a reproduced image based on the image data, or by transferring the image data to a communication network (hereinafter, simply referred to as “network”). An image having a function that allows the user to recognize the image data to be processed by the icon composed of the reduced image displayed on the display based on the image data before being transferred to an external device via A processing device (eg a computer) has been proposed.

When displaying a reduced image in such an image processing apparatus, conventionally, when a reduced display by the image processing apparatus is required, the image reading apparatus reads the target image to obtain the acquired image data. A reduced image is often generated by creating a reduced image for display or by performing a predetermined reduction process on the image data stored in the image processing apparatus.

[0004]

However, in the above conventional technique, in order to display a reduced image in an image processing apparatus such as a computer, the image data of the original image (target image) of the reduced image is read by the image reading apparatus. Need to read. Further, when a reduced image is generated and displayed from the image data stored in the image processing device, it is necessary to perform predetermined image processing inside the image processing device. In particular, when the image data of the original image is stored in a compressed state, it is necessary to decompress (decompress) the compressed image data once and then generate a reduced image.

Therefore, when the user is trying to determine the content of the image data based on the reduced image, the user often feels troublesome with respect to the time required until the reduced image is displayed.

Therefore, an object of the present invention is to provide an image processing apparatus, an image display method, and a computer program for promptly displaying an image on a display in order to facilitate an operation of selecting image data of an original image desired by a user. To do.

[0007]

To achieve the above object, an image processing apparatus according to the present invention is characterized by the following configuration.

That is, with respect to image data representing a partial image of an original image divided into a predetermined size (for example, one tile image consisting of 32 pixels × 32 pixels: see FIG. 3), a plurality of partial images constituting the partial image are formed. Pixels (eg 8 pixels x 8 pixels)
Image processing means for generating a representative value corresponding to the plurality of pixels by performing a predetermined image processing for each, and a representative value generated in the plurality of pixel units by the image processing means,
A storage unit for storing the partial image as one unit, and a display unit for displaying an image corresponding to the original image based on a plurality of representative values of the partial image unit read out from the storage unit for the original image. And image display means for displaying the image.

In a preferred embodiment, the image processing means is an image compression means for performing image compression based on a predetermined image compression method as the predetermined image processing (for example, image compression processing of JPEG compression method). The image displayed by the image display means has a lower resolution than the original image. In this case, preferably, the representative value generated by the image processing means is a thumbnail value, and the low-resolution image displayed by the image display means is a thumbnail including a reduced image corresponding to the original image. Is good.

Preferably, in the above case,
The representative value generated by the image compression by the JPEG compression method is D generated by the discrete cosine transform.
A value obtained by normalizing the C component value may be adopted.

Further, for example, in the case of performing image compression by the JPEG compression method, each partial image divided into the predetermined size has a size which is an integral multiple of the number of pixels required for performing the image compression by the JPEG compression method. It is good to

The same object can also be achieved by an image display method corresponding to the image processing apparatus having the above-mentioned configurations.

The same object is also achieved by a program code for realizing the image processing apparatus having the above-described configurations by a computer and a computer-readable storage medium storing the program code.

Further, the same object is also achieved by a program code which gives an operation instruction of an image display method corresponding to the image processing apparatus having the above-mentioned respective configurations, and a computer-readable storage medium in which the program code is stored. To be achieved.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of an image processing apparatus according to the present invention will be described below in detail with reference to the drawings.

<System Configuration> First, the overall configuration of a network system including an image processing apparatus (FIG. 10), which is a feature of this embodiment, will be described.

FIG. 9 is a diagram illustrating an overall configuration of a network system including the image processing apparatus according to this embodiment.

In the figure, reference numerals 1001 and 1020 denote image processing apparatuses (FIG. 10) according to the present embodiment, each of which is composed of a scanner and a printer, and which locally stores image data of an original image read from the scanner. A printer can print a reproduced image based on image data received from the LAN (1010) or transferred to an external device via the area network (1010) (hereinafter, LAN). Also,
The image processing apparatuses 1001 and 1020 use the facsimile transmission function (not shown) to transfer the image data acquired from the scanner to the PSTN.
Alternatively, a reproduced image based on image data transmitted to the ISDN (1030) or received from the PSTN or ISDN can be printed by the printer.

A database server 1002 manages a binary image and a multivalued image read by the image processing apparatus (1001) as a database. A database client 1003 is a database client of the database server (1002), and an operator can browse / search image data stored in the database (1002).

Reference numeral 1004 denotes an electronic mail server, which can receive image data obtained by using a scanner in the image processing apparatus (1001) as an attached file of an electronic mail. Reference numeral 1005 denotes an e-mail client, which is capable of receiving and viewing e-mails received by the e-mail server (1004) and sending e-mails.

1006 is a W that provides an HTML document to the LAN (1010)
The WW server can print out the data of the HTML document provided by the WWW server by the image processing apparatus (1001) on a recording paper or the like.

A router 1007 connects the LAN (1010) to the Internet / Intranet (1012). The database server (1002), WWW server (1006), e-mail server (100
4), the same device as the image processing device (1001)
They are connected as 0, 1021, 1022, 1023. On the other hand, the image processing device (1001) uses the PSTN or ISDN (1030) to
It is possible to send and receive with the X device (1031).

A printer (1040) is installed on the LAN (1010).
Are connected, and the image data acquired by using the scanner of the image processing apparatus (1001) can be printed out on a recording sheet.

<Image Processing Devices 1001 and 1020> FIG. 10 is a block diagram showing the overall configuration of the image processing device in this embodiment.

In the figure, Controller Unit (2000)
Is connected to the scanner (2070) which is an image input device and the printer (2095) which is an image output device.
(2011) and public network (WAN) (2051), it is a controller that inputs / outputs image information and device information and develops images of PDL (Page Description Language) data by connecting to a communication network.

Note that the scanner (2070) and the printer (2095) are generally configured at present, and detailed description thereof in this embodiment will be omitted.

The CPU (2001) is a processor that controls the entire system of the image processing apparatus according to this embodiment. In this embodiment, two CPUs are used in the image processing devices 1001 and 1020, and these two CPUs share a common CP.
Connected to U-bus (2126), and also system bus bridge
(2007).

The system bus bridge (2007) is a bus switch, and includes a CPU bus (2126), a RAM controller (2124),
ROM controller (2125), IO bus 1 (2127), sub bus switch (2128), IO bus 2 (2129), image ring interface 1 (2147), and image ring interface 2 (2
148) is connected.

The sub-bus switch (2128) is a second bus switch, and includes an image DMA1 (2130), an image DMA2 (2132), a font expansion unit (3134), a sort circuit (2135), and a bitmap trace unit ( 2136) is connected, and connects to the system bus bridge while arbitrating memory access requests output from these DMAs.

The RAM (2002) is a system work memory for operating the CPU (2001), which is controlled by the RAM controller (2124), and also an image memory for temporarily storing image data. In this embodiment, RA
Direct RDRAM is adopted as an example in M (2002).

The ROM (2003) is a boot ROM, which is controlled by the ROM controller (2125), and stores the system boot program.

The image DMA 1 (2130) is connected to the image compression unit (2131) and controls the image compression unit (2131) based on the information set via the register access ring (2137). The uncompressed data temporarily stored in the RAM (2002) is read out, the read uncompressed data is compressed, and the compressed data is written back (stored).
In this embodiment, JPEG (Joint Photographic Experts Group) is adopted as an example of an image compression algorithm.

The image DMA2 (2132) is connected to the image decompression unit (2133) and controls the image decompression unit (2133) based on the information set via the register access ring (2137). The compressed data temporarily stored in the RAM (2002) is read, decompressed, and the decompressed data is written back. In this embodiment, JPEG is adopted as an example of an image expansion algorithm.

The font decompression unit (2134) uses the font code included in the PDL data externally transferred via the network such as the LAN interface (2010), based on the R code.
Decompresses compressed font data stored in OM (2003) or RAM (2002). In this embodiment, an example in which the FBE algorithm is adopted is shown.

The sort circuit (2135) is a circuit for rearranging the order of the objects in the display list generated at the stage of expanding the PDL data.

The bit map trace circuit (2136) is a circuit for extracting edge information from the bit map data.

The IO bus 1 (2127) is a kind of internal IO bus, and is a controller of a USB bus which is a standard bus, a USB interface (2138), a general-purpose serial port (2139), an interrupt controller (2140), and a GPIO interface. (2141) is connected. Bus arbiter for IO bus 2
(Not shown) is included.

The operation unit I / F (2006) is an interface of the operation unit (UI) (2012) and outputs image data to be displayed on the operation unit (2012) to the operation unit (2012). In addition, the information input by the system user from the operation unit (2012) is stored in the CPU.
(2001).

The IO bus 2 (2129) is a kind of internal IO bus, and includes general-purpose bus interfaces 1 and 2 (2142) and LAN.
The controller (2010) is connected. In the present embodiment, the IO bus 2 includes a bus arbiter (not shown).

The general-purpose bus interface (2142) is a bus bridge composed of two identical bus interfaces and supporting a standard IO bus. In this embodiment, an example in which the PCI bus (2143) is adopted is shown.

The HDD (2004) is a hard disk drive for storing system software, image data, etc.,
One PCI bus via disk controller (2144)
Connected to (2143).

The LAN controller (2010) has a MAC circuit (214
5), information is input / output by connecting to the LAN (2011) via the PHY / PMD circuit (2146). The Modem (2050) inputs / outputs information by connecting to the public line (2051).

In this embodiment, the image ring interface 1 (2147) and the image ring interface 2 (2
148), by connecting the system bus bridge (2007) and the image ring (2008) that transfers image data at high speed, the data compressed after tiling is transferred to the RAM (2002) and the tile image processing unit ( 2149) is a DMA controller that transfers data to and from it.

The image ring (2008) is composed of a pair of unidirectional connection paths (image ring 1 and image ring 2). Image Ring (2008) is a tile image processing unit
In (2149), via the image ring interface 3 (2101) and the tile image interface 4 (2102), the tile decompression unit (2103), the command processing unit (2104), the status processing unit (2105), the tile compression unit ( 2106). In this embodiment, two sets of tile expansion units (2103) and three sets of tile compression units are used.
An example is shown that is implemented as a set.

The tile decompression unit (2103) is connected to the image ring interfaces 3 and 4 as well as the tile bus (2107).
The compressed image data input from the image ring is expanded and the expanded image data is tiled (2107)
It is a bus bridge to transfer to. In this embodiment, JPEG
An example in which a decompression algorithm by the Packbits method is adopted will be shown.

The tile compression unit (2106) is connected to the image ring interfaces 3 and 4, and the tile bus (2107).
Connected to the tile bus, compresses the uncompressed image data input from this tile bus, and compresses the compressed image data to the image ring (2
It is a bus bridge to transfer to (008). In this embodiment,
An example in which a compression algorithm based on JPEG and the Packbits method is adopted as in the tile decompression unit is shown below.

The command processing section (2104) is connected to the register ring bus (2109) in addition to the connections to the image ring interfaces 3 and 4, and is input via the image ring 2008 from the CPU (2001). The issued register setting request is written in the corresponding block connected to the register setting bus (2109). Further, based on a register read request issued by the CPU (2001), the information is read from the corresponding register via the register setting bus and the read information is transferred to the image ring interface 4 (2102).

The status processing unit (2105) is an image processing unit (2105).
149) Monitors internal information and, if necessary, creates an interrupt bucket for issuing an interrupt to the CPU (2001). The generated interrupt bucket is
It is output to the image ring interface 4.

In the tile bus (2107), in addition to the above blocks, a rendering unit interface (2110), an image input interface (2112), an image output interface (2113), a multi-value conversion unit (2119) and a binarization unit. (2118), color space conversion unit (2117), image rotation unit (2030), and resolution conversion unit (2
Each functional block of 116) is connected.

Rendering unit interface (2110)
Is an interface for inputting a bitmap image generated by a rendering unit (2060) described later. The rendering unit (2060) and the rendering unit interface (2110) are connected by a general video signal (2111).

Rendering unit interface (2110)
Has a function of connecting to the memory bus (2108) and the register setting bus (2109) in addition to the tile bus (2107). The rendering unit interface (2110) performs structural conversion of the input raster image into a tile image according to a predetermined method set via the register setting bus (2109), and at the same time performs clock synchronization and synchronization. The converted tile image is output to the tile bus (2107).

The image input interface (2112) tiles the raster image data corrected by the scanner image processing unit (2114), which will be described later, according to a predetermined method set via the register setting bus (2109). The structure is converted into an image and the clocks are synchronized, and the synchronized tile image is output to the tile bus (2107).

The image output interface (2113) structurally converts the tile image data input from the tile bus (2107) into a raster image and changes the clock rate, and the changed raster image is subjected to printer image processing. Division (211
Output to 5).

The image rotation unit (2030) rotates image data. The resolution conversion unit (2116) also changes the resolution of the image.

The color space conversion unit (2117) converts the color spaces of the color and gray scale images. Binarization part (2118)
Binarizes a multi-valued (color, grayscale) image.
Further, the multi-value conversion unit (2119) converts the binary image into multi-value data.

The external bus interface unit (2120) includes image ring interfaces 1 to 4 and a command processing unit (2
104) and register setting bus (2109)
This is a bus bridge for converting and outputting the write and read requests issued by 01) to the external bus 3 (2121). In the present embodiment, the external bus 3 (2121) is connected to the printer image processing unit (2115) and the scanner image processing unit (2114).

The memory control unit (2122) has a memory bus (2108).
The image memory 1 and the image memory 2 (2123) are connected to the image memory 1 and the image memory 2 (2123) by preset address division according to the request of the printer image processing unit (2115) and the scanner image processing unit (2114). Operations such as data writing, reading, and refreshing are performed as necessary. In this embodiment, an example in which an SDRAM is used as the image memory (2123) is shown.

The scanner image processing unit (2114) performs corrected image processing on the image data generated by scanning the original image by the scanner (2070) which is an image input device.
The printer image processing unit (2115) performs corrected image processing for printer output, and the processing result is printed by the Printer (2095).
Output to.

Then, the rendering unit (2060) develops the PDL code or the intermediate display list into a bitmap image.

Next, the structure of image data handled inside the above-described image processing apparatus will be described with reference to FIGS. 11 to 14.

<Tile image (packet) format>
In the present embodiment, the System described above with reference to FIG.
In ControllerUnit (2000), image data, CPU (200
The command according to 1) and the interrupt information issued from each block are transferred in packetized form. More specifically, three different types of packets, the data packet shown in FIG. 11, the command packet shown in FIG. 12, and the interrupt packet shown in FIG.
Used inside the Unit (2000).

<Data Packet (FIG. 11)> FIG.
It is a figure which shows the data format of an image packet. In this embodiment, the image data is 32 pixels x 32.
It is handled in the state that it is divided into image data (3002) of Tile unit of pixel. Then, in the present embodiment, necessary header information (3001), image additional information, etc. (3003) are added to the image data (3002) in units of Tile, and are treated as a data packet. The information included in the header information (3001) will be described below.

The packet is PcktTy in the header information (3001).
The packet type ID (3023) value in the pe (3004) distinguishes between a data packet, a command packet, and an interrupt packet. In the present embodiment, PacketType
001b or 101b: data packet, 010b: command packet, 100b: interrupt packet, are assigned to the ID 3 bits.

In addition, in PcktType (3004), RepeatFlag (3
022) is included, and the predetermined information in the image data and image additional information (3003) of the data packet and the header information (3001) is the same as the data packet transmitted immediately before, RepeatFlag (3022) Is set to 1. In this case, only the header information (3001) is transferred for the packet.

ChipID (3005) indicates the ID of the chip that is the target for transmitting the packet. ImageType (3006) is
Indicates the type of image data. In this embodiment, ImageTyp
The upper 2 bits of e8 bits are used to define the type of image data as follows.

That is, the upper 2 bits are -In case of 00b: 1 pixel of image data is represented by 1 bit.

In case of 01b, image data of one pixel is represented by one component of 8 bits.

In the case of 10b, image data of 1 pixel is represented by 8 bits, 3 components, and 24 bits in total.

In the case of 11b, the image data of one pixel is represented by 8 bits, 4 components, and 32 bits in total.

PageID (3007) indicates a page including a data packet, and JobID (3008) stores a Job ID for managing by software. The order of the data packets on the page is the Tile coordinate (3009) in the Y direction and the X direction.
It is a combination of Tile coordinates (3010) and is represented by YnXn.

In the data packet, the image data and the image additional information (for example, various types of information such as the quantization number table and the image size) included in the packet may be compressed or uncompressed. . In the present embodiment, an example in which JPEG is used when the image data is multi-valued color (including multi-valued gray scale), and Packbits is used when the image data is binary and the image additional information is used as the compression algorithm.

Further, the distinction between the case where the image data and the image additional information are compressed by the above method and the case where the image data is not compressed is made by referring to ImageData (302) in CompressFlag (3017).
When 6) and Zdata (3027) are 1, it indicates compressed data, and when 0, it indicates non-compressed data.

Further, in the CompressFlag (3017), a Q-TableID (3028) for storing the type of the quantization table used when performing the compression processing by JPEG is prepared, and when there are a plurality of quantization tables, At the time of data compression and decompression, the quantization table to be used is switched by referring to this value.

Process Instruction (3011) is left-justified 8
Set processing order for each bit, and each processing unit will be
Shift s Instruction to the left by 8 bits. Process
Instruction (3011) stores eight sets of Unit ID (3024) and Mode (3025). UnitID (3024) is the image processing unit
Each processing unit of (2149) is specified, and Mode (3025) sets each processing Un
Specify the operation mode for it. As a result, one packet can be continuously processed up to 8 Units.

PacketByteLength (3012) indicates the total number of bytes in the packet. ImageDataByteLengh (3015) represents the number of bytes of image data, ZDataByteLength (3016)
Represents the number of bytes of additional image information, ImageDataOffset
(3013) and ZDataOffset (3014) represent Offset values from the beginning of the packet for each data.

SourceID (3018) indicates a source from which image data and image additional information are generated. Ztype (3020) indicates the effective bit width in the image additional information, and the image additional information other than the bit indicated by Ztype (3020) is invalid information. Zt
When ype (3020) is 0, it means that all the input image additional information is invalid.

The ThumbnailData (3021) stores a representative value (hereinafter referred to as a thumbnail value) representing the image data of the data packet. In this embodiment, thumbnailData (3021)
Up to four thumbnail values can be stored in.

Misc (3019) stores necessary information in addition to the above information. In this embodiment, Char-flag (302
9) and Q-Table Sel (3030) are prepared. Char-flag
The area signal to which the data packet belongs is stored in (3029). Q-TableSel (3030) stores information for changing the quantization table used for compression and decompression by the JPEG method.

<Packet Table (FIG. 14)> FIG. 14 is a diagram showing the data structure of the packet table, showing the state in which the data packet is stored in the RAM (2002). Each data packet is managed by Packet Table (6001).

The constituent elements of the Packet Table (6001) are as follows. When 0 is added to the Table value by 5 bits, the packet start address (6002) and the packet Byte Length
It becomes (6005). That is, Packet Address Pointer (27bit)
+ 5b00000 = Packet start Address, Packet Length (11
bit) + 5b00000 = Byte Length of Packet, still Packet T
able (6001) and Chain Table (6010) shall not be divided.

The Packet Table (6001) is always arranged in the scanning direction, and is arranged in the order of Yn / Xn = 000/000, 000 / 001,000 / 002, .... Entry of this Packet Table (6001)
Indicates a unique Tile. Also, the next E of Yn / Xmax
ntry is Yn + 1 / X0.

When a packet in which the RepeatFlag (3002) in the header information (3001) is set is input, the packet is not written in the memory and the Entry of the Packet Table has the same Packet Address as the first Entry. Pointer, Packet
Length is stored. 1 Packet Data to 2 Tables
Entry will point to it, in this case the second Tabl
Repeat Flag (6003) of e Entry is set.

When the Packet is divided into multiple by the Chain DMA, Divide Flag (6004) is set and the Chain Block number (600 of the Chain Block containing the beginning of the Packet is set.
6) is set.

Entry of Chain Table (6010) is Chain Bloc
It consists of k Address (6011) and Chain Block Length (6012), and 0 is stored in both Address and Length in the last Entry of Table.

<Command Packet Format (FIG. 12)> FIG. 1
2 is a diagram showing a data format of a command packet. In this embodiment, Packet Format is used to access the register setting bus (2109). By using this packet, it is possible to access the image memory (2123) from COU (2001).

The ChipID (4004) stores an ID representing the image processing unit (2149) which is the destination of the command packet. Pa
The geID (4007) and JobID (4008) store the Page ID and Job ID for software management. Where Packet ID
(4009) is expressed in one dimension, and Data Packet X-coordinate
Only (X coordinate) is used.

In this embodiment, the packet byte length (4010) is fixed at 128 bytes. The packet data part (4002) contains one set of address (4011) and data (4012).
It is possible to store a maximum of 12 commands as one command. The command type of write or read is indicated by CmdType (4005), and the number of commands is Cmdnum.
It is indicated by (4006).

<Interrupt Packet Format (FIG. 13)> FIG. 13 is a diagram showing the data format of an interrupt packet. In this embodiment, Packet Format is
It is used to notify an interrupt from the image processing unit (2149) to the CPU (2001). The status processing unit (2105)
After sending the rrupt Packet, do not send the Interrupt Packet until the next transmission permission is granted.

Packet byte length (5006) is 128 bytes
It is fixed at. The packet data section (5002) stores status information (5007) of each internal module of the image processing section (2149). The status processing unit (2105) can collect the status information of each module in the image processing unit (2149) and send it collectively to the system control unit (2150).

The ChipID (5004) stores an ID representing the system control unit (2150) that is the destination of the Interrupt Packet,
The IntChipID (5005) stores an ID representing the image processing unit (2149) that is the transmission source of the Interrupt Packet.

<Tile Compressing Unit (2106)> Details of the tile compressing units 1 to 3 (2106) shown in FIG. 10 will be described below.

FIG. 2 shows the tile compression unit in this embodiment.
It is a block diagram showing an internal configuration of (2106).

In the figure, reference numeral 201 denotes a tile bus interface unit, which performs handshake with the tile bus 2107 to acquire header information, image data and image additional information input from the tile bus 2107, and the acquired information. The information is output to each processing block connected to the subsequent stage of the tile bus interface unit 201.

In addition, the tile bus interface section 20
1 analyzes the header information sent from the tile bus 2107, and if the result of the analysis indicates that the header information has a contradiction, after outputting an interrupt signal corresponding to the contradiction content to the register setting unit 206 described later, Reset signal (not shown)
Operation is stopped until is input.

On the other hand, the tile bus interface section 20
When the header information has no contradiction, 1 outputs the header information to the header information holding unit 202 connected in the subsequent stage, then acquires the image data and the image additional information from the tile bus 2107, In accordance with ImageType (3006), the first compression processing unit 203 (compression processing by the JPEG method in this embodiment) and the second compression processing unit 204 (compression processing by the Packbits method in this embodiment) are respectively performed. Outputs image additional information.

Specifically, ImageTyp in the header information
When the upper 2 bits of e are 00b which represent 1-bit image data, in order to perform the compression processing by the Packbits method,
The first compression processing unit 203 outputs the image data to the second compression processing unit 204 without using it.

If the upper 2 bits of ImageType are other than 00b, the tile bus interface unit 201 determines that JPEG
In order to perform compression processing by the method, the image data is output to the first compression processing unit 203, while the image additional information is output to the second compression processing unit 204. However, when Ztype (3020) is 0, the input image additional information is invalid, so
In this case, the compression processing by the second compression processing unit 204 is not performed.

Reference numeral 202 denotes a header information holding unit, which is a block for holding header information while the first compression processing unit 203 and the second compression processing unit 204 are compressing image data and image additional information. is there. Further, the header information holding unit 202 stores the information necessary for the compression processing selected from the stored header information in the first compression processing unit 20.
3 and the second compression processing unit 204.

The first compression processing unit 203 is a JPEG compression processing unit for performing JPEG compression in the present embodiment, and when the image data has a multi-bit structure, compresses the image data according to the JPEG compression algorithm. To do. The details of the first compression processing unit 203 will be described later with reference to FIG.

The first compression processing unit 203 is also provided with a buffer (not shown) for storing the input image data for one tile, and immediately before the image data of the next packet is input. By holding the image data of the processed packet, the image data newly input from the tile bus interface unit 201 is compared with the image data already stored in the buffer (not shown). The comparison result is sent to the image ring output unit 205, which will be described later, and is referred to when the RepeatFlag (3022) is generated.

When the first compression processing unit 203 detects an abnormal operation while performing compression processing in the first compression processing unit 203, the first compression unit 203 corresponds to the content of the abnormal operation. After outputting the interrupt signal to the register setting unit 206, the operation is stopped until a reset signal (not shown) is input.

The second compression processing section 204 performs a compression process without information loss in this embodiment, specifically, a pack bit system compression process. When the packet of the image data input to the tile compression unit (2106) is binary image data having a 1-bit configuration, the second compression processing unit 204 applies compression processing to the image data by the Packbits method.

Further, the second compression processing section 204 has image additional information in the input data (Ztype (3020) is 0).
If not), compression processing by the Packbits method is applied to the image additional information.

The second compression processing unit 204, like the first compression processing unit 203 described above, is provided with a buffer (not shown) for storing the input image additional information for one packet. By holding the 1-bit image data or the image additional information input to, the image or the image additional information newly input from the tile bus interface unit 201 is compared with the data already stored in the buffer. . The comparison result is sent to the image ring output unit 205, which will be described later, and is referred to when the RepeatFlag (3022) is generated. Details of the second compression processing unit 204 will be described later with reference to FIG. 7.

When the second compression unit 204 detects an abnormal operation while performing compression processing in the second compression unit 204, the second compression unit 204 causes the interrupt signal corresponding to the content of the abnormal operation. Is output to the register setting unit 206, and then the operation is stopped until a reset signal (not shown) is input.

The image ring output unit 205 acquires the processing information image data and the image additional information from the header information holding unit 202, the first compression processing unit 203 and the second compression processing unit 204, and sets a predetermined value for the header information. After setting the value, the data packet shown in FIG. 11 is generated. Then, the data packet generated by the image ring output unit 205 is output to the image ring interface 2102.

Reference numeral 206 denotes a register setting section for setting the processing inside the tile compression section (2106). In order to make the tile compression section (2106) perform a predetermined compression processing,
It is necessary to set a predetermined value in the register setting unit 206. These settings are sent from the system control unit 2150 to the command processing unit 2104 of the image processing unit 2149 using a command packet, and sent from the command processing unit 2104 to the tile compression unit (2106) via the register setting bus 2109. The value set in the register setting unit 206 is the first compression processing unit 203 and the second compression processing unit 204.
Then, both compression processing units perform corresponding predetermined processing by referring to those set values.

The register setting unit 206 not only sets the value using the command packet, but also outputs the setting value held by the register setting unit 206 to the system control unit 2150 using the command packet. It is possible.

Further, the register setting unit 206 has a register corresponding to the interrupt signal input from the tile bus interface unit 201, the first compression unit 203 and the second compression unit 204, and the interrupt signal from any block. Is input, after setting the value of the corresponding register, an interrupt signal for notifying the status processing unit 2105 that an interrupt has occurred and a status signal indicating in which block the interrupt has occurred are output.

A register setting bus interface unit 207 converts the address and setting value input from the register setting bus 2109 to the tile compressing unit (2106) into a predetermined format that the register setting unit 206 can receive. It is a block to send after.

The register setting bus interface unit 207 not only receives the register setting value from the register setting bus 2109, but also reads and reads the setting value corresponding to the address indicated by the register setting bus from the register setting unit 206. Set the value in the register setting bus 21
It is also possible to output to 09.

<First Compression Processing Unit 203> Details of the first compression processing unit 203 included in the internal structure of the tile compression unit (2106) shown in FIG. 2 will be further described with reference to FIG. explain.

In this embodiment, the case where the image data has an 8-bit structure, a 24-bit structure, or a 32-bit structure, that is, the case where the image data is compressed by the first compression processing unit 203 will be described.

FIG. 1 is a block diagram showing the internal arrangement of the first compression processing section 203 in this embodiment.

In FIG. 1, reference numeral 101 denotes a first data buffer for storing the image data sent from the tile bus interface unit 201. When a predetermined amount of data is stored, JPEG compression connected in the subsequent stage is performed. Part 110
On the other hand, the stored image data is output in a predetermined order. Here, in the first data buffer 101,
ImageType (30
06) is input and the order of the image data output to the JPEG compression unit 110 is controlled according to this ImageType.

Here, the ImageType (3006) will be described, and the order of the image data input to the JPEG compression unit 110 will be described.

FIG. 3 is a diagram showing the structure of image data for one tile handled in this embodiment. ImageType (3006)
The upper 2 bits of 01b are 01b, that is, the image data for one tile when the image data representing the image data of one pixel by one component of 8 bits is input from the tile bus interface unit 201. In the embodiment, the image data for one tile is 32 pixels in the main / sub scanning × 32
It is composed of 1024 pixel data of pixels.

The data buffer 101 includes a JPEG compression unit 11
Before outputting the image data to 0, first, a plurality of pixels forming the image data are divided into 16 blocks in units of 64 pixels (8 pixels × 8 pixels) which is a predetermined processing unit in the JPEG compression processing. Split into. Then, the data buffer 101 outputs the image data (pixel data) in block units of 8 pixels × 8 pixels to the JPEG compression unit 110. Note that in the example shown in FIG. 3, the pixel image data is indicated by a thin line, the blocks divided into JPEG compression processing units are indicated by a thick line, and the blocks are sent to the JPEG compression unit 110 in the order of 0 to 15 for each block. The numbers up to are attached.

FIG. 4 is an enlarged view of the pixels included in the block 0 in FIG. 3, and conceptually shows the state of a plurality of pixels forming the block 0 at the upper left of the 16 blocks shown in FIG. Represent.

In the figure, block 0 contains image data for 64 pixels (however, the value of each image data itself is not shown), and for each pixel the main operation direction and the sub-scanning direction are set. Each direction is numbered from 0 to 7.

In block 0, the JPEG compression unit 110
As shown by the arrow in FIG. 4, the order of output to (0, 1) → (0, 2) → ... → in the main scanning direction starts from the pixel data of (0, 0) at the upper left. The order is (0, 7). Next to the pixel data of (0, 7), one line is moved in the sub-scanning direction, and (1.0) → (1, 1) → ...
→ Go to (1, 7) and repeat this to (7,
When the image data of 7) is output, the output of the image data (pixel data) for one block is completed.

When the output of the image data of the block 0 is completed, next, the image data is output from the upper left (0, 8) of the block 1 in the same procedure.

FIG. 5 is a diagram showing the structure of image data for one tile handled in this embodiment. ImageType (3006)
The upper 2 bits of 10 b represent image data for one tile when image data of a total of 24 bits of 8 bits and 3 components is input to one pixel from the tile bus interface unit 201.

Note that the image data shown in FIG. 5 does not represent each pixel but is represented in block units, which are JPEG compression processing units, as in FIG. 3, and in this case, each image data is represented by a pixel. Rather, it is shown as component 1, component 2, and component 3 for each component (for example, the color component of RBG).

FIG. 6 is a diagram showing the processing order of the image data shown in FIG.
FIG. 3 is a diagram showing the order of output to a compression unit 110. In each block shown in FIG. 6, the order of outputting individual pixel data is the same as that described above with reference to FIG.

As shown in FIG. 6, in the case of 8-bit 3-component image data, in the present embodiment, first, the image data of component 1 of block 0 is output from the first data buffer 101. When all the image data of the component 1 of the block 0 is output, the image data of the component 2 of the block 0,
Subsequently, the image data of the component 3 of the block 0 is output, whereby all the image data of the block 0 is output first.

When all the image data of the block 0 is output, the image data of the component 1 of the block 1 is next output, then the component 2 of the block 1 → the component 3 of the block 1 → the component 1 of the block 2 → ...・ Continued, and finally component 1 of block 15
→ The component 2 of the block 15 → The output of the image data of one tile shown in FIG. 3 is completed when the output of the image data of the component 3 of the block 15 is finished.

The upper 2 bits of ImageType (3006) are 1
1b, that is, when the tile bus interface unit 201 inputs 8-bit 4-component image data for one pixel, that is, 32-bit image data in total, first, as in FIGS. 5 and 6, first, an image of each component of a predetermined block After outputting the data in the order of component 1 → component 2 → component 3 → component 4, the process moves to the output of the image data of the next block.

As described above, in the present embodiment, the order of compression processing by the JPEG compression unit 110 is that one tile of image data is divided into blocks of 8 pixels in the main scanning direction × 8 pixels in the sub scanning direction, The compression is done in. When each block has a plurality of image data (having a plurality of components), the image data of each component in the block is compressed, compression is performed on all the components, and then the next block is compressed. Done.

Next, the description returns to each block constituting the first compression processing section 203 shown in FIG.

As described above, in this embodiment, JP
The EG compression unit 110 follows the compression procedure according to the JPEG method.
The image data is compressed, and further 3
There are two processing blocks.

Reference numeral 102 denotes a DCT (discrete cosine transform) section, which receives 64 pixel data from the data buffer 101 and performs discrete cosine transform on the pixel data to convert them into frequency components. . Also,
At this time, the DC component value generated by the discrete cosine transform is used together with the latch signal in the thumbnail generation unit 10 described later.
7 is output. In the DCT unit 102, the discrete cosine transform is performed every time 64 pixel data is input, and the latch signal and the DC component value are output to the thumbnail generation unit 107 each time. The DCT unit 102 outputs an error interrupt signal to the register setting unit 206 when an error occurs during the calculation of DCT.

Since the discrete cosine transform processing is common nowadays, the detailed description of this embodiment will be omitted.

Next, 103 is a quantizer, which quantizes the frequency components output from the DCT unit 102 using a predetermined quantized value to generate quantized data.
The quantized value is input from a quantized table 109 described later, and the quantized value used is the header information holding unit 20.
2 is determined by analyzing the header information. The quantizer outputs an error interrupt signal to the register setting unit 206 when the result of the quantization has a value other than a predetermined value.

A Huffman coding unit 104 performs predetermined coding on the quantized data output from the quantizing unit 103 to generate coded data, which is output to the second data buffer 105. . Huffman coding unit 10
In No. 4, when pixel data that cannot be encoded is input, an error interrupt signal is output to the register setting unit 206.

Reference numeral 105 denotes a second data buffer for storing the coded data coded by the Huffman coding unit 104. When the coded data for one tile is acquired from the Huffman coding unit 104, the own buffer is provided. The capacity of the encoded data stored therein is output to the image ring output unit 205 as Data Byte Length 1. Further, the data buffer 105 outputs the encoded data stored in the buffer to the image ring output unit 205 according to the request of the image ring output unit 205.

A data comparison unit 106 compares the image data input from the tile bus interface unit 201 with the image data stored in the first data buffer 101. Tile bus interface unit 201
The image data sent from is stored in the first data buffer and, at the same time, compared with the already stored image data by the data comparison unit 106.

Since the first data buffer 101 stores the image data sent to the first compression processing unit 203 immediately before the tile input from the tile bus interface unit 201, the data comparison unit In 106, by the above operation, the image data sent from the tile bus interface unit 201 is compared with the image data of the previous tile in the first compression processing unit.

When the data comparison unit 106 completes the comparison of the image data for one tile, the data comparison unit 106 sends the comparison result Compare to the image ring output unit 206.
result 1 is output.

Reference numeral 107 denotes a thumbnail generator, which is a DC
The DC component value is acquired in synchronization with the latch signal output from the T unit 102, the thumbnail value is generated for each tile by performing calculation and normalization, and the generated thumbnail value is output to the image ring output unit 205. .

ImageType (3006) is input from the header holding unit 202 to the thumbnail generation unit 107, and the thumbnail generation unit 107 is sent from the DCT unit 102 by referring to ImageType (3006). Come D
The order of C component values is detected to generate thumbnail values for each component. Details of the operation of the thumbnail generation unit 107 will be described later with reference to the flowchart of FIG.

The thumbnail value generated by the thumbnail generation unit 107 is output to the image ring output unit 206, and the thumbnail information of the header information acquired from the header information holding unit 202 in the image ring output unit 206 is used.
The data (3021) is stored in a predetermined format. Then, the stored thumbnail value is
The image ring interface 2 as one data packet together with the image data compressed by the compression processing unit 203 and the image additional information compressed by the second compression processing unit 204.
It is output to 104.

In the quantization table 109, the quantization unit 10
3, the quantization values for performing the quantization are stored as a plurality of quantization tables, and the corresponding quantization table is selected and selected according to a selection signal input from a quantization table selection unit 108 described later. The quantized values forming the quantization table are output to the quantization unit 103.

Numeral 109 is a quantization table selection unit, which outputs a quantization table selection signal to the quantization table 109 so as to select one of the plurality of tables stored in the quantization table 109. Select a table.

The quantization table selection unit 108 stores image type (3006), Mode (3025), C in the header information holding unit 202.
The har-flag (3029) and the Q-Table Sel (3030) are input, and the quantization table selection unit 108 determines the quantization table to be used based on these header information. When the quantization table to be used is determined, the quantization table selection unit 108 outputs a corresponding quantization table selection signal to the quantization table 109, and also outputs the Q-Table ID representing the selected quantization table to the image ring. Output to the output unit 205.

<Thumbnail Generation Unit 107> Next, the process of generating a thumbnail value in the thumbnail generation unit 107 will be described.

FIG. 8 is a flowchart showing the operation of the thumbnail generator 107 in this embodiment.

First, header information is stored in the header information holding unit 202, and the header information holding unit 202 stores Imag
When eType (3006) is input to the thumbnail generation unit 107, the internal counter and the buffer are initialized (step S801). In the present embodiment, the component of the image data input to the thumbnail generation unit 107 is 4 at maximum.
It is an ingredient. Therefore, the thumbnail generation unit 107 generates four thumbnails for each component shown in FIG.
2, buf3, buf4, and step S80
In the initialization process at 1, the counter value and the contents of each buffer are initialized to 0.

When the initialization is completed, the termination condition for terminating the data acquisition from the DCT unit 102 is judged (step S802). This is done by comparing the internal counter value with a predetermined value (16, which is the number of times the DC component value is output for an arbitrary component in this embodiment). In this case, the counter value has just been initialized to 0 in step S801 and does not satisfy the ending condition, so the process proceeds to step S803.

In the DCT unit 102, the DC component value generated by the discrete cosine transform is used as the thumbnail generation unit 107.
When outputting the DC component value to the thumbnail generation unit 107, the DC component value is output and the latch signal (Latch in FIG. 1) is set to 1 to notify the thumbnail generation unit 107 of the output of the DC component value. There is. Therefore, in step S803, the latch signal is monitored,
It is in a standby state until Latch = 1 (until the DC component value is output).

When detecting that Latch = 1 is input from the DCT unit 102, the thumbnail generation unit 107 adds the acquired DC component value to the value of Buf1 (step S8).
04). This is because the DC component value first output from the DCT unit 102 is the DC component value of the component 1 of the block 0 of the plurality of blocks shown in FIG. 3 regardless of the value of ImageType (3006). Yes, the DC component value is added to Buf1 corresponding to component 1.

Next, the thumbnail generation unit 107 determines the component structure of the input image data by referring to the ImageType input from the header information holding unit 202 (step S805). In this determination, when the referred ImageType indicates that the image data is one component of 8 bits, it indicates that the generation of the thumbnail value of block 0 shown in FIG. 3 is completed, and the process advances to step S813. On the other hand, if the image type is ImageType, which indicates that the image data has multiple components,
Step S806 to obtain the DC component value of component 2
Waits again for the input of the latch signal (step S80
6).

Thereafter, waiting for a latch signal (step S80
6), the DC component value of the component 2 is added to the value of buf2 (step S807), and the latch signal is waited again (step S80).
7) and the DC component value of component 3 are added to the value of buf3 (step S808).

Then, referring again to ImageType (step S810), if the ImageType represents that the image data has 3 components of 8 bits, the thumbnail value of block 0 shown in FIG. 3 is not generated. Since it is completed, the process proceeds to step S813. On the other hand, if the image type is ImageType indicating that the image data is composed of four components, the input of the latch signal is waited in step S811 to obtain the DC component value of the component 4 (step S811).

When Latch = 1 is detected in step S811 and the value of buf3 and the DC component value are added (step S812), all the DC component values of block 0 shown in FIG. 3 are added to the buffer in the thumbnail generation unit 107. Therefore, the thumbnail generation unit 107 prepares to acquire the DC component value of the next block by adding 1 to the internal counter (step S813), and step S802.
Return to.

In the thumbnail generation unit 107, the operations of steps S802 to S813 are repeated for one tile (16 times in this embodiment because the number of blocks is 16), whereby the blocks of each component are stored in each buffer. The sum of the DC component values of 0 to 15 is stored.

When the above operation is completed for each of the blocks 0 to 15, the value of the internal counter is set to 16 in step S813, and the process returns to step S802.
In step S802, the counter value and the predetermined value 1
6 is compared, and the condition of step S802 is not satisfied, and thus the process proceeds to step S814.

In step S814, the value stored in the buffer is normalized and thumbnail data is output. That is, at this point, since the sum of the DC component values of the blocks 0 to 15 is stored in each buffer of the thumbnail generation unit 107, in step S814, first, the number of blocks to which the values in the buffer are added ( In this embodiment, 1
Normalize by dividing by 6). Then, the normalized value is output as a thumbnail value to the image ring output unit 205 according to a predetermined format.

<Second Compression Processing Unit 204> In the first compression processing unit 203, the generation of the thumbnail value when the image data is input in 8 bits has been described. However,
As described in the description of ImageType (3006), the image processing apparatus according to the present embodiment also handles 1-bit image data, so-called binary image data. If the input image data is binary image data, the thumbnail value is
It is generated by the second compression processing unit 204.

FIG. 7 is a block diagram showing the internal arrangement of the second compression processing section 204 in this embodiment.

In FIG. 7, reference numeral 701 denotes a first data buffer for storing the image data or image additional information sent from the tile bus interface unit 201. When a predetermined amount of data is stored, it is connected to the subsequent stage. The data is output to the generated packbits compression unit 702 in a predetermined order.

The packbits compression unit 702 applies to the image additional information stored in the first data buffer 701 (image additional information of 8-bit at least one-component image data) or to the binary image data. , Performs Packbits compression.

Reference numeral 703 denotes a second data buffer for storing the compressed data compressed by the Packbits compression unit 702. When the compressed data for one tile is acquired from the Packbits compression unit 702, the data stored in the buffer is stored. The image ring output unit 2 with the data capacity as Data Byte Length 2
Output to 05. In addition, the data buffer 703
Outputs the compressed data stored in the buffer to the image ring output unit 205 in accordance with the request from the image ring output unit 205.

A data comparison unit 704 compares the image data or image additional information input from the tile bus interface unit 201 with the data stored in the first data buffer 701. The data sent from the tile bus interface unit 201 is stored in the first data buffer 701, and at the same time, the data comparison unit 704 compares it with the data stored in the first data buffer 701.

Reference numeral 705 denotes a thumbnail generation section for generating a thumbnail value from the image data sent to the second compression processing section 204. When the image data is input to the second compression processing unit 204, the thumbnail generation unit 705 displays the image data in a binary value. Therefore, by adding the values of all the pixels included in the tile, the thumbnail generation unit 705 adds thumbnails. Generate a value.

In the present embodiment, the number of pixels included in one tile is 1024 pixels in total, which is 32 pixels in the main scanning and 32 pixels in the sub-scanning as described above. Therefore, the thumbnail value generated by the thumbnail generating unit 705 is , 0 to 1024. However, when outputting the thumbnail value from the second compression processing unit 204, it is output after being normalized. In the present embodiment, the normalization is to obtain an 8-bit value by dividing by 4 and then limiting the upper limit of the value by 255.

Further, the thumbnail generation unit 705 has the ImageType (3006) input from the header information holding unit 202, and the input image data is not a binary image based on the value indicated by the ImageType (3006). If it is determined that the above operation is not performed.

Then, the image ring output section 205 uses the header information acquired from the header information holding section 202 as the ImageT
If ype is referenced and the ImageType indicates that it is binary image data, it indicates that the thumbnail value output from the second compression processing unit 204 is other image data. In this case, the first compression processing unit 203
The thumbnail value output from the
After setting to l Data (3021), it is output to the image ring interface 2102.

According to the present embodiment described above, the image data is 1024 in total of 32 pixels in the main scanning × 32 pixels in the sub-scanning.
In the image processing devices 1001 and 1020 that divide the tiles into pixels and perform image processing for each tile, a thumbnail value is generated in advance for each tile before displaying the reduced image. Thus, when a reduced image of the original image is required for display on a display such as an icon, the reduced image can be quickly created using only the thumbnail value, which is highly convenient. In particular, when storing the input image data, if the Controller Unit (2000) stores the image data in a compressed state, the reduced image of the original image represented by the compressed image data is used as an icon. This is preferable because the time for decompressing (decompressing) the compressed image data can be omitted when the image is displayed on the display.

Further, in this embodiment, when the compression method of the image data is the JPEG method, the thumbnail is generated by using the DC component value generated during the compression. As a result, the thumbnail value can be generated simply by adding a small-scale circuit.

[0171]

Other Embodiments The object of the present invention is to supply a storage medium (or recording medium) recording a program code of software for realizing the functions of the above-described embodiments to a device that operates as the above-described image processing device. However, it is also achieved by the computer (or CPU or MPU) of those systems or devices reading and executing the program code stored in the storage medium. Alternatively, as long as the image data to be processed can be obtained from the outside and the processing is up to the display of the compressed image on the display, even in a general information processing apparatus such as a personal computer, The same purpose is achieved by executing the program code of software that realizes the function.
In these cases, the program code itself read from the storage medium realizes the functions of the above-described embodiments, and is acquired as a computer program product via the storage medium storing the program code, the telecommunication line, or the like. The program code thus constructed constitutes the present invention.

Further, by executing the program code read by the computer, not only the functions of the above-described embodiments are realized, but also the operating system (OS) running on the computer is executed based on the instruction of the program code. ) And the like perform part or all of the actual processing, and the processing realizes the functions of the above-described embodiments.

Further, after the program code read from the storage medium is written in the memory provided in the function expansion card inserted in the computer or the function expansion unit connected to the computer, based on the instruction of the program code. It also includes a case where the CPU or the like included in the function expansion card or the function expansion unit performs a part or all of the actual processing and the processing realizes the functions of the above-described embodiments.

[0174]

According to the present invention, there are provided an image processing device, an image display method, and a computer program for rapidly displaying an image on a display in order to facilitate an operation of selecting image data of an original image desired by a user. Will be realized.

[Brief description of drawings]

FIG. 1 is a block diagram showing an internal configuration of a first compression processing unit 203 in this embodiment.

FIG. 2 is a block diagram showing an internal configuration of a tile compression unit (2106) in this embodiment.

FIG. 3 is a diagram showing a configuration of image data for one tile handled in this embodiment.

FIG. 4 is an enlarged view of pixels included in block 0 in FIG.

FIG. 5 is a diagram showing a configuration (in the case of 8-bit 3-component) of image data for one tile handled in the present embodiment.

6 is a diagram showing a processing order of the image data shown in FIG.

FIG. 7 is a block diagram showing an internal configuration of a second compression processing section 204 in the present embodiment.

FIG. 8 is a flowchart showing an operation of the thumbnail generation unit 107 in this embodiment.

FIG. 9 is a diagram illustrating an overall configuration of a network system including an image processing apparatus according to the present embodiment.

FIG. 10 is a block diagram showing the overall configuration of an image processing apparatus according to this embodiment.

FIG. 11 is a diagram showing a data format of an image packet.

FIG. 12 is a diagram showing a data format of a command packet.

FIG. 13 is a diagram showing a data format of an interrupt packet.

FIG. 14 is a diagram showing a data structure of a packet table.

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Claims (10)

[Claims] 1. A representative image corresponding to a plurality of pixels by subjecting image data representing a partial image of an original image divided into a predetermined size to a predetermined image processing for each of a plurality of pixels forming the partial image. Image processing means for generating a value; storage means for storing the representative value generated in the unit of a plurality of pixels by the image processing means for each of the partial images as one unit; An image processing apparatus, comprising: an image display unit that displays an image corresponding to the original image on a display based on a plurality of representative values of the partial image units. 2. The image processing means is image compression means for performing image compression based on a predetermined image compression method as the predetermined image processing, wherein the image displayed by the image display means is the original image. The image processing device according to claim 1, wherein the image processing device has a lower resolution than the image. 3. The representative value generated by the image processing means is a thumbnail value, and the low-resolution image displayed by the image display means is a thumbnail including a reduced image corresponding to the original image. The image processing apparatus according to claim 2, wherein the image processing apparatus is provided. 4. The image processing apparatus according to claim 2, wherein the predetermined image compression method is a JPEG compression method. 5. The representative value generated by image compression according to the JPEG compression method is a DC component value generated by discrete cosine transform.
The image processing device described. 6. The image processing apparatus according to claim 5, wherein the image processing means obtains a value obtained by normalizing the DC component value as the representative value. 7. The partial image divided into the predetermined size has a size that is an integral multiple of the number of pixels required for performing image compression by the JPEG compression method. Item 7. The image processing device according to any one of items 6. 8. A representative image corresponding to a plurality of pixels by subjecting image data representing a partial image of an original image divided into a predetermined size to a predetermined image processing for each of a plurality of pixels forming the partial image. An image processing step of generating a value; a storage step of storing the representative value generated in the pixel processing unit in the image processing step in a storage medium with the partial image as one unit; And an image display step of displaying an image corresponding to the original image on a display based on a plurality of representative values of the partial image units read out. 9. A computer program as the image processing apparatus according to claim 1, which gives instructions to operate a computer. 10. A computer program, wherein the image display method according to claim 8 gives an operation instruction that can be realized by a computer.