JP2003224727A - Image processing system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the reduction of performance of a system regardless of the rate of image data compression. <P>SOLUTION: An image processing system for processing image data and additional data added to an image in the unit of a tile is provided with a means for compressing the individual data in the unit of the tile, a means for calculating the amount of a compressed image data and a means for comparing the amount of the compressed data with a predetermined numerical value. The image processing system decides whether the compressed additional data are to be added to the image data outputted by the compression means corresponding to the output results of the comparing means. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing system, and more particularly to an image processing system having a function of processing image data and image additional data corresponding to the image data in tile units.

[0002]

2. Description of the Related Art In a conventional image processing system, when printing or transferring image data via a network, the image data and image additional data are compressed and transferred. This is to improve the performance of the entire system by reducing the amount of data to be transferred.

[0003]

However, in the above-mentioned prior art, the compression result of image data does not always become smaller than the data before compression, and the amount of image data after compression of one page is enormous depending on the image data. In some cases, the performance of the entire system was reduced as a result.

Therefore, an object of the present invention is to integrate the amount of image data after compression, and when the amount of data after compression reaches a threshold value that affects the performance of the entire system, an image without additional image data added to the transfer data. The purpose is to provide a processing system.

[0005]

In order to solve the above problems, the present invention uses image data and image additional data corresponding to the image data, and performs image data processing in tile units. In the system, an image compression unit for compressing each data in tile units, a data amount calculation unit for calculating the image data amount compressed by the image compression unit, and a post-compression output of the data amount calculation unit. A data amount comparing means for comparing the data amount with a predetermined numerical value is provided, and the output result of the data amount comparing means is (output data amount after compression <predetermined numerical value In the case of), the compressed image additional data is added to the data output by the image compression unit, and the output result of the data amount comparison unit is (compressed data amount> predetermined numerical value). If, it is an object to provide an image processing system, characterized in that performing the process of switching in units of pages so as not to add the compressed image additional data to the data by the image compressing means outputs.

[0006]

BEST MODE FOR CARRYING OUT THE INVENTION (First Embodiment) The device of the present invention and its operation will be described in detail below with reference to the drawings.

[Overview of System] FIG. 1 shows an overall configuration of a system according to an embodiment of the present invention.

The controller unit (1001) is connected to a scanner (1002) which is an image input device and a printer (1003) which is an image output device, while a LAN (1004) and a public line (WAN) (1005) are connected.
I / O of image information and device information,
It is a controller for developing an image of PDL data.

The CPU (1006) is a processor that controls the entire system. In this embodiment, two CPs
An example using U is shown. These two CPUs (1006)
Are connected to a common CPU bus (1007) and further to a system bus bridge (1008).

The system bus bridge (1008) is a bus switch, and includes a CPU bus (1007), a RAM controller (1009), and a ROM controller (101).
0), IO bus 1 (1011), sub-bus switch (1
012), IO bus 2 (1013), image ring interface 1 (1014), and image ring interface 2 (1015) are connected.

The sub-bus switch (1012) is a second bus switch, and includes an image DMA1 (1016), an image DMA2 (1017), a font decompression unit (1018),
A sort circuit (1019) and a bit map trace circuit (1020) are connected to arbitrate memory access requests output from these DMAs and connect to the system bus bridge (1008).

The RAM (1021) is a CPU (1006)
Is a system work memory for operating, and is also an image memory for temporarily storing image data, RAM
It is controlled by the controller (1009). In this embodiment, an example in which a direct RDRAM is adopted is shown.

The ROM (1022) is a boot ROM, in which a system boot program is stored.
It is controlled by the OM controller (1010).

The image DMA1 (1016) is connected to the image compression unit (1023) and is connected to the register access ring (10).
24), the image compression unit (1023) is controlled based on the information set, and the non-compressed data on the RAM (1021) is read, compressed, and the compressed data is written back. In this embodiment, an example in which JPEG is adopted as a compression algorithm is shown.

The image DMA2 (1017) is connected to the image decompression unit (1025) and is connected to the register access ring (10).
24), the image decompression unit (1025) is controlled on the basis of the information set, and the compressed data in the RAM (1021) is read, decompressed, and the decompressed data is written back. In this embodiment, an example in which JPEG is adopted as a decompression algorithm is shown.

The font decompression unit (1018) transfers P from the outside via the LAN controller (1026) and the like.
ROM based on font code included in DL data
(1022) or the compressed font data stored in the RAM (1021) is expanded. In this embodiment,
An example in which the FBE algorithm is adopted is shown.

The sort circuit (1019) is a circuit for rearranging the order of the objects in the display list generated at the stage of expanding the PDL data.

Bitmap trace circuit (1020)
Is a circuit for extracting edge information from bitmap data.

The IO bus 1 (1011) is a kind of internal IO bus, and is a standard USB bus controller, USB interface (1027), general-purpose serial port (1028), interrupt controller (1029), GPIO interface. (1030)
Are connected. The IO bus 1 (1011) includes a bus arbiter (not shown).

The operation unit interface (1031) is
Image data to be displayed on the operation unit (1032) is displayed on the operation unit (1032) in the interface unit of the operation unit (1032).
Output to 2). In addition, the information input by the system user from the operation unit (1032) is stored in the CPU (100
6) The role of telling.

The IO bus 2 (1013) is a kind of internal IO bus, and is a general purpose bus interface 1 and 2.
The LAN controller (1026) is connected to (1033). The IO bus 2 (1013) includes a bus arbiter (not shown).

General-purpose bus interface (1033)
Is a bus bridge composed of two identical bus interfaces and supporting a standard IO bus. In this embodiment, an example in which the PCI bus (1035) is adopted is shown.

The HDD (1036) is a hard disk drive that stores system software and image data. It is connected to one PCI bus (1035) via the disk controller (1037).

The LAN controller (1026) is an MA
C circuit (1037), PHY / PMD circuit (1038)
It is connected to the LAN (1004) via the to input / output information.

The modem (1039) is a public line (100
Connect to 5) and input / output information.

The image ring (1040) is composed of a pair of unidirectional connection paths. The image ring (1040) is in the image processing unit (1041), via the image ring interface 3 (1042) and the image ring interface 4 (1043), the tile expansion unit (1044), the command processing unit (1045), and the status. It is connected to the processing unit (1046) and the tile compression unit (1047).

The tile decompression unit (1044) is connected to the image ring interface, and in addition to the tile bus (1044).
8) is a bus bridge which is connected to 8) and expands the compressed image data input from the image ring and transfers it to the tile bus (1048). In the present embodiment, an example in which JPEG is adopted for multi-valued image data and Packbits is adopted for binary image data as a decompression algorithm is shown.

The tile compression unit (1047) is connected to the image ring interface, and in addition to the tile bus (104).
8) is a bus bridge which is connected to 8), compresses the image data before compression input from the tile bus, and transfers it to the image ring (1040). In this embodiment, JPEG is used for multi-valued image data and Packbits is used for binary image data as a compression algorithm.

In addition to the connection to the image ring interface, the command processing unit (1045) is connected to the register setting bus (1049) and receives a register setting request issued from the CPU (1006) input via the image ring. , Write to the corresponding block connected to the register setting bus. Further, based on a register read request issued from the CPU (1006), information is read from the corresponding register via the register setting bus and transferred to the image ring interface 4 (1043).

The status processing unit (1046) monitors the information of each image processing block, generates an interrupt packet for issuing an interrupt to the CPU (1006), and the image ring interface 4 (104).
Output to 3).

In addition to the above blocks, the following functional blocks are connected to the tile bus (1048). Rendering unit interface (1050), image input interface (1051), image output interface (1
052), multi-value conversion processing unit (1053), binarization processing unit (1054), color space conversion unit (1055), image rotation unit (1056), resolution conversion unit (1057). Image temporary storage unit (1058).

Rendering unit interface (105
0) is an interface for inputting a bitmap image generated by the rendering unit described later.
The rendering section and the rendering section interface are
It is connected by a general video signal (1059). The rendering unit interface is a tile bus (104
In addition to 8), it has a connection to a memory bus (1060) and a register setting bus (1049), and converts the input raster image into a tile image by a predetermined method set via the register setting bus. At the same time, the clocks are synchronized and output to the tile bus (1048).

Image input interface (1051)
Receives tile image data from the tile bus as input, performs structural conversion into a raster image and changes the clock rate, and converts the raster image into a printer image processing unit (106).
Output to 1).

The image rotation unit (1056) rotates the image data.

The resolution converter (1057) converts the resolution of the image.

The color space conversion unit (1055) converts the color spaces of the color and gray scale images.

The binarization processing unit (1054) binarizes the multivalued (color and grayscale) image.

The multi-value processing unit (1053) converts the binary image into multi-value data.

The image temporary storage unit (1058) temporarily stores the received image data in the internal storage unit, and immediately after storing the data, transmits the received data to another block.

External bus interface section (1062)
Through the image ring interface 1, 2, 3, 4, the command processing unit, the register setting bus, the CPU (100
This is a bus bridge for converting and outputting the write / read request issued by 6) to the external bus 3 (1063).
In this embodiment, the external bus 3 (1063) is a printer image processing unit (1061) and a scanner image processing unit (10).
64).

The memory control unit (1065) is connected to the memory bus (1059), and according to the request of each image processing unit,
By preset address division, image data writing / reading to / from the image memories 1 and 2 (1066) and an operation such as refreshing as necessary are performed. In this embodiment, an example in which the SDRAM is used as the image memory has been shown.

In the scanner image processing unit (1065),
Image data scanned by a scanner (1002) which is an image input device is subjected to corrected image processing.

In the printer image processing unit (1061),
Corrected image processing for printer output is performed, and the result is output to the printer (1003).

The rendering unit (1067) develops the PDL code or the intermediate display list into a bitmap image.

Next, FIG. 2 is a block diagram of the entire network system including the information processing apparatus of the present invention.

An apparatus 2001 of the present invention is composed of a scanner and a printer, and an image read from the scanner is a local area network (2002) (hereinafter, LAN).
The image received from the LAN can be printed out by the printer. Further, the image read from the scanner can be transmitted to the PSTN or ISDN (2003) by a FAX transmission unit (not shown), or the image received from the PSTN or ISDN can be printed out by the printer. A database server 2004 manages a binary image and a multivalued image read by the apparatus (2001) of the present invention as a database.

Reference numeral 2005 denotes a database server (200
In the database client of 4),
The image data stored in 004) can be browsed / searched.

An electronic mail server 2006 can receive an image read by the apparatus (2001) of the present invention as an electronic mail attachment. Reference numeral 2007 denotes an e-mail client, which can receive an e-mail received by the e-mail server (2006), browse it, and send an e-mail.

The WWW server (2008) is a server for providing an HTML document to the LAN, and is a device (200) of the present invention.
According to 1), the HTML document provided by the WWW server can be printed out.

The router (2009) is the LAN (2002)
Is connected to the Internet and Intranet (2010). The aforementioned database server (2004) and WWW server (20
08), an electronic mail server (2006), and a device similar to the device (2001) of the present invention.
12, 2013 are connected. On the other hand, the device (2001) of the present invention uses the PSTN or ISDN (200
It is possible to transmit and receive with the FAX machine (2014) via 3).

A printer (2015) is also connected to the LAN (2002), and the device (200) of the present invention is connected.
The image read in 1) can be printed out.

Next, the packet format in the embodiment of the present invention will be described in detail with reference to FIGS.

The controller unit (100
In 1), the image data, the command by the CPU (1006), and the interrupt information from each block are transferred in a packetized format.

FIG. 3 is a diagram showing in detail a data packet obtained by packetizing image data.

[Data Packet] In this embodiment, the image data is divided into image data (3002) in tile units of 32 pixels x 32 pixels and handled. The required header information (3001) is added to the image of this tile unit.
And image additional information (3003) are added to form a data packet.

The information contained in the header information (3001) will be described below.

The packet is P in the header information (3001).
PacketType in cktType (3004)
The data packet, the command packet, and the interrupt packet are distinguished by the value of the eID (3023).
In this embodiment, 001b or 101b: data packet 010b: command packet 100b: interrupt packet is allocated to PacketTypeID 3 bits.

The PcktType (3004) includes a RepeatFlag (3022), and the image data of the data packet and the image additional information (300).
3), if the predetermined information in the header information (3001) is the same as the data packet transmitted immediately before, Repeat
Set 1 to the Flag (3022). In this case, packet transfer is performed only by the header information (3001).

ChipID (3005) indicates the ID of the chip that is the target of packet transmission.

ImageType (3006) indicates the type of image data. In the present embodiment, ImageType
The type of image data is defined as follows using the upper 2 bits of e8 bits.

00b: 1-pixel image data is represented by 1 bit. 01b: 1-pixel image data is represented by 8-bit 1 component. 10b: 1-pixel image data is 8-bit 3-component, a total of 24.
11b represented by bits: 1-bit image data of 8 bits, 4 components, 32 in total
PageID (3007) represented by a bit indicates a page including a data packet, and JobID (3008) stores JobID for managing by software.

The order of arrangement of the data packets on the page is a combination of the Tile coordinates (3009) in the Y direction and the Tile coordinates (3010) in the X direction and is represented by YnXn.

In the data packet, there are cases where the image data and the image additional information included in the packet are compressed and cases where they are not compressed. In this embodiment, JPEG is used as the compression algorithm when the image data is multi-valued color (including multi-valued gray scale), and Packbits is used as the binary and the image additional information.

The difference between the case where the image data and the image additional information are compressed and the case where the image data is not compressed by the above-mentioned method is distinguished from each other by Im in the CompressFlag (3017).
ageData (3026) and Zdata (302
When 7) is 1, it indicates compressed data, and when 0, it indicates uncompressed data.

Further, the CompressFlag (301
In 7), Q-TableID that stores the type of quantization table used when performing compression processing by JPEG
(3028) is prepared, and when there are a plurality of quantization tables, the quantization table to be used is switched by referring to this value when compressing and expanding data.

Process Instruction
(3011) is left-justified and is set in the processing order every 8 bits, and each processing unit is the post-processing Process Struct.
8bitShift to the left. Procedures
s Instruction (3011) is UnitI
Eight sets of D (3024) and Mode (3025) are stored. The UnitID (3024) specifies each processing unit of the image processing unit (2149), and the Mode (3
025) designates an operation mode in each processing unit. As a result, one packet can be continuously processed up to 8 units.

PacketByteLength (30
12) indicates the total number of bytes in the packet.

ImageDataByteLengh
(3015) is the number of bytes of image data, ZDataBy
teLength (3016) represents the number of bytes of the image additional information, and ImageDataOffset (301
3) and ZDataOffset (3014) represent the Offset value from the beginning of the packet for each data.

SourceID (3018) indicates the source from which the image data and the image additional information are generated.

Ztype (3020) indicates the effective bit width in the image additional information, and image additional information other than the bit indicated by Ztype (3020) is invalid information.
Incidentally, when Ztype (3020) is 0, it means that all the input image additional information is invalid.

ThumbnailData (3021)
Stores a value representative of the image data of the data packet (hereinafter referred to as a thumbnail value). In the present embodiment, thum
It is configured such that a maximum of four thumbnail values can be stored in the bnailData (3021).

Misc (3019) stores necessary information in addition to the above information. In this embodiment, Char-
flag (3029) and Q-TableSel (30
30) is prepared. Char-flag (302
The area signal to which the data packet belongs is stored in 9). Q-TableSel (3030) stores information for changing the quantization table used for compression and decompression by the JPEG method.

FIG. 4 is a diagram showing the packet table in detail.

In FIG. 4, the data packet is stored in the RAM (200
The state stored in 2) is shown. Each data packet is managed by the Packet Table (4001). The components of the Packet Table (4001) are as follows, and 0 is set to 5 for each Table value.
If bit is added, the start address of the packet (400
2), Packet Byte Length (4005)
Becomes

Packet Address Point
ter (27 bits) + 5b00000 = P
address top Address Packet Length (11 bits) +
5b00000 = Byte Length of Packet
th Note that Packet Table (4001) and Cha
The in Table (4010) shall not be divided.

The Packet Tables (4001) are always arranged in the scanning direction, and Yn / Xn = 000/00.
0, 000/001, 1,000 / 002 ,. ． ． ． It is lined up in that order. This Packet Table (4
Entry (001) uniquely indicates one Tile. Entry next to Yn / Xmax is Yn + 1
/ X ₀ .

Repeat in header information (3001)
When a packet in which Flag (3002) is set is input, the packet is not written in Memory, and the Entry of the Packet Table has the same Packet Address P as the first Entry.
Stores "ointer" and "Packet Length". One Packet Data and two Tabl
It is in the form of e Entry. In this case, the Repeat Flag of the second Table Entry
(4003) is set.

When the Packet is divided into a plurality of pieces by Chain DMA, the Divide Flag (4
004), and the Chain Tab of the Chain Block that contains the beginning of that Packet
Set the le number (4006).

E of Chain Table (6010)
ntry is Chain Block Address (4
011) and Chain Block Length (6
012), and the last Entr of the Table
0 is stored in y for both Address and Length.

FIG. 5 is a diagram showing the command packet in detail.

This Packet Format is for accessing the register setting bus (1049). By using this packet, the CPU (100
The image memory (1066) can be accessed from 6).

The ChipID (5004) is an I representing the image processing unit (1041) that is the destination of the command packet.
D is stored.

PageID (5007), JobID
(5008) is a page for managing with software
The ID and Job ID are stored.

The Packet ID (5009) is represented one-dimensionally. X-coord of Data Packet
Use only inate.

The packet byte length (5010) is 1
It is fixed at 28 Bytes.

A maximum of 12 commands can be stored in the packet data part (5002) with one set of the address (5011) and data (5012) as one command. The command type of write or read is C
It is indicated by mdType (5005), and the number of commands is C
mdnum (5006).

FIG. 6 is a diagram showing the interrupt packet in detail.

This PacketFormat is for notifying an interrupt from the image processing unit (1041) to the CPU (1006). Status processing unit (104
6) When transmitting the Interrupt Packet, the Interrupt packet is transmitted until the next transmission is permitted.
Do not send a Packet.

The packet byte length (6006) is 1
It is fixed at 28 Bytes.

The packet data section (6002) stores status information (6007) of each internal module of the image processing section (1041). The status processing unit (1046) can collect status information of each module in the image processing unit (1041) and send the status information to the system control unit (1070) collectively.

Inter is included in the ChipID (6004).
The ID representing the system control unit (1070) that is the destination of the rupt Packet is also IntChipID.
An ID representing the image processing unit (1041) that is the transmission source of the Interrupt Packet is stored in (6005).

[Tile Compressor] FIG. 7 shows a block diagram of the tile compressor 1047 in FIG.

A tile bus interface unit 701 performs a handshake with the tile bus 1048 to obtain header information, image data and image additional information input from the tile bus 1048, and to each processing block connected in the subsequent stage. Output each data.

In addition, the tile bus interface section 70
In No. 1, the header information sent from the tile bus 1048 is analyzed, and if there is a contradiction in the header information, an interrupt signal corresponding to the contradiction content is output to the register setting unit 706 described later, and then a reset signal (not shown). Operation is stopped until is input.

If there is no contradiction in the header information, the header information is output to the header information holding unit 702 connected to the subsequent stage, and then the image data and the image additional information are acquired from the tile bus 1048 to obtain the header information. ImageType
In accordance with (3006), the image data or the image is given to each of the first compression processing unit 703 (in this embodiment, compression processing by the JPEG method) and the second compression processing unit 704 (in this embodiment, compression processing by the Packbits method). Output additional information.

Specifically, the Image in the header information
When the upper 2 bits of eType is 00b representing 1-bit image data, the first compression processing unit 703 outputs the image data to the second compression processing unit 704 without using it.

If the upper 2 bits of ImageType are other than 00b, the image data is processed by the first compression processing unit 70.
3 and outputs the image additional information to the second compression processing unit 7.
Output to 04. However, Ztype (3020) is 0
In the case of, since the input image additional information is invalid, the image additional information is not output to the second compression processing unit 704, and the compression processing by the second compression processing unit is not performed.

A header information holding unit 702 is a block for holding header information while the first compression processing unit 703 and the second compression processing unit 704 are compressing image data and image additional information. is there. Further, the header information holding unit 702 outputs information necessary for compression processing from the stored header information to the first compression processing unit and the second compression processing unit.

Reference numeral 703 denotes a first compression processing unit, which represents a JPEG compression processing unit for performing JPEG compression in this embodiment. The first compression processing unit 703 performs compression processing of image data when the image data has a multi-bit configuration.

The first compression processing unit 703 has a buffer for storing the input image data for one tile, and holds the image data of the packet processed immediately before the image data of the next packet is input. By doing
The image data input from the tile bus interface unit 701 is compared with the image data stored in the buffer. The comparison result is sent to the image ring output unit described later, and R
It is referred to when the epeatFlag (3022) is generated.

When the first compressing unit 703 detects an abnormal operation during the compressing process in the first compressing unit, the first compressing unit 703 sets an interrupt signal corresponding to the content of the abnormal operation in the register. After outputting to the unit 706,
The operation is stopped until a reset signal (not shown) is input.

Reference numeral 704 denotes a second compression processing unit, which represents a compression processing unit without information loss in this embodiment, specifically, a compression processing unit according to the Packbits system. In the second compression processing unit 704, the image data of the packet input to the tile compression unit is 1
If it is a bit configuration, the image data is compressed, or if the image additional information is present (Ztype (3020) is not 0), the image additional information is compressed by the Packbits method.

Similarly to the first compression processing unit, the second compression processing unit 704 also has a buffer for storing the input image additional information for one packet, and the 1-bit image data or the image input immediately before is input. By holding the additional information, the image or the image additional information input from the tile bus interface unit 701 is compared with the data stored in the buffer. The comparison result is sent to the image ring output unit described later, and is referred to when the RepeatFlag (3022) is generated.

When the second compression unit 704 detects an abnormal operation during the compression process in the second compression unit, the second compression unit 704 sets an interrupt signal corresponding to the content of the abnormal operation in the register setting. After outputting to the unit 706,
The operation is stopped until a reset signal (not shown) is input.

An image ring output unit 705 acquires processing information, image data, and image additional information from the header information holding unit 702, the first compression processing unit 703, and the second compression processing unit 704, and with respect to the header information. After setting a predetermined value, the data packet shown in FIG. 3 is generated and output to the image ring interface 1040.

Reference numeral 706 denotes a register setting unit for making settings regarding the processing inside the tile compression unit 1047. In order to cause the tile compression unit 1047 to perform a predetermined compression process, a predetermined value is set in the register setting unit 706. There is a need to. These settings are performed by sending a command packet from the system control unit 1070 to the command processing unit 1045 of the image processing unit 1041 and from the command processing unit 1045 to the tile compression unit 1047 via the register setting bus 1049.

The value set in the register setting unit 706 is
The data is sent to the first compression processing unit 703 and the second compression processing unit 704, and both compression processing units perform the processing determined by referring to those setting values.

It is possible to not only set the value to the register setting unit using the command packet but also output the setting value held in the register setting unit to the system control unit 1070 using the command packet. is there.

Further, the register setting unit 706 has a register corresponding to the interrupt signal input from the tile bus interface unit 701, the first compression unit 703 and the second compression unit 704, and the interrupt signal is input from any block. Then, after setting the value of the corresponding register, it outputs an interrupt signal notifying the status processing unit 1046 that an interrupt has occurred and a status signal indicating in which block the interrupt has occurred.

Reference numeral 707 denotes a register setting bus interface unit, which is a block for converting the address and setting value input from the register setting bus 1049 to the tile compressing unit into a format that the register setting unit 706 can receive, and sending the converted format.

The register setting bus interface unit 707 not only receives the register setting value from the register setting bus 1049, but also reads the setting value corresponding to the address indicated by the register setting bus from the register setting unit 706 to the register setting bus. It is also possible to output.

The image additional information is 4-bit information for one pixel of image data, and each bit has a meaning. FIG. 8 is a diagram showing the image additional information in detail. bi
When t0 is 1, it means that the corresponding image data is chromatic. When bit1 is 1, it means that the corresponding image data is achromatic. bit
When 2 is 1, the corresponding image data is character data, and when bit 3 is 1, the corresponding image data is data other than characters. However, bit0 and bit1 do not become 1 at the same time.
Also, bit2 and bit3 are never 1 at the same time.

This image additional information is transferred to the printer 1003 together with the image data and is used by the printer 1003 as a parameter of the image processing unique to the printer. In the case of image data in which the image additional information is lost, the image cannot actually be output, and the print mode with high definition and high quality image setting cannot be selected. That is, when the high-quality print mode is not selected by the user, it is possible to output an image satisfying the user even if the image data lacks the additional image information.

In the embodiment of the present invention, as described above, in the case of 8 bits per pixel (1 component, 3 components, 4 components), the image data is compressed by the JPEG system. In comparison of the amount of image data before compression and the amount of image data after compression, the amount of image data after compression is generally small. However, the compressed image data may become larger depending on the image data. The image of one page is divided into tile units, and the compressed image data is converted into the image ring 104.
0 to the system control unit 1070, and the CPU 1
In the conventional system for storing the data in the work memory 1021 of 006, when the compression rate is poor, the image data may press the memory 1021 and the performance of the entire system may decrease.

Based on the above description, the output compressed data switching of the tile compression unit in the system of this patent will be described in detail here with reference to the flowchart. FIG. 9 is a flowchart illustrating in detail the output compressed data switching of the tile compression unit.

Reference numeral 708 denotes a data amount calculation unit, which is an integrated value of the data amount of the image data after compression output by the image ring output unit 705 to the image ring 1040.
This block is calculated in units of ageID (3007). Unless the value of PageID (3007) is changed, the data amount of the compressed image data output by the image ring output unit 705 is integrated (step 9002). However, when the PageID (3007) is changed, the data amount integrated value is reset to 0 (step 900).
5).

A data amount comparison unit 709 compares the integrated value of the data amounts calculated by the data amount calculation unit 708 with the data threshold value set in the register setting unit 706 (step
p9003), which is a block for outputting the comparison result to the image ring output unit 705.

When the data amount integrated value exceeds the threshold value according to the comparison result signal from the data amount comparison unit 709, the image ring output unit 705 thereafter adds the image additional information in the data packet to be output with the same PageID. Not (s
(step 9004).

[0119]

As described above, according to the present invention, in a controller that divides image data and image additional information into tiles and performs compression processing in tile units, the integrated value of the compressed image data is calculated and the threshold value is calculated. By making it possible to switch the addition or non-addition of image additional information according to the comparison result with, it is possible to perform image processing without degrading the performance of the entire system even when handling image data with poor compression ratio. it can.

[Brief description of drawings]

FIG. 1 is an overall block diagram of the system controller.

FIG. 2 is a diagram showing an actual use environment of this system.

FIG. 3 is a diagram showing a data packet.

FIG. 4 is a diagram showing a command packet.

FIG. 5 is a diagram showing an interrupt packet.

FIG. 6 is a diagram showing a packet table.

FIG. 7 is a block diagram of a tile compression unit.

FIG. 8 is a diagram showing image additional information.

FIG. 9 is a flowchart showing an operation of switching the output of compressed data.

[Explanation of symbols]

1001 controller unit 1002 scanner 1003 printer

Claims (4)

[Claims] 1. In an image processing system that uses image data and image additional data corresponding to the image data to process the data in tile units, an image compression unit for compressing the data in tile units. A data amount calculating means for calculating the image data amount compressed by the image compressing means, and a data amount comparing means for comparing the compressed data amount output from the data amount calculating means with a predetermined numerical value. The image processing system, comprising: switching the presence / absence of addition of the compressed image additional data to the data output by the image compression means, according to the output result of the data amount comparison means. 2. The image processing system according to claim 1, wherein when the output result of the data amount comparison means is (compressed data amount <predetermined numerical value), the data output by the image compression means has been compressed. When the image addition data is added and the output result of the data amount comparison means is (the amount of data after compression> a predetermined numerical value), the compressed image addition data is not added to the data output by the image compression means. Image processing system. 3. The image processing system according to claim 1, further comprising data amount threshold value setting means for setting the predetermined numerical value. 4. The image processing system according to claim 1, wherein the calculation of the data amount of the data amount calculation unit and the addition / non-switching of addition of the compressed image additional data of the image compression unit are performed in page units, An image processing system characterized in that, if the compressed image additional data is not added once, the compressed image additional data is not added thereafter within the same page.