JP2004119617A - Semiconductor device, method for manufacturing same, and manufacturing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To directly or indirectly form a semiconductor layer having at least two kinds of mean crystal grain diameters, and to control the crsytal grain diameters so that a number of mean crystal grain fields Na of a current direction in a channel area of a TFT active layer for the sub-different TFT with different size. <P>SOLUTION: The start edge of an optical axis (a) of a laser light source 1 is arranged with an antenuator 2 and a beam profile modulating part 3, and a semiconductor substrate 5 is arranged through a mirror 4 at the termination. Also, a beam profile measuring part 6 is arranged in the semiconductor substrate 5, and the semiconductor substrate 5 and the beam profile measuring part 6 are fixed to a mobile stage 7. Also, a control personal computer 8 is arranged, and the beam profile measuring part 6 is connected to the input side. The attenuator 2, the beam profile modulator 3, and the control system of a mobile stage 7, are respectively connected to the output side. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a polycrystalline semiconductor thin-film substrate, a method for manufacturing the same, a semiconductor device, a method for manufacturing a semiconductor device, and an electronic device. In particular, the present invention relates to a technique for manufacturing a field-effect transistor on a surface layer of a polycrystalline film (polycrystalline semiconductor thin film), and The present invention relates to a polycrystalline semiconductor thin film substrate for manufacturing a field effect transistor, and an effective technique applied to a manufacturing technique of an electronic device such as a liquid crystal display device or an information processing device incorporating the field effect transistor.
[0002]
[Problems to be solved by the invention]
As a current liquid crystal display display method, there is an active matrix method in which individual pixels are switched. In a pixel switch, an amorphous silicon thin film transistor (a-SiTFT), which is a kind of a field effect transistor, is mainly used.
In the technical development of liquid crystal displays, we are aiming for (1) high definition, (2) high aperture ratio, (3) light weight, and (4) low cost. In order to realize these performances, a technique using a polycrystalline silicon thin film transistor (poly-SiTFT), which is a kind of a field effect transistor, has attracted attention. Poly-Si TFTs have two orders of magnitude higher mobility than a-Si TFTs, so the device size can be reduced and an integrated circuit can be formed. It is possible to do.
[0003]
Hereinafter, a method of manufacturing a polycrystalline semiconductor thin film transistor by an excimer laser crystallization method according to the related art will be described.
As shown in FIG. 5A, a base protective film (for example, a SiO ₂ film, a SiN film, a SiN / SiO ₂ laminated film) 102 and an amorphous silicon thin film 103 are deposited on a glass substrate 101. Next, as shown in FIG. 5B, when the surface of the amorphous silicon thin film is irradiated with an excimer laser (XeCl, KrF, or the like) 104 whose beam is shaped into a square or a long beam by an optical system, the amorphous silicon thin film becomes amorphous. The crystalline silicon thin film 103 is converted from an amorphous structure to a polycrystalline structure by the irradiation and heating of the excimer laser 104 through a process of melting and solidifying in an extremely short time of 50 to 100 ns. When the entire surface of the amorphous silicon film 103 is heated by scanning with the excimer laser 104 in the direction of arrow 105, a polycrystalline silicon thin film 106 as shown in FIG. 5C is formed. The above process is called an excimer laser crystallization technique. It is used when producing a high-quality polycrystalline silicon thin film on a substrate of a low melting point material such as glass. These are described in detail in, for example, "Nikkei Microdevices Separate Volume Flat Panel Display 1999 (Nikkei BP, 1998, pp. 132-139)".
[0004]
FIG. 5D shows a transistor formed using the polycrystalline silicon thin film 106 shown in FIG. 5C. On the polycrystalline silicon thin film 106, a gate insulating film 107 such as a SiO ₂ film is provided by film formation. Further, a source impurity implantation region 109 and a drain impurity implantation region 108 are provided. A gate electrode 110 is provided over the source and drain regions and the gate insulating film, a protective film 111 is formed, and a source electrode 112 and a drain electrode 113 are formed. As described above, a TFT in which the current between the source and the drain can be controlled by the voltage of the gate electrode is completed.
[0005]
In general, a TFT used for a pixel portion is not required to have extremely high mobility but rather needs to have a low off-state current for the purpose of retaining charge in active matrix control.
In order to reduce the off-state current, it is necessary to increase the channel length of the TFT to such an extent that the aperture ratio is not reduced in order to reduce the electric field intensity at the drain end.
On the other hand, a TFT used for a driver circuit or an arithmetic circuit requires high mobility for high-speed operation, and off-state current does not cause much problem.
For this reason, it is necessary to reduce the size of the TFT, especially since miniaturization of the channel length is effective for speeding up.
As described above, required characteristics and sizes are different between the TFT used for the pixel portion and the TFT used for the driver circuit and the arithmetic circuit.
If these TFTs are not formed all at the same time on the same substrate, the economical effect of incorporating them is reduced.
[0006]
However, in the crystallization method according to the related art, only a poly-Si thin film having a certain crystallinity can be formed, and when TFTs of different sizes are formed on the same substrate, the following problems occur.
A TFT having a large size has a small variation in characteristics but low performance because the number of crystal boundaries in the channel region of the TFT increases.
A TFT having a small size has a high performance but a large variation in characteristics because a crystal grain boundary in a channel region of the TFT is reduced.
[0007]
Therefore, according to the present invention, a semiconductor layer having two or more kinds of average crystal grain sizes can be formed directly or indirectly on the same substrate, and as a result, it becomes an active layer of a TFT having a different size. It is an object of the present invention to propose a semiconductor device in which the crystal grain size is controlled such that the average number of crystal grain boundaries Na crossing the current direction in the channel region is constant, and a method and an apparatus for manufacturing the same.
[0008]
[Means for Solving the Problems]
In order to achieve such an object, the present invention is configured as follows.
[0009]
That is, the semiconductor device of the present invention achieves the above object by directly or indirectly forming semiconductor layers having two or more kinds of average crystal grain sizes on the same substrate.
[0010]
In the semiconductor device of the present invention, a semiconductor layer is formed directly or indirectly on a substrate, and two or more field-effect transistors having these semiconductor layers as channels are formed. The ratio Na / L of the number of crystal grain boundaries across the direction of the current flowing through each transistor to the average value Na / L has a frequency distribution within ± 5% between the field-effect transistors.
[0011]
Further, the semiconductor device of the present invention is characterized in that the ratio Na / L has a frequency distribution of preferably ± 2% between the field effect transistors.
[0012]
Further, the semiconductor device of the present invention is characterized in that a circuit layer for operating the field effect transistor is formed on a substrate.
[0013]
Further, the method of manufacturing a semiconductor device according to the present invention is characterized in that a spatial intensity modulation optical system is inserted between a laser light source and a substrate so that the intensity and distribution of laser light on the substrate surface can be modulated, And measuring its distribution, adjusting the parameters of the spatial intensity modulation optical system while feeding back so that the measured intensity and its distribution coincide with a preset target, and intensity through the spatial intensity modulation optical system And a step of irradiating the substrate surface with a laser beam having its distribution modulated, whereby semiconductor layers having two or more types of average crystal grain sizes are separately formed in the same substrate.
[0014]
Further, the apparatus for manufacturing a semiconductor device according to the present invention is capable of modulating the intensity and distribution of laser light on the substrate surface by inserting a spatial intensity modulation optical system between the laser light source and the substrate, Measuring means for measuring its distribution, adjusting means for adjusting the parameters of the spatial intensity modulation optical system while feeding back such that the measured intensity and its distribution coincide with a preset target, and the spatial intensity modulation optical system And an irradiating means for irradiating the substrate surface with laser light whose intensity and its distribution have been modulated.
[0015]
Further, the apparatus for manufacturing a semiconductor device according to the present invention is characterized in that the measuring means is provided on a plane parallel to the substrate.
[0016]
Further, in the apparatus for manufacturing a semiconductor device according to the present invention, the spatial intensity modulation optical system is an imaging optical system including a phase shift mask.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0018]
FIG. 1 shows a schematic view of a laser crystallization apparatus embodying the present invention.
In the laser crystallization apparatus, an attenuator (attenuator) 2 and a beam profile modulator 3 are arranged at the beginning of an optical axis a of a laser light source 1, and a semiconductor substrate 5 is arranged at an end via a mirror 4.
In addition, the beam profile measuring unit 6 is provided in parallel with the semiconductor substrate 5, and the semiconductor substrate 5 and the beam profile measuring unit 6 are fixed to the moving stage 7.
Further, a control personal computer 8 is installed, and the beam profile measuring unit 6 is connected to the input side, and the control system of the attenuator 2, the beam profile modulating unit 3, and the moving stage 7 is connected to the output side.
[0019]
The attenuator 2 optically modulates the intensity (amplitude) of the laser light by adjusting the angle of the dielectric multilayer coating filter, and includes a sensor, a motor, and a control system (not shown).
[0020]
The beam profile modulating unit 3 modulates the spatial intensity distribution of the laser light, and includes a phase shift mask 31 and an imaging optical system 32.
The phase shift mask 31 alternately shifts the phase of light passing through the mask pattern from 0 to π, thereby generating a reverse peak pattern in which the light intensity is minimized in the phase shift section. By controlling the position of the first solidified region (crystal nucleus) above and growing the crystal laterally therefrom (lateral growth), large crystal grains are provided at designated positions.
At this time, a desired beam profile is set according to the shape of the phase shift mask, the distance from the semiconductor substrate 5, the angle distribution of the laser light, and the like.
The phase shift mask 31 further includes a sensor, an actuator, and a control system (not shown) for exchanging mask patterns and performing alignment in the optical axis direction.
[0021]
The imaging optical system 32 is configured by an optical component such as a lens, and irradiates a laser beam while holding the semiconductor substrate 5 at a position defocused from the focal position of the imaging optical system 32.
The shape and width of the reverse peak pattern are controlled by the mask pattern and the defocus amount at this time.
The width of the reverse peak pattern increases in proportion to the half power of the defocus amount.
[0022]
The beam profile measuring unit 6 receives the excimer laser of ultraviolet light on the fluorescent plate 61 and converts it into visible light, receives the visible light reflected on the mirror 62 on the CCD 63, and simultaneously measures the intensity of the laser light and the beam profile.
The intensity of the laser light may be separately measured using a semiconductor power meter or the like.
Further, an ultraviolet excimer laser may be directly received by the CCD 63.
[0023]
The fluorescent plate 61 is provided on the same plane as the semiconductor substrate 5 or on a parallel plane.
When the fluorescent plate 61 is installed on a parallel plane having a step, the moving stage 7 is moved up and down so that the fluorescent plate 61 is positioned at the same height as the semiconductor substrate 5 for measurement.
Thus, the beam profile of the laser beam on the substrate surface can be measured under the same conditions as those during the actual irradiation.
[0024]
The image received by the CCD 63 is input to the personal computer 8 and sliced by an arbitrary scanning line, and the intensity and the beam profile of the laser beam are measured from the intensity distribution of the image signal.
Then, the measured intensity is compared with a preset target intensity to calculate an operation amount, and an operation signal is output to the attenuator 2 and the angle of the attenuator 2 is adjusted while feeding back the measured intensity to the target intensity. Adjust.
In addition, the measured beam profile is compared with a preset target beam profile to calculate an operation amount, and an operation signal is output to the beam profile modulator 3 and the moving stage 7, so that the measured beam profile becomes the target beam profile. The position of the phase shift mask 31 and the height of the moving stage 7 are adjusted with feedback so as to be as follows.
[0025]
The moving stage 7 is movable in three-dimensional directions of front and rear, left and right, and up and down, and includes a sensor, an actuator, and a control system (not shown) for alignment in an in-plane direction and an optical axis direction.
[0026]
The laser crystallization apparatus embodying the present invention is configured as described above. In the laser crystallization step, first, the moving stage 7 is moved in the in-plane direction to move the tip of the optical axis a of the laser light source 1 to the beam profile measuring unit. 6 and is irradiated with laser light to measure its intensity and beam profile.
Next, the angle of the attenuator 2, the position of the phase shift mask 31, and the height of the movable stage 7 are aligned so that the measured intensity and the beam profile coincide with preset targets.
Next, the moving stage 7 is moved in the in-plane direction to position the tip of the optical axis a at a predetermined crystal region of the semiconductor substrate 5 and irradiate laser light having a predetermined intensity and beam profile.
By repeating the above-described measurement, alignment, and irradiation, crystal regions having different sizes of TFTs in the same substrate but having a constant average value Na of the number of crystal grain boundaries crossing the current direction in the channel region are simultaneously formed.
Measurement, alignment, and irradiation are not performed alternately in this way. First, all measurements are performed to determine the amount of operation required for alignment, and then alignment and irradiation are performed in parallel for each crystal region. You may do so.
[0027]
【Example】
As an embodiment of the present invention, an example of producing TFT-A (small size TFT) and TFT-B (large size TFT) having different sizes but identical characteristics will be described below.
First, as a substrate preparation, as shown in FIG. 3A, a first thin film 302 (for example, tetraethylorthosilicate (TEOS) ) And a 300 nm thick SiO ₂ film or a SiN / SiO ₂ laminated film, alumina, mica, etc., formed by plasma enhanced chemical vapor deposition of O ₂ ). A high quality semiconductor thin film 303 (for example, amorphous Si, amorphous SiGe or the like having a thickness of 100 nm) is formed by plasma enhanced chemical vapor deposition. The SiO ₂ thereon as a film formation gate insulating film, is deposited tetraethylorthosilicate (TEOS) and of _{O 2} by plasma chemical vapor deposition of SiO ₂ film 305 (e.g., a thickness of 100 nm). Next, dehydrogenation of the thin film is performed (for example, heat treatment at 600 ° C. for one hour in a nitrogen atmosphere).
[0028]
Next, laser crystallization is performed using the laser crystallization apparatus of FIG. The laser light source 1 uses, for example, a pulse oscillation high energy laser such as a KrF excimer laser.
Laser light emitted from a laser light source 1 passes through an attenuator 2 capable of modulating power and a beam profile and a beam profile modulating unit 3. As a result, the power and beam profile are modulated. Thereafter, the light reaches the moving stage 7 via an optical element such as the mirror 4. The semiconductor substrate 5 is arranged on the moving stage 7. Laser crystallization is performed by irradiating the semiconductor substrate 5 with modulated laser light. A beam profile measuring unit 6 that can measure a beam profile and can be used as a power meter is installed on the moving stage 7. This apparatus works in conjunction with a personal computer 8 for measurement, and controls the parameters of an optical system (for example, the angle of the attenuator 2 and the phase shift mask 31) that can modulate the height z, the power, and the beam profile so as to have a suitable beam profile. Position).
The beam profile A in FIG. 2A is a beam profile capable of forming a crystal region having a small grain size, and the beam profile B in FIG. 2B is a beam profile capable of forming a crystal region having a large crystal grain size. The condition of the beam profile is set by a system linked with the personal computer 8 for measurement.
As a result of crystallization using the beam profile A or the beam profile B, poly-Si having a desired crystal grain size is formed. For example, when laser crystallization is performed with the beam profile A, a small crystal grain size region r1 is formed in a selected region as shown in FIG. When laser crystallization is performed on the beam profile B, a large crystal grain region r2 is formed in a selected region as shown in FIG. 2B, and the crystal regions depending on the beam profile can be separately formed. .
[0029]
Evaluation of the average value Na of the number of crystal grain boundaries crossing the current direction in the channel region of the TFT is performed as follows. In order to recognize the edge of the active layer of the TFT, marking is performed at four places with a laser marker b or the like as shown in FIG. Thereafter, the source electrode 312, the drain electrode 313, the gate electrode 309, and the interlayer insulating film 314 shown in FIG. 3B are removed with hydrochloric acid, hydrofluoric acid, or the like, and the poly-Si layer 306 as an active layer of the TFT is removed. To expose. Thereafter, wet etching is performed for about 30 seconds using a secco etching solution or the like to make crystal grain boundaries stand out. After drying, an image is observed with a scanning electron microscope. Note that a surface roughness meter, an atomic force microscope, or the like may be used as the image observation device.
[0030]
The counting of the number of crystal grain boundaries crossing the current direction in the channel region divides two markings on the source portion and two markings on the drain portion into, for example, 10 equal parts, respectively, and determines straight lines that are parallel to each other. The number of intersections between the straight line and the grain boundary is averaged and calculated.
Since the grain size is controlled by the beam profile, crystal grain boundaries exist more densely in the small grain size crystal region than in the large grain size crystal region.
[0031]
The gate length La of the TFT-A was 2 μm, the gate length Lb of the TFT-B was 4 μm, and the width W was 2 μm.
As shown in FIG. 2, a beam profile A and a beam profile B for obtaining TFT characteristics capable of achieving the same performance were measured in advance. As shown in FIG. 6, in this case, a desired profile could be determined by the Z value based on the relation data between the stage height Z and the number of crystal grain boundaries per 1 μm.
In this case, the profile required for the TFT-A with the height d of the phase shift mask constant at 0 μm is as follows: Z = 30 μm, laser intensity 500 mJ / cm 2,
The profile required for TFT-B is as follows: Z = 20 μm, laser intensity 700 mJ / cm 2,
Was measured.
Under these conditions, crystallization was performed on a plurality of regions on the substrate.
[0032]
The produced crystal was crystallized according to a beam profile as shown in FIGS.
The crystal regions manufactured by these methods are patterned with the sizes corresponding to the TFT-A and TFT-B, respectively, and the following process is performed. Figure 3 (b) a gate electrode 309 on the gate insulating film as shown in (for example, high concentration phosphorus-doped polysilicon, W, TiW, WSi2, MoSi 2) provided. Using the gate electrode 309 as a mask, ion implantation is performed to form a source region 311 and a drain region 310. For example, in the case of an N-type TFT, P + is implanted in the order of 10 ¹⁵ cm ⁻² , and in the case of a P-type TFT, BF ²⁺ is implanted in the order of 10 ¹⁵ cm ⁻² . Thereafter, annealing is performed in an electric furnace at 500 ° C. to 600 ° C. for about 1 hour using nitrogen as a carrier gas to activate the impurities. Alternatively, heating may be performed at 700 ° C. for 1 minute by rapid thermal annealing (RTA). Finally, an interlayer insulating film 314 is formed, a contact hole is formed, and a source electrode 312 and a drain electrode 313 are formed. As a material of the source electrode 312 and the drain electrode 313, for example, Al, W, or Al / TiN is used.
[0033]
The evaluation of the TFT was performed at a center position where two diagonal lines were drawn and crossed on a 350 mm × 400 mm substrate, and a total of five points including the center position and the middle points of the four corners of the substrate.
In the area, a TFT-A having a constant width 2 μm and a length La = 2 μm and a TFT-B having a length Lb = 4 μm are formed in a constant pattern. When the TFT characteristics were measured at each of the five points, the same characteristics were obtained for both TFT-A and TFT-B. Further, in order to investigate the ratio Na / L of the average value Na of the number of crystal grain boundaries crossing the current direction in the channel region and the gate length L, the poly-Si layer of the TFT whose characteristics were measured was clarified. Marking of the position and removal of the upper layer were performed, and the area within 50 μm × 50 μm was evaluated with a scanning electron microscope. As a result, the ratio Na / L of the average value Na of the number of crystal grain boundaries crossing the current direction in the channel region and the ratio Na / L of the gate length L in each of the plurality of TFT-A and TFT-B are within ± 5%. Had a distribution.
As a result of measuring the characteristics of a plurality of TFTs manufactured in the present invention, TFT-A and TFT-B obtain the same performance (electron mobility: 250 cm2.V / s) despite different transistor sizes. I was able to do it.
[0034]
Further, in the beam profile measurement, the profile required for the above-mentioned condition TFT-A is as follows: Z = 30 μm, laser intensity 500 mJ / cm 2,
The profile required for TFT-B is as follows: Z = 20 μm, laser intensity 700 mJ / cm 2,
In addition to the above, when the height d of the phase shift mask was adjusted and the optimum d was detected,
D = 5 μm for TFT-A
D = 1 μm for TFT-B
Was preferred.
Under the above conditions, the above-described TFT was manufactured, and the ratio Na / L of the average value Na of the number of crystal grain boundaries crossing the current direction in the channel region and the gate length L in each of the plurality of TFT-A and TFT-B was measured. Also had a frequency distribution within ± 2%.
As a result of measuring the characteristics of a plurality of manufactured TFTs, the same performance (electron mobility: 250 cm2.V / s) can be obtained for the TFT-A and the TFT-B despite different transistor sizes. Was.
[0035]
【The invention's effect】
As described above, according to the present invention, crystal regions having desired grain sizes can be separately formed on the same substrate for various sizes of TFTs having arbitrary performance.
As a result, variations in TFT are suppressed and characteristics are improved.
[Brief description of the drawings]
FIG. 1 is a schematic view of a laser crystallization apparatus embodying the present invention.
FIG. 2 is a schematic diagram of an electronic device manufactured using the manufacturing apparatus and method of the present invention.
FIG. 3 is a process sectional view of an electronic device manufactured by using the manufacturing apparatus / method of the present invention.
FIG. 4 is a schematic diagram of a laser marker provided on an active layer of a TFT.
FIG. 5 is a process sectional view of a conventional electronic device.
FIG. 6 is a graph showing the relationship between the stage height Z and the number of crystal grain boundaries per 1 μm.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 laser light source 2 attenuator 3 light intensity pattern adjustment unit 31 phase shift mask 32 imaging optical system 4 mirror 5 semiconductor substrate 6 light intensity pattern measurement unit 61 fluorescent plate 62 mirror 63 CCD
7 Moving stage 8 Personal computer 101 Glass substrate 102 Base protective film 103 Amorphous silicon thin film 104 Excimer laser 105 Arrow indicating scanning heating direction 106 Polycrystalline silicon thin film 107 Gate insulating film 108 Drain impurity implantation region 109 Source impurity implantation region 110 Gate electrode 111 Protective film 112 Source electrode 113 Drain electrode 301 Insulator substrate 302 First thin film 303 Second thin film 305 SiO ₂ film 306 Poly-Si layer 309 Gate electrode 310 Drain region 311 Source region 312 Source electrode 313 Drain electrode 314 Interlayer insulating film a Optical axis b Laser marker r1 Small crystal grain size area r2 Large crystal grain size area

Claims (8)

A semiconductor device, wherein a semiconductor layer having two or more kinds of average crystal grain sizes is formed directly or indirectly on the same substrate. While forming the semiconductor layer directly or indirectly on the substrate,
Forming two or more field effect transistors using these semiconductor layers as channels,
A ratio Na / L between the gate length L of each transistor and the average value Na of the number of crystal grain boundaries crossing the direction of current flowing through each transistor has a frequency distribution within ± 5% between the field effect transistors. Semiconductor device. 3. A semiconductor device according to claim 2, wherein the ratio Na / L between the field effect transistors preferably has a frequency distribution within ± 2%. A semiconductor device comprising a circuit layer for operating the field-effect transistor formed on the substrate according to claim 2. A spatial intensity modulation optical system is inserted between the laser light source and the substrate so that the intensity and distribution of the laser light on the substrate surface can be modulated,
Measuring the intensity and distribution of the laser light on the substrate surface,
Adjusting the parameters of the spatial intensity modulation optical system while feeding back the measured intensity and its distribution to match a preset target,
Irradiating the substrate surface with laser light whose intensity and its distribution have been modulated through the spatial intensity modulation optical system,
Repeat
A method of manufacturing a semiconductor device, wherein two or more semiconductor layers having an average crystal grain size are separately formed in the same substrate. A spatial intensity modulation optical system is inserted between the laser light source and the substrate so that the intensity and distribution of the laser light on the substrate surface can be modulated,
Measuring means for measuring the intensity and distribution of the laser light on the substrate surface,
Adjusting means for adjusting the parameters of the spatial intensity modulation optical system while feeding back such that the measured intensity and its distribution coincide with a preset target,
Irradiation means for irradiating the substrate surface with laser light whose intensity and its distribution have been modulated through the spatial intensity modulation optical system,
An apparatus for manufacturing a semiconductor device, comprising: An apparatus for manufacturing a semiconductor device, wherein the measuring means according to claim 6 is provided on a plane parallel to a substrate. 7. An apparatus for manufacturing a semiconductor device, wherein the spatial intensity modulation optical system according to claim 6 is an imaging optical system including a phase shift mask.

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