JP2004088121A - Active matrix substrate and liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize an active matrix substrate and a liquid crystal display device which have superior characteristics. <P>SOLUTION: The active matrix substrate is equipped with thin film transistors and data lines and gate lines connected to the thin film transistors. The data lines and the gate lines are arranged so as to intersect each other, and a plurality of insulating films of different kinds are formed between the data lines and the gate at the intersections of the data lines and the gate lines. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to an active matrix substrate having a thin film transistor (hereinafter abbreviated as AM substrate) and a liquid crystal display device.

FIGS. 3 and 4 are diagrams illustrating an AM substrate according to the prior art.

The AM substrate shown in FIG. 3 uses a coplanar TFT as a pixel switching element. FIG. 3-a is a plan view, and FIG. 3-b is a cross-sectional view along BB '. In this AM substrate, a TFT semiconductor layer including a channel region 301, a source region 302, and a drain region 303 is provided as a lowermost layer on an insulating substrate, and a gate insulating film 304 is provided to cover the semiconductor layer. Further, a gate electrode / line 305 rides thereon, and an interlayer insulating film 306 covers the gate electrode / line 305 and the gate insulating film 304.
The pixel electrode 308 is electrically connected to the drain region 303 via the contact hole 307 opened through the gate insulating film 304 and the interlayer insulating film 306, and the data line 309 is electrically connected to the source region 302. Have been. Normally, the material of the pixel electrode 308 and the material of the data line 309 are different from each other. Therefore, in order to form an AM substrate having this structure, at least six film formation steps require five photolithography processing steps. There are two contact holes.

ＡＭ The AM substrate shown in FIG. 4 uses a staggered structure TFT as a pixel switching element. FIG. 4-a is a plan view, and FIG. 4-b is a cross-sectional view along C-C '. In this AM substrate, a channel region 401, a source region 402, and a drain region 403 are provided in the lowermost layer on the insulating substrate, and a source pad 404 and a drain pad 405 which are thicker than these semiconductor layers are similarly formed of a semiconductor material. Is provided in the lowermost layer. Part of the source region 402 covers part of the source pad 404, and part of the drain region 403 covers part of the drain pad 405. Normally, the source region 402 and the drain region 403 and the source pad 404 and the drain pad 405 are made of the same material, and their electrical properties are the same. A gate insulating film 406 is provided so as to cover these semiconductor layers, and a gate electrode / line 407 rides thereon, and an interlayer insulating film 408 covers the gate electrode / line 407 and the gate insulating film 406. The pixel electrode 410 is electrically connected to the drain pad 405 through the contact hole 409 opened through the gate insulating film 406 and the interlayer insulating film 408, and the data line 411 is electrically connected to the source pad 404. Has been taken. Normally, the material of the pixel electrode 410 and the material of the data line 411 are different. Therefore, in order to form an AM substrate having this structure, at least seven film formation processes require six photolithography processing steps. There are two contact holes.

FIGS. 8 and 9 are diagrams illustrating another conventional AM substrate and its manufacturing method.

ＡＭ The AM substrate shown in FIGS. 8 and 9 uses a coplanar TFT as a pixel switching element, and forms a storage capacitor with a polycrystalline silicon film containing an impurity serving as a donor or an acceptor and a previous gate line. (Japan Display '92 P.451, Hiroshima Japan 1992) FIG. 8-a is a plan view, and FIG. 8-b is a cross-sectional view along BB ', and the manufacturing process is depicted in FIG. I have. In this AM substrate, a semiconductor layer of a TFT including a lowermost channel region 301, a source region 302, and a drain region 303 on an insulating substrate and a lower electrode 811 for a storage capacitor made of polycrystalline silicon containing impurities serving as donors or acceptors. There is. A gate insulating film 304 is provided to cover these. Further, a gate line 813 of the preceding row, which also serves as the gate electrode / line 305 and the upper electrode for the storage capacitor, is mounted thereon, and an interlayer insulating film 306 covering these is provided. The pixel electrode 308 is electrically connected to the drain region 303 via the contact hole 307 opened through the gate insulating film 304 and the interlayer insulating film 306, and the data line 309 is electrically connected to the source region 302. Has been. The pixel electrode 308 is electrically connected to the storage capacitor lower electrode 811 through another contact hole 812.

A method of manufacturing an AM substrate having this structure will be described with reference to FIG. First, a polycrystalline silicon film is deposited on an insulating substrate, the silicon film is patterned by photolithography, and then a gate insulating film 304 is deposited (FIG. 9A). Next, a photoresist 901 is formed so as to cover a region other than a region to be a storage capacitor lower electrode, and impurity ions 902 are implanted using the photoresist 901 as a mask to form a storage capacitor lower electrode 811 ( Fig. 9-b). Further, after the gate electrodes / lines 305 and 813 are formed from a silicon film or the like containing a donor or acceptor impurity, impurity ions are implanted using the gate electrode as a mask to form the TFT channel region 301, source region 302, and drain region 303. Formed (FIG. 9-c). Thereafter, an interlayer insulating film 306 is deposited by an APCVD method or the like, and contact holes 307 and 812 are opened (FIG. 9D). Finally, a pixel electrode 308 made of ITO or the like and a data line 309 made of Al or the like are formed. Accordingly, the AM substrate is completed (FIG. 9-e). Normally, the material of the pixel electrode 308 and the material of the data line 309 are different from each other. Therefore, in order to form an AM substrate having this structure, at least six film forming processes require six photolithography processing steps. There are three contact holes.
In addition, at the intersection of the data line and the gate line, an interlayer insulating film is kept in a single layer to keep the insulation, and the pixel electrode 308 and the data line 309 exist on the same layer.

However, the following problems have been pointed out in the above-mentioned conventional method.

Generally, the TFT characteristics are improved as the thickness of the channel region is reduced. However, in the AM substrate structure of FIG. 3, when the thickness of the channel region 301 is reduced, the thickness of the source / drain regions is automatically reduced. If the thickness of the source / drain region is small, contact failure occurs, and some of the many TFTs have defects due to lack of electrical continuity between the data line and the source region or between the pixel electrode and the drain region. In addition, when a contact hole is opened, a source region or a drain region below the contact hole peels off and separates from the substrate, so that it cannot function as a switch element. Therefore, in the substrate structure of FIG. 3, the channel region cannot be made thin, and a TFT having good characteristics cannot be used as a switching element.

On the other hand, in the AM substrate structure shown in FIG. 4, since a thick source pad and a drain pad exist, a thin channel portion can be used, and the above-described problem does not occur. However, in order to produce this AM substrate, seven film formation steps and six photolithography steps are required, which is a complicated and redundant step, which causes a problem that the yield is reduced and the product price is increased. Further, in the case of the AM substrate shown in FIG. 3 or FIG. 4, there is a problem that two contact holes exist in each pixel, and a fine pixel cannot be formed.

In order to increase the aperture ratio of the pixel area, the capacity line is omitted and the AM substrate having the structure shown in FIG. This requires a number of photolithography steps, which again results in a complicated and redundant process, which causes a problem of lowering the yield and increasing the product price. In the AM substrate having this structure, each pixel has three contact holes. Assuming that the size of the contact hole is 4 μm and the margins on both sides are 3 μm, the area of the pad region for forming the contact hole is 10 μm × 10 μm = 100 μm ² for one contact hole, and three The area of 300 μm ² is occupied by the contact hole. In a high-definition liquid crystal display device, the pixel pitch tends to be reduced and its size is currently about 30 μm × 40 μm = 1200 μm ^2, so that three contact holes occupy 25% of the whole. In order to further improve the definition, for example, to realize a pixel pitch of 20 μm × 30 μm = 600 μm ² , the existence of the above three contact holes alone results in a loss of 50% of the area, and in fact a higher than that. There is a problem that definition cannot be achieved. That is, there is a strong demand for reduction in the number of contact holes. Further, in the conventional AM substrate shown in FIGS. 3, 4, 8 and the like, since the data line wiring and the pixel electrode are in the same layer, there is a problem that the pixel electrode cannot be enlarged. In addition, when a liquid crystal display device is manufactured using these conventional AM substrates, it is necessary to provide a black stripe on the substrate opposed to the liquid crystal to prevent light leakage from adjacent pixels. Must completely align the two substrates so that the edge of each pixel electrode is completely covered. The distance between the two substrates is usually several μm, and the width of the black stripe must be increased in consideration of the margin for alignment. As a result, the pixel opening of the resulting liquid crystal display device is larger than the pixel electrode on the AM substrate. There is a problem that it becomes extremely small.

The present invention has been made in view of the above circumstances, and an object thereof is to provide an AM substrate having a simple structure in which a semiconductor layer can be thinned and a TFT having good characteristics is used as a switching element, and an easy manufacturing method thereof. It is to do.

Another object of the present invention is to provide an AM substrate capable of reducing the number of contact holes to promote fineness and improving an aperture ratio and an easy manufacturing method thereof.

Means to solve the problem

An active matrix substrate according to the present invention is an active matrix substrate including a thin film transistor, and a data line and a gate line connected to the thin film transistor, wherein the data line and the gate line are arranged so as to intersect with each other, and the data line A plurality of insulating films having different types of insulating films are formed between the data lines and the gate lines at intersections of the gate lines.

は Also, what is the liquid crystal display device of the present invention? The active matrix substrate and the opposing substrate are arranged to face each other.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings, but the present invention is not limited to the following embodiment.

FIG. 1 is a diagram illustrating an example of an AM substrate according to the present invention, and FIGS. 2A to 2C are cross-sectional views illustrating a process of manufacturing an AM substrate according to the present invention.

FIG. 1-a is a plan view, and FIG. 1-b is a cross-sectional view along A-A ′. In the AM substrate according to the present invention, there is a semiconductor layer including a channel region 101, a source region 102, and a drain region 103 in the lowermost layer on the insulating substrate, and molybdenum, tungsten, chromium, vanadium, niobium, tantalum, and the like on the same layer. A pixel electrode extraction pad 105 made of the same metal as the data line 104 made of a high melting point metal is provided. A part of the source region 102 covers a part of the data line 104, and a part of the drain region 103 covers a part of a metal pixel electrode extraction pad 105. A gate insulating film 106 is provided so as to cover these semiconductor layers, metal data lines, and metal pixel electrode extraction pads, and a gate electrode / line 108 is provided on the gate insulating film. In the gate insulating film, a contact hole 107 is formed on the metal pad 105, and a pixel electrode 109 is formed on the gate insulating film through the contact hole. In the first embodiment, the pixel electrode and the gate electrode are formed of the same material on the same layer. However, the materials may be different or may be formed on different layers. For example, it is also possible to remove the gate insulating film in the pixel electrode region at the time of opening the contact hole and provide the pixel electrode in the lowermost layer of the same layer as the semiconductor layer.

The method of manufacturing an AM substrate according to the present invention will be described with reference to FIG. First, a metal film is deposited on an insulating substrate such as a glass substrate by an evaporation method or a sputtering method. In the first embodiment, 2000 mm of chromium was deposited at a substrate temperature of 150 ° C. by a sputtering method. In addition, refractory metals such as molybdenum and tungsten are also possible. At this time, the sheet resistance of chromium was 1.12 Ω / □. Next, the metal film is processed by a photolithography process to form a data line 104 and a pixel electrode extraction pad 105. (FIG. 2-A) Subsequently, a semiconductor film is formed by an LPCVD method or the like. In the first embodiment, a polycrystalline silicon film is deposited by the LPCVD method. The substrate temperature was 555 ° C., and the monosilane partial pressure during deposition of the polycrystalline silicon film was 0.94 mtorr. The thickness of the polycrystalline silicon film was 280 ° and the deposition time was 1 hour, 5 minutes, and 50 seconds. Subsequently, the semiconductor film is processed by a photolithography process, and then a gate insulating film 106 is formed by ECR-PECVD or the like. In Example 1, an SiO ₂ film was deposited at a substrate temperature of 100 ° C. and 1200 °. (FIG. 2B) Next, a contact hole 107 is formed on the pixel electrode take-out pad by a photolithography process to form a transparent electrically conductive film. In Example 1, indium tin oxide (ITO) was deposited at 2500 ° by a sputtering method. At this time, the sheet resistance was 28Ω / □. Thereafter, a gate electrode / line 108 and a pixel electrode 109 were formed by a photolithography process. Next, an impurity serving as a donor or an acceptor is implanted into the semiconductor film using a gate electrode as a mask by a mass non-separable ion implantation apparatus, so that a channel region 101, a source region 102, and a drain region 103 are formed. In the first embodiment, 5 × 10 ¹⁵ 1 / cm ^{2 of} phosphine (PH ₃ ) diluted with hydrogen was implanted at an acceleration voltage of 90 kV with the aim of forming an n-type field effect transistor. Thereafter, the implanted ions are activated by a heat treatment at 350 ° C. for 2 hours in a nitrogen atmosphere to complete the AM substrate (FIG. 2C).

The TFT of the AM substrate thus prototyped has an on-current (Vds = 4 v, Vgs = 10 v Lds / Ids of 10 μm / 10 μm) of 1.2 μA, and an off-current (Vds = 4 v, Vgs = 0 v L / W = (Ids of 10 μm / 10 μm) showed good switching characteristics of 0.067 pA, and was an excellent AM substrate. This is because the channel thickness of the AM substrate structure of the present invention can be made sufficiently small. Also, no problems such as poor contact could occur. Further, according to the present invention, the number of contact holes for each pixel was reduced by half, the aperture ratio of the pixel area was improved, and the defects caused by the contact holes were reduced by half. In addition, the present invention comprises a simple manufacturing method of four film forming steps and four photolithography steps.
(Example 2)
FIG. 5 is a view for explaining an example of an AM substrate according to the present invention. FIG. 5-a is a plan view and FIG. 5-b is a cross-sectional view along AA '. In the AM substrate according to the second embodiment, an active layer semiconductor film including a channel region 101, a source region 102, and a drain region 103 is provided on an insulating substrate serving as a first insulating layer, and molybdenum, tungsten, chromium, A pixel electrode extraction pad 105 made of the same metal as the data line 104 made of a high melting point metal such as vanadium, niobium, and tantalum is provided. A part of the source region 102 covers a part of the data line 104, and a part of the drain region 103 covers a part of a metal pixel electrode extraction pad 105. A gate insulating film 106 serving as a second insulating layer is provided so as to cover these semiconductor layers, metal data lines, and metal pixel electrode take-out pads, and a gate electrode / line 108 is provided on the second insulating layer. Further, on these, there is an interlayer insulating film 110 which is a third insulating layer. A contact hole 107 is formed in the gate insulating film and the interlayer insulating film on the metal pad 105, and a pixel electrode 109 is formed on the interlayer insulating film serving as the third insulating layer through the contact hole. I have. In the second embodiment, the pixel electrode take-out pad 105 is provided on the first insulating layer. However, if the active layer semiconductor film has a thickness sufficient to prevent a problem such as a contact failure, the pixel electrode take-out pad is formed. The pad may be omitted and the contact hole 107 may be opened directly on the drain region 103. As a result, the pixel aperture ratio is improved by the amount corresponding to the elimination of the pixel electrode extraction pad. As the gate electrode / line 108, various metals such as aluminum, copper, nickel, iron, chromium, molybdenum, tungsten, and tantalum can be used. The pixel electrode 109 may be made of a transparent conductive material such as indium tin oxide (ITO) or a metal material when the present invention is used in a reflective liquid crystal display device. In the second embodiment, since the data line, the gate line, and the pixel electrode are formed on different layers, the pixel electrode can be made as large as possible. The edge of the pixel electrode 109 overlaps with the gate line via an interlayer insulating film, and overlaps with the data line via an interlayer insulating film and a gate insulating film. Since the data line and the gate line are made of metal in the second embodiment and both are made of an electrically conductive light-shielding substance, these lines are black stripes because they overlap with the edge of the pixel electrode. That is, when the AM substrate of the second embodiment is used, it is not necessary to form a thick black stripe on the counter substrate side, and the substantial aperture ratio of the completed liquid crystal display device is greatly improved.

Next, a method of manufacturing an AM substrate according to the present invention will be described. First, a metal film is deposited on an insulating substrate such as a glass substrate by an evaporation method or a sputtering method. As the metal, the above-mentioned high melting point metal is preferable, but a nonmetal such as metal silicide is also possible as long as it is an electrically conductive light-shielding substance. Next, the metal film is processed by a photolithography process to form a data line 104 and a pixel electrode extraction pad 105. Subsequently, a semiconductor film is formed. As described in the first embodiment, a semiconductor film can be formed by various methods other than the method of directly depositing a polycrystalline silicon film at a temperature of about 555 ° C. or lower by the LPCVD method. For example, a method of depositing an amorphous semiconductor film at a temperature of about 550 ° C. or less using monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) as a raw material and then performing a heat treatment in a furnace at about 600 ° C. or less for crystallization. For example, a method of irradiating laser light or arc lamp light for a short time to crystallize is also effective. Further, the semiconductor film is not limited to silicon, and various semiconductor films such as a silicon-germanium film are also possible. In all of these steps, the data lines and the like do not deteriorate due to heat, since the temperature is about 600 ° C. or less, which is lower than the melting point of the metal material such as the data lines. Subsequently, the semiconductor film is processed by a photolithography process, and then a gate insulating film 106 is formed by ECR-PECVD or the like.

The gate insulating film can be formed at a temperature of about 100 ° C. by using the ECR-PECVD method. Alternatively, the gate insulating film may be formed at a temperature of 350 ° C. or lower by an APCVD method, a CVD method using ozone (O ₃ ), or the like. Subsequently, a metal film is deposited on the gate insulating film by a sputtering method or the like, and a gate electrode and a line are formed by a photolithography process. When depositing a metal film by a sputter method, the substrate temperature is preferably 300 ° C. or lower. Next, an impurity serving as a donor or an acceptor is implanted into the semiconductor film using a gate electrode as a mask by a mass non-separable ion implantation apparatus, so that a channel region 101, a source region 102, and a drain region 103 are formed. When a hydride of an impurity element is ion-implanted by a mass non-separable ion implantation apparatus, impurity ions can be activated by a low-temperature heat treatment at about 350 ° C. or less. Subsequently, an interlayer insulating film 110 is formed at about 350 ° C. or lower by various CVD methods. After that, a heat treatment is performed in a nitrogen atmosphere at a temperature of about 350 ° C. or less for about 1 to 2 hours in order to bake the interlayer insulating film and activate the implanted ions. Finally, a contact hole 107 is opened, a conductive material such as ITO is deposited on the interlayer insulating film by a sputtering method or the like, and a pixel electrode 109 is formed by a photolithography process to complete the AM substrate. When a conductive material is deposited by a sputter method, the substrate temperature can be suppressed to about 300 ° C. or less. According to the second embodiment, the maximum process temperature after forming the gate insulating film is as low as about 350 ° C., and the time is about several hours. Therefore, there is no thermal degradation of the electrically conductive light-shielding material such as the data line, the gate electrode and the line. In the second embodiment, six film formation processes and five photolithography processing steps are required until the AM substrate is completed, which is the same as the number of film formations and photolithography in the prior art shown in FIG. Yes. However, in the present invention, the data line wiring and the pixel electrode are conventionally in the same layer, but can be formed in a different layer in the present invention, thereby increasing the pixel electrode area. In addition, in the present invention, the pixel electrode, the data line, and the gate line can be overlapped, and the black stripe on the opposite substrate can be omitted. Conventionally, two contact holes existed in each pixel. However, in the present invention, the number of contact holes is reduced to one, thereby realizing a high-definition liquid crystal display device having fine pixels.
(Example 3)
FIG. 6 is a diagram illustrating an example of an AM substrate according to the present invention, and FIGS. 7A to 7D are cross-sectional views illustrating a process of manufacturing an AM substrate according to the present invention. FIG. 6A is a plan view, and FIG. 6B is a cross-sectional view taken along AA ′.

The AM substrate shown in FIGS. 6 and 7 uses a coplanar TFT as a pixel switching element and has a storage capacitor. In the AM substrate of the present invention, an active layer semiconductor film including a channel region 101, a source region 102, and a drain region 103 and a high-level material such as molybdenum, tungsten, chromium, vanadium, niobium, and tantalum are formed on an insulating substrate which is a first insulating layer. A data line 104 made of a melting point metal, a pixel electrode extraction pad 105 made of the same metal, and a storage capacitor lower electrode 611 made of the same metal are formed. A gate insulating film 106 is provided to cover these. The gate insulating film is a second insulating layer, on which a gate electrode line 108, a pixel electrode 109, and a previous gate line 613 also serving as a storage capacitor upper electrode are provided. The pixel electrode 109 is electrically connected to the pixel electrode take-out pad 105 through the contact hole 107 formed in the gate insulating film, and is connected to the storage capacitor lower electrode 611 through another contact hole 612. . With this structure, it is possible to reduce the thickness of the active layer semiconductor film to the limit of several tens of kilometers where the film can exist as a film. If the active layer semiconductor film is thick enough not to cause a contact failure or the like, the pixel electrode take-out pad may be omitted and the pixel electrode 109 may be directly contacted with the drain region 103.

A method of manufacturing an AM substrate having this structure will be described with reference to FIG. First, an electrically conductive substance such as a metal film is deposited on an insulating substrate serving as a first insulating layer by a vapor deposition method, a sputtering method, or the like. As the metal, the above-described high melting point metal is preferable, but other conductive materials such as other metal materials and non-metal materials are also possible as long as they are stable against the thermal environment in the subsequent semiconductor film formation process. . Next, the electrically conductive material is patterned by a photolithography process to form a pixel electrode extraction pad 105, a data line 104, and a storage capacitor lower electrode 611 (FIG. 7A). If the pixel electrode take-out pad is unnecessary, it is not necessary to leave the pixel electrode take-out pad by this patterning. Subsequently, a semiconductor film is deposited. Since the most severe thermal environment in the AM substrate manufacturing process of the present invention is the semiconductor film deposition process, when the temperature is lowered, the selection of the electrically conductive material such as the data line is widened, and the size of the insulating substrate is increased. It is easy to reduce the price. When a polycrystalline silicon film is used as a semiconductor film, there is a method of directly depositing a high quality film at a deposition temperature of 555 ° C. or less and a monosilane partial pressure of 1 mtorr or less using monosilane as a source gas by LPCVD. Further, there is a method in which disilane (Si ₂ H ₆ ) is used as a source gas by LPCVD to deposit an amorphous silicon film at a deposition temperature of about 450 ° C. and a pressure of about 0.5 torr, and then proceed with crystallization. In order to promote crystallization of the amorphous film, a method of performing heat treatment at a temperature of about 600 ° C. for several hours, a method of heating to about 900 ° C. for several seconds by a rapid heat treatment called so-called rapid thermal annealing (RTA), And laser irradiation. In the laser irradiation, for example, a method of irradiating a XeCl excimer laser with an intensity of 50 mJ / cm ² to 500 mJ / cm ² for about 50 ns to instantaneously melt and then crystallize the silicon film is used. According to this method, since the heating time is extremely short, the electrically conductive material such as the insulating substrate and the data line hardly undergoes thermal deterioration. When silicon germanium is used as the semiconductor film, polycrystal can be obtained at a lower temperature. In addition, a method of depositing an amorphous semiconductor film by a sputtering method and then proceeding with crystallization by each of the above methods is also effective. After the semiconductor film is formed in this manner, the semiconductor film is processed by a photolithography process (FIG. 7B). Thereafter ECR-PECVD method, an ozone _{TEOS (Si- (CH 3 -CH 2} -O) 4) method such as a gate insulating film 106 by forming and opening a contact hole 107 and 612 by a photo-lithography method ( Fig. 7-c). Next, an electric conductive material is deposited, and a gate electrode / line 108 and a pixel electrode 109 are formed on the gate insulating film as the second insulating layer by photolithography. This pixel electrode is electrically connected to the storage capacitor lower electrode 611 through the contact hole 612, and the storage capacitor is formed by the lower electrode 611 and the previous gate line 613. Finally, ion implantation is performed using the gate electrode as a mask to form a channel region 101, a source region 102, and a drain region 103. Laser irradiation or light irradiation such as RTA is effective for activating the implanted ions. When a transparent substance is used for the gate electrode, the line, and the pixel electrode, light is almost transmitted, and the temperature rise is not seen by short-time light irradiation, and there is no thermal deterioration. Further, when a metal material is used for these, light is almost reflected, and no thermal deterioration occurs. The same applies to data lines, pixel electrode take-out pads, and the like. In addition, as described in the first embodiment, ions may be implanted by a mass non-separable ion implantation apparatus, and the implanted ions may be activated at a low temperature of 300 ° C. to 350 ° C. Thus, the AM substrate is completed (FIG. 7D).

Conventionally, six photolithography processing steps were required for six film formation processes to produce an AM substrate having a storage capacity. However, according to the present invention, four film formation processes and four Photolithography can be simplified. Also, while three contact holes existed for each pixel in the past, the present invention could reduce this to two. Further, since part of the source / drain region covers a part of the data line and the pixel electrode take-out pad, the thickness of the active layer semiconductor film can be reduced to several tens of mm, and a high-performance TFT can be obtained. In the third embodiment, since the pixel electrode take-out pad and the storage capacitor lower electrode are formed separately, the pixel electrode is electrically connected through the two contact holes 107 and 612. And the lower electrode for the storage capacitor are not separated from each other and are formed by one connected island, only one contact hole is required. In this case, one contact hole is provided for each pixel, and the pixel can be further miniaturized.
(Example 4)
FIG. 10 is a diagram illustrating an example of an AM substrate according to the present invention, and FIGS. 11A to 11D are cross-sectional views illustrating a process of manufacturing an AM substrate according to the present invention. FIG. 10A is a plan view, and FIG. 10B is a sectional view taken along line AA ′.

The AM substrate shown in FIGS. 10 and 11 uses a coplanar TFT as a pixel switching element, and each pixel has a storage capacitor. In the AM substrate of the present invention, the active layer semiconductor film composed of the channel region 103 and the data line 104 made of a refractory metal such as molybdenum, tungsten, chromium, vanadium, niobium and tantalum are formed on the insulating substrate as the first insulating layer. A pixel electrode extraction pad 105 made of metal and a storage capacitor lower electrode 611 made of the same metal are formed. A gate insulating film 106 is provided to cover these. The gate insulating film is a second insulating layer, on which a gate line 613 of the previous row which also serves as a gate electrode / line 108 and an upper electrode for a storage capacitor is provided. Further, on these, there is an interlayer insulating film 110 which is a third insulating layer. The pixel electrode 109 is provided on the interlayer insulating film. Contact holes 107 and 612 are formed in the interlayer insulating film and the gate insulating film, through which the pixel electrode is electrically connected to the pixel electrode extraction pad and the storage capacitor lower electrode. With the pixel electrode extraction pad, the active layer semiconductor film can be thinned to several tens of square meters. Conversely, if the active layer semiconductor film is sufficiently thick, the pixel electrode take-out pad may be omitted, and a contact hole may be directly formed in the drain region 103 to establish conduction with the pixel electrode. In the fourth embodiment, since the pixel electrode take-out pad and the storage capacitor lower electrode are formed separately, the pixel electrode is connected to the pixel electrode take-out pad and the storage capacitor lower electrode through two contact holes. However, if the pixel electrode take-out pad and the storage capacitor lower electrode are not separated but are formed in one island, the number of contact holes is reduced to one. In the fourth embodiment, the data line is formed on the first insulating layer, the gate line is formed on the second insulating layer, and the pixel electrode is formed on the third insulating layer. Can be made larger than before. Conventionally, as shown in FIG. 8, since the data line and the pixel electrode were on the same layer, an isolation region was always required between the pixel electrode and the data line. However, in the present invention, since the data line, the gate line, and the pixel electrode are formed on different layers, the separation is performed by the gate insulating film or the interlayer insulating film, and the separation region on the plane is not required. As a result, the pixel electrode is enlarged more than before. Moreover, in the fourth embodiment, the edge of the pixel electrode overlaps the gate line and the data line. When the gate line and the data line are made of a light-shielding material such as a metal, both of these lines become black stripes. That is, when the AM substrate of the fourth embodiment is used, it is not necessary to form a thick black stripe on the counter substrate side, and the alignment between the AM substrate and the counter substrate becomes easy, and the substantial aperture ratio of the completed liquid crystal display device is reduced. This is because it becomes extremely large.

Next, a method of manufacturing an AM substrate according to the present invention will be described with reference to FIG. First, an electrically conductive substance such as a metal film is deposited on an insulating substrate such as a glass substrate. For this purpose, in addition to the above-described high melting point metal, a metal compound or a nonmetal is also effective as long as it is an electric conductive material that is stable at the semiconductor film forming process temperature. Next, the electric conductive material is processed by a photolithography process to form the data line 104, the pixel electrode extraction pad 105, and the storage capacitor lower electrode 611 (FIG. 11A). Subsequently, a semiconductor film is deposited by the method described in detail in Embodiment 3, and processed by a photolithography process (FIG. 11B). Thereafter, the gate insulating film 106 is deposited at a substrate temperature of about 350 ° C. or less by a PECVD method, an ECR-PECVD method, an APCVD method, a CVD method using an organic silicon compound and ozone, or the like. Subsequently, an electrically conductive material is deposited on the gate insulating film by a vapor deposition method, a sputtering method, or the like, and gate electrode lines 108 and 613 are formed by a photolithography process. Even when an electrically conductive material is deposited, the substrate temperature is preferably about 350 ° C. or less in order to prevent thermal changes in the lower metal such as data lines, the semiconductor film, and the gate insulating film. Next, an impurity serving as a donor or an acceptor is implanted by a non-mass separation type ion implantation apparatus using the gate electrode as a mask to form a channel region 101, a source region 102, and a drain region 103 (FIG. 11C). When a hydride of an impurity element is ion-implanted by a mass non-separable ion implantation apparatus, impurity ions can be activated by a low-temperature heat treatment at about 350 ° C. or less. After the impurity ions are implanted by a usual mass separation type ion implantation apparatus, the implanted ions may be activated by laser irradiation. Next, an interlayer insulating film 110 is deposited at a substrate temperature of about 350 ° C. or less by various CVD methods or PVD methods. In the case of performing source / drain region type ion implantation using a non-mass separation type ion implantation apparatus, if the heat treatment is performed at a temperature of about 300 ° C. to 350 ° C. for about 30 minutes to about 2 hours after the interlayer insulating film is deposited, the implanted ions become active. When the film quality of the interlayer insulating film and the gate insulating film are different at the same time, they approach or become the same, and the contact hole in the next step is easily formed. If a thermal process at 350 ° C. or higher is performed after the gate insulating film is deposited, a hydrogenation treatment such as irradiation with hydrogen plasma may be performed here. Subsequently, after forming contact holes 107 and 612 in a photolithography process, a pixel electrode material is deposited by a sputtering method or the like, and further subjected to a patterning process in a photolithography process to complete an AM substrate (FIG. 11D). ). As described above, according to the present invention, an AM substrate having a storage capacitor is formed by five photolithography processing steps in six film forming steps. Conventionally, as shown in FIG. 9, six photolithography processing steps were required. Therefore, in addition to the structural advantages described above, the manufacturing steps were further simplified.
(Example 5)
FIG. 12 is a diagram illustrating an example of an AM substrate according to the present invention, and FIGS. 13A to 13E are cross-sectional views illustrating a manufacturing process of the AM substrate according to the present invention. 12-a is a plan view, FIG. 12-b is a cross-sectional view along AA ', and FIG. 12-c is a cross-sectional view along BB'.

The AM substrate shown in FIGS. 12 and 13 uses a coplanar TFT as a pixel switching element, each pixel has a storage capacitor, and data lines, gate lines, and pixel electrodes are formed on different layers. . This merely means that the fifth embodiment is described in comparison with the fourth embodiment shown in FIGS. 10 and 11, and the present invention is not limited to this. That is, the AM substrate described in the first embodiment illustrated in FIGS. 1 and 2, the AM substrate described in the second embodiment with reference to FIG. 5, and the AM substrate described in the third embodiment with reference to FIGS. The present invention can be applied to an AM substrate that has been used.

In the AM substrate of the present invention, an active layer semiconductor film including a channel region 101, a source region 102, and a drain region 103 and a data line 104 made of a high melting point metal such as molybdenum, tungsten, chromium, vanadium, niobium, and tantalum are formed on an insulating layer. A pixel electrode extraction pad 105 made of metal and a storage capacitor lower electrode 611 made of the same metal are formed. The portions of these metal surfaces which are not covered with the semiconductor film and in which the contact holes are not opened are all covered with the oxide of the same metal. The thickness of the metal oxide 1201 is preferably about several tens of degrees or less. If the active layer semiconductor film is sufficiently thick, the pixel electrode extraction pad may be omitted, and a contact hole may be formed directly on the drain region. When the storage capacitor is unnecessary, it is not necessary to form the lower electrode for the storage capacitor. A gate insulating film 106 is provided so as to cover these, and a gate line 613 of the previous row which also serves as a gate electrode / line 108 and a storage capacitor upper electrode is provided thereon. As shown in FIG. 12C, in the cross section of the intersection of the gate line and the data line, the surface of the data line is completely covered with a metal oxide constituting the data line, and a gate insulating film is provided thereon. Have been. Similarly, the surface of the lower electrode for the storage capacitor is completely covered with the metal oxide. Since the gate line is on the gate insulating film, two types of different insulating films are interposed between the gate line and the data line or between the gate line and the storage capacitor lower electrode. An interlayer insulating film 110 is provided on the gate electrode / line and the gate insulating film, and a pixel electrode 109 is further provided thereon. The pixel electrode may be provided on the gate insulating film without the interlayer insulating film. The gate electrodes and lines may be made of a light-blocking material, and the pixel electrodes may be formed of a transparent material on separate layers or on the same layer. Both the gate electrodes and lines and the pixel electrodes may be formed of a transparent material on the same layer. Alternatively, it may be formed on another layer. Contact holes 107 and 612 are formed in the interlayer insulating film and the gate insulating film, through which the pixel electrode is electrically connected to the pixel electrode extraction pad and the storage capacitor lower electrode. If the pixel electrode extraction pad and the storage capacitor lower electrode are formed of one island, or if there is no storage capacitor lower electrode, there is one contact hole for each pixel. In the fifth embodiment, the data line, the gate line, and the pixel electrode are formed in different layers, respectively, so that the pixel electrode can be made larger than before. In FIG. 12A, the edge is completely separated from the gate line and the data line. Overlaps. If the gate line is made of a light-shielding substance such as a metal, the thick black stripe on the opposing substrate can be omitted, and the substantial aperture ratio is further improved. In the prior art AM substrate shown in FIGS. 3 and 4, the data lines and the pixel electrodes must be formed in different layers in order to substitute the black stripes by the gate lines and the data lines. Another interlayer insulating film must be deposited on the insulating film 306 or 408, and a pixel electrode must be formed thereon. In this case, a gate insulating film (on which a gate electrode is provided), a first interlayer insulating film (on which data lines are provided), a second interlayer insulating film (on which a pixel electrode is provided) are provided on the substrate. ) To form at least three layers of insulating films. When these are formed using a SiO ₂ film, when the total thickness of the three layers is increased, these insulating films are cracked and cannot be used as an AM substrate. Therefore, the total thickness of the insulating film needs to be about 1.5 μm or less. Assuming that the thickness of the gate insulating film is about 1000 ° to 2000 °, the thickness of each of the two interlayer insulating films is about 7000 °, and the pixel electrode and the data line overlap with each other via the 7000 ° SiO ₂ film. In the meantime, various information is transmitted to the data line during the period in which the pixel thin film transistor is in the off state and the data stored in the on state is held, and the potential fluctuates. If the pixel electrode and the data line overlap greatly and the film thickness between them is thin, the value of the capacitance generated between the pixel electrode and the data line increases, and as a result, the pixel electrode potential that should be kept constant in the off state becomes the data line. Fluctuates under the influence of the information transmitted to the LCD, resulting in poor image quality such as generation of crosstalk on the liquid crystal screen. Therefore, it is preferable that the overlap between the pixel electrode and the data line is small and that the interlayer insulating film separating the pixel electrode and the data line is thick. This requirement becomes stronger as the pixel electrode becomes smaller or as the storage capacitance becomes smaller. As described above, in the conventional AM substrate, the thickness of the interlayer insulating film separating the pixel electrode and the data line is about 7000 ° at the maximum. On the other hand, in the AM substrate of the present invention shown in FIG. 5 and FIG. 10, the data line is on the insulating substrate, and the thickness of the insulating film (that is, the gate insulating film and the interlayer insulating film) separating the pixel electrode and the data line is 1 It can be as thick as about 0.5 μm. Therefore, if the pixel pitch is the same as that of the conventional AM substrate and the overlapping area between the pixel electrode and the data line is the same, the AM substrate of the present invention has higher quality because of the thicker insulating film. An image is obtained. Alternatively, if the image quality is the same, the AM substrate of the present invention can increase the ratio of the overlapping area to the pixel area, and can produce a high-definition AM substrate having fine pixels. On the other hand, in the AM substrate of the present invention shown in FIG. 12 and described in the fifth embodiment, the surface of the data line is covered with a metal oxide film, and the gate insulating film and the interlayer insulating film are placed thereon. The advantage is that the coupling of the lines is even smaller than in the AM substrate shown in FIGS. In addition, as shown in FIG. 12C, the surface of the data line is covered with an insulating film called a metal oxide, and a gate insulating film is formed thereon with an insulating film different from the metal oxide film. Since the gate line is provided, there is an advantage that dielectric breakdown and leakage current between the gate line and the source line are reduced. The type or cause of the current flowing in the insulating film generally differs according to the type of the insulating film. For this reason, if the film thicknesses are almost the same, two types of different insulating films are more resistant to dielectric breakdown and leakage current than a single type of thick insulating film, even if they are slightly thinner. Based on this principle, the AM substrate of the present invention shown in FIGS. 12 and 13 significantly reduces the failure rate such as a short circuit generated at the intersection of the data line and the gate line.

Next, a method of manufacturing an AM substrate according to the present invention will be described with reference to FIG. First, an electrically conductive substance such as a metal film is deposited on an insulating substrate such as a glass substrate. For this purpose, any metal that is stable in the semiconductor film forming step, other than the above-described high melting point metal, is effective. Next, the data line 104, the pixel electrode extraction pad 105, and the storage capacitor lower electrode 611 are formed by processing the electric conductive material by a photolithography process (FIG. 13A). Subsequently, a semiconductor film is formed by the method described in detail in Embodiment 3 and processed by a photolithography process (FIG. 13B). Next, the surface of the metal film such as a data line is oxidized in an oxidizing atmosphere of 600 ° C. or lower (FIG. 13C). At a low temperature of 600 ° C. or less, oxidation of the silicon film hardly progresses, so that by appropriately adjusting the atmosphere and temperature, a metal oxide 1201 having a desired film thickness can be obtained. At the same time, an extremely thin semiconductor film can be used as an active layer. It becomes possible. For example, if tantalum is used for the same metal, an oxide film of several tens of degrees or more can be formed from a temperature of about 300 ° C. at one atmosphere of oxygen. However, under this condition, oxidation of silicon does not proceed at all, and the film thickness of the semiconductor film is reduced. Absent. Even if the oxidation of the semiconductor film progresses to some extent, no problem arises because they only become a part of the gate insulating film. Here, the semiconductor film is formed by the method described in detail in Embodiment 3, but other methods are also possible. For example, after depositing and patterning an amorphous semiconductor film (FIG. 13B), it contains oxygen, laughing gas (N ₂ O), carbon dioxide (CO ₂ ), and water (H ₂ O) in an amount of about several ppm to 1%. Heat treatment is performed in a weak oxidizing atmosphere at a temperature of about 600 ° C. or lower for several hours to about 24 hours. Accordingly, the amorphous film is crystallized, and at the same time, the metal oxide film 1201 is formed (FIG. 13C). When heat treatment is performed in a weakly oxidizing atmosphere, oxygen has the advantage of replenishing intracrystalline defects generated during crystallization of an amorphous phase, so that a semiconductor film with low threshold voltage and high mobility can be obtained. The type and concentration of the oxide gas at the time of the heat treatment are appropriately determined depending on the material of the metal used for the data line and the like and the required thickness of the metal oxide. Thereafter, the gate insulating film 106, the gate electrodes / lines 108 and 613 are formed in the same manner as described in detail in Embodiment 4, and the channel region 101, the source region 102, and the drain region 103 are formed by ion implantation. (FIG. 13-d). Subsequently, an interlayer insulating film 110 is deposited by the method described in detail in Embodiment 4 or the like, and contact holes 107 and 612 are formed by a photolithography process. Since this contact hole must be formed in at least two types of insulating films, an interlayer insulating film, a gate insulating film, and a metal oxide, two successive opening operations are generally required. For example, if tantalum is used as the metal forming the pixel electrode extraction pad and the like, the metal oxide is tantalum oxide, and the silicon oxide film is used as the gate insulating film and the interlayer insulating film, the silicon oxide film is used in the first opening operation. A contact hole is formed in the film, and subsequently a hole opening operation is performed on the tantalum oxide. However, if reactive ion etching (RIE) or chemical dry etching (CDE) is used, it is possible to form contact holes in two types of insulating films by a single opening operation. After forming the contact holes in this manner, a pixel electrode material is deposited by a sputtering method or the like, and further subjected to a patterning process in a photolithography process to complete the AM substrate (FIG. 13-e). As described above, according to the present invention, the above-described structural advantage can be obtained by the same six film forming steps and five photolithographic processing steps as described in detail in the fourth embodiment.

In the fifth embodiment, the oxidation of the surface of the metal film such as the data line 104 has been performed in an oxidizing atmosphere at about 600 ° C. or less. A metal oxide may be formed. In this case, the pixel electrode extraction pad 105 and the storage capacitor lower electrode 611 that are separated from the data line 104 are not oxidized, and the opening of the contact hole is facilitated. Even when an oxide film is formed on the data line by the anodic oxidation method, the intersection of the data line and the gate line has a two-layer structure of different types of insulating films, so that dielectric breakdown and leakage current are also reduced. Also, when the data line and the pixel electrode overlap, the coupling between them also decreases. Further, according to this method, since the metal oxide film is not formed on the surface of the storage capacitor lower electrode 611, there is an advantage that the storage capacitor is increased.

As described above, in the active matrix substrate of the present invention, at the intersection of the data line and the gate line, a plurality of insulating films having different insulating film types are formed between the data line and the gate line. Therefore, the number of short circuits between the data line and the gate line is greatly reduced.

The present invention can be used for an active matrix substrate having a thin film transistor, and is particularly preferable when applied to a liquid crystal display device.

FIG. 1 is a view showing an active matrix substrate according to one embodiment of the present invention. FIG. 4 is a sectional view of an element in each step of manufacturing an active matrix substrate, showing one embodiment of the present invention. The figure which shows the active matrix substrate based on a prior art. The figure which shows the active matrix substrate based on a prior art. FIG. 1 is a view showing an active matrix substrate according to one embodiment of the present invention. FIG. 1 is a view showing an active matrix substrate according to one embodiment of the present invention. FIG. 4 is a sectional view of an element in each step of manufacturing an active matrix substrate, showing one embodiment of the present invention. The figure which shows the active matrix substrate based on a prior art. FIG. 7 is a sectional view of an element in each step of manufacturing an active matrix substrate according to the conventional technique. FIG. 1 is a view showing an active matrix substrate according to one embodiment of the present invention. FIG. 4 is a sectional view of an element in each step of manufacturing an active matrix substrate, showing one embodiment of the present invention. FIG. 1 is a view showing an active matrix substrate according to one embodiment of the present invention. FIG. 4 is a sectional view of an element in each step of manufacturing an active matrix substrate, showing one embodiment of the present invention.

Explanation of reference numerals

101 ... channel region 102 ... source region 103 ... drain region 104 ... data line 105 ... pixel electrode take-out pad 106 ... gate insulating film 107 ... contact hole 108 ... gate electrode / line 109 ... pixel electrode 110 ... interlayer insulating film 301 ... channel Region 302 source region 303 drain region 304 gate insulating film 305 gate electrode / line 306 interlayer insulating film 307 contact hole 308 pixel electrode 309 data line 401 channel region 402 source region 403 drain region 404 ... source pad 405 ... drain pad 406 ... gate insulating film 407 ... gate electrode / line 408 ... interlayer insulating film 409 ... contact hole 410 ... pixel electrode 411 ... data line 611 ... storage capacitor lower electrode 612 ... contact Hall 61 ... lower electrode 812 ... gate line 811 ... holding capacity before line contact holes 813 ... previous row gate line 901 ... photoresist 902 ... impurity ion implantation 1201 ... metal oxide film

Claims (2)

In an active matrix substrate having a thin film transistor and a data line and a gate line connected to the thin film transistor,
The data line and the gate line are arranged to cross each other,
An active matrix substrate, wherein a plurality of insulating films having different insulating film types are formed between the data lines and the gate lines at intersections of the data lines and the gate lines. A liquid crystal display device comprising the active matrix substrate according to claim 1 and a counter substrate arranged opposite to each other.

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