JP2004079972A - Surface-emitting type light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a large emitted light quantity from a light emitting diode which is increased in chip size by improving the luminous efficiency of the diode. <P>SOLUTION: The light emitting diode is provided with an n-type GaAs buffer layer 2, n-type Al<SB>0.75</SB>Ga<SB>0.25</SB>As layer 3, p-type Al<SB>0.4</SB>Ga<SB>0.6</SB>As light emitting layer 4, p-type Al<SB>0.75</SB>Ga<SB>0.25</SB>As layer 5, and p-type GaAs contact layer 6 successively laminated upon an n-type GaAs substrate 1 and an n-side electrode 7 on the rear surface of the substrate 1. The surface of the diode on the p-side electrode 8 side which is the main light emitting surface of the diode is divided into six parts by forming grooves 9 on the surface by etching the surface to the surface of the p-type Al<SB>0.4</SB>Ga<SB>0.6</SB>As light emitting layer 4. Thereafter, cleaving is performed at every element in a size of about 1.0 mm×0.65 mm. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a surface-emitting light emitting element in which a surface perpendicular to a semiconductor stacking direction is a main light extraction surface.
[0002]
[Prior art]
In a surface-emitting light emitting device in which a surface perpendicular to the semiconductor stacking direction is a main light extraction surface, it is conceivable to increase the chip size as one means for increasing the amount of light emitted from the light emitting device. However, when the chip size is increased, the contact area between the p-side electrode and the n-side electrode also increases, and nonuniformity in current injection occurs due to nonuniformity in contact, resulting in variations in light emission.
[0003]
Therefore, there is a method of obtaining a light emitting element equivalent to one in which a plurality of chips are arranged by increasing the chip size and dividing the electrodes to make contacts.
[0004]
[Problems to be solved by the invention]
In the case of a general square light emitting element with a side of about 0.25 to 0.5 mm, light emitted from the light emitting area at an acute angle is extracted from the side surface of the chip. The emitted light does not radiate from the side surface of the chip, reaches the upper light extraction surface, is reflected, returns to the light emitting region, and is absorbed. For this reason, there is a problem that the light extraction efficiency is lowered and the light emission efficiency does not increase in proportion to the chip size.
[0005]
In addition, when the chip size is increased, the current is concentrated in a portion where the amount of light emission is small due to crystal defects in the chip, and further, the resistance value of the semiconductor is reduced due to heat generated due to no light emission in that portion. Further, there is a problem that the device deterioration is accelerated due to further increase in current, heat generation, and growth of crystal defects, and the light emission efficiency is lowered as a result of the deterioration starting from the portion having the most crystal defects in the device. Further, uneven current paths due to crystal defects cause uneven light emission, uneven brightness, etc., and reliability over time decreases.
[0006]
In view of the above circumstances, an object of the present invention is to provide a light emitting diode that has high luminous efficiency and can obtain a large light emission amount.
[0007]
[Means for Solving the Problems]
The first surface-emitting light-emitting device of the present invention is formed by laminating one of a p-type and an n-type semiconductor layer, a light-emitting layer, and the other semiconductor layer in this order on a substrate. The surface-emitting light-emitting device in which the opposite surface is the main light extraction surface is provided with a groove that divides the light extraction surface into a plurality of depths from the opposite surface to at least the middle of the other semiconductor layer. It is characterized by this.
[0008]
The second surface-emitting light-emitting device of the present invention is formed by laminating one of p-type and n-type semiconductor layers, a light-emitting layer, and the other semiconductor layer in this order on a substrate, and the back surface of the substrate is the main light extraction. In the surface-emitting light emitting device that is a surface, a first groove that divides the light extraction surface into a plurality of depths from the surface opposite to the substrate to the light emitting layer to at least the middle of the other semiconductor layer is provided. It is characterized by that. In the second surface-emitting light emitting device, the substrate may be provided with a cut-out surface that optically guides the emitted light in the main light extraction surface direction.
[0009]
【The invention's effect】
According to the first surface-emitting light-emitting device of the present invention, one of the p-type and n-type semiconductor layers, the light-emitting layer, and the other semiconductor layer are laminated in this order on the substrate. In the surface-emitting light-emitting device in which the surface opposite to the substrate is the main light extraction surface, a groove is provided to divide the light extraction surface into a plurality of depths from the opposite surface to at least the middle of the other semiconductor layer. As a result, the light emission efficiency can be increased as a result, and a large light emission amount can be obtained. Specifically, adverse effects such as non-uniform current paths due to crystal defects and non-uniformity in electrode contact as described above can be kept within one divided area, and the chip size is simply increased. As compared with the case, unevenness in light emission and the like can be suppressed.
[0010]
According to the second surface-emitting light-emitting device of the present invention, one of the p-type and n-type semiconductor layers, the light-emitting layer, and the other semiconductor layer are laminated in this order on the substrate, and the back surface of the substrate In the surface-emitting light-emitting device in which is the main light extraction surface, a first light-emitting surface having a depth from the surface opposite to the substrate to the light emitting layer to at least the middle of the other semiconductor layer is divided into a plurality of portions. Since the groove is provided, the chip size can be increased as described above to increase the light emission efficiency, and a large light emission amount can be obtained.
[0011]
Furthermore, in the second surface-emitting light emitting device, the substrate is provided with a cut-out surface for optically guiding emitted light in the direction of the main light extraction surface, so that it is reflected inside the device and absorbed by the light emitting layer. Therefore, the light extraction efficiency can be increased and the amount of emitted light can be improved.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0013]
The red light emitting diode according to the first embodiment of the present invention will be described along the manufacturing method thereof. FIG. 1 shows a perspective view in the process of manufacturing the light emitting diode.
[0014]
An epitaxial multilayer film is formed on the n-type GaAs substrate 1 as follows. The n-type GaAs substrate 1 (carrier concentration (cm ⁻³ ): 1 × 10 ^{18 to} 3 × 10 ¹⁸ ) is subjected to etching treatment (H ₂ SO ₄ : H ₂ O ₂ : After H ₂ O = 4: 1: 1), it is washed with water and set in a liquid layer epitaxial apparatus. In the liquid layer epitaxial apparatus, a metal gallium melt whose composition is adjusted corresponding to each desired layer is set in a frame of a carbon boat. If necessary, when a thick film is required, two types of melts are used. After replacing the inside of the device with hydrogen and raising the temperature to a predetermined temperature and degassing the substrate and melt, after reaching the predetermined temperature, the carbon slider containing the substrate is sequentially moved sideways while the furnace is cooled. To form an epitaxial layer.
[0015]
1A, an n-GaAs buffer layer 2 (carrier concentration: 1 × 10 ^{18 to} 3 × 10 ¹⁸ (cm ⁻³ ), not shown) is formed on the n-GaAs substrate 1. ), N-Al _0.75 Ga _0.25 As layer 3 (carrier concentration: 0.7 × 10 ¹⁸ to 2 × 10 ¹⁸ (cm ⁻³ )), p-Al _0.4 Ga _0.6 As light emitting layer 4 (carrier concentration: 0.7 × 10 ^{18 to} 3 × 10 ¹⁸ (cm ⁻³ )), p-Al _0.75 Ga _0.25 As layer 5, p-GaAs contact layer 6 (carrier concentration: 3 × 10 ^{18 to} 20 × 10 ¹⁸ (cm ⁻³ )) are sequentially stacked.
[0016]
Next, a window is opened in the resist in the shape of the p-side electrode 7 by a photolithography process. Thereafter, Cr is formed with a thickness of about 5 to 30 nm by a vacuum deposition method, and then gold is formed with a thickness of about 50 to 300 nm. Then, in order to lift off the resist and the metal on the resist, it is put in a solvent such as acetone. If it is difficult to remove, place in an ultrasonic cleaning device. Thus, only the pattern of the p-side electrode 7 is formed on the substrate.
[0017]
Next, a dielectric film such as a SiO ₂ film, SiNx, or SiON is formed on the p-side electrode 7 by about 200 nm by an electron beam vapor deposition method, a plasma CVD method, or the like. A portion other than the groove forming portion is covered with a resist by a photolithography process. When wet etching using buffered hydrofluoric acid or a dielectric containing nitride is used, dry etching is performed using a gas such as CF ₄ to remove a portion of the dielectric film not covered with the resist. Next, the resist is removed with an ozone asher. As shown in FIG. 1B, the depth to the upper surface of the p-Al _0.4 Ga _0.6 As light-emitting layer 4 is obtained by wet etching using, for example, a citric acid-based etchant using the dielectric film as an etching mask. To form a groove 9 having a width of about 0.05 mm.
[0018]
Next, the back surface of the substrate 1 is polished to reduce the overall thickness to about 100 to 200 μm. Thereafter, the back surface of the substrate 1 is removed by about 3 to 30 μm with a sulfuric acid / hydrogen peroxide aqueous etching solution to remove the polishing damage layer remaining on the back surface. Thereafter, the dielectric film covering the p side is removed with a hydrofluoric acid aqueous solution.
[0019]
Next, in order to form an n-side electrode on the back surface of the substrate 1, an alloy of gold and germanium is formed with a thickness of about 30 to 100 nm by a vacuum deposition method, followed by nickel with a thickness of about 30 to 80 nm and further gold with a thickness of about 150 to 600 nm. Form. Thereafter, sintering is performed in an inert gas or hydrogen gas at about 370 to 550 ° C. for several minutes to form an n-side electrode 8. Thereafter, the light emitting diode 10 is completed by cleaving each element into a size of about 1.0 mm × 0.65 mm.
[0020]
Note that the shape of the groove differs depending on the manufacturing method, and in the case of dry etching, by controlling the anisotropy, the cross-sectional shape of the groove can be formed to be vertical or similar to a parabolic shape.
[0021]
The light emitting diode according to the present embodiment has an n-GaAs buffer layer 2, an n-Al _0.75 Ga _0.25 As layer 3, and a p-Al _0.4 Ga _0.6 As light emitting on an n-GaAs substrate 1. Layer 4, p-Al _0.75 Ga _0.25 As layer 5 and p-GaAs contact layer 6 are laminated, p-side electrode 7 is provided on contact layer 6, and n-side electrode 8 is provided on the back surface of substrate 1. Is provided. The main light extraction surface is a surface on the p-side electrode 7 side, and a groove 9 having a depth from the surface to a part of the n-side semiconductor layer is formed, and the main light extraction surface is divided into six parts. It is what has been. Since one side of a chip of a general square light emitting diode is 0.25 to 0.5 mm, the light emitting area is about 6 times.
[0022]
In this way, by separating the chip into a plurality of regions, light emission unevenness caused by non-uniform current flow caused by non-uniform current paths due to crystal defects, particularly on the p side, and non-uniform electrode contact can be divided. Therefore, the light emission efficiency can be increased and a large light emission amount can be obtained as compared with the case where the chip size is simply increased.
[0023]
In the present embodiment, the trench 9 is formed by removing it up to the surface of the p-Al _0.4 Ga _0.6 As light-emitting layer 4, that is, up to the middle of the p-type semiconductor, as shown in FIG. Further, the p-Al _0.4 Ga _0.6 As light emitting layer 4 may be removed to form a groove. Alternatively, as shown in FIG. 2B, the groove may be formed by etching halfway through the n-GaAs buffer layer 2, that is, halfway through the n-type semiconductor layer.
[0024]
FIG. 3 shows a diagram in which the light emitting diode according to the present embodiment is mounted on a lead frame. Fixed to the lead frame 21 with the p-side electrode 7 facing up. The wire 22 is connected to the electrode terminal 23. Thereafter, as shown in FIG.
[0025]
Next, a blue light emitting diode according to a second embodiment of the present invention will be described. A cross-sectional view of the light emitting diode is shown in FIG.
[0026]
As shown in FIG. 5 (a), the sapphire substrate 31 is pretreated, and an AlN buffer layer 32, a Si-doped n-type GaN layer 33, a Si-doped n-type AlGaN layer 34, by metal organic chemical vapor deposition (MOCVD), Multiple quantum well layer 35, Mg-doped p-type AlGaN layer 36, and Mg-doped p-type GaN layer formed by alternately laminating a plurality of GaN quantum well barrier layers doped with appropriate amounts of Si and Mg and InGaN layers as light emitting layers 37 are stacked in this order, and p-type carrier activation processing is performed.
[0027]
Next, as shown in FIG. 5B, the p-side transparent electrode 38 and the p-side electrode 39 are formed by a vapor deposition step and an etching step with photolithography. A region of about 0.35 mm from the cleaved position of the device is etched away partway through the Si-doped n-type GaN layer 33. At the same time, a groove 41 having a width of about 0.05 mm is formed. After forming the n-side electrode 40 on the exposed Si-doped n-type GaN layer 33, the light-emitting diode 51 is completed by cleaving each element at a size of about 1.05 mm × 1.05 mm.
[0028]
The light-emitting diode 51 according to this embodiment includes an AlN buffer layer 32, a Si-doped n-type GaN layer 33, a Si-doped n-type AlGaN layer 34, and a GaN quantum well barrier layer doped with appropriate amounts of Si and Mg on a sapphire substrate 31. And a multi-quantum well layer 35, an Mg-doped p-type AlGaN layer 36, an Mg-doped p-type GaN layer 37, a p-side transparent electrode 38, and a p-side electrode 39, which are formed by alternately laminating a plurality of layers and InGaN layers as light emitting layers. The n-side electrode 40 is formed in this order, and the n-side electrode 40 is formed in the same direction as the surface on which the p-side electrode 39 is formed, and the n-type conductive layer is connected. It is the structure separated by. The blue emitted light is reflected by the sapphire substrate 31, the cleavage plane and the n-side electrode 40 and taken out from the transparent electrode side.
[0029]
In the light emitting diode according to the present embodiment, the groove 41 is formed at the same time when the Si-doped n-type GaN layer 33 is partially removed to form the n-type electrode 40. There is an advantage that a process is not required.
[0030]
Also in the present embodiment, the light emission efficiency and the light emission amount can be improved as in the first embodiment.
[0031]
In the light emitting diode according to the second embodiment, instead of the p-side transparent electrode 38, a titanium layer 20 to 80 nm, an aluminum layer 20 to 80 nm, a titanium layer 20 to 100 nm, a platinum layer 50 to 200 nm, and a gold layer 100 to 500 nm. As a stacked electrode, a structure in which light from the light emitting region is reflected by the sapphire substrate 31 and a structure in which the difference in height between the p side and the n side is eliminated, that is, a gold plating layer 65 is further provided on the n side electrode 40. A laminate of about 5 to 4 μm is bonded (so-called flip chip mounting) on the substrate 61 provided with the lead-out wirings 63 and 64 made of gold through the insulating layer 62 with the end face on the electrode side facing down by the solder 66. A light emitting device using the sapphire substrate side as a light extraction surface will be described. A cross-sectional view of the light emitting device is shown in FIG. In the case of flip-chip mounting, luminance unevenness is reduced, but as shown in FIG. 6, a part of the emitted light is reflected by the substrate surface and emitted in a direction different from the light extraction surface direction. Moreover, since the light which returned to the light emitting layer among the lights reflected on the substrate surface is absorbed by the light emitting layer, the light cannot be taken out as a result. For this reason, there exists a problem that light extraction efficiency falls and a brightness | luminance falls.
[0032]
Thus, a light emitting diode according to a third embodiment of the present invention will be described.
A sectional view of the light emitting diode is shown in FIG. The light emitting diode according to the present embodiment has the same structure as the light emitting diode according to the second embodiment, and has a groove 71 and a cut-out surface 72 in the sapphire substrate 31. The same components as those of the light emitting diode according to the second embodiment are denoted by the same reference numerals, and description thereof is omitted.
[0033]
As shown in FIG. 7, the element having the same structure as the light emitting diode according to the second embodiment, in which the groove 71 and the cutout surface 72 are formed in the sapphire substrate 31, is led out by gold through the insulating layer 62. It is formed by bonding with solder 66 on a substrate 61 on which wirings 63 and 64 are provided. The substrate 61 has a metal such as copper, aluminum, light iron alloy, Kovar or copper alloy (Ambiloy, Mitsubishi Materials (trade name)) having good thermal conductivity, copper at the center and metal molybdenum at the outside, tantalum, titanium or A clad material made of tungsten or the like, or a ceramic such as alumina, aluminum nitride, or c-BN is preferable. Cream solder may be used as the solder 66.
[0034]
The groove 71 and the cut-out surface 72 provided in the sapphire substrate 31 of the light emitting diode are formed by forming a dielectric or metal layer mask on the back surface of the sapphire substrate 31 in a desired shape by a photolithography process, or by dry etching, or In the case of further processing in a shorter time, a desired pattern can be formed using a film resist or the like, and can be formed by a sandblast method using boron or diamond. Furthermore, in order to reduce light scattering on the processed surface, a so-called apex polishing method in which film polishing is performed while blade cutting is more suitable as a method for reducing the surface roughness.
[0035]
In the light emitting diode according to the present embodiment, the cut surface is provided on the sapphire substrate 31 that is the light emitting surface, so that the light traveling as shown in FIG. 7 is refracted and reflected by the cut surface, in the light extraction direction. Therefore, the light extraction efficiency can be improved, and the amount of emitted light can be further improved as compared with the case where only the groove 41 is formed.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a manufacturing process of a light emitting diode according to a first embodiment of the present invention. FIG. 2 is a perspective view showing a light emitting diode according to another embodiment of the present invention. FIG. 4 is a cross-sectional view in which a light-emitting diode according to the first embodiment is mounted on a lead frame. FIG. 4 is a cross-sectional view in which the light-emitting diode according to the first embodiment is mold-sealed. FIG. 6 is a cross-sectional view showing an optical path when a cut-out surface is not provided on a sapphire substrate of a light-emitting diode mounted on a flip chip. FIG. 7 shows a light-emitting diode according to a third embodiment of the present invention. Sectional view [Explanation of symbols]
1 n-GaAs substrate 2 n-GaAs buffer layer 3 n-Al _0.75 Ga _0.25 As layer 4 p-Al _0.4 Ga _0.6 As light emitting layer 5 p-Al _0.75 Ga _0.25 As Layer 6 p-GaAs contact layer 7 p-side electrode 8 n-side electrode 9 groove

Claims (3)

A p-type and n-type semiconductor layer, a light emitting layer, and the other semiconductor layer are laminated in this order on a substrate, and the surface opposite to the substrate with respect to the light emitting layer is a main light extraction surface. In the surface light emitting element,
A surface-emitting light emitting device characterized in that a groove is provided to divide the light extraction surface into a plurality of depths from the opposite surface to at least the middle of the other semiconductor layer. In the surface-emitting light-emitting element, in which one of the p-type and n-type semiconductor layers, the light-emitting layer, and the other semiconductor layer are stacked in this order on the substrate, and the back surface of the substrate is the main light extraction surface.
A first groove that divides the light extraction surface into a plurality of depths from the surface opposite to the substrate to the light emitting layer to at least the middle of the other semiconductor layer is provided. A surface-emitting light emitting device. 3. The surface-emitting light emitting device according to claim 2, wherein a cut surface for optically guiding emitted light in the direction of the main light extraction surface is provided on the substrate.

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