JP2004045915A - Liquid crystal display and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display in which a degradation in display quality is suppressed by consistently shielding the channel region of a TFT against light, and to provide a method for manufacturing the display. <P>SOLUTION: The liquid crystal display includes a transparent substrate 1 and a liquid crystal layer disposed on the principal face of the transparent substrate 1. The following elements are formed on the principal face of the transparent substrate 1. They are: gate lines 60 running in the row direction; source lines 12 running in the column direction; TFTs 76 formed near the intersections of the gate lines 60 and the source lines and having a semiconductor layer 4 including a channel region 10; a first light shielding layer 2 formed in the transparent substrate side of the channel region 10; a second light shielding layer 16 formed in the liquid crystal layer side of the channel region 10; and a third light shielding layer 61 opposing to the gate lines 60 across the channel region 10. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
[Industrial applications]
The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to an active matrix liquid crystal display device and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, active matrix liquid crystal display devices have been widely used. An active matrix liquid crystal display device has a liquid crystal layer and two substrates facing each other with the liquid crystal layer interposed therebetween. In general, a plurality of switching elements arranged in a matrix and a pixel electrode connected to each of the plurality of switching elements are formed on a liquid crystal layer side surface of one of the two substrates. . Each of the plurality of switching elements and each of the plurality of pixel electrodes are arranged corresponding to each pixel of the liquid crystal display device. A counter electrode is formed on the surface of the other substrate on the liquid crystal layer side.
[0003]
In the liquid crystal display device, display is performed by applying a display signal between the pixel electrode and the counter electrode. Specifically, a display voltage is applied between a pixel electrode and a counter electrode, the orientation of liquid crystal molecules in a liquid crystal layer disposed between the two electrodes is changed, and the amount of light transmitted through the liquid crystal layer is controlled. Display is performed by
[0004]
As a switching element used in the above liquid crystal display device, a non-linear element such as a thin film transistor (hereinafter abbreviated as TFT) or a diode can be given. Among them, a TFT which can be formed integrally with a driving circuit of a liquid crystal display device and has a high response speed is generally used.
[0005]
However, in general, when light is irradiated to the semiconductor layer to cause light absorption, electrons are excited in the conduction band and holes are excited in the valence band due to the photoelectric effect, and electron-hole pairs are generated. You. Therefore, when light is irradiated to the channel region of the semiconductor layer, a photocurrent is generated due to the electron-hole pair, and the leak current of the TFT is increased, thereby causing crosstalk and a decrease in contrast ratio. .
[0006]
Therefore, in order to prevent light from being incident on the channel region, a substrate on which a TFT is formed (TFT substrate) or a counter substrate disposed opposite to the TFT substrate is provided so as to correspond to the TFT. A configuration in which a light shielding layer is formed is employed. There is also a configuration in which a light-shielding layer is disposed on both the TFT substrate and the counter substrate so as to sandwich the TFT in order to further ensure the light-shielding effect.
[0007]
Alternatively, in order to further ensure the light-shielding effect, as disclosed in Japanese Patent Application Laid-Open No. 2000-298290, an upper light-shielding layer disposed above the TFT and a lower light-shielding layer disposed below the TFT are provided. However, a configuration formed on a TFT substrate is also known.
[0008]
Japanese Patent Application Laid-Open No. 2001-119027 discloses a configuration in which the entire channel region, source region, drain region, and LDD (Lightly Doped Drain) region of a TFT are covered with a gate electrode, and these are shielded from light using the gate electrode. I have.
[0009]
[Problems to be solved by the invention]
However, even in the configuration disclosed in Japanese Patent Application Laid-Open No. 2000-298290 or the like, light passing through a portion where the light-shielding layer is not formed is not reflected by an optical element (for example, an optical element provided outside the liquid crystal display device). , A lens, a polarizing plate, a mirror, etc.), light returning to the TFT, light reflected on the surface (or interface) of the TFT substrate on the liquid crystal layer side, or passing through a portion where the light shielding layer is not formed. In some cases, the channel region of the TFT is irradiated by the diffracted light.
[0010]
In particular, a transmission type liquid crystal panel used in a projection type display device is irradiated with very strong light to enlarge and project an image. For this reason, the amount of light directly incident on the liquid crystal panel is large, and the amount of the above-mentioned return light, reflected light, scattered light or diffracted light is large. Therefore, by irradiating the channel region of the TFT with the returned light, reflected light, scattered light or diffracted light, a leak current occurs when the TFT is turned off, and as a result, problems such as crosstalk and a decrease in contrast ratio occur. This causes a problem that the display quality is significantly reduced.
[0011]
Further, as disclosed in Japanese Patent Application Laid-Open No. 2001-119027, when the entire channel region, source region, drain region and LDD region of a TFT are covered with a gate electrode, there arises a problem that the threshold voltage of the TFT increases. There are cases.
[0012]
Therefore, the present invention has been made to solve the above-described problems, and a liquid crystal display device and a liquid crystal display device in which a decrease in display quality due to a leakage current is suppressed by more reliably shielding a channel region of a TFT from light. It is intended to provide a manufacturing method.
[0013]
Still another object of the present invention is to provide a liquid crystal display device and a method of manufacturing the same, which shields the channel region of the TFT from light and prevents the threshold voltage of the TFT from increasing.
[0014]
[Means for Solving the Problems]
A liquid crystal display device of the present invention is a liquid crystal display device having a transparent substrate and a liquid crystal layer disposed on a main surface of the transparent substrate, and a gate wiring extending in a row direction on the main surface of the transparent substrate. A source line extending in the column direction, a TFT provided near an intersection of the gate line and the source line, the TFT including a semiconductor layer including a channel region, and a TFT provided on a side of the transparent substrate of the channel region. A first light-blocking layer provided, a second light-blocking layer provided on the channel region side of the liquid crystal layer, and a third light-blocking layer disposed to face the gate wiring with the channel region interposed therebetween. A light-shielding layer is formed, thereby solving the above-described problem.
[0015]
It is preferable that a distance from the channel region to the third light-shielding layer is substantially equal to a distance from the channel region to the gate wiring.
[0016]
It is preferable that the third light-shielding layer is formed from the same layer as the gate wiring.
[0017]
It is preferable that the third light-blocking layer is arranged such that a distance from the third light-blocking layer to the channel region is smaller than a distance from the second light-blocking layer to the channel region.
[0018]
It is preferable that the third light-shielding layer is electrically connected to the gate wiring.
[0019]
The semiconductor layer may include a drain region and a source region on both sides of the channel region, and substantially the entire surface of the semiconductor layer on the transparent substrate side may overlap at least a part of the first light shielding layer. preferable.
[0020]
The semiconductor layer may include a drain region and a source region on both sides of the channel region, and substantially the entire surface of the semiconductor layer on the liquid crystal layer side may overlap at least a part of the second light-blocking layer. preferable.
[0021]
The semiconductor layer and the third light-shielding layer are formed along at least a part of the gate wiring, and the length of the third light-shielding layer in the column direction is equal to or greater than the length of the semiconductor layer in the column direction. It is preferable that
[0022]
Preferably, the semiconductor layer contains polycrystalline silicon.
[0023]
The semiconductor layer includes a drain region and a source region of the TFT on both sides of the channel region, and further includes, between the channel region and the drain region and between the channel region and the source region, respectively. , An LDD region.
[0024]
The TFT may have a plurality of gate electrodes.
[0025]
The first light-shielding layer may be formed using a light-shielding material having a melting point of about 1300 degrees or more.
[0026]
The liquid crystal display device described above can be suitably used for a projection display device.
[0027]
In the method for manufacturing a liquid crystal display device according to the present invention, a step of forming a first light-shielding layer in a predetermined region of a main surface of a transparent substrate, and a step of forming the first light-shielding layer on the first light-shielding layer Forming a semiconductor layer so as to cover at least a part thereof, a gate wiring extending in a row direction, a gate electrode provided so as to face the first light-shielding layer via the semiconductor layer, and Forming a third light-blocking layer provided so as to face the gate wiring with the same layer therebetween, and ion-doping the semiconductor layer using the gate electrode as a mask, thereby forming a channel region; The method includes forming a drain region and a source region on both sides of the channel region, and forming a second light-blocking layer so as to cover the channel region.
[0028]
The first light-shielding layer may be formed using a light-shielding material having a melting point of about 1300 degrees or more, and the semiconductor layer may be formed in a temperature range of about 900 degrees to about 1200 degrees.
[0029]
Hereinafter, the operation will be described.
[0030]
The liquid crystal display device of the present invention has a transparent substrate and a liquid crystal layer disposed on a main surface of the transparent substrate. On a main surface of the transparent substrate, a semiconductor layer including a channel region, which is a TFT provided near an intersection of a gate wiring extending in a row direction, a source wiring extending in a column direction, and a gate wiring and a source wiring, is provided. TFT, a first light-blocking layer, a second light-blocking layer, and a third light-blocking layer are formed. The first light shielding layer is provided on the transparent substrate side of the channel region, and the second light shielding layer is provided on the liquid crystal layer side of the channel region. Further, the third light-shielding layer is arranged to face the gate wiring with the channel region interposed therebetween.
[0031]
In the liquid crystal display device of the present invention, the light irradiating the channel region of the TFT can be reliably shielded by the first, second, and third light shielding layers and the gate wiring.
[0032]
As described above, when light enters the active matrix substrate from the opposite substrate side of the liquid crystal display device, not only light directly incident from the opposite substrate side via the liquid crystal layer, but also return light, reflected light, The channel region of the TFT may be irradiated with scattered light, diffracted light, or the like. On the other hand, the liquid crystal display device of the present invention includes the first, second, and third light-shielding layers and the gate wiring, so that the return light, the reflected light, the scattered light, Alternatively, the diffracted light can be reliably blocked. In particular, by providing the third light-blocking layer, the return light, the scattered light, and the like that enter from a region facing the gate wiring with the channel region interposed therebetween can be shielded from the channel region.
[0033]
The third light shielding layer can be electrically connected to the gate wiring. In this case, since the third light-shielding layer has the same potential as the gate wiring and the gate electrode, even when the third light-shielding layer is arranged adjacent to the semiconductor layer, the third light-shielding layer and the channel region are provided. Does not adversely affect the ON / OFF characteristics of the TFT. In addition, if the third light-shielding layer is electrically connected to the gate wiring, the third light-shielding layer serves as an electrical detour (redundant wiring) of the gate wiring, and thus a defect due to disconnection of the gate wiring. And the yield of the manufacturing process can be improved.
[0034]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described with reference to the drawings.
[0035]
FIG. 1 shows a liquid crystal display device 100 according to one embodiment of the present invention. FIG. 1A is a partial plan view of an active matrix substrate 71 provided in the liquid crystal display device 100, and FIG. 1B is a partial cross-sectional view of the liquid crystal display device 100. Note that an insulating layer or the like is disposed between the layers included in the active matrix substrate 71 as necessary.
[0036]
The liquid crystal display device 100 according to one embodiment of the present invention includes an active matrix substrate 71, a liquid crystal layer 74, and a counter substrate 72 disposed so as to face the active matrix substrate 71 via the liquid crystal layer 74. I have. The active matrix substrate 71 has, on the liquid crystal layer 74 side surface, a plurality of TFTs 76 arranged in a matrix and a plurality of pixel electrodes (not shown) each connected to each of the plurality of TFTs. Each of the plurality of pixel electrodes defines one pixel which is a display unit of the liquid crystal display device 100.
[0037]
Hereinafter, one pixel of the plurality of pixels included in the liquid crystal display device 100 will be described.
[0038]
As shown in FIGS. 1A and 1B, the active matrix substrate 71 includes a transparent substrate 1, a gate wiring 60 formed on the surface of the substrate 1 on the liquid crystal layer 74 side, extending in the row direction, and the column direction. A source wiring 12 extending, a TFT 76 provided near an intersection of the gate wiring 60 and the source wiring 12, a lower light shielding layer (first light shielding layer) 2, and an upper light shielding layer (second light shielding layer) 16; , And a gate light-shielding layer (third light-shielding layer) 61. The TFT 76 has the semiconductor layer 4 including the channel region 10.
[0039]
As described in the description of the related art, when light is incident on the active matrix substrate 71 from the counter substrate 72 side of the liquid crystal display device, the channel region 10 of the TFT 76 is directly transmitted from the counter substrate 72 side via the liquid crystal layer 74. Irradiation is performed not only with the incident light but also with return light, reflected light, scattered light, or diffracted light generated from the incident light. When light is irradiated to the channel region 10 of the TFT 76, a leak current occurs when the TFT is turned off, and the display quality of the liquid crystal display device is degraded.
[0040]
On the other hand, in the above-described liquid crystal display device 100, the channel region 10 of the TFT 76 is reliably shielded from light by the lower light-shielding layer 2, the upper light-shielding layer 16, the gate light-shielding layer 61, and the gate wiring 60. Deterioration in quality is suppressed.
[0041]
In particular, when a liquid crystal display device is used for a projection display device, a higher light-shielding effect is required because high-intensity light is incident on the liquid crystal display device. Therefore, the liquid crystal display device 100 of the present embodiment is suitably used for a projection display device. Hereinafter, the light shielding of the channel region 10 of the TFT 76 will be described in detail.
[0042]
The lower light-shielding layer 2 is provided on the transparent substrate 1 side of the channel region 10, and the upper light-shielding layer 16 is provided on the liquid crystal layer 74 side of the channel region 10. That is, both the lower light-shielding layer 2 and the upper light-shielding layer 16 are provided on the same active matrix substrate 71, and the lower light-shielding layer 2 and the upper light-shielding layer 16 It is provided so as to sandwich it. Therefore, the distance between the channel region 10 and each light-shielding layer is shorter than that of a liquid crystal display device in which the upper light-shielding layer 16 is provided on the counter substrate 72 and the lower light-shielding layer 2 is provided on the active matrix substrate 71. In addition, it is possible to more reliably suppress light from entering the channel region 10 of the TFT 76.
[0043]
Furthermore, since the gate wiring 60 is usually formed of an opaque conductive material, the gate wiring 60 also shields the channel region 10 of the TFT 76 from light.
[0044]
However, the lower light-shielding layer 2, the upper light-shielding layer 16, and the gate wiring 60 alone may not sufficiently shield the channel region 10 of the TFT 76 from light. In particular, it is not possible to sufficiently prevent the channel region 10 from being irradiated by the return light, the scattered light, the diffracted light, or the like incident from the region facing the gate wiring 60 with the channel region 4 interposed therebetween.
[0045]
Therefore, the liquid crystal display device 100 further includes a gate light shielding layer 61 disposed so as to face the gate wiring 60 with the channel region 10 interposed therebetween. The gate light-shielding layer 61 can prevent the channel region 10 from being irradiated by the above-described return light, scattered light, or diffracted light.
[0046]
1A and 1B, the distance from the channel region 10 to the gate light-shielding layer 61 is substantially the same as the distance from the channel region 10 to the gate wiring 60, as shown in FIGS. It is preferably formed. That is, since the gate light-shielding layer 61 is arranged symmetrically with respect to the gate wiring 60 around the channel region 10, light from the gate wiring 60 side with respect to the channel region 4 is blocked by the gate wiring 60. Similarly, light from the side facing the gate wiring 60 with respect to the channel region 4 is shielded by the gate light shielding layer 61.
[0047]
The gate light-shielding layer 61 is preferably formed from the same layer as the gate wiring 60, as shown in FIG. Thus, if the mask for forming the gate wiring 60 is changed, the gate light shielding layer 61 can be formed. Therefore, it is not necessary to separately prepare a new mask for forming the gate light shielding layer 61. Also, there is no increase in the number of manufacturing steps.
[0048]
The upper light shielding layer 16 is formed, for example, above the channel region 4 via an insulating layer (not shown in FIG. 1). In this case, the upper light shielding layer 16 is separated from the channel region 10 according to the thickness of the insulating layer. When the upper light shielding layer 16 is formed apart from the channel region 10, there is a possibility that diffracted light of light incident from an end of the upper light shielding layer 16 irradiates the channel region 10. Therefore, it is preferable that the gate light shielding layer 61 is arranged so that the distance from the gate light shielding layer 61 to the channel region 10 is smaller than the distance from the upper light shielding layer 16 to the channel region 10. By arranging the gate light shielding layer 61 closer to the channel region 10 as described above, it is possible to shield the diffraction light from the channel light shielding layer 61 side of the channel region 10. When the gate wiring 60 is arranged symmetrically with respect to the gate light-shielding layer 61 with the channel region 10 as the center, similarly to the gate light-shielding layer 61, it is possible to shield the diffracted light from the gate wiring 60 side of the channel region 10 .
[0049]
Further, the gate light shielding layer 61 is preferably electrically connected to the gate wiring 60. As a result, the gate light-shielding layer 61 has the same potential as the gate wiring 60 and the gate electrode 6. Therefore, even when the gate light-shielding layer 61 is arranged adjacent to the semiconductor layer 4, the gate light-shielding layer 61 and the channel region 10 does not adversely affect the ON / OFF characteristics of the TFT 76. Further, if the gate light-shielding layer 61 and the gate wiring 60 are electrically connected, the gate light-shielding layer 61 becomes an electrical detour (redundant wiring) of the gate wiring 60. Accordingly, defects due to disconnection of the gate wiring 60 can be reduced, and the yield of the manufacturing process can be improved.
[0050]
In FIG. 1A, the case where the gate light-shielding layer 61 has an end in one pixel and one gate light-shielding layer 61 having a predetermined length in the row direction is arranged for one TFT 76. However, the length of the gate light shielding layer 61 in the row direction is not limited to this. For example, the gate light shielding layer 61 may be continuous over a plurality of pixels arranged in the row direction. Thus, the gate light shielding layer 61 can be used as a more effective redundant wiring.
[0051]
The semiconductor layer 4 has a source region 7 and a drain region 8 on both sides of the channel region 10. FIGS. 1A and 1B show a case where the lower light-shielding layer 2 and the upper light-shielding layer 16 overlap only with the channel region 10 of the semiconductor layer 4. It is preferable that substantially the entire surface of the semiconductor layer 4 on the transparent substrate side overlaps at least a part of the lower light-shielding layer 2. Further, similarly, in the upper light-shielding layer 16, it is preferable that substantially the entire surface of the semiconductor layer 4 on the liquid crystal layer side overlaps at least a part of the upper light-shielding layer 16. Thereby, the channel region 10 can be more reliably shielded from light than when the lower light-shielding layer 2 and / or the upper light-shielding layer 16 overlap only the channel region 10 of the semiconductor layer 4.
[0052]
The gate light shielding layer 61 is formed along the gate wiring 60 and the semiconductor layer 4, and the length of the gate light shielding layer 61 in the column direction is preferably equal to or longer than the length of the semiconductor layer 4 in the column direction. . Thereby, the channel region 10 can be more reliably shielded from light than when the gate light-shielding layer 61 is formed so as to correspond to only the channel region 10 of the semiconductor layer 4.
[0053]
The TFT 76 used in the liquid crystal display device 100 of the present embodiment is preferably a polycrystalline silicon TFT in which the semiconductor layer 4 contains polycrystalline silicon. This is because the driver circuit can be manufactured using polycrystalline silicon, so that the driver circuit can be integrated over the substrate.
[0054]
Preferably, the semiconductor layer 4 has an LDD region between the channel region 10 and the source region 7 and between the channel region 10 and the drain region 8. When the TFT has the LDD region, the leakage current can be reduced and the reliability can be further improved.
[0055]
Further, the TFT 76 preferably has a plurality of gate electrodes. Thereby, the OFF characteristics of the TFT can be improved.
[0056]
The lower light shielding layer may be formed using a high melting point light shielding material having a melting point of about 1300 degrees or more. When the above-mentioned high melting point material is used for the lower light-shielding layer, when forming the semiconductor layer on the upper part of the lower light-shielding layer, the maximum processing temperature is set to, for example, a temperature of about 900 ° C. to about 1200 ° C. Also, the lower light shielding layer does not deteriorate.
[0057]
Next, a method for manufacturing the liquid crystal display device of the present embodiment will be described.
[0058]
The method for manufacturing a liquid crystal display device according to the present embodiment includes: (1) a step of forming a lower light-shielding layer in a predetermined region of a main surface of a transparent substrate; Forming a semiconductor layer so as to cover a part thereof; (3) a gate wiring extending in the row direction; a gate electrode provided to face the lower light-shielding layer via the semiconductor layer; and a gate with the gate electrode interposed therebetween. A step of forming a gate light-shielding layer provided so as to face the wiring by using the same layer; and (4) ion-doping the semiconductor layer using the gate electrode as a mask to form a channel region and both sides of the channel region. Forming a drain region and a source region to be disposed; and (5) forming an upper light-shielding layer so as to cover the channel region.
[0059]
In the above-described manufacturing method, the gate wiring, the gate electrode, and the gate light-shielding layer are formed using the same layer. Therefore, if the mask for forming the gate wiring and the gate electrode is changed, the gate light-shielding layer is formed. can do. Therefore, it is not necessary to separately prepare a new mask for forming the gate light shielding layer. Further, since the gate wiring, the gate electrode, and the gate light shielding layer can be formed in the same step, the number of manufacturing steps does not increase.
[0060]
When, for example, polycrystalline silicon is used for the semiconductor layer disposed above the lower light-shielding layer, it is preferable to use a light-shielding material having a melting point of about 1300 degrees or more for the lower light-shielding layer. Accordingly, the semiconductor layer can be heat-treated in a temperature range of about 900 degrees C. to about 1200 degrees C., so that the characteristics of polycrystalline silicon can be improved.
[0061]
Hereinafter, examples will be described.
[0062]
(Example)
The configuration of the active matrix type liquid crystal display device of the embodiment will be described with reference to FIGS. FIG. 2 is a partial plan view schematically showing an active matrix substrate 73 provided in the liquid crystal display device. FIG. 3A is a sectional view taken along the line 2a-2a 'in FIG. 2, and FIG. 3B is a sectional view taken along the line 2b-2b' in FIG. Note that components having substantially the same functions as the components of the liquid crystal display device of FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.
[0063]
As shown in FIG. 2, the active matrix substrate 73 mainly includes the transparent substrate 1, the gate wiring 60 formed on the surface of the transparent substrate 1 on the liquid crystal layer side, the source wiring 12, the TFT 77, the upper light shielding layer 16, It has a lower light-shielding layer 2 and a gate light-shielding layer 61.
[0064]
The TFT 77 is a polycrystalline polysilicon TFT in which the semiconductor layer 4 having the channel region 10, the source region 7, and the drain region 8 is formed from polycrystalline polysilicon. The TFT 77 has two gate electrodes 6, and has a channel region 10 corresponding to each of the two gate electrodes 6. The TFT 77 has an LDD region (having an impurity concentration higher than that of the source region 7 and the drain region 8) between the channel region 10 and the source region 7 and between the channel region 10 and the drain region 8 in the semiconductor layer 4. Low density region 9). The LDD region 9 is provided between the channel region 10 and the source region 7 and between the channel region 10 and the drain region 8 for each of the two channel regions 10.
[0065]
The channel region 10 of the TFT 77 is effectively shielded from light by the upper light shielding layer 16, the lower light shielding layer 2, the gate light shielding layer 61, and the gate wiring 60. As shown in FIG. 2, in the liquid crystal display device of the present embodiment, when substantially the entire surface of the semiconductor layer 4 having the channel region 10 is viewed from the thickness direction of the substrate 1, the upper light-shielding layer 16 and the lower light-shielding layer 2 , The gate light shielding layer 61 and the gate wiring 60. Therefore, the channel region 10 is more reliably shielded from light. Hereinafter, the upper light shielding layer 16, the lower light shielding layer 2, the gate light shielding layer 61, and the gate wiring 60 will be described.
[0066]
As shown in FIGS. 3A and 3B, the lower light-shielding layer 2 and the upper light-shielding layer 16 are provided so as to sandwich the semiconductor layer 4 in the thickness direction of the substrate 1.
[0067]
The lower light-shielding layer 2 is formed on the surface of the transparent substrate 1 on the liquid crystal layer side so as to face the semiconductor layer 4 via the insulating film 3. As shown in FIG. 2, the lower light-shielding layer 2 is formed along a part of the gate wiring 60 extending in the row direction, and the length of the lower light-shielding layer 2 in the column direction is equal to the length of the semiconductor layer 4 in the column direction. The entire surface of the semiconductor layer 4 on the substrate side, which is longer than the length, overlaps with the lower light shielding layer 2. When viewed from the thickness direction of the substrate 1, two sides extending in the row direction of the lower light-shielding layer 2 overlap with the gate wiring 60 and the gate light-shielding layer 61, respectively.
[0068]
The upper light shielding layer 16 is formed on the semiconductor layer 4 via the gate insulating film 5, the gate electrode 6, the interlayer insulating film 11, the nitride film 14, and the oxide film 15. As shown in FIG. 2, the upper light-shielding layer 16 is formed along a part of the gate wiring 60 extending in the row direction similarly to the lower light-shielding layer 2, and the length of the upper light-shielding layer 16 in the column direction is equal to that of the semiconductor. It is longer than the length of the layer 4 in the column direction. The length of the lower light-shielding layer 2 in the column direction is equal to or longer than the length of the semiconductor layer 4 in the column direction. The entire surface of the semiconductor layer 4 on the liquid crystal layer side overlaps with the upper light-shielding layer 16. Similarly to the lower light-shielding layer 2, two sides of the upper light-shielding layer 16 extending in the row direction overlap with the gate wiring 60 and the gate light-shielding layer 61, respectively. The upper light-shielding layer 16 has approximately the same area as the lower light-shielding layer 2, and the upper light-shielding layer 16 and the lower light-shielding layer 2 almost completely overlap when viewed from the thickness direction of the substrate 1. .
[0069]
Since the gate wiring 60 is formed using an opaque conductive material, it also functions as a light shielding layer. As described above, the gate wiring 60 overlaps with the upper light-shielding layer 16 and the lower light-shielding layer 2 when viewed from the thickness direction of the substrate 1. Further, the gate wiring 60 is arranged relatively close to the channel region 10 of the semiconductor layer 4. For example, the distance between the gate wiring 60 and the channel region 10 is smaller than the distance between the upper light shielding layer 16 and the channel region 10. Therefore, the gate wiring 60 can shield the channel region 10 from diffracted light of light incident from the end of the upper light-shielding layer 16 on the gate wiring 60 side.
[0070]
The gate light shielding layer 61 is formed so as to face the gate wiring 60 with the semiconductor layer 4 interposed therebetween, and the length of the gate light shielding layer 61 in the row direction is equal to or longer than the length of the semiconductor layer 4 in the row direction. . Further, the gate light-shielding layer 61 is arranged so that the distance from the channel layer 4 to the gate light-shielding layer 61 is substantially equal to the distance from the channel layer 4 to the gate wiring 60. That is, the gate light-shielding layer 61 is provided symmetrically with respect to the gate wiring 60 around the channel layer 4. Therefore, the diffracted light of the light incident from the end of the upper light-shielding layer 16 on the gate light-shielding layer 61 side can be shielded from the channel region 10.
[0071]
The gate light-shielding layer 61 is formed of the same layer as the gate wiring 60 and the gate electrode 6, as shown in FIGS. In FIG. 3A, the gate light shielding layer 61 is indicated by a dotted line. Further, since the gate light shielding layer 61 is electrically connected to the gate wiring 60 via the gate electrode 6, it can be used as a redundant wiring when the gate wiring 60 is disconnected.
[0072]
The above-described upper light-shielding layer 16, lower light-shielding layer 2, gate light-shielding layer 61, and gate wiring 60 allow light directly entering from the counter substrate side, return light, scattered light, or diffracted light to flow into the channel region 10. Irradiation can be prevented.
[0073]
Next, with reference to FIGS. 4A to 4E and FIGS. 5A to 5C, an example of a method for manufacturing the liquid crystal display device of the embodiment will be described.
[0074]
First, as shown in FIG. 4A, a light-shielding film serving as the lower light-shielding layer 2 is deposited on an insulating transparent substrate 1 made of glass, quartz, or the like by using a CVD method or a sputtering method. . This light-shielding film is patterned by photolithography / etching to form a lower light-shielding layer 2.
[0075]
Here, the lower light-shielding layer 2 is made of, for example, a metal film containing tungsten (W), tantalum (Ta), titanium (Ti), molybdenum (Mo), chromium (Cr), nickel (Ni), a polysilicon film, It is composed of a laminated film of the metal film and the polysilicon film, a silicide film, a polysilicon film, a laminated film of a silicide film and a polysilicon film, and the like.
[0076]
The melting point of the polysilicon film is about 1400 ° C., and the melting point of the silicide film is 1300 to 1500 ° C. or higher. Therefore, when a silicide film, a polysilicon film, or a stacked film of a silicide film and a polysilicon film is used for the lower light-shielding layer 2, a high-temperature heat treatment at 900 to 1200 ° C. can be performed in a later manufacturing process. is there. Specifically, high-temperature heat treatment can be performed in a TFT manufacturing process described later, so that a TFT having favorable and stable characteristics can be manufactured over a substrate.
[0077]
Further, when the lower light-shielding layer 2 is formed of a silicide film, a polysilicon film, or a laminated film of a silicide film and a polysilicon film, the heat resistance is excellent, so that not only a normal backlight but also a halide lamp for projection is used. Even if a lamp that emits such strong light is used, there is no deterioration. Also, it has excellent light-shielding properties.
[0078]
Next, as shown in FIG. 4B, the SiO 2 is covered so as to cover the entire surface of the lower light shielding layer 2. ₂ An insulating layer 3 made of, for example, is deposited. The thickness of the insulating layer 3 is set such that the light reflected at the interface between the lower light-shielding layer 2 and the insulating layer 3 and the light reflected on the surface of the insulating layer 3 are canceled out by the interference effect.
[0079]
Next, as shown in FIG. 4C, an amorphous silicon thin film having a thickness of 50 to 150 nm is deposited on the insulating layer 3 and then polycrystallized by heat treatment at a high temperature or laser light irradiation. Let it. When the amorphous silicon thin film is polycrystallized by heat treatment, the maximum temperature can be set to, for example, 900 to 1200 ° C. by using the above-described material having excellent heat resistance for the lower light-shielding layer 2. Thereafter, patterning is performed by photolithography / etching to form a semiconductor layer 4 having a predetermined shape. Thereafter, if necessary, impurity ions are implanted for controlling the threshold voltage. The semiconductor layer 4 may be an amorphous or single-crystal semiconductor layer other than the above-described polycrystalline silicon film. As a material of the semiconductor layer, Si, Ge, GaAs, GaP, or the like can be used.
[0080]
Next, as shown in FIG. ₂ A gate oxide film 5 is formed. The gate oxide film is formed by deposition using a CVD method, oxidation, or both. Subsequently, a gate electrode 6 is formed on the gate oxide film 5. In the same step as the step of forming the gate electrode 6, the gate wiring 60 and the gate light shielding layer 61 are formed in the same layer as the gate electrode 6. The gate electrode 6, the gate wiring 60, and the gate light shielding layer 61 are made of, for example, the same film as the lower light shielding layer 2 described above.
[0081]
Next, as shown in FIG. 4E, impurity ions are implanted into the semiconductor layer 4 using the gate electrode 6 as a mask, and a source region 7, a drain region 8, and an LDD region 9 are formed in the semiconductor layer 4. To form The region into which the impurity ions are not implanted becomes the channel region 10.
[0082]
Next, as shown in FIG. ₂ Then, an interlayer insulating film 11 is formed. Subsequently, contact holes 7h and 8h for extracting electrodes are formed in the interlayer insulating film 11 above the source region 7 and the drain region 8. Further, a source electrode 12 and a drain electrode 13 made of metal wiring such as Al are formed on the contact holes 7h and 8h, respectively.
[0083]
Subsequently, as shown in FIG. 5B, a nitride film 14 and an oxide film 15 are deposited on the entire surface of the substrate to form a passivation film, and a hydrogenation process is performed. Further, etchback for flattening or CMP is performed.
[0084]
Thereafter, as shown in FIG. 5C, a light-shielding film to be the upper light-shielding layer 16 is deposited by a CVD method or a sputtering method, and is patterned by photolithography / etching to form the upper light-shielding layer 16. The upper light shielding layer 16 is formed using, for example, the same light shielding material as that of the lower light shielding layer 2.
[0085]
Although the subsequent steps are not shown, an insulating film is further formed, and a contact hole is formed in the insulating film. Subsequently, a transparent electrode electrically connected to the drain electrode in the contact hole is formed on the insulating film using ITO or the like.
[0086]
Through the above steps, the active matrix substrate 73 is manufactured.
[0087]
A counter substrate is manufactured using a known method, the counter substrate and the active matrix substrate 73 are opposed to each other, and a liquid crystal material is injected between these substrates to manufacture the liquid crystal display device of this embodiment.
[0088]
【The invention's effect】
According to the present invention, there has been provided a liquid crystal display device and a method of manufacturing the same, in which a decrease in display quality is suppressed by more reliably shielding the channel region of the TFT from light.
[0089]
Further, there has been provided a liquid crystal display device and a method of manufacturing the same, in which a channel region of the TFT is shielded from light and an increase in the threshold voltage of the TFT is prevented.
[Brief description of the drawings]
1A is a partial plan view of an active matrix substrate 71 provided in a liquid crystal display device 100, and FIG. 1B is a partial cross-sectional view of the liquid crystal display device 100.
FIG. 2 is a partial plan view schematically showing an active matrix substrate 73 provided in the liquid crystal display device.
3A is a sectional view taken along line 2a-2a 'in FIG. 2, and FIG. 3B is a sectional view taken along line 2b-2b' in FIG.
FIGS. 4A to 4E are diagrams illustrating an example of a method for manufacturing a liquid crystal display device according to an embodiment.
FIGS. 5A to 5C are diagrams illustrating an example of a method of manufacturing a liquid crystal display device according to an example.
[Explanation of symbols]
1 Transparent substrate
2 Lower shading layer
3 insulating film
4 Semiconductor layer
5 Gate insulating film
6 Gate electrode
7 Source area
8 Drain region
9 LDD area
10 channel area
11 Interlayer insulating film
12 Source electrode (source wiring)
13 Drain electrode
14 Nitride film
15 Oxide film
16 Upper shading layer
60 gate wiring
61 Gate shading layer
71 Active matrix substrate
73 Active matrix substrate
76 TFT
77 TFT
100 liquid crystal display

Claims (15)

A transparent substrate, a liquid crystal display device having a liquid crystal layer disposed on the main surface of the transparent substrate, the main surface of the transparent substrate,
A gate wiring extending in the row direction;
Source wiring extending in the column direction;
A TFT provided near an intersection of the gate wiring and the source wiring, the TFT having a semiconductor layer including a channel region;
A first light shielding layer provided on the transparent substrate side of the channel region;
A second light-blocking layer provided on the liquid crystal layer side of the channel region;
A liquid crystal display device, comprising: a third light-blocking layer disposed so as to face the gate wiring with the channel region interposed therebetween. 2. The liquid crystal display device according to claim 1, wherein a distance from the channel region to the third light-shielding layer is substantially equal to a distance from the channel region to the gate wiring. The liquid crystal display device according to claim 1, wherein the third light-shielding layer is formed from the same layer as the gate wiring. 2. The third light-shielding layer is arranged such that a distance from the third light-shielding layer to the channel region is smaller than a distance from the second light-shielding layer to the channel region. 4. The liquid crystal display device according to any one of items 1 to 3. The liquid crystal display device according to claim 1, wherein the third light shielding layer is electrically connected to the gate wiring. The semiconductor layer includes a drain region and a source region on both sides of the channel region,
The liquid crystal display device according to claim 1, wherein substantially the entire surface of the semiconductor layer on the transparent substrate side overlaps at least a part of the first light shielding layer. The semiconductor layer includes a drain region and a source region on both sides of the channel region,
The liquid crystal display device according to claim 1, wherein substantially the entire surface of the semiconductor layer on the liquid crystal layer side overlaps at least a part of the second light-blocking layer. The semiconductor layer and the third light-shielding layer are formed along at least a part of the gate wiring, and the length of the third light-shielding layer in the column direction is equal to or greater than the length of the semiconductor layer in the column direction. The liquid crystal display device according to claim 1, wherein: 9. The liquid crystal display device according to claim 1, wherein said semiconductor layer includes polycrystalline silicon. The semiconductor layer includes a drain region and a source region of the TFT on both sides of the channel region, and further includes, between the channel region and the drain region and between the channel region and the source region, respectively. 10. The liquid crystal display device according to claim 1, wherein the liquid crystal display device has an LDD region. The liquid crystal display device according to claim 1, wherein the TFT has a plurality of gate electrodes. The liquid crystal display device according to claim 1, wherein the first light-shielding layer is formed using a light-shielding material having a melting point of about 1300 degrees or more. A projection display device comprising the liquid crystal display device according to claim 1. Forming a first light-shielding layer in a predetermined region of the main surface of the transparent substrate;
Forming a semiconductor layer on the first light shielding layer so as to cover at least a part of the first light shielding layer;
A gate wiring extending in a row direction, a gate electrode provided to face the first light-shielding layer via the semiconductor layer, and a third electrode provided to face the gate wiring with the gate electrode interposed therebetween. Forming a light-shielding layer using the same layer;
A step of forming a channel region and a drain region and a source region on both sides of the channel region by ion-doping the semiconductor layer using the gate electrode as a mask;
Forming a second light-shielding layer so as to cover the channel region. The method according to claim 14, wherein the first light-shielding layer is formed using a light-shielding material having a melting point of about 1300 degrees or more, and the semiconductor layer is formed in a temperature range of about 900 degrees or more and about 1200 degrees or less. A method for manufacturing a liquid crystal display device.

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