JP2004015807A - 変量間の関係を表わしたダイアグラムの作成方法及び装置 - Google Patents

変量間の関係を表わしたダイアグラムの作成方法及び装置 Download PDF

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Publication number
JP2004015807A
JP2004015807A JP2003157895A JP2003157895A JP2004015807A JP 2004015807 A JP2004015807 A JP 2004015807A JP 2003157895 A JP2003157895 A JP 2003157895A JP 2003157895 A JP2003157895 A JP 2003157895A JP 2004015807 A JP2004015807 A JP 2004015807A
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JP
Japan
Prior art keywords
diagram
function
error rate
bit error
variables
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Pending
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JP2003157895A
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English (en)
Japanese (ja)
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JP2004015807A5 (enExample
Inventor
Daniel Yves Abramovitch
ダニエル・イーヴス・アブラモヴィッチ
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Agilent Technologies Inc
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Agilent Technologies Inc
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Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of JP2004015807A publication Critical patent/JP2004015807A/ja
Publication of JP2004015807A5 publication Critical patent/JP2004015807A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector

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  • Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
JP2003157895A 2002-06-03 2003-06-03 変量間の関係を表わしたダイアグラムの作成方法及び装置 Pending JP2004015807A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/162,405 US6745148B2 (en) 2002-06-03 2002-06-03 Intelligent test point selection for bit error rate tester-based diagrams

Publications (2)

Publication Number Publication Date
JP2004015807A true JP2004015807A (ja) 2004-01-15
JP2004015807A5 JP2004015807A5 (enExample) 2006-07-20

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JP2003157895A Pending JP2004015807A (ja) 2002-06-03 2003-06-03 変量間の関係を表わしたダイアグラムの作成方法及び装置

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Country Link
US (1) US6745148B2 (enExample)
EP (1) EP1370021B1 (enExample)
JP (1) JP2004015807A (enExample)
DE (1) DE60302387T2 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008014916A (ja) * 2006-07-10 2008-01-24 Anritsu Corp 試験信号検証装置
US7925958B2 (en) 2004-09-25 2011-04-12 Aware, Inc. CRC counter normalization
JP2019201311A (ja) * 2018-05-16 2019-11-21 アンリツ株式会社 誤り率測定装置及び該装置のアイマージン測定方法

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030165259A1 (en) * 2002-02-15 2003-09-04 Balent James S. Signal analysis using image processing techniques
EP1376381A1 (en) * 2003-02-12 2004-01-02 Agilent Technologies Inc Method and system for data sampling
US20050195194A1 (en) * 2004-03-08 2005-09-08 Cummings Alan K. 3-D eye diagram
US7308371B2 (en) * 2004-06-15 2007-12-11 Intel Corporation Bit error rate testing for high-speed devices
US20070014572A1 (en) * 2005-04-13 2007-01-18 Sada Gilberto I Bit error rate contour-based optimum decision threshold and sampling phase selection
US20070003280A1 (en) * 2005-04-15 2007-01-04 Sada Gilberto I Method and system for determining receiver power for required bit error rate
US20060274873A1 (en) 2005-06-02 2006-12-07 Abramovitch Daniel Y Rapid data point selection for generating eye diagrams
US20090107222A1 (en) * 2007-10-29 2009-04-30 Daniel Yves Abramovitch Scanning Probe Microscope with Improved Scanning Speed
US8502821B2 (en) * 2008-02-04 2013-08-06 C Speed, Llc System for three-dimensional rendering of electrical test and measurement signals
US8995514B1 (en) * 2012-09-28 2015-03-31 Xilinx, Inc. Methods of and circuits for analyzing a phase of a clock signal for receiving data
US20170089953A1 (en) * 2015-09-25 2017-03-30 Microsoft Technology Licensing, Llc Contour generation of prompted data signal

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5422761A (en) * 1992-11-20 1995-06-06 International Business Machines Corporation Disk drive with redundant recording
US20030097226A1 (en) * 2001-11-21 2003-05-22 Synthesys Apparatus and method for sampling eye diagrams with window comparators

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7925958B2 (en) 2004-09-25 2011-04-12 Aware, Inc. CRC counter normalization
US7979778B2 (en) 2004-09-25 2011-07-12 Aware, Inc. CRC counter normalization
US8516337B2 (en) 2004-09-25 2013-08-20 Tq Delta, Llc CRC counter normalization
US8793553B2 (en) 2004-09-25 2014-07-29 Tq Delta Llc CRC counter normalization
US8984366B2 (en) 2004-09-25 2015-03-17 Tq Delta, Llc CRC counter normalization
US9300324B2 (en) 2004-09-25 2016-03-29 Tq Delta, Llc CRC counter normalization
US10049003B2 (en) 2004-09-25 2018-08-14 Tq Delta, Llc CRC counter normalization
US10346243B2 (en) 2004-09-25 2019-07-09 Tq Delta, Llc CRC counter normalization
JP2008014916A (ja) * 2006-07-10 2008-01-24 Anritsu Corp 試験信号検証装置
JP2019201311A (ja) * 2018-05-16 2019-11-21 アンリツ株式会社 誤り率測定装置及び該装置のアイマージン測定方法

Also Published As

Publication number Publication date
EP1370021B1 (en) 2005-11-23
DE60302387D1 (de) 2005-12-29
DE60302387T2 (de) 2006-08-03
US20030225541A1 (en) 2003-12-04
EP1370021A1 (en) 2003-12-10
US6745148B2 (en) 2004-06-01

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