JP2004012634A - Driving circuit of electro-optical apparatus, electro-optical apparatus, electronic appliance, and method for driving electro-optical apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize an electro-optical apparatus having a driving circuit to decrease the number of connecting lines among circuits without providing a circuit to change the order of image signals. <P>SOLUTION: The driving circuit of an electro-optical apparatus having a matrix of pixels includes a selector and a multiplexer. The selector has a plurality of selector circuits which receive a plurality of image signals and select one image signal from the plurality of image signals to output the signal. The multiplexer has a plurality of multiplexer circuits which are provided corresponding to the respective selector circuits and supply the image signals from the selector circuits to a plurality of data lines in the matrix through a plurality of switching circuits. The image signals outputted from the respective selector circuits and the image signals supplied to the plurality of data lines corresponding to the respective multiplexer circuits are selected based on selection signals. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a driving circuit for an electro-optical device, an electro-optical device, an electronic apparatus, and a method for driving an electro-optical device.
[0002]
[Prior art]
Conventionally, a display device having a matrix configuration such as a liquid crystal display device has been widely used. The quality of display devices, which are electro-optical devices, has also been improved. In particular, the display device has been improved in definition, and various improvements have been made in accordance with the increase in definition, and so-called driver circuits for driving each pixel circuit have also been improved.
[0003]
As one of the improvements, there is a technique disclosed in JP-A-61-145597. According to the technique disclosed in that publication, a plurality of source signal lines are combined into one set, a source signal line group is divided into a plurality of sets, and a selection signal for sequentially selecting the source signal lines in each set is supplied. The circuit is configured as follows. The number of connection lines between circuits is reduced by supplying an image signal for each set and selecting a source signal line corresponding to each set by the selection signal. As a result, the number of connection wires between circuits does not increase even if the number of pixels increases with the increase in definition of the display device.
[0004]
[Problems to be solved by the invention]
However, Japanese Unexamined Patent Publication No. 61-145597 discloses a circuit for changing the order of image signals to be supplied in units of a group in order to realize the technology disclosed therein. Each set must be supplied, but a circuit configuration for how to process an image signal for that purpose is not disclosed.
[0005]
[Means for Solving the Problems]
Accordingly, it is an object of the present invention to provide a driving circuit of an electro-optical device having a circuit for reducing the number of connection lines between circuits without providing a circuit for changing the order of image signals.
[0006]
A drive circuit for an electro-optical device according to the present invention includes a selector having a plurality of selector circuits for inputting a plurality of image signals, selecting one of the plurality of image signals, and outputting the selected one of the plurality of image signals. And a multiplexer having a plurality of multiplexer circuits for supplying the image signal from the selector circuit to a plurality of data lines of the matrix via a plurality of switch circuits. Then, based on the selection signal, selection of the image signal output from each of the selector circuits and selection of the image signal supplied to each of the plurality of data lines from each of the multiplexer circuits are performed. .
[0007]
An electro-optical device according to the present invention has the drive circuit according to the present invention.
[0008]
The electronic device of the present invention has the drive circuit of the present invention.
[0009]
Further, the driving method of the electro-optical device of the present invention, input a plurality of image signals, based on a selection signal, select and output a predetermined plurality of image signals from the plurality of image signals, The output plurality of predetermined image signals are supplied to a plurality of data lines of the matrix through a plurality of switch circuits based on the selection signal.
[0010]
According to such a configuration, it is possible to realize an electro-optical device having a circuit for reducing the number of connection wires between circuits without providing a circuit for changing the order of image signals.
[0011]
Further, in the drive circuit of the electro-optical device according to the present invention, it is preferable that the image signal of the number of pixels for one line is input to the selector.
[0012]
Further, it is preferable that the driving circuit of the electro-optical device according to the present invention includes a latch circuit, and the latch circuit supplies the selector with the image signals of the number of pixels of one line.
[0013]
In the electro-optical device driving method according to the aspect of the invention, it is preferable that the plurality of image signals be input from a latch circuit that latches pixels for one line.
[0014]
According to such a configuration, the input image signal can be used as it is.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0016]
First, the configuration of the display device according to the present embodiment will be described with reference to FIG. FIG. 1 is a block diagram illustrating a configuration of a display device that is an electronic device according to the present embodiment. This embodiment is an example of a liquid crystal display device which is an electro-optical device using a thin film transistor (hereinafter, referred to as a TFT) as a display device.
[0017]
Reference numeral 1 denotes a TFT element substrate, which includes a pixel unit 2 serving as an image display area, a multiplexer 3, and a Y driver 4. The pixel section 2 is a matrix display section including pixels of n rows and m columns (n and m are integers), and forms m × n pixel matrices in the X direction and n directions in the matrix wiring. . The pixel section 2, the multiplexer 3, and the Y driver 4 are provided on the TFT element substrate 1. Reference numeral 5 denotes a driver IC as an external drive circuit. Reference numeral 6 denotes a timing control circuit for controlling the TFT element substrate 1 and the driver IC 2. Reference numeral 7 denotes a signal line group output from the driver section of the driver IC 2. The pixel section 2 is driven by a multiplexer section 3, a Y driver 4, a driver IC 5, and a timing control circuit 6, which are drive circuits provided in the periphery.
[0018]
The image data DATA, the latch timing signal LP, the shift register start signal ST, the data clock signal CLX, and the select signals S1, S2, and S3, which are selection signals, are supplied from the timing control circuit 6 to the driver IC5. The start signal DY of the Y driver and the shift signal CLY of the line are supplied from the timing control circuit 6 to the TFT circuit substrate 1.
[0019]
In FIG. 1, the shift register unit 11, the first and second latch circuits 12, 13, the selector unit 14, and the driver 15 shown in FIG. 2, which will be described later, are included in the driver IC 5. A part may be included in the TFT element substrate 1.
[0020]
FIG. 2 is a diagram showing a circuit configuration of the TFT circuit board 1 and the driver IC 5. Reference numeral 11 denotes a shift register unit, 12 denotes a first latch circuit, 13 denotes a second latch circuit, 14 denotes a selector unit, and 15 denotes a driver unit. Are included in the driver IC 5.
[0021]
The clock signal CLX and the start signal ST are input to the shift register unit 11. The start signal ST sequentially shifts in the shift register unit 11 according to the clock signal CLX. An output signal from each unit register of the shift register unit 11 is input to each unit latch circuit of the first latch circuit 12. On the other hand, image data DATA, which is an image signal, is simultaneously supplied to all unit latch circuits. When the output signal from the unit register is input, the image data DATA is sequentially stored in each unit latch circuit of the first latch circuit 12. The image data DATA is, for example, a 6-bit digital signal. Accordingly, the first latch circuit 12 stores m pieces of image data for one line, that is, one horizontal scanning line.
[0022]
The second latch circuit 13 is a circuit that latches the image data DATA of the first latch circuit 12 as it is. Therefore, the second latch circuit 13 latches m data, which is data for one line.
[0023]
The selector section 14 includes a plurality of selector circuits 14 (1), 14 (2),..., 14 (k). A plurality of sets are formed by dividing the image data DATA for one line into three consecutive data sets from the beginning or end of the data for one line, thereby forming a plurality of sets. It is input to each corresponding selector circuit. More specifically, 1, 2, and 3 of the image data DATA are input to the selector circuit 14 (1), and 4, 5, and 6 of the image data DATA are input to the selector circuit 14 (2). The circuit 14 (k) receives m-2, m-1, and m of the image data DATA. The selector unit 14 is supplied with select signals S1, S2, and S3, and each selector circuit selects one predetermined image data from the three input image data in accordance with the select signals S1, S2, and S3. The selected signal is supplied to the corresponding driver circuit of the driver section 15 as an output signal.
[0024]
The driver unit 15 includes a plurality of driver circuits 15 (1), 15 (2),..., 15 (k). For example, when the select signal S1 is supplied, the image data DATA1 is output from the selector circuit 14 (1) to the driver circuit 15 (1), and the image data DATA4 is output from the selector circuit 14 (2). 15 (2), and the image data DATAm-2 is output from the selector circuit 14 (k) to the driver circuit 15 (k). Each driver circuit includes a digital-to-analog converter, an amplifier circuit, and the like.
[0025]
The image signal from each driver circuit converted into an analog signal is supplied to the corresponding multiplexer circuit of the multiplexer unit 3 via the source line group 7. The multiplexer unit 3 includes a plurality of multiplexer circuits 3 (1), 3 (2),..., 3 (k). Each multiplexer circuit has three switch circuits SW1, SW2, and SW3. The image signal supplied from each driver circuit is supplied to one end of three switch circuits SW1, SW2, and SW3 of the corresponding multiplexer circuit. The other end of each switch circuit serving as an output is connected to a corresponding source line of the source line group 7 in the X direction of the pixel unit 2. The multiplexer unit 3 is supplied with select signals S1, S2, S3 for turning on / off each switch circuit. The multiplexer unit 3 turns on one of predetermined switch circuits in response to the select signals S1, S2, S3, and supplies an image signal from a corresponding driver circuit to a corresponding source line.
[0026]
For example, when the select signal S1 is supplied, the switch circuit SW1 of the multiplexer circuit 3 (1) is turned on, and an image signal corresponding to the image data DATA1 is output to the source line X1. Similarly, the switch circuit SW1 of the multiplexer circuit 3 (2) is also turned on, and an image signal corresponding to the image data DATA4 is output to the source line X4. Similarly, the switch circuit SW1 of the multiplexer circuit 3 (k) is also turned on, and an image signal corresponding to the image data DATAm-2 is output to the source line Xm-2.
[0027]
Further, for example, when the select signal S2 is supplied, the switch circuit SW2 of the multiplexer circuit 3 (1) is turned on, and an image signal corresponding to the image data DATA2 is output to the source line X2. Similarly, the switch circuit SW2 of the multiplexer circuit 3 (2) is also turned on, and an image signal corresponding to the image data DATA5 is output to the source line X5. Similarly, the switch circuit SW2 of the multiplexer circuit 3 (k) is also turned on, and an image signal corresponding to the image data DATAm-1 is output to the source line Xm-1.
[0028]
Further, when the select signal S3 is supplied, the switch circuit SW3 of the multiplexer circuit 3 (1) is turned on, and an image signal corresponding to the image data DATA3 is output to the source line X3. Similarly, the switch circuit SW3 of the multiplexer circuit 3 (2) is also turned on, and an image signal corresponding to the image data DATA6 is output to the source line X6. Similarly, the switch circuit SW3 of the multiplexer circuit 3 (k) is also turned on, and an image signal corresponding to the image data DATAm is output to the source line Xm.
[0029]
As described above, each multiplexer circuit switches the predetermined switch circuit in accordance with the select signal so as to be turned on, thereby sequentially selecting the image signal from each driver circuit and outputting the image signal to the corresponding source line. At this time, the select signal switches so as to simultaneously turn on a predetermined switch circuit of each multiplexer circuit, so that the output of each multiplexer circuit is simultaneously supplied to the corresponding source line.
[0030]
In FIG. 2, 16 is a TFT corresponding to each pixel, and 17 is injected between a transparent electrode electrically connected to the drain of the TFT 16 and a transparent electrode on the light-transmitting substrate. Shows the capacity formed by the liquid crystal. The Y driver 4 is connected to the pixel unit 2 by n gate lines Y1, Y2,..., Yn. Each gate line is connected to the gates of all the TFTs 16 in each row. When a gate signal is supplied to the gate line, an image signal for one line in a corresponding row is supplied to the pixel portion 2.
[0031]
Next, the state of signals in the above-described circuit configuration will be described with reference to FIG. FIG. 3 is a timing chart of the circuit configuration of FIG.
[0032]
In FIG. 3, ST is a pulse of a start signal indicating the start of operation of the shift register 11. CLX is a pulse of the data clock signal. DATA is a signal of image data. LP is a pulse of a latch timing signal for transferring data stored in the first latch circuit 12 to the second latch circuit 13. S1, S2, and S3 are pulses of the select signal. YL-1 and YL are gate signals of the L-1 and L-th rows generated by the Y driver 4 based on the start signal DY and the shift signal CLY, respectively. Here, L is an integer.
[0033]
When the gate line in the (L-1) th row is selected from the n rows, a gate signal YL-1 having a signal waveform as shown in FIG. 3 is output to the corresponding gate line YL-1. Since the gate signal YL-1 becomes HIGH, the gate of the TFT 16 in the YL-1 row is turned on. At this time, since the data clock CLX is input to the shift register unit 11 following the start signal ST, the image data DATA1, 2,. It is input to the circuit 12. When the m pieces of image data DATA are latched by the first latch circuit 12, the image data is transferred from the first latch circuit 12 to the second latch circuit 13 at the timing of the latch timing signal LP.
[0034]
On the other hand, when the gate signal YL-1 is output to the gate line YL-1, pulse signals of the select signals S1, S2, and S3 are sequentially output. When the pulse signal of S1 is output, the image data corresponding to the first one of the selector circuits, which is already latched by the second latch circuit 13, is selected, and the first switch SW1 of the multiplexer is turned on. As a result, image signals are simultaneously supplied to the corresponding source lines X1, X4,..., Xm-2. The select signal S2 is output following the pulse signal of the select signal S1. Similarly, when the pulse signal of S2 is output, the image data corresponding to the second of each selector circuit is selected, and the second switch SW2 of the multiplexer is turned on, so that the corresponding source lines X2, X5 ,..., Xm−1 are simultaneously supplied with image signals. The select signal S3 is output following the pulse signal of the select signal S2. Similarly, when the pulse signal of S3 is output, the third image data of each selector circuit is selected, and the third switch SW3 of the multiplexer is turned on, and the corresponding source lines X3 and X6 are turned on. ,..., Xm are simultaneously supplied with image signals.
[0035]
In this manner, the gate signal YL-1 is output on the gate signal line YL-1 based on the three select signals S1, S2, and S3 which are continuously and separately output within one HIGH horizontal scanning period. , One line of an image signal is supplied to a corresponding plurality of source lines in three times.
[0036]
When the display of one horizontal scanning line is completed, the gate signal YL is output to the gate signal line YL. In the YL-th row, similarly to the YL-th row, based on the select signals S1, S2, and S3, a plurality of sources corresponding to one line of image signal divided into three times within one horizontal scanning period. Supplied to the wire.
[0037]
Then, similarly, by performing the same processing for each row, a matrix display of n rows and m columns (n and m are integers) on the display device can be performed.
[0038]
As described above, according to the present embodiment, it is possible to realize an electro-optical device having a drive circuit for reducing the number of connection lines between circuits with a simple circuit configuration without changing the order of image signals. Can be. Specifically, each selector circuit selects and outputs data for a certain pixel on a certain line selected by the Y driver based on the select signal, and furthermore, the corresponding multiplexer circuit outputs the data based on the select signal. And outputs an image signal for the pixel to the corresponding source line.
[0039]
In the above description, the three outputs of the latch circuit are described as one set, and the output of the multiplexer circuit is also described as three. However, the present invention is not limited to this. Outputs, or more outputs, may be combined. In this case, the types of the select signals are supplied to the selector unit and the multiplexer unit by the number of outputs included in one set.
[0040]
Further, in the case of a color display device, the configuration of the present embodiment can be applied by associating the color of an image signal with the color of a pixel.
[0041]
The above description is an example of a liquid crystal display device. However, the present invention can be applied to a matrix-structured organic EL (electroluminescence) display device, an electrophoretic display device, and the like.
[0042]
The present invention is not limited to the above-described embodiment, and various changes and modifications can be made without departing from the spirit of the present invention.
[0043]
【The invention's effect】
As described above, according to the present invention, it is possible to realize an electro-optical device having a drive circuit for reducing the number of connection wires between circuits without providing a circuit for changing the order of image signals. it can.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a configuration of a display device according to an embodiment of the present invention.
FIG. 2 is a diagram showing a circuit configuration of a TFT circuit board and a driver IC according to the embodiment of the present invention.
FIG. 3 is a timing chart of the circuit configuration of FIG. 2;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... TFT element substrate 2 ... Pixel part 3 ... Multiplexer part 4 ... Y driver part 5 ... Driver IC
6 timing control circuit 7 source line group 11 shift register unit 12 first latch circuit 13 second latch circuit 14 selector unit 15 driver Part 16: TFT
17 ... Capacity

Claims (7)

A drive circuit of an electro-optical device having a matrix of pixels,
A selector having a plurality of selector circuits for inputting a plurality of image signals and selecting and outputting one image signal from the plurality of image signals,
A multiplexer that is provided corresponding to each of the selector circuits and has a plurality of multiplexer circuits for supplying the image signals from the selector circuits to a plurality of data lines of the matrix via a plurality of switch circuits;
And selecting the image signal output from each of the selector circuits based on the selection signal, and selecting the image signal supplied to each of the plurality of data lines from each of the multiplexer circuits. A driving circuit for an electro-optical device, wherein the driving is performed. 2. The driving circuit according to claim 1, wherein the selector receives the image signals of the number of pixels for one line. 3. The driving circuit for an electro-optical device according to claim 1, further comprising a latch circuit, wherein the latch circuit supplies the image signals of the number of pixels for one line to the selector. An electro-optical device having the drive circuit according to claim 1. An electronic device comprising the drive circuit according to claim 1. A method for driving an electro-optical device having a matrix of pixels,
A plurality of image signals are input, and based on the selection signal, a plurality of predetermined image signals are selected and output from the plurality of image signals,
An electro-optical device, wherein the output image signal is supplied to a plurality of data lines of the matrix via a plurality of switch circuits based on the plurality of predetermined selection signals. Drive method. 7. The method according to claim 6, wherein the plurality of image signals are input from a latch circuit that latches pixels for one line.

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