JP2004000766A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a game machine allowing respective control means to appropriately control based on control signals. <P>SOLUTION: A control command transmitted from a game control board to respective electric components control boards has two byte constitution, control data of the first byte express MODE (classification of the command), and the second byte control data express EXT (type of the command). The top bit (bit 7) of the MODE data is invariably set to "1" and the top bit (bit 7) of the EXT data is invariably set to "0". Therefore, a two-byte control command of common form is outputted from the game control board to the respective electric components control boards. This constitution can prevent the start of the control unless two control data are normally imported in the sides of the control means in the respective electric components control boards so as to allow the appropriate control based on the control command. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to a gaming machine such as a pachinko gaming machine, a coin gaming machine, a slot machine, and the like in which a game is performed according to a player's operation, and in particular, a game is performed according to a player's operation in a gaming area of a gaming board. Related to gaming machines.

As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a winning area such as a winning opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Further, a variable display unit whose display state can be changed is provided, and when a display result of the variable display unit becomes a predetermined specific display mode, a predetermined game value is provided to the player. There is.

The game value means that the state of the variable prize ball device provided in the game area of the gaming machine is in an advantageous state for a player who is easy to win a hit ball, or a right is generated to be in an advantageous state for the player. Or a condition in which conditions for paying out premium game media are easily satisfied. Further, when a predetermined amount of game balls or coins are awarded or points are added in accordance with establishment of a predetermined condition such as winning, these are referred to as value or valuable value.

In a pachinko gaming machine, the fact that the display result of the variable display unit for displaying a special symbol is a combination of a predetermined specific display mode is generally referred to as a “big hit”. When a big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the state shifts to a big hit game state in which a hit ball is easy to win. Then, in each open period, when a predetermined number (for example, 10) of the winning prizes is won, the winning prize opening is closed. The number of opening of the special winning opening is fixed to a predetermined number (for example, 16 rounds). An opening time (for example, 29.5 seconds) is determined for each opening, and if the opening time elapses even if the number of winnings does not reach a predetermined number, the winning opening is closed. If the predetermined condition (for example, winning in the V zone provided in the special winning opening) is not satisfied at the time when the special winning opening is closed, the big hit gaming state ends.

Further, among the combinations of the display modes of “outside” other than the combination of “big hit”, at a stage where a part of the display results of the plurality of variable display units is not yet derived and displayed, the display result is already derived and displayed. The state in which the display mode of the variable display unit that satisfies the display condition that is a combination of the specific display modes is referred to as “reach”. A player plays a game while enjoying how to generate a big hit.

The game progress in the gaming machine is controlled by game control means including a game control microcomputer and the like. The identification information, the character image, and the background image displayed on the variable display device are controlled by a display control unit that operates according to display control command data from the game control unit. The display control means is often mounted on a symbol control board different from the game control board on which the game control means is mounted. Therefore, the game control means for controlling the progress of the game transmits a command for display control to the display control means mounted on the symbol control board. Then, the display control means generates image data such as information.

The gaming machine is provided with a game control board on which a game control microcomputer is mounted and a symbol control board on which a microcomputer for display control is mounted. May be provided. Since each control microcomputer performs various controls in accordance with the progress of the game, the game control means for controlling the progress of the game needs to give control commands to those control microcomputers.

先行 Further, as a prior art of the present invention, there is one described in Patent Document 1.

JP-A-11-347224 (paragraphs 0076 to 0078, FIGS. 9 and 10)

When the game control means is configured to give a control command to another control means, if a command error occurs during transmission of the control command or the like, the control means may perform erroneous control. is there. If the wrong control is performed, the player may feel suspicious of the gaming machine or may give a disadvantage to the player.

In view of the above, the present invention provides a gaming machine in which a control signal (control data) is provided from a game control unit to another control unit so that each control unit can perform appropriate control based on the control signal. The purpose is to.

A gaming machine according to the present invention is a gaming machine that allows a player to play a predetermined game, and includes a game control means (for example, a CPU 56) for controlling the progress of the game, and a predetermined type provided in the gaming machine. (For example, display control means, lamp control means, voice control means, payout control means) for controlling the electric parts (for example, the variable display device 9, the lamp / LED, the speaker 27, and the ball payout device 97) The game control means sequentially controls each control data (for example, MODE data and EXT data) in a control command including a plurality of control data and a capture signal (for example, an INT signal) for instructing capture of control data. Output means for transmitting control contents for controlling the electric component to the electric component control means by outputting to the component control means (for example, a command of the game control means; Control part, see FIG. 28), the electric component control means generates an interrupt in response to an input signal, and executes an interrupt processing (for example, command reception) executed in response to the generation of the interrupt. An interruption process (see FIG. 48) for acquiring control data (for example, a portion of the display control device for executing step S851) and a plurality of control data acquired by the acquisition device are arranged in the order of output by the output device. Judgment means for judging that the control command has been correctly received when it has been taken in (for example, a portion of the display control means for executing steps S852 and S854), and the control command judging that the judgment means has correctly received it (for example, step S852) , S854, an electric component control process for controlling the electric components according to the control data stored in steps S853 and S855). (For example, a part of the display control means for executing the processing after step S723 in the display control process), and the electric component control processing is executed in response to a periodically generated interrupt (see FIG. 46, see FIG. 47), the interruption process is executed prior to the electric component control process (for example, since the display control process process as the electric component control process is executed in the non-interruption process, the interruption process is performed. The control process is interrupted to execute the interrupt process (see FIGS. 46 and 47).

The output means outputs, for example, a specific portion (for example, a leading bit) in the first control data of the control command composed of the two control data and the specific portion in the second control data differently.

One of the plurality of control data is, for example, data for specifying the type of control (for example, MODE data), and the other control data is data for specifying details of the control contents (for example, EXT data).

The predetermined type of electric component includes a production component for producing a game, and the electric component control means specifies the information indicating the production period by one control data (for example, MODE data), and determines the production period by another control data. (For example, EXT data).

According to the first aspect of the present invention, the electrical component control means generates an interrupt in response to an interrupt signal, and captures control data by an interrupt process executed in response to the occurrence of the interrupt. Determining means for determining that the control command has been correctly received when the plurality of control data captured by the capturing means have been captured in the order output by the output means; and a control command determining that the determination means has correctly received the control command. Control means for executing an electrical component control process for controlling the electrical component according to the following. The electrical component control process is executed in response to a periodically generated interrupt, and the interrupt process has priority over the electrical component control process. It is configured so that control is not started unless a plurality of control data are normally taken in on the side of the electric component control means, and the control command is also provided. There is an effect that it is possible to perform a proper control that brute. In other words, even if an error occurs in one of the control data between the boards, the electric component control means can easily detect the error and more reliably prevent the electric component from being controlled based on an erroneous control command. Is done. Also, for example, when a take-in signal is input to an input port, the electric component control means needs to monitor the input port in a very short cycle, but if configured as described above, it is necessary to perform such monitoring. However, there is an effect that the load required for taking control commands in the electric component control means is reduced. Furthermore, when the control data is sent out from the game control means, the control data fetching process can be immediately started immediately, and the electric component control means can reliably execute the fetching process without missing the control data. Can be.

According to the second aspect of the present invention, the output means makes the specific location in the first control data of the control command composed of the two control data different from the specific location in the second control data. Since it is configured to output, the receiving side can immediately detect whether the first control data or the second control data has been received.

According to the third aspect of the present invention, one of the plurality of control data is data for specifying the type of control, and the other control data is data for specifying the details of the control contents. The control data can be easily identified on the part control means side, and it is possible to flexibly cope with a change in the command system.

In the invention described in claim 4, the electric component control means is configured to specify the information indicating the production period by one control data and to specify the production period by another control data. Thus, the control data can be easily identified on the side of the electric component control means, and the configuration of the command can be simplified.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
First, the overall configuration of a pachinko gaming machine, which is an example of a gaming machine, will be described. FIG. 1 is a front view of the pachinko gaming machine 1 as viewed from the front. Here, a pachinko gaming machine is shown as an example of a gaming machine, but the present invention is not limited to a pachinko gaming machine, and may be, for example, a coin gaming machine or a slot machine.

パ As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hit ball supply tray 3. Below the hitting ball supply tray 3, a surplus ball receiving tray 4 for storing game balls overflowing from the hitting ball supply tray 3 and a hitting ball operation handle (operation knob) 5 for firing a hitting ball are provided. A game board 6 is detachably mounted behind the glass door frame 2. A game area 7 is provided on the front of the game board 6.

A variable display including a variable display unit (special symbol display device) 9 for variably displaying a plurality of types of symbols and an ordinary symbol display device (ordinary symbol display device) 10 using 7-segment LEDs near the center of the game area 7. A device 8 is provided. The variable display section 9 has, for example, three symbol display areas of “left”, “middle”, and “right”. On the side of the variable display device 8, a passing gate 11 for guiding a hit ball is provided. The hit ball that has passed through the passing gate 11 is guided to the starting winning opening 14 via the ball exit 13. In a passage between the passage gate 11 and the ball outlet 13, there is a gate switch 12 for detecting a hit ball that has passed through the passage gate 11. The winning ball that has entered the starting winning port 14 is guided to the back of the game board 6 and detected by the starting port switch 17. In addition, a variable winning ball device 15 that performs opening and closing operations is provided below the starting winning port 14. The variable winning ball device 15 is opened by the solenoid 16.

An opening / closing plate 20 which is opened by the solenoid 21 in a specific game state (big hit state) is provided below the variable winning ball device 15. In this embodiment, the opening and closing plate 20 serves as a means for opening and closing the special winning opening. A winning ball that has entered one (V zone) of the winning balls guided from the opening / closing plate 20 to the back of the game board 6 is detected by the V count switch 22. The winning ball from the opening / closing plate 20 is detected by the count switch 23. At the lower part of the variable display device 8, there is provided a starting prize storage display 18 having four display portions for displaying the number of winning balls entering the starting prize port 14. In this example, the start winning prize storage display 18 increases the number of lit display units by one each time there is a starting prize, with the upper limit being four. Then, each time the variable display of the variable display unit 9 is started, the number of the lit display units is reduced by one.

The game board 6 is provided with a plurality of winning ports 19 and 24, and the winning of the game balls to the respective winning ports 19 and 24 is performed by correspondingly provided winning port switches 19a, 19b, 24a and 24b. Is detected. Decorative lamps 25 that blink during the game are provided around the left and right sides of the game area 7, and the lower part has an out opening 26 for absorbing a hit ball that has not won. In addition, two speakers 27 that emit sound effects are provided at upper left and right sides of the game area 7. A game effect LED 28a and game effect lamps 28b and 28c are provided on the outer periphery of the game area 7.

In this example, a prize ball lamp 51 that is lit when a prize ball is paid out is provided near one of the speakers 27, and a ball out lamp 52 that is lit when the supply ball runs out is near the other speaker 27. Is provided. Further, FIG. 1 also shows a card unit 50 that is installed adjacent to the pachinko gaming machine 1 and that allows a ball to be lent by inserting a prepaid card.

The card unit 50 has a usable indicator lamp 151 for indicating whether or not the card is in a usable state. If there is a fraction (a number less than 100 yen) in the remaining amount information recorded in the card, the fraction is displayed on the hitting plate. 3, a fraction display switch 152 for displaying on a frequency display LED provided in the vicinity of 3, a connection board direction indicator 153 indicating which side of the pachinko gaming machine 1 the card unit 50 corresponds to, and the inside of the card unit 50. A card insertion indicator 154 indicating that a card has been inserted into the card, a card insertion slot 155 into which a card as a recording medium is inserted, and a mechanism of a card reader / writer provided on the back of the card insertion slot 155 are checked. A card unit lock 156 is provided for releasing the card unit 50 in some cases.

打 The hit ball fired from the hit ball launching device enters the game area 7 through the hitting ball rail, and then descends from the game area 7. When a hit ball is detected by the gate switch 12 through the passing gate 11, the number displayed on the symbol display 10 normally changes. When a hit ball enters the start winning opening 14 and is detected by the start opening switch 17, the symbols in the variable display section 9 start rotating if the symbols can be changed. If it is not possible to start changing the symbol, the start winning memory is increased by one.

(4) The rotation of the image in the variable display section 9 stops when a certain time has elapsed. If the combination of images at the time of stoppage is a combination of big hit symbols, the game shifts to a big hit game state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or until a predetermined number (for example, 10) of hit balls is won. Then, when a hit ball wins in the specific winning area while the opening and closing plate 20 is opened and is detected by the V count switch 22, a continuation right is generated and the opening and closing plate 20 is opened again. Generation of the continuation right is permitted a predetermined number of times (for example, 15 rounds).

場合 If the combination of images in the variable display unit 9 at the time of stop is a combination of big hit symbols with probability fluctuation, the probability of the next big hit becomes high. In other words, a high probability state, which is more advantageous for the player, is obtained. Further, when the stop symbol on the ordinary symbol display 10 is a predetermined symbol (hit symbol = small hit symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the high probability state, the probability that the stop symbol on the ordinary symbol display 10 hits the symbol is increased, and the opening time and the number of times the variable winning ball device 15 is opened are increased.

Next, each board disposed on the back surface of the pachinko gaming machine 1 will be described.
As shown in FIG. 2, on the back surface of the pachinko gaming machine 1, a ball storage tank 38 is provided above the mechanism plate in the frame 2A, and above the pachinko gaming machine 1 installed on the gaming machine installation island. The game ball is supplied to the ball storage tank 38 from. The game balls in the ball storage tank 38 pass through the guiding gutter 39 to reach a ball dispensing device covered with a prize ball case 40A.

On the back side of the gaming machine, a variable display control unit 29 including a symbol control board for controlling the variable display unit 9 and a game control board (main board) 31 on which a game control microcomputer and the like are mounted are installed. In addition, a payout control board 37 on which a payout control microcomputer for performing ball payout control is mounted, and a hitting ball launching device that launches a hitting ball into the game area 7 using the rotational force of a motor are provided. Further, a lamp control board 35 for sending signals to the decorative lamp 25, the game effect LED 28a, the game effect lamps 28b and 28c, the prize ball lamp 51 and the ball cut lamp 52, and voice control for controlling generation of voice from the speaker 27. A launch control board 91 for controlling the substrate 70 and the hit ball launching device is also provided.

Further, a power supply board 910 provided with a power supply circuit for generating DC 30V, DC 21V, DC 12V and DC 5V is provided, and a terminal board 160 provided with terminals for outputting various information to the outside of the gaming machine is provided above. Have been. The terminal board 160 has at least an out-of-ball terminal for introducing and outputting the output of the out-of-ball detection switch, an award ball terminal for externally outputting the award ball number signal, and an externally outputting ball lending number signal. Ball lending terminals are provided. In the vicinity of the center, an information terminal board 34 having terminals for outputting various information from the main board 31 to the outside of the gaming machine is provided.

In FIG. 2, signals from the lamp control board 35 and the sound control board 70 are supplied to the game effect LEDs 28a, game effect lamps 28b and 28c, the prize ball lamp 51, and the ball cut lamp 52 provided on the frame side. Illustrated relay board A77 for performing the above is shown, but other relay boards are provided as necessary for signal relay.

FIG. 3 is a rear view of the mechanical plate of the pachinko gaming machine 1 as viewed from the rear. The balls stored in the ball storage tank 38 pass through the guiding gutter 39, pass through the ball cutout detectors (ball cutout switches) 187a and 187b, and are discharged through the ball supply gutters 186a and 186b as shown in FIG. The device 97 is reached. The ball-out switches 187a and 187b are switches for detecting the presence or absence of a game ball in the game-ball passage, and a ball-out detection switch 167 for detecting a shortage of replenishment balls in the ball tank 38 is also provided. Hereinafter, the ball-out switches 187a and 187b may be referred to as a ball-out switch 187.

The game balls paid out from the ball payout device 97 are supplied to the hit ball supply tray 3 provided on the front surface of the pachinko gaming machine 1 through the communication port 45. On the side of the communication port 45, a surplus ball passage 46 communicating with the surplus ball tray 4 provided on the front face of the pachinko gaming machine 1 is formed.

When a large number of premium balls are paid out based on the winning and the hitting ball supply tray 3 becomes full, and finally the game balls reach the contact port 45 and then the game balls are further paid out, the game balls pass through the surplus ball passage 46 and surplus. It is led to the ball tray 4. When the game balls are further paid out, the sensing lever 47 presses the full tank switch 48 and the full tank switch 48 is turned on. In this state, the rotation of the stepping motor in the ball discharging device 97 stops, the operation of the ball discharging device 97 stops, and the driving of the hit ball firing device 34 also stops.

Next, the configuration of the intermediate base unit installed on the mechanism plate 36 will be described. The ball supply gutters 186a and 186b and the ball payout device 97 are installed in the intermediate base unit. As shown in FIG. 4, connecting concave protrusions 182 are formed on the upper and lower sides of the intermediate base unit. The connection concave projection 182 connects and fixes the intermediate base unit and the upper base unit and the lower base unit of the mechanism plate 36.

通路 A passage body 184 is fixed to the upper part of the intermediate base unit. The ball dispensing device 97 is fixed below the passage body 184. The passage body 184 has payout ball passages 186a and 186b through which two rows of game balls whose flow direction has been changed left and right by the curve gutter 174 (see FIG. 3) flow down. On the upstream side of the payout ball passages 186a and 186b, ball cutout switches 187a and 187b are provided. The ball-out switches 187a and 187b detect the presence or absence of game balls in the pay-out ball passages 186a and 186b. When the ball-out switches 187a and 187b no longer detect game balls, the payout motor ( The rotation of the ball (not shown in FIG. 4) is stopped, and the ball payout is immobilized.

The ball out switches 187a and 187b are locked by locking pieces 188 at positions where about 27 to 28 game balls can be detected in the payout ball paths 186a and 186b. That is, the ball out switches 187a and 187b are provided for the maximum payout amount of one unit of the prize ball (15 in this embodiment) and the maximum payout amount of one unit of the ball lending (100 yen: 25 in this embodiment). It is installed in a position where it can be confirmed that the above is secured.

中央 The central portion of the passage body 184 is formed in a shape that is curved left and right so as to reduce the ball pressure of the game ball flowing down inside. A stop hole 189 is formed between the payout ball passages 186a and 186b. A mounting boss provided on the intermediate base unit is fitted into the back surface of the stop hole 189. In this state, the set screw is screwed, and the passage body 184 is fixed to the intermediate base unit. Before being screwed, the positioning of the passage body 184 can be performed by a locking projection 185 provided on the intermediate base unit.

球 A ball stopping device 190 is provided below the passage body 184 to supply the game balls to the ball payout device 97 and to stop the supply of the game balls to the ball payout device 97 in the case of failure or the like. The ball dispensing device 97 installed below the ball stopping device 190 is housed inside a rectangular parallelepiped case 198. Protrusions are provided at four places on the left and right of the case 198. The lower end of the case 198 is fitted into an elastic engagement piece provided at a lower portion of the intermediate base unit with each projection being related to a positioning projection provided on the intermediate base unit.

FIG. 5 is an exploded perspective view of the ball payout device 97. The configuration and operation of the ball payout device 97 will be described with reference to FIG. In the ball payout device 97 in this embodiment, the stepping motor (payout motor) 289 rotates the screw 288 to pay out pachinko balls one by one. The ball payout device 97 pays out not only prize balls based on winnings but also game balls to be lent.

球 As shown in FIG. 5, the ball payout device 97 has two cases 198a and 198b. Engagement projections 280 are provided at two positions on the left and right sides of each of the cases 198a and 198b. Further, ball supply paths 281a and 281b are formed in the respective cases 198a and 198b. The ball supply paths 281a and 281b have curved surfaces 282a and 282b, and ball feeding horizontal paths 284a and 284b are formed below the ends of the curved surfaces 282a and 282b. Further, ball discharge paths 283a and 283b are formed at the ends of the ball feed horizontal paths 284a and 284b.

The ball supply paths 281a and 281b, the ball feed horizontal paths 284a and 284b, and the ball discharge paths 283a and 283b are formed in front of partition walls 295a and 295b that partition the cases 198a and 198b into front and rear, respectively. Further, in front of the partition walls 295a and 295b, the ball pressure buffering member 285 is sandwiched between the cases 198a and 198b. The ball pressure buffering member 285 distributes the ball supplied to the ball payout device 97 to the left and right sides and guides the ball to the ball supply paths 281a and 281b.

Further, a payout motor position sensor including a light emitting element (LED) 286 and a light receiving element (not shown) is provided below the ball pressure buffering member 285. The light emitting element 286 and the light receiving element are provided at a predetermined interval. Then, the tip of the screw 288 is inserted into the space. When the cases 198a and 198b are attached to each other, the ball pressure buffering member 285 is completely housed and fixed therein.

A screw 288 that is rotated by a payout motor 289 is disposed in the 送 り ball feed horizontal paths 284 a and 284 b. The payout motor 289 is fixed to the motor fixing plate 290, and the motor fixing plate 290 is fitted in fixing grooves 291a and 291b formed behind the partition walls 295a and 295b. In this state, the motor shaft of the dispensing motor 289 projects forward of the partition walls 295a, 295b, so that the screw 288 is fixed forward of the projection. On the outer periphery of the screw 288, there is provided a spiral projection 288a for moving a game ball placed on the ball feed horizontal path 284a, 284b forward by rotation of the payout motor 289.

A recess is formed at the tip of the screw 288 so as to house the light emitting element 286, and two notches 292 are formed 180 degrees apart from each other on the outer periphery of the recess. Therefore, while the screw 288 makes one rotation, the light from the light emitting element 286 is detected twice by the light receiving element via the notch 292.

In other words, the payout motor position sensor including the light emitting element 286 and the light receiving element is for stopping the screw 288 at a fixed position and detecting that the payout operation has been performed. The wires from the light emitting element 286, the light receiving element, and the payout motor 289 are collectively brought out to the outside through drawer holes formed below the rear portions of the cases 198a, 198b, and connected to the connector.

When the payout motor 289 rotates in a state where the game balls are placed on the ball feed horizontal paths 284a and 284b, the game balls are moved forward on the ball feed horizontal paths 284a and 284b by the spiral projection 288a of the screw 288. Moving. Then, finally, the ball falls from the end of the ball feed horizontal path 284a, 284b to the ball discharge path 283a, 283b. At this time, falling from the left and right ball feed horizontal paths 284a and 284b are performed alternately. That is, each time the screw 288 makes a half turn, one game ball falls from one side. Therefore, each time one game ball falls, light from the light emitting element 286 is detected by the light receiving element.

球 As shown in FIG. 4, a ball distribution member 311 is provided below the ball payout device 97. The ball distribution member 311 is driven by the distribution solenoid 310. For example, when the solenoid 310 is on, the ball sorting member 311 falls to the right, and when it is off, it falls to the left. Below the distribution solenoid 310, a prize ball count switch 301A and a ball lending count switch 301B are provided by proximity switches. At the time of a prize ball based on a prize, the ball distribution member 311 falls to the right, and the balls from the ball discharge paths 283a and 283b both pass through the prize ball count switch 301A. Also, at the time of lending a ball, the ball distribution member 311 falls to the left side, and the balls from the ball discharge paths 283a and 283b both pass through the ball lending count switch 301B. Therefore, the ball payout device 97 can switch the payout flow path between a prize ball and a ball loan, and can pay out a predetermined number of game media.

設 け る By providing the ball sorting member 311 in this way, a ball that has fallen in the two ball paths passes only one of the prize ball count switch 301A and the ball lending count switch 301B. Therefore, the number of prize balls or the number of ball lending can be immediately grasped from the detection output of the prize ball count switch 301A and the ball lending count switch 301B without determining whether the ball is a prize ball or a ball lending.

In this embodiment, a ball payout device 97 that pays out game balls by rotation of a stepping motor is used as a ball payout device that pays out game balls by driving an electric drive source. A ball dispensing device having a structure in which a game ball is sent out by means of a ball may be used, or a ball dispensing device having a structure in which a stopper is removed by driving an electric drive source and the game ball is paid out by its own weight may be used.

FIG. 6 is a block diagram showing an example of a circuit configuration of the main board 31. FIG. 6 also shows a payout control board 37, a lamp control board 35, a sound control board 70, a firing control board 91, and a symbol control board 80. Hereinafter, the payout control board 37, the lamp control board 35, the sound control board 70, and the symbol control board 80 may be referred to as an electric component control board. Control means including a microcomputer mounted on the electric component control board may be referred to as electric component control means. Among the electric components controlled by the electric component control means, those related to the game effect are effect components. The lamp control board 35, the sound control board 70, and the symbol control board 80 are also examples of the effect component control board.

The main board 31 has a basic circuit 53 for controlling the pachinko gaming machine 1 in accordance with a program, a gate switch 12, a starting port switch 17, a V count switch 22, a count switch 23, winning port switches 19a, 19b, 24a, 24b, A switch circuit 58 for giving signals from the tongue switch 48, the ball cutout switch 187 and the prize ball count switch 301A to the basic circuit 53, a solenoid 16 for opening and closing the variable prize ball device 15, a solenoid 21 for opening and closing the opening and closing plate 20, and a large prize. A solenoid circuit 59 for driving a switching solenoid 21A for switching the intraoral path in accordance with a command from the basic circuit 53 is mounted.

Although not shown in FIG. 6, the count switch short-circuit signal is also transmitted to the basic circuit 53 via the switch circuit 58.

An address decode circuit 67 for decoding an address signal given from the basic circuit 53 and outputting a signal for selecting one of the I / O ports in the I / O port unit 57, and an address decode circuit 67 for giving a signal from the basic circuit 53. Information output signals such as jackpot information indicating the occurrence of a jackpot, effective start information indicating the number of start winning balls used to start image display on the variable display unit 9, and probability change information indicating that a probability change has occurred, in accordance with the received data. Is output to an external device such as a hall computer.

The basic circuit 53 includes a ROM 54 that stores a game control program and the like, a RAM 55 that is an example of a storage unit used as a work memory, a CPU 56 that performs a control operation according to the program, and an I / O port unit 57. In this embodiment, the ROM 54 and the RAM 55 are built in the CPU 56. That is, the CPU 56 is a one-chip microcomputer. The one-chip microcomputer only needs to include at least the RAM 55, and the ROM 54 and the I / O port unit 57 may be externally or internally provided.

(4) The main board 31 is provided with a system reset circuit 65 for resetting the basic circuit 53 when the power is turned on. Note that there is also switch information input from the ball dispensing device 97 to the main board 31, but these are omitted in FIG.

The hit ball launching device that hits and launches a game ball is driven by a drive motor 94 controlled by a circuit on a launch control board 91. Then, the driving force of the driving motor 94 is adjusted according to the operation amount of the operation knob 5. That is, the circuit on the launch control board 91 is controlled so that the hit ball is launched at a speed corresponding to the operation amount of the operation knob 5.

In this embodiment, the lamp control means mounted on the lamp control board 35 controls the display of the start storage display 18, the gate passage storage display 41 and the decoration lamp 25 provided on the game board. At the same time, display control of the game effect lamps / LEDs 28a, 28b, 28c, the prize ball lamp 51 and the ball out lamp 52 provided on the frame side is performed. The display control of the variable display unit 9 for variably displaying the special symbol and the ordinary symbol display 10 for variably displaying the ordinary symbol is performed by display control means mounted on the symbol control board 80.

FIG. 7 shows a circuit configuration in the symbol control board 80 by using an LCD (liquid crystal display) 82, an ordinary symbol display 10, and an output port (ports 0 and 2) of the main board 31 as an example of the variable display unit 9. FIG. 570 is a block diagram shown together with the output buffer circuits 620 and 62A. Output port (output port 2) 572 outputs 8-bit data, and output port 570 outputs a 1-bit strobe signal (INT signal).

The display control CPU 101 operates in accordance with a program stored in the control data ROM 102. When an INT signal is input from the main board 31 via the noise filter 107 and the input buffer circuit 105B, the display control CPU 101 controls the display control via the input buffer circuit 105A. Receive a command. As the input buffer circuits 105A and 105B, for example, 74HC540 and 74HC14, which are general-purpose ICs, can be used. When the display control CPU 101 does not include an I / O port, an I / O port is provided between the input buffer circuits 105A and 105B and the display control CPU 101.

Then, the display control CPU 101 controls display of a screen displayed on the LCD 82 according to the received display control command. Specifically, a command corresponding to the display control command is given to the VDP 103. The VDP 103 reads necessary data from the character ROM 86. VDP 103 generates image data to be displayed on LCD 82 according to the input data, and outputs R, G, B signals and a synchronization signal to LCD 82.

FIG. 7 also shows a reset circuit 83 for resetting the VDP 103, an oscillation circuit 85 for supplying an operation clock to the VDP 103, and a character ROM 86 for storing frequently used image data. The frequently used image data stored in the character ROM 86 is, for example, a person, an animal, or an image composed of characters, figures, or symbols displayed on the LCD 82.

(4) The input buffer circuits 105A and 105B can pass signals only in the direction from the main board 31 to the symbol control board 80. Therefore, there is no room for a signal to be transmitted from the symbol control board 80 side to the main board 31 side. That is, both the input buffer circuits 105A and 105B constitute irreversibility information input means. Even if the circuit in the symbol control board 80 is tampered with, the signal output by the tampering is not transmitted to the main board 31 side.

The outputs of the output ports 570 and 572 may be directly output to the symbol control board 80. However, by providing output buffer circuits 620 and 62A that can transmit signals only in one direction, the symbol control board 80 can be output from the main board 31. One-way signal transmission can be more reliably performed. That is, the output buffer circuits 620 and 62A together constitute an irreversible information output means together with the output ports. By the irreversibility information output means, the input of the illegal signal to the symbol control board 80 via the signal transmission line is reliably prevented.

Further, for example, a three-terminal capacitor or a ferrite bead is used as the noise filter 107 that blocks a high-frequency signal. Even if noise is present between display control commands due to the presence of the noise filter 107, the effect is eliminated. Is done. Note that a noise filter may also be provided on the output side of the buffer circuits 620 and 62A of the main board 31.

FIG. 8 is a block diagram showing a signal transmission / reception portion of the main board 31 and the lamp control board 35. In this embodiment, the game effect LED 28a provided outside the game area 7, the game effect lamps 28b and 28c and the decoration lamp 25 provided on the game board are turned on / off, the prize ball lamp 51 and the ball running out. A lamp control command indicating turning on / off of the lamp 52 is output from the main board 31 to the lamp control board 35. Further, a lamp control command indicating the number of lighting of the start storage display 18 and the gate passage storage display 41 is also output from the main board 31 to the lamp control board 35.

(8) As shown in FIG. 8, a lamp control command relating to lamp control is output from output ports (output ports 0, 3) 570, 573 of the I / O port unit 57 in the basic circuit 53. Output port (output port 3) 573 outputs 8-bit data, and output port 570 outputs a 1-bit INT signal. In the lamp control board 35, a control command from the main board 31 is input to the lamp control CPU 351 via the input buffer circuits 355A and 355B. When the lamp control CPU 351 does not include an I / O port, an I / O port is provided between the input buffer circuits 355A and 355B and the lamp control CPU 351.

In the lamp control board 35, the CPU 351 for lamp control includes the game effect LED 28a, the game effect lamp 28b, the game effect LED 28a, and the game effect LED 28a according to the lighting / extinguishing pattern of the decorative lamp 25 defined according to each control command. A turn-on / turn-off signal is output to the decorative lamps 25b and 28c. The ON / OFF signal is output to the game effect LED 28a, the game effect lamps 28b and 28c, and the decoration lamp 25. The light-on / light-off pattern is stored in the built-in ROM or the external ROM of the lamp control CPU 351.

In the main board 31, the CPU 56 outputs a control command for instructing lighting of the prize ball lamp 51 when there is an unpaid prize ball remaining number in the stored contents of the RAM 55, and outputs the payout ball passage 186a, 186a, When the ball-out switches 187a and 187b (see FIG. 3) installed upstream of 186b no longer detect a game ball, a control command for instructing lighting of the ball-out lamp 52 is output. In the lamp control board 35, each control command is input to the lamp control CPU 351 via the input buffer circuits 355A and 355B. The lamp control CPU 351 turns on / off the award ball lamp 51 and the ball out lamp 52 in response to the control commands. The light-on / light-off pattern is stored in the built-in ROM or the external ROM of the lamp control CPU 351.

(4) Further, the lamp control CPU 351 outputs an on / off signal to the start storage display 18 and the gate passage storage display 41 according to the control command.

(4) As the input buffer circuits 355A and 355B, for example, 74HC540 and 74HC14 which are general-purpose CMOS-ICs are used. The input buffer circuits 355A and 355B can pass signals only in the direction from the main board 31 to the lamp control board 35. Therefore, there is no room for a signal to be transmitted from the lamp control board 35 side to the main board 31 side. For example, even if a circuit in the lamp control board 35 is tampered with, a signal output by the tampering is not transmitted to the main board 31 side. Note that a noise filter may be provided on the input side of the input buffer circuits 355A and 355B.

{Circle around (2)} On the main board 31, buffer circuits 620 and 63A are provided outside the output ports 570 and 573. As the buffer circuits 620 and 63A, for example, 74HC250 and 74HC14 which are general-purpose CMOS-ICs are used. According to such a configuration, since a signal input from the outside to the inside of the main board 31 is blocked, a signal line to which a signal may be supplied from the lamp control board 70 to the main board 31 is more reliably eliminated. be able to. Note that a noise filter may be provided on the output side of the buffer circuits 620 and 63A.

FIG. 9 is a block diagram showing a configuration example of a signal transmission portion of a voice control command on the main board 31 and a voice control board 70. In this embodiment, a voice control command for instructing voice output from the speaker 27 provided outside the game area 7 is output from the main board 31 to the voice control board 70 in accordance with the progress of the game.

As shown in FIG. 9, the voice control command is output from the output ports (output ports 0, 4) 570, 574 of the I / O port unit 57 in the basic circuit 53. The output port (output port 4) 574 outputs 8-bit data, and the output port 570 outputs a 1-bit INT signal. In the audio control board 70, each signal from the main board 31 is input to the audio control CPU 701 via the input buffer circuits 705A and 705B. When the audio control CPU 701 does not include an I / O port, an I / O port is provided between the input buffer circuits 705A and 705B and the audio control CPU 701.

Then, for example, the voice synthesis circuit 702 by the digital signal processor generates a voice or sound effect according to the instruction of the voice control CPU 701 and outputs it to the volume switching circuit 703. The volume switching circuit 703 sets the output level of the voice control CPU 701 to a level corresponding to the set volume and outputs the output level to the volume amplification circuit 704. Volume amplification circuit 704 outputs the amplified audio signal to speaker 27.

(4) As the input buffer circuits 705A and 705B, for example, 74HC540 and 74HC14 which are general-purpose CMOS-ICs are used. The input buffer circuits 705A and 705B can pass signals only in the direction from the main board 31 to the audio control board 70. Therefore, there is no room for a signal to be transmitted from the voice control board 70 side to the main board 31 side. Therefore, even if the circuit in the voice control board 70 is tampered with, the signal output by the tampering is not transmitted to the main board 31 side. Note that a noise filter may be provided on the input side of the input buffer circuits 705A and 705B.

{Circle around (2)} On the main board 31, buffer circuits 620 and 67A are provided outside the output ports 570 and 574. As the buffer circuits 620 and 67A, for example, 74HC250 and 74HC14 which are general-purpose CMOS-ICs are used. According to such a configuration, since a signal input from the outside to the inside of the main board 31 is blocked, a signal line to which a signal may be given from the voice control board 70 to the main board 31 is further reliably eliminated. be able to. Note that a noise filter may be provided on the output side of the buffer circuits 620 and 67A.

FIG. 10 is a block diagram showing components related to payout, such as components of the payout control board 37 and the ball payout device 97. As shown in FIG. 10, a detection signal from the full tank switch 48 is input to the I / O port 57 of the main board 31 via the relay board 71. The full tank switch 48 is a switch that detects whether the excess ball tray 4 is full. Further, a detection signal from the ball cut switch 187 (187a, 187b) is also input to the I / O port 57 of the main board 31 via the relay board 72 and the relay board 71.

If the detection signal from the ball out switch 187 indicates that the ball has run out, or if the detection signal from the full switch 48 indicates the full state, the CPU 56 of the main board 31 issues a payment prohibition instruction. Send a control command. When receiving the payout control command instructing the payout prohibition, the payout control CPU 371 of the payout control board 37 stops the ball payout process.

(4) The detection signal from the award ball count switch 301A is also input to the I / O port 57 of the main board 31 via the relay board 72 and the relay board 71. The prize ball count switch 301A is provided in the payout mechanism of the ball payout device 97, and detects a prize ball payout ball actually paid out.

When there is a prize, a payout control command indicating the number of prize balls is input to the payout control board 37 from the output ports (ports 0, 1) 570, 571 of the main board 31. The output port (output port 1) 571 outputs 8-bit data, and the output port 570 outputs a 1-bit strobe signal (INT signal). The payout control command indicating the number of winning balls is input to the I / O port 372a via the input buffer circuit 373A. The INT signal is input to the interrupt terminal of the payout control CPU 371 via the input buffer circuit 373B. The payout control CPU 371 inputs a payout control command via the I / O port 372a, and drives the ball payout device 97 in accordance with the payout control command to pay out award balls.
In this embodiment, the payout control CPU 371 is a one-chip microcomputer and has at least a RAM.

{Circle around (2)} On the main board 31, buffer circuits 620 and 68A are provided outside the output ports 570 and 571. As the buffer circuits 620 and 68A, for example, 74HC250 and 74HC14 which are general-purpose CMOS-ICs are used. According to such a configuration, a signal input from the outside to the inside of the main board 31 is blocked, so that a signal line to which a signal may be given from the payout control board 37 to the main board 31 is further reliably eliminated. be able to. Note that a noise filter may be provided on the output side of the buffer circuits 620 and 68A.

The payout control CPU 371 outputs a ball lending number signal indicating the lending ball number to the terminal board 160 and a buzzer driving signal to the buzzer board 75 via the output port 372g. A buzzer is mounted on the buzzer board 75. Further, an error signal is output to the error display LED 374 via the output port 372e.

(4) Further, detection signals from the prize ball count switch 301A and the ball lending count switch 301B are input to the input port 372b of the payout control board 37 via the relay board 72. The ball lending count switch 301B is provided in the payout mechanism portion of the ball payout device 97, and detects the actually paid lending balls. The drive signal from the payout control board 37 to the payout motor 289 is transmitted to the payout motor 289 in the payout mechanism of the ball payout device 97 via the output port 372c and the relay board 72.

The card unit 50 is equipped with a microcomputer for controlling the card unit. In addition, the card unit 50 is provided with a fraction display switch 152, a connection stand direction display 153, a card insertion display lamp 154, and a card insertion slot 155 (see FIG. 1). The balance display board 74 is connected to a frequency display LED, a ball lending switch, and a return switch provided near the hit ball supply tray 3.

A ball lending switch signal and a return switch signal are given from the balance display board 74 to the card unit 50 via the payout control board 37 in accordance with the operation of the player. A card balance display signal indicating the balance of the prepaid card and a ball lending permission display signal are given from the card unit 50 to the balance display board 74 via the payout control board 37. Between the card unit 50 and the payout control board 37, a connection signal (VL signal), a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), a ball lending completion signal (EXS signal) and a pachinko machine operation signal ( PRDY signal) is exchanged via the I / O port 372f.

When the pachinko gaming machine 1 is powered on, the payout control CPU 371 of the payout control board 37 outputs a PRDY signal to the card unit 50. The card unit control microcomputer outputs a VL signal. The payout control CPU 371 determines the connection state / non-connection state based on the input state of the VL signal. When the card is accepted in the card unit 50 and the ball lending switch is operated to input the ball lending switch signal, the microcomputer for controlling the card unit outputs a BRDY signal to the payout control board 37. When a predetermined delay time has elapsed from this point, the microcomputer for controlling the card unit outputs a BRQ signal to the payout control board 37.

Then, the payout control CPU 371 of the payout control board 37 starts up the EXS signal to the card unit 50 and, when detecting the fall of the BRQ signal from the card unit 50, drives the payout motor 289 to dispense a predetermined number of loaned balls. Pay out to players. At this time, the distribution solenoid 310 is in a driving state. That is, the ball distribution member 311 is directed to the ball lending side. When the payout is completed, the payout control CPU 371 causes the EXS signal to the card unit 50 to fall. Thereafter, if the BRDY signal from the card unit 50 is not in the ON state, the winning ball payout control is executed.

As described above, all signals from the card unit 50 are input to the payout control board 37. Accordingly, regarding the ball lending control, no signal is input from the card unit 50 to the main board 31, and there is no room for an illegal signal to be input from the card unit 50 side to the basic circuit 53 of the main board 31.

In this embodiment, a case where the card unit 50 is installed separately from the gaming machine and adjacent to the gaming machine is described as an example, but the card unit 50 may be integrated with the gaming machine. . Also, the present invention can be applied to a case where a gaming machine is configured to lend a game ball corresponding to the amount of money when a coin is inserted.

FIG. 11 is a block diagram showing a configuration example of a power supply board 910 of a gaming machine. The power supply board 910 is installed independently of the electric component control boards such as the main board 31, the symbol control board 80, the voice control board 70, the lamp control board 35, and the payout control board 37, and each of the electric component control boards in the gaming machine and Generates voltages used by mechanical components. In this example, AC24V, VSL (DC + 30V), DC + 21V, DC + 12V and DC + 5V are generated. Further, the capacitor 916 serving as a backup power supply is charged from DC + 5V, that is, a power supply line for driving an IC or the like on each substrate.

(5) The transformer 911 converts an AC voltage from an AC power supply to 24V. The AC 24 V voltage is output to connector 915. The rectifier circuit 912 generates a DC voltage of +30 V from AC 24 V and outputs the DC voltage to the DC-DC converter 913 and the connector 915. The DC-DC converter 913 generates + 21V, + 12V, and + 5V and outputs the generated voltage to the connector 915. The connector 915 is connected to, for example, a relay board, and power of a voltage required for each electrical component control board and mechanical components is supplied from the relay board.

However, the power supply board 910 may be provided with each connector leading to each electric component control board, and the power supply board 910 may supply each voltage reaching each board without passing through the relay board.

＋ The + 5V line from DC-DC converter 913 branches to form a backup + 5V line. A large-capacity capacitor 916 is connected between the backup + 5V line and the ground level. The capacitor 916 is provided with a power so as to maintain a storage state in a backup RAM (power-backed-up RAM, that is, storage means that can be in a storage content storage state) of the electric component control board when power supply to the gaming machine is cut off. Supply backup power. Further, a diode 917 for preventing backflow is inserted between the + 5V line and the backup + 5V line.

Note that a battery that can be charged from a + 5V power supply may be used as the backup power supply. In the case of using a battery, a rechargeable battery is used which runs out of capacity when power is not supplied from a + 5V power supply for a predetermined time.

The power supply board 910 has a power supply monitoring IC 902 mounted thereon. The power supply monitoring IC 902 detects the occurrence of power interruption by introducing the VSL power supply voltage and monitoring the VSL power supply voltage. Specifically, when the VSL power supply voltage becomes equal to or lower than a predetermined value (+22 V in this example), a voltage drop signal is output assuming that power supply is cut off. The power supply voltage to be monitored is preferably higher than the power supply voltage (+5 V in this example) of the circuit element mounted on each electric component control board. In this example, VSL, which is a voltage immediately after conversion from AC to DC, is used. The voltage drop signal from the power supply monitoring IC 902 is supplied to the main board 31, the payout control board 37, and the like.

The predetermined value for the power supply monitoring IC 902 to detect the power-off is lower than the normal voltage, but is a voltage at which the CPU on each electric component control board can operate for a while. The power supply monitoring IC 902 is configured to monitor a voltage higher than a voltage for driving a circuit element such as a CPU (+5 V in this example) and a voltage immediately after conversion from AC to DC. Therefore, the monitoring range can be extended for the voltage required by the CPU. Therefore, more precise monitoring can be performed.

In addition, when VSL (+30 V) is used as the monitoring voltage, since the voltage supplied to the various switches of the gaming machine is +12 V, prevention of erroneous switch-on detection upon momentary power interruption can be expected. That is, if the voltage of the +30 V power supply is monitored, it is possible to detect a decrease in the voltage of +12 V at a stage before +12 V generated after the generation of +30 V starts to fall. Therefore, when the voltage of the + 12V power supply decreases, the switch output comes to the on state. However, if the + 30V power supply voltage that drops earlier than the + 12V is monitored and the power cutoff is recognized, the power supply is turned on before the switch output turns on. It is possible to enter a state of waiting for restoration and to enter a state in which the switch output is not detected.

Since the power supply monitoring IC 902 is mounted on the power supply board 910 separate from the electric component control board, the power supply monitoring circuit can supply a voltage drop signal to the plurality of electric component control boards. Regardless of the number of electrical component control boards that require the voltage drop signal, it is sufficient that only one first power supply monitoring means is provided, so that each electrical component control means in each electrical component control board performs return control described later. Doing so does not add much to the cost of the gaming machine.

Note that, in the configuration shown in FIG. 11, the detection output (voltage drop signal) of the power supply monitoring IC 902 is supplied to each electric component control board (for example, the main board 31 and the payout control board 37) via the buffer circuits 918 and 919. However, for example, a configuration may be employed in which one detection output is transmitted to the relay board, and the same signal is distributed from the relay board to each electric component control board. Further, a buffer circuit may be provided according to the number of substrates requiring a voltage drop signal.

Further, the power supply board 910 is provided with a reset management circuit 940 for supplying a reset signal to each board.

FIG. 12 is a block diagram showing a configuration example of the reset management circuit 940. In the reset management circuit 940, the reset IC 651 sets the output to a low level for a predetermined time determined by the capacity of an external capacitor when the power is turned on, and sets the output to a high level after a predetermined time has elapsed. The output of the reset IC 651 is supplied to the buffer circuits 961 to 964 and the delay circuit 960 via the circuits 941 to 949. The output of the delay circuit 960 is input to the buffer circuit 965. Then, the buffer circuits 961 to 965 are supplied as reset signals to the respective electric component control boards. Therefore, when the output of the reset IC 651 becomes high level, the CPU in each electric component control board becomes operable.

The reset IC 651 monitors the power supply voltage of VSL, which is the same power supply voltage as the power supply voltage monitored by the power supply monitoring IC 902, and sets the voltage value to a predetermined value (from the power supply voltage value at which the power supply monitoring IC 902 outputs a voltage drop signal). Becomes a low level when the value becomes lower than the above. Therefore, the CPU 56 and the payout control CPU 371 perform predetermined power supply stop preparation processing in response to the voltage drop signal (power cutoff signal) from the power supply monitoring IC 902, and then are reset.

As shown in FIG. 12, the reset signal from the reset IC 651 is input to the NAND circuit 947 and also to the clear terminal of the counter IC 941 via the inverting circuit (NOT circuit) 944. When the input to the clear terminal goes low, the counter IC 941 counts the clock signal from the oscillator 943. Then, the Q5 output of the counter IC 941 is input to the NAND circuit 947 via the NOT circuits 945 and 946.

(5) The Q6 output of the counter IC 941 is input to the clock terminal of the flip-flop (FF) 942. The D input of the flip-flop 942 is fixed at a high level, and the Q output is input to an OR circuit (OR circuit) 949. The output of the NAND circuit 947 is introduced to the other input of the OR circuit 949 via the NOT circuit 948. Then, the output of the OR circuit 949 is supplied to each CPU via the buffer circuits 961 to 965. According to such a configuration, when the power is turned on, two reset signals (low-level signals) are supplied to the reset terminal of each CPU, so that each CPU reliably starts operating.

Then, for example, the detection voltage (voltage at which a voltage drop signal is output) of the power supply monitoring IC 902 as the first power supply monitoring circuit is set to +22 V, and the detection voltage of the reset IC corresponding to the second power supply monitoring circuit is set to +22 V. + 9V. In such a configuration, since the first power supply monitoring circuit and the second power supply monitoring circuit monitor the voltage of the same power supply VSL, the timing at which the first voltage monitoring circuit outputs the voltage drop signal And the timing at which the second voltage monitoring circuit outputs the voltage drop signal can be reliably set to a desired predetermined period. The desired predetermined period is a period from the start of the power supply stop preparation processing in response to the voltage drop signal from the first power supply monitoring circuit until the power supply stop preparation processing is securely completed.

In this example, the first detection condition under which the first power supply monitoring means outputs a detection signal is that the +30 V power supply voltage has dropped to +22 V, and the second power supply monitoring means outputs the detection signal. The second detection condition becomes that the +30 V power supply voltage has dropped to +9 V. However, the voltage value used here is an example, and another value may be used.

{However, although the monitoring range is narrowed, a + 5V power supply voltage can be used as the monitoring voltage of the first voltage monitoring circuit and the second voltage monitoring circuit. Also in that case, the detection voltage of the first voltage monitoring circuit is set higher than the detection voltage of the second voltage monitoring circuit.

While power is not being supplied from the +5 V power supply which is the drive power supply of the CPU 56 of the main board 31 and the payout control board 37 and the payout control CPU 371, at least a part of the RAM is backed up by the backup power supply supplied from the power supply board 910. The contents are preserved even if the power to the gaming machine is turned off. Then, when the +5 V power supply is restored, the reset signal from the reset management circuit 940 becomes high level, so that the CPU 56 and the payout control CPU 371 return to the normal operation state. At that time, since the necessary data is stored in the backup RAM, it is possible to return to the gaming state at the time of the occurrence of the power failure when recovering from a power failure or the like.

FIG. 12 shows a configuration in which a reset signal (low-level signal) is applied twice to the reset terminal of the CPU of each electric component control board when the power is turned on, but the reset signal rises only once. However, in the case of using a CPU whose reset is surely released, the circuit elements indicated by reference numerals 941 to 949 are unnecessary. In that case, the output of the reset IC 651 is directly connected to the buffer circuits 961 to 964 and the delay circuit 960.

In this embodiment, a reset signal is supplied from the power supply board 910 to the CPU of each electric component control board. The delay circuit 960 delays a reset signal for the CPU 56 of the main board 31. Therefore, when the power is turned on, the reset signal to the CPU 56 of the main board 31 rises later than the reset signal to the CPUs of the other electric component control boards. That is, when the power is turned on, the game control means starts up after each electric component control means starts up.

For example, when the CPU 56 of the main board 31 outputs a control command to another electric component control board, the CPU on the other electric component control board has already started up, so that the control command is reliably transmitted to the electric component on the receiving side. It is received by the CPU of the control board.

FIG. 13 is a timing chart showing output signals of the reset IC 651 of the reset management circuit 940 and peripheral ICs. As shown in FIG. 13, the output of the reset IC 651 has a power supply voltage level of a predetermined value (a level at which the normal operation of each CPU can be ensured. In this example, each CPU can operate at +5 V, and therefore, for example, +9 V). Becomes high level when exceeds. When the output of the reset IC 651 becomes high level, the clear state of the counter IC 941 is released, so that the counter IC 941 starts counting the output clock signal of the oscillator 943. The oscillation frequency of the oscillator 943 is, for example, 11.776 MHz.

(4) When the counter IC 941 counts 16 clocks, the Q5 output rises. When 32 clocks are counted, the Q6 output rises to a high level. When the Q6 output of the counter IC 941 rises, the output of the FF 942 goes high. The IC 947 inverts the logical product of the Q6 output of the counter IC 941 and the output of the reset IC 651. The OR circuit 949 obtains the logical sum of the output of the IC 948 for inverting the output of the IC 947 and the output of the FF 942, and outputs a signal as shown in FIG.

The buffer circuits 961 to 964 pass the output of the IC 949 as it is and output it as a reset signal to CPUs other than the CPU 56 of the main board 31. Further, the buffer circuit 965 outputs a signal whose output of the IC 949 is delayed to the CPU 56 of the main board 31 as a reset signal.

Therefore, when the power of the gaming machine is turned on, as shown in FIG. 13 as the outputs IC961 to 964 and the output of IC965, the reset terminals of each CPU are once reset (high level) and then reset again (low level). ) Is supplied. That is, when the power is turned on, a low-level signal for resetting each CPU is generated twice. It can also be said that the high level indicating reset release has occurred twice. As a result, each CPU can be reliably started by the second change from the low level to the high level even if it is not started by the change from the low level to the high level indicating the first reset release. Therefore, when the power of the gaming machine is turned on, the game control is reliably started.

(13) As shown in FIG. 13, the timing at which the reset signal to the main substrate 31 enters the reset release state is later than the timing at which the reset signals to the other substrates enter the reset release state. Therefore, when the CPU 56 of the main board 31 outputs the control command to the other electric component control board, the CPU on the other electric component control board has already started up, so that the control command is reliably transmitted to the electric component on the receiving side. It is received by the CPU of the control board.

Here, the reset management circuit 940 controls the reset release timing given to the main board 31 to be shifted from the reset release timing sent to the plurality of other electrical component control boards. It is also easy to shift the reset release timing given to the component control board. For example, in the circuit configuration shown in FIG. 12, if a delay circuit is provided before the buffer circuits 961 to 964 and a difference is provided between the delay amounts of the respective delay circuits, the delay circuit is provided to the main board 31 and other electric component control boards. A difference can be made between each of the reset release timings. That is, each electric component control means can be started up in a predetermined order.

If each of the electric component control boards is configured to generate a reset signal to be used by itself, it is difficult to adjust the reset release timing of each reset signal. However, in this embodiment, the power supply board 910 Since the reset management circuit 940 in (1) collectively generates the reset signals for the respective substrates, it is possible to easily adjust the startup sequence control.

However, it is also possible to configure so that each of the electric component control boards generates a reset signal used by itself. Then, in each of the electric component control boards, each reset signal generating means is configured such that the reset release timing is a predetermined timing. For example, the respective timings are set so that the reset signal generating means of the main board 31 performs reset release at the latest. In that case, it is not possible to perform the collective management of the reset signal, but the effect that each electric component control board can be started up in a predetermined order is exhibited.

In this embodiment, the start-up management means as illustrated in FIG. 12 is mounted on the power supply board 910, but a start-up management board on which the start-up management means is mounted may be separately provided. However, since the reset signal is generally generated using the rise of the power supply voltage, when the power supply board 910 is used as a start-up management board, there is an advantage that each reset signal can be generated more easily.

Next, the game control operation will be described.
FIG. 14 is a flowchart illustrating a main process executed by the CPU 56 on the main board 31. When the power of the gaming machine is turned on and the reset of the CPU 56 is released, in the main process, the CPU 56 first performs necessary initial settings (step S1).

Then, it is confirmed whether or not data protection processing (for example, power supply stop preparation processing such as addition of parity data) of the backup RAM area has been performed when the power is turned off (step S2). In this embodiment, when an unexpected power interruption occurs, a power supply stop preparation process for protecting data in the backup RAM area is performed. The case where such processing has been performed is referred to as backup. After confirming that there is no backup, the CPU 56 executes an initialization process (steps S2 and S3).

In this embodiment, whether or not there is backup data in the backup RAM area is confirmed by the state of the backup flag set in the backup RAM area when the power is turned off. For example, if "55H" is set in the backup flag area, it means that there is a backup (on state), and if a value other than "55H" is set, it means that there is no backup (off state). “55H” set in the backup flag area is data set when the data protection processing of the backup RAM area is completed in the power supply stop preparation processing, and is a parity code based on the data of the backup RAM area.

If there is backup data in the backup RAM area, the CPU 56 performs data check (for example, parity check) on the backup RAM area (step S4). If the power is restored after an unexpected power failure, the data in the backup RAM area should have been saved, and the check result becomes normal. If the check result is not normal, since the internal state cannot be returned to the state at the time of power-off, an initialization process executed at the time of power-on without power recovery is executed (steps S5 and S3).

If the check result is normal, the CPU 56 performs a game state restoring process for returning the internal state to the state at the time of power off (step S6). For example, when the value of the backup flag is set to “55H” and the check result is normal, the game state restoration processing in step S6 is executed. Then, the saved value of the PC (program counter) stored in the backup RAM area is set in the PC, and the program returns to the address (step S7).

(4) When the execution of the normal initialization process (Step S3) is completed, the main process proceeds to a loop process in which the timer interrupt flag is monitored (Step S9). In the loop, a display random number update process (step S8) is also executed.

In this embodiment, after the presence or absence of backup data is confirmed in step S2, if backup data exists, the backup area is checked in step S4. Conversely, the backup area check result is After it is confirmed that the data is normal, the presence or absence of backup data may be confirmed. Alternatively, whether to execute the power failure recovery process may be determined by confirming whether there is backup data or checking the backup area.

Further, for example, at the time of the parity check (step S4) when determining whether or not to execute the power failure recovery processing, that is, at the time of determining whether or not to restore the gaming state, a special process in the stored RAM data is performed. If it is confirmed that the gaming machine is in a game waiting state (a state in which no symbol is changing, no big hit game is in progress, and there is no start winning prize memory) by a flag or the like or the data of the number of start winning prizes. Alternatively, the initialization process may be performed without performing the game state restoration process.

FIG. 15 is a flowchart showing the game control processing in step S11. In the game control process, first, the CPU 56 inputs the states of the gate sensor 12, the starting port sensor 17, the count sensor 23, and the winning port switches 19a and 24a via the switch circuit 58, and wins the winning port and the winning device. It is determined whether or not there is (switch processing: step S21).

Next, various abnormality diagnosis processes are performed by a self-diagnosis function provided inside the pachinko gaming machine 1, and an alarm is issued if necessary according to the result (error process: step S22).

Next, a process of updating each counter indicating a random number for determination such as a random number for big hit determination used in game control is performed (step S23). The CPU 56 further performs a process of updating a display random number such as a random number for determining the type of the stop symbol (step S24).

FIG. 16 is an explanatory diagram showing each random number. Each random number is used as follows.
(1) Random 1: Determine whether or not to generate a big hit (for big hit determination = for special symbol determination)
(2) Random 2-1 to 2-3: For determining a left-right middle out-of-design (3) Random 3: Determine a combination of symbols at the time of a big hit (for a big hit symbol determination = for a special symbol determination)
(4) Random 4: Determine whether or not to reach at the time of detachment (for reach determination)
(5) Random 5: Determine the fluctuation time at the time of reach (for determining the type of reach)

In addition, random numbers other than the above-mentioned random numbers (1) to (5) are used to enhance the gaming effect.
In step S23, the CPU 56 counts up (adds 1) a counter for generating the jackpot determination random number (1) and the jackpot symbol determination random number (3). That is, these are the random numbers for determination, and the other random numbers are the random numbers for display.

Further, the CPU 56 performs a special symbol process (step S25). In the special symbol process control, a corresponding process is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to a gaming state. Then, the value of the special symbol process flag is updated during each processing according to the gaming state.

{Circle around (5)} Also, a normal symbol process is performed (step S26). In the normal symbol process process, a corresponding process is selected and executed according to a normal symbol process flag for controlling the normal symbol display device 10 using the 7-segment LED in a predetermined order. Then, the value of the normal symbol process flag is updated during each processing according to the gaming state.

Further, the CPU 56 performs a process of setting a control command sent to the payout control board 37 or the like in a predetermined area of the RAM 55 and sending the control command to each electric component control board (command control process: step S27). .

Next, the CPU 56 performs a data output process of outputting information output signals such as jackpot information, start information, and probability variation information supplied to the hall management computer (step S29).

{Circle around (5)} When the predetermined condition is satisfied, the CPU 56 issues a drive command via the solenoid circuit 59 (step S30). The solenoid circuit 59 drives the solenoids 16, 21, 21A in response to the drive command, and brings the variable winning ball device 15 or the opening / closing plate 20 into an open state or a closed state. Alternatively, the route in the special winning opening is switched.

{Circle around (5)} The CPU 56 sets the number of prize balls based on the detection output of the switches 17, 23, 19a, 19b, 24a, 24b for detecting a winning in each winning opening (step S31).

Next, a method of determining a symbol variably displayed on the variable display section 9 based on a winning in the starting winning port 14 will be described with reference to flowcharts of FIGS. FIG. 17 shows a process for determining that the hit ball has won the start winning opening 14, and FIG. 18 shows a process for determining the stop symbol of the variable display of the variable display unit 9. FIG. 19 is a flowchart showing a process for determining whether or not to make a big hit.

When the hit ball wins the starting winning port 14 provided on the game board 6, the starting port sensor 17 is turned on. In the special symbol process process of step S25 of the game control process, as shown in FIG. 17, when the CPU 56 determines that the starting opening sensor 17 has been turned on via the switch circuit 58 (step S41), the starting winning storage number is reduced. It is checked whether the maximum value of 4 has been reached (step S42). If the start winning prize storage number has not reached 4, the starting prize storage number is increased by 1 (step S43), and the value of the big hit determination random number is extracted. Then, it is stored in the random number value storage area corresponding to the value of the number of stored winning prizes (step S44). If the number of stored start winnings has reached 4, the process of increasing the number of stored start winnings is not performed. That is, in this embodiment, the number of hit balls that have won the maximum of four starting winning openings 17 can be stored.

In the special symbol process of step S25, the CPU 56 confirms the value of the number of stored start winnings as shown in FIG. 18 (step S50). If the start winning prize storage number is not 0, the value stored in the random number value storage area corresponding to the start prize storing number = 1 is read out (step S51), the value of the start winning prize storage number is reduced by 1, and The value of the random number value storage area is shifted (step S52). That is, the value stored in the random number value storage area corresponding to the number of start winning prizes = n (n = 2, 3, 4) is stored in the random number value storage area corresponding to the number of start prize memories = n-1. .

{Circle around (5)} Then, the CPU 56 determines the hit / miss based on the value read in step S51, that is, the value of the extracted random number for big hit determination (step S53). Here, the big hit determination random number takes a value in the range of 0 to 299. As shown in FIG. 19, when the probability is low, for example, if the value is “3”, “big hit” is determined, and if the value is any other value, “missing” is determined. At the time of a high probability, for example, if the value is any one of “3”, “7”, “79”, “103”, and “107”, it is determined as “big hit”, and if the value is any other value, “ Mistake ".

と き に は If it is determined to be a big hit, a big hit symbol determining random number (random 3) is extracted and a big hit symbol is determined according to the value (step S54). The reach type determining random number (random 5) is extracted, and the reach type is determined based on the extracted random number (step S57).

If it is determined that is out, the CPU 56 determines whether or not to reach (step S58). For example, when the value of the random number 4 which is a random number for reach determination is any one of “105” to “1530”, it is determined not to reach. Then, when the value of the reach determination random number is any of “0” to “104”, it is determined that the reach is set. When determining to reach, the CPU 56 determines a reach symbol.

In this embodiment, the left and right symbols are determined according to the value of the random 2-1 (step S59). Also, the middle symbol is determined according to the value of the random 2-2 (step S60). That is, one of the symbols corresponding to the values of 0 to 15 of the values of the random 2-1 and the random 2-2 is determined as the stop symbol. Here, if the determined middle symbol matches the left and right symbols, the symbol corresponding to the value obtained by adding 1 to the value of the random number corresponding to the middle symbol is set as the fixed symbol of the middle symbol so that it does not match the big hit symbol. I do.

{Circle around (5)} The CPU 56 further extracts a reach type determining random number (random 5) and determines a reach type based on the value (step S57).

場合 If it is determined in step S58 not to reach, the left and right middle symbols are determined according to the values of random 2-1 to 2-3 (step S61). As will be described later, in the present embodiment, in the high probability state, a variation pattern in which the variation time is shortened is used as the variation pattern at the time of disconnection. Therefore, in the high probability state, the CPU 56 determines whether to use the normal fluctuation pattern or the shortened fluctuation pattern using, for example, a predetermined random number.

As described above, it is determined whether the display mode of the symbol change based on the winning start is a jackpot, a reach mode, or a loss, and the combination of the respective stopped symbols is determined.

The reach type determined in step S57 indicates the variable display period of the symbol at the time of the reach. As will be described in detail later, in this embodiment, at the time of the reach, any of the variable display periods of 19.5 seconds, 24.5 seconds and 29.5 seconds is used. Therefore, in step S57, one of the three types of periods is determined according to the value of the extracted random number 5. Then, the display control means determines one to be used from a plurality of reach types prepared for each of the variable display times. That is, in the game control means, a rough reach type is determined.

Further, in the high probability state, the probability of the next big hit increases, the time until the variable display of the ordinary symbol display 10 is determined by the 7-segment LED is shortened, and the variable display result of the ordinary symbol display 10 is reduced. The pachinko gaming machine 1 may be configured so as to increase the number of times and the opening time of the variable winning ball device 15 at the time of hitting, or the probability of hitting based on the variable display result of the ordinary symbol display device 10 is high. It may be constituted so that it may become. Further, the present invention is also applicable to the pachinko gaming machine 1 in which only one or a plurality of these states occur.

For example, when the combination of symbols stopped in the variable display unit 9 becomes a specific symbol, the probability of a big hit does not increase, but the number of times the variable winning ball device 15 is opened at the time of hitting based on the variable display result of the ordinary symbol display 10. Also, in the gaming machine in which the opening time is increased, if it is determined that the reach is to be made, it is determined whether or not the left and right stopped symbols match the display mode of the specific symbol, that is, which symbol is to be used to generate the reach state. The present invention is also applicable to gaming machines determined by means such as random numbers.
The range of the random numbers and the random number values used in this embodiment is an example, and any random numbers may be used, and the range setting is arbitrary.

FIG. 20 is a flowchart showing an example of a special symbol process program executed by the CPU 56. The special symbol process process shown in FIG. 20 is a specific process of step S25 in the flowchart of FIG. When performing the special symbol process processing, the CPU 56 performs any one of steps S300 to S309 according to the internal state after performing the fluctuation shortening timer subtraction processing (step S310). The fluctuation shortening timer is a timer for setting the fluctuation time when the fluctuation time of the special symbol is shortened.

Special symbol change waiting processing (step S300): The starting winning opening 14 (the winning opening of the variable winning ball device 15 in this embodiment) is hit by a hit ball and the starting opening sensor 17 is turned on. When the starting port sensor 17 is turned on, if the number of stored start winnings is not full, the number of stored start winnings is incremented by one and a random number for determining a jackpot is extracted. That is, the processing shown in FIG. 17 is executed.

Special symbol determination processing (step S301): When the variable display of the special symbol can be started, the number of start winning prizes is confirmed. If the number of start winning prizes is not 0, it is determined whether to make a jackpot or not according to the value of the extracted jackpot determination random number. That is, the first half of the process shown in FIG. 18 is executed.

Stop symbol setting process (step S302): A stop symbol for the left and right middle symbols is determined. That is, the middle half of the processing shown in FIG. 18 is executed.

(4) Reach operation setting process (step S303): It is determined whether or not the reach operation is performed according to the value of the reach determination random number, and the fluctuation period during the reach is determined according to the value of the reach type determination random number. That is, the latter half of the process shown in FIG. 18 is executed.

All symbol variation start processing (step S304): Control is performed such that all symbols are started to vary in the variable display section 9. At this time, the right and left final stop symbols and information instructing the variation mode are transmitted to the symbol control board 80. Upon completion of the processing, the internal state (process flag) is updated so as to shift to step S305.

All symbol stop waiting process (step S305): When a predetermined time (time indicated by the variation reduction timer in step S310) has elapsed, control is performed so that all symbols displayed on the variable display unit 9 are stopped. If the stopped symbol is a combination of big hit symbols, the internal state (process flag) is updated so as to shift to step S306. If not, the internal state is updated to shift to step S300.

Special winning opening opening process (step S306): Control for opening the special winning opening is started. Specifically, the counter and the flag are initialized, and the solenoid 21 is driven to open the special winning opening. Also, a big hit flag (a flag indicating that a big hit is being made) is set. Upon completion of the process, the internal state (process flag) is updated so as to shift to step S307.

(5) Opening process of the special winning opening (step S307): Control to send display control command data of the special winning opening round display to the symbol control board 80, processing for confirming establishment of the closing condition of the special winning opening, and the like are performed. When the final closing condition of the special winning opening is satisfied, the internal state is updated to shift to step S308.

Specific area effective time processing (step S308): The presence or absence of the passage of the V count switch 22 is monitored to confirm whether the big hit game state continuation condition is satisfied. If the condition of the big hit game state continuation is satisfied and there are still remaining rounds, the internal state is updated to shift to step S306. If the big hit game state continuation condition is not satisfied within the predetermined effective time, or if all rounds have been completed, the internal state is updated to shift to step S309.

Big hit end processing (step S309): A display for notifying the player that the big hit gaming state has ended is performed. When the display is completed, the internal state is updated so as to shift to step S300.

Next, transmission of a control command from the main board 31 to another electrical component control board will be described. FIG. 21 is an explanatory diagram showing an example of a command form of a control command sent from the main board 31 to each electric component control board. In this embodiment, the control command has a 2-byte configuration, the first byte represents MODE (classification of command), and the second byte represents EXT (type of command). The first bit (bit 7) of MODE data is always "1", and the first bit (bit 7) of EXT data is always "0". The command form shown in FIG. 21 is an example, and another command form may be used. In this example, the control command is composed of two control signals. However, the number of control signals constituting the control command may be one, or three or more. .

FIG. 22 is a timing chart showing the relationship between an 8-bit control signal constituting a control command for each electric component control board and an INT signal (strobe signal). As shown in FIG. 21, when a predetermined period elapses after the MODE or EXT data is output to the output port, the CPU 56 turns on an INT signal which is a signal indicating data output. When a predetermined period elapses therefrom, the INT signal is turned off.

FIG. 23 is an explanatory diagram showing an example of the content of a payout control command sent to the payout control board 37 of the electric component control board. In the example shown in FIG. 23, a command FF00 (H) of MODE = FF (H) and EXT = 00 (H) is a payout control command for specifying a payable state. The command FF01 (H) of MODE = FF (H) and EXT = 01 (H) is a payout control command for specifying a payout stop state. The command F0XX (H) of MODE = F0 (H) is a payout control command for specifying the number of winning balls. “XX” which is EXT indicates the number of payouts.

The payout control means stops the prize ball payout and the ball lending when receiving the FF01 (H) payout control command from the game control means of the main board 31, and when receiving the FF00 (H) payout control command, receives the prize ball payout. And the ball can be lent. Further, when a payout control command specifying the number of winning balls is received, award ball payout control according to the number specified by the received command is performed.

FIG. 24 is an explanatory diagram showing an example of the content of a display control command sent to the symbol control board 80 of the electric component control board. In the example shown in FIG. 24, commands 8000 (H) to 8022 (H) and 8100 (H) to 8122 (H) are display controls for designating a special symbol variation pattern in the variable display unit 9 for variably displaying a special symbol. Command. Note that the command for designating the variation pattern also serves as the variation start instruction. Also, in the example shown in FIG. 24, 70 types of variation pattern designations are possible, but only a part of those variation pattern designations may be used.

The command 88XX (X = arbitrary value of 4 bits) is a display control command relating to the variation pattern of the ordinary symbol variably displayed on the ordinary symbol display 10. The command 89XX is a display control command for designating a stop symbol of an ordinary symbol. Command 8AXX (X = arbitrary value of 4 bits) is a display control command for instructing to stop variable display of a normal symbol.

The commands 91XX, 92XX, and 93XX are display control commands for designating a left-middle-right stop symbol of a special symbol. The command A0XX is a display control command for instructing to stop the variable display of the special symbol. The command BXXX is a display control command sent from the start of the big hit game to the end of the big hit game. Then, the commands C000 to EXXXX are display control commands relating to the display state of the variable display unit 9 irrespective of the fluctuation of special symbols and the jackpot game. Upon receiving the above-described display control command from the game control means of the main board 31, the display control means of the symbol control board 80 changes the display state of the variable display unit 9 and the ordinary symbol display 10 according to the contents shown in FIG. change.

FIG. 25 is an explanatory diagram showing an example of the content of a lamp control command sent to the lamp control board 35 of the electric component control board. The lamp control command also has a 2-byte configuration of MODE and EXT. In the example shown in FIG. 25, commands 8000 (H) to 8022 (H) and 8100 (H) to 8122 (H) designate a lamp / LED display control pattern corresponding to a special symbol variation pattern on the variable display unit 9. This is a lamp control command to be performed. The command A0XX (X = arbitrary value of 4 bits) is a lamp control command for instructing a lamp / LED display control pattern when variable display of a special symbol is stopped. The command BXXX is a lamp control command instructing a lamp / LED display control pattern from the start of the big hit game to the end of the big hit game. The command C000 is a lamp control command for instructing a lamp / LED display control pattern during a customer waiting demonstration.

コ マ ン ド Note that the commands 8XXX, AXXX, BXXX, and CXXX are ramp control commands sent from the game control means in accordance with the progress of the game. Upon receiving the above-described lamp control command from the game control means on the main board 31, the lamp control means changes the display state of the lamp / LED according to the contents shown in FIG.

The command E0XX is a lamp control command indicating the number of lighting of the start storage display 18. For example, the lamp control means turns on the number of indicators designated by “XX” in the start storage indicator 18. The command E1XX is a lamp control command indicating the number of lighting of the gate passage storage display 41. For example, the lamp control means turns on the number of displays designated by “XX” in the gate passage storage display 41. That is, these commands are commands for instructing control of the light-emitting bodies provided for notifying the information of the number of reserved units. In addition, the command regarding the lighting number of the start storage display 18 and the gate passage storage display 41 may be configured to indicate the increase or decrease of the lighting number.

The commands E200 and E201 are lamp control commands relating to the display state of the award ball lamp 51, and the commands E300 and E301 are lamp control commands relating to the display state of the ball out lamp 52. Upon receiving the lamp control command of “E201” from the game control means of the main board 31, the lamp control means changes the display state of the prize ball lamp 51 to a predetermined display state in which there is a prize ball remaining, and sets the display state of “E200”. When the lamp control command is received, the display state of the prize ball lamp 51 is set to a predetermined display state where there is no prize ball remaining.

When the lamp control command of “E300” is received from the game control means of the main board 31, the display state of the out-of-ball lamp 52 is changed to the display state in which there is a ball, and when the “E301” lamp control command is received, the out-of-ball lamp 52 Is set to the display state in which the ball is out. That is, the commands E200 and E201 are commands indicating that a light emitting body provided for notifying a player or the like that there is a game ball of a non-winning ball is controlled, and the commands E300 and E301 are replenishing balls. Is a command indicating that a light emitting body provided for notifying a player or a game clerk that the light is out is controlled.

The command E400 is issued when the power of the gaming machine is turned on or from a specific gaming state (high-probability state or time-saving state, in this example, high-probability state) to a normal state (low-probability state or non-time-saving state, in this example, low-probability state). This is a lamp control command for instructing a lamp / LED display control pattern at the time of transition. The command E401 is a lamp / LED display when a transition is made from a normal state (low probability state or non-time saving state, low probability state in this example) to a specific game state (high probability state or time saving state, high probability state in this example). This is a lamp control command for instructing a control pattern.

The Ｅ command E402 is a lamp control command for instructing a lamp / LED display control pattern when an error that has occurred during the big hit game is released. The command E403 is a lamp control command for instructing a lamp / LED display control pattern when an error occurs in the count switch 23. That is, those commands are commands instructing that the gaming state is notified by the light emitting body.

In this embodiment, when the lamp control means receives a command instructing to notify the gaming state, it uses a part or all of the decoration lamp 25, the gaming effect LED 28a, and the gaming effect lamps 28b, 28c, Lighting / extinguishing control for notifying a gaming state is performed. The decorative lamp 25, the game effect LED 28a, and the game effect lamps 28b and 28c may each be configured by a group of a plurality of light emitters. In this case, the decorative lamp 25, the game effect LED 28a, the game effect lamp 28b, Informing the gaming state by using a part of the lamp 28c also means that, for example, a part of a plurality of light emitters constituting the decorative lamp 25 may be used.

FIG. 26 is an explanatory diagram showing an example of the content of a voice control command sent to the voice control board 70 of the electrical component control board. The voice control command also has a 2-byte configuration of MODE and EXT. In the example shown in FIG. 26, the command 8XXX (X = arbitrary value of 4 bits) is a voice control command for designating a sound generation pattern during the fluctuation period of the special symbol. The command BXXX (X = arbitrary value of 4 bits) is a voice control command for designating a sound generation pattern from the start of the big hit game to the end of the big hit game. Other commands are voice control commands that are not related to special symbol fluctuations and big hit games. When receiving the above-mentioned voice control command from the game control means of the main board 31, the voice control means of the voice control board 70 changes the voice output state according to the contents shown in FIG.

As shown in FIGS. 23 to 26, the symbol control command, the voice control command, the lamp control command, and the payout control command all include a MODE part and an EXT part. That is, the form of the voice control command and the form of the lamp control command are common. Further, the form of the voice control command and the payout control command are common. The forms of the ramp control command and the payout control command are also common. The form of the symbol control command and the voice control command are common. Also, the form of the symbol control command and the lamp control command are common. The form of the symbol control command and the payout control command is also common.

(4) Since the form of each command sent from the game control means is common, in the program executed by the CPU 56 of the game control means, it is possible to easily commonize the creation part and the output part of each command. As a result, the module relating to the transmission of the command of the game control program is simplified, the program maintenance is facilitated, and the program can be easily transferred to other models.

Further, as shown in FIGS. 24 to 26, one effect control content transmitted to the electric component control means (display control means, lamp control means, and voice control means in this example) related to the game effect has two effects. These electric component control means can specify the type of control content by one of the control signals (MODE byte), and can be controlled by another control signal (EXT byte). Detailed control contents can be specified.

(4) When a control command is to be output from the game control means to each electric component control board, a command transmission table is set. FIG. 27A is an explanatory diagram illustrating a configuration example of the command transmission table. One command transmission table is composed of three bytes, and INT data is set in the first byte. In the command data 1 of the second byte, MODE data of the first byte of the control command is set. Then, in the command data 2 of the third byte, EXT data of the second byte of the control command is set.

Note that the EXT data itself may be set in the command data 2 area, but the command data 2 may be set with data for specifying the address of a table in which the EXT data is stored. . In this embodiment, if the bit 7 (work area reference bit) of the command data 2 is 0, it indicates that the EXT data itself is set in the command data 2. Such EXT data is data in which bit 7 is 0. If the work area reference bit is 1, it indicates that the other 7 bits are offsets for specifying the address of the table in which the EXT data is stored.

で は In this embodiment, a plurality of command transmission tables are prepared, and the command transmission table to be used is designated by a pointer. Also, a plurality of command transmission tables are used as a ring buffer. Therefore, the CPU 56 sets the INT data, the command data 1 and the command data 2 in the command transmission table pointed to by the write pointer in the winning ball signal processing, for example. Then, the value of the write pointer is updated. Since one command transmission table has a 3-byte configuration, specifically, the write pointer value is incremented by +3.

FIG. 27 (B) is an explanatory diagram showing one configuration example of INT data. Bit 0 in the INT data indicates whether a payout control command should be sent to the payout control board 37 or not. If bit 0 is "1", it indicates that a payout control command should be sent. Therefore, the CPU 56 sets “01 (H)” in the INT data in the winning ball signal processing, for example.

Bits 1, 2, and 3 of the INT data are bits indicating whether or not to transmit a display control command, a lamp control command, and a voice control command, respectively, and the CPU 56 has a timing to transmit those commands. Then, the INT data, the command data 1 and the command data 2 are set in the command transmission table pointed to by the pointer by a special symbol process or the like. When these commands are transmitted, the corresponding bit of the INT data is set to “1”, and MODE data and EXT data are set in the command data 1 and the command data 2.

FIG. 28 is a flowchart showing an example of a command control process (step S27) in the game control process shown in FIG. The command control process is a process including a command output process and an INT signal output process. In the command control process, the CPU 56 first saves the address of the command transmission table (contents of the read pointer) on a stack or the like (step S231). Then, the INT data of the command transmission table pointed to by the read pointer is loaded into the argument 1 (step S232). Argument 1 is input information for a command transmission process described later. Further, the address indicating the command transmission table is incremented by 1 (step S233). Therefore, the address indicating the command transmission table matches the address of the command data 1.

Then, the CPU 56 reads the command data 1 and sets it as the argument 2 (step S234). The argument 2 also becomes input information for a command transmission process described later. Then, a command transmission processing routine is called (step S235).

FIG. 29 is a flowchart showing a command transmission routine. In the command transmission routine, the CPU 56 first sets the data set in the argument 1, that is, the INT data, in the work area determined as the comparison value (step S <b> 251). Next, the number of transmissions = 4 is set in the work area determined as the number of processes (step S252). Then, the address of the port 1 for outputting the payout control signal is set to the IO address (step S253). In this embodiment, the address of port 1 is the address of output port 571 (see FIG. 10).

Next, the CPU 56 shifts the comparison value one bit to the right (step S254). It is determined whether the carry bit has become 1 as a result of the shift processing (step S255). The fact that the carry bit has become 1 means that the rightmost bit in the INT data was “1”. In this embodiment, the shift processing is performed four times. For example, when it is specified that the payout control command should be transmitted, the carry bit becomes 1 in the first shift processing.

If the carry bit becomes 1, the data set in the argument 2, in this case, the command data 1 (that is, MODE data) is output to the address set as the IO address (step S256). When the first shift processing is performed, since the address of the port 1 is set in the IO address, the MODE data of the payout control command is eventually output to the port 1 (output port 571).

Next, the CPU 56 adds 1 to the IO address (step S257) and subtracts 1 from the number of processes (step S258). If the port 1 is indicated before the addition, the IO address is set to the address of the port 2 by the addition processing for the IO address. The port 2 is an output port 572 in this embodiment (see FIG. 7), and is a port for outputting a display control command. Then, the CPU 56 checks the value of the number of processes (step S259), and returns to step S254 if the value is not 0. The shift process is performed again in step S254.

で は In the second shift processing, the value of bit 1 in the INT data is pushed out, and the carry flag becomes “1” or “0” according to the value of bit 1. Therefore, it is checked whether or not it is specified that the display control command should be sent. Similarly, in the third and fourth shift processes, it is checked whether it is specified that the ramp control command and the voice control command should be transmitted. As described above, when each shift process is performed, the IO address corresponding to the command (payout control command, display control command, lamp control command, voice control command) set by the shift process is set in the IO address. Have been.

Therefore, when the carry flag becomes "1", a control command is sent to the corresponding output port (port 1 to port 4). That is, one common module can perform a process of transmitting a control command to each electric component control unit. In this embodiment, the addresses of ports 3 and 4 are the addresses of output ports 573 and 574 (see FIGS. 8 and 9).

In this way, since it is determined which control control unit should output the control command only by the shift process, the process of determining which control control unit should output the control command is simplified. Has been

Next, the CPU 56 reads the contents of the argument 1 storing the INT data before the start of the shift processing (step S260), and outputs the read data to the port 0 (step S261). In this embodiment, the address of port 0 is the address of output port 570 (see FIGS. 7 to 10). In the INT data, the bit corresponding to the output bit of the INT signal corresponding to the control command (dispensing control command, display control command, lamp control command, voice control command) output in the processing of steps S251 to S259 becomes “1”. Has become. Therefore, the INT signal corresponding to the control command (payout control command, display control command, lamp control command, voice control command) output to any of the ports 1 to 4 is turned on.

Next, the CPU 56 sets a predetermined value in the weight counter (Step S262), and decrements by one until the value becomes 0 (Steps S263, S264). This process is a process for setting the ON period of the INT signal (control signal INT) shown in the timing chart of FIG. When the value of the wait counter becomes 0, clear data (00) is set (step S265), and the data is output to port 0 (step S266). Therefore, the INT signal is turned off. Then, a predetermined value is set in the weight counter (step S262), and the value is decremented by 1 until the value becomes 0 (steps S268, S269). This process is a process for setting a period from the fall of the first INT signal to the start of EXT data output.

Therefore, the value set in the wait counter in step S267 is such that the period from the fall of the first INT signal to the start of the EXT data output ensures that all of the electric component control means which are the control command reception targets receive the command. The value is such that the period is sufficient to perform the processing. The value set in the weight counter is a value such that the period is longer than the time required for the processing in steps S251 to S259.

As described above, the MODE data of the first byte of the control command is transmitted. Therefore, the CPU 56 adds 1 to the value indicating the command transmission table in step S236 shown in FIG. Therefore, the area of the command data 2 in the third byte is specified. The CPU 56 loads the content of the indicated command data 2 into the argument 2 (step S237). Further, it is determined whether the value of bit 7 (work area reference bit) of the command data 2 is “0” (step S239). If it is not 0, the start address of the command extension data address table is set in the pointer (step S239), and the address is calculated by adding the values of bits 6 to 0 of the command data 2 to the pointer (step S240). Then, the data of the area indicated by the address is loaded into the argument 2 (step S241).

The EXT data that can be transmitted to the electric component control means is sequentially set in the command extension data address table. Therefore, if the value of the work area reference bit is “1” by the above processing, the EXT data in the command extension data address table corresponding to the content of the command data 2 is loaded into the argument 2 and the work area reference bit If the value is “0”, the contents of the command data 2 are directly loaded into the argument 2. Even when EXT data is read from the command extension data address table, bit 7 of that data is “0”.

Next, the CPU 56 calls a command transmission routine (step S242). Therefore, the EXT data is transmitted at the same timing as the transmission of the MODE data. Thereafter, the CPU 56 restores the address of the command transmission table (step S243), and updates the value of the read pointer pointing to the command transmission table (step S244). Since one command transmission table has a 3-byte configuration, specifically, the value of the read pointer is +3.

As described above, the command control processing module, which is one control signal output module, converts each control command (dispensing control command, display control command, lamp control command, sound control command) of the 2-byte configuration to the corresponding electric component. Sent to the control means. The electric component control means starts the control command fetching process when detecting the falling of the INT signal as the fetch signal. However, in any of the electric component control means, the game control means is provided before the fetching process is completed. Is not output to the signal line. That is, a reliable command receiving process is performed in each electric component control unit. In addition, each electric component control unit may start the process of capturing the control command at the rise of the INT signal. Further, the polarity of the INT signal may be reversed from that shown in FIG.

Further, in this embodiment, a plurality of command transmission tables are used as a ring buffer, and in the command control process shown in FIG. 28, command output control is performed on the command transmission table pointed to by the read pointer, and command transmission is performed. In the process of setting data in the table, for example, in the winning ball signal process in the game control process, the command setting process is performed on the command transmission table indicated by the write pointer. Therefore, even if a plurality of command transmission requests occur at the same time, the command output processing based on those requests is executed without any problem.

Next, the variation of the symbol will be described using a specific example.
FIG. 30 is an explanatory diagram illustrating an example of a left and right middle symbol. As shown in FIG. 30, in this embodiment, the respective symbols displayed as left and right middle symbols are the same 12 symbols in the left and right. When the symbol of symbol number 12 is displayed, next, the symbol of symbol number 1 is displayed. Then, when the left and right middle symbols stop together at, for example, "one", "three", "five", "seven", "nine" or "clogs", a high probability state is set. That is, they become probable symbols.

FIG. 31 is an explanatory diagram showing an example of a background pattern displayed on the variable display section 9 used in this embodiment. In this example, (A) dojo, (B) flash, (C) aura, and (D) smoke background are used. Further, the display shown in FIG. 31E shows an example of a demonstration screen displayed during a non-game of the gaming machine or the like.

FIGS. 32 and 33 are explanatory diagrams showing examples of characters displayed on the variable display section 9 used in this embodiment. In this example, (A) character A, (B) character B, and (C) character C are used. The character A is also used as a character for reach announcement. In this embodiment, there are a plurality of reach announcement modes. For example, when the character A is displayed so as to shine (reach announcement 1), or when the character A is announced in a balloon (reach announcement 2), the reach announcement Has been done. Further, the character A is also used as a character for establishing a reach, and when a predetermined condition is established, a display control in which the foot of the character A is displayed so as to kick the right symbol and the left and right symbols stop at the same symbol is performed. Done.

Further, during the reach operation, the characters A, B, and C are displayed so as to give a jackpot notice by a balloon. In this embodiment, there are a plurality of jackpot notices (jackpot notices 1 and 2), and the jackpot notice 1 is used alone. However, the jackpot notice 2 is a predetermined time after the jackpot notice 1 is displayed. Is displayed when elapses.

In this embodiment, two modes are used as the reach announcement and the jackpot announcement, respectively, but more types may be used. Further, in this embodiment, a notice is given by a balloon of a character, but the form of the notice may be any form as long as the player can recognize that the notice is given. For example, the movement of the character different from the normal or the variation of the pattern different from the normal may be used. Furthermore, a notice used when a jackpot is likely to occur in the probability-change design may be used as the probability-change jackpot notice. In addition, a notice with a high probability of a big hit may be divided into a notice with a low probability of a big hit, and a notice with a lower probability may be defined as a reach notice.

表示 Upon receiving the display control command from the main board 31, the display control CPU 101 in the symbol control board 80 performs control to move and display a predetermined background or character on the screen in each variation pattern. The background and the character are switched at a predetermined timing, and the display control CPU 101 also independently controls the background and the character.

FIGS. 34 to 37 are explanatory diagrams showing examples of display control commands transmitted from the main board 31 to the symbol control board 80 used in this embodiment. As described above, one display control command is composed of two bytes (MODE, EXT).

FIG. 34 is an explanatory diagram showing a display control command capable of specifying a variable display period of a symbol and a display control command instructing stop of all symbols. As shown in FIG. 34, in this example, as the display control commands that can specify the variable display period, “outside”, “variation of all symbols at the time of probable change”, “reach short period”, “reach middle period”, and “reach length” There is a period. In this embodiment, only some of the many fluctuation pattern designations shown in FIG. 24 are used.

FIG. 35 shows a display control command indicating a stop symbol of the left symbol. As shown in FIG. 35, a stop symbol is designated by a display control command composed of 2-byte control data MODE and EXT. In these designations, the value of the control data CMD1 in the first byte is “91 (H)”.

FIG. 36 shows a display control command indicating a stopped symbol of a medium symbol. As shown in FIG. 36, a stop symbol is specified by a display control command composed of 2-byte control data MODE and EXT. In these designations, the value of the control data CMD1 in the first byte is “92 (H)”.

FIG. 37 shows a display control command indicating a stop symbol of the right symbol. As shown in FIG. 37, a stop symbol is designated by a display control command composed of 2-byte control data MODE and EXT. In these designations, the value of the control data CMD1 in the first byte is “93 (H)”.

Hereinafter, an example of a symbol variation pattern will be described with reference to FIGS. FIG. 38 is an explanatory diagram illustrating an example of a pattern (variation state) that forms each variation pattern. FIG. 39 is a timing chart showing an example of the change of the symbol at the time of the out of reach. FIGS. 40 to 43 are timing charts showing an example of the fluctuation of the symbols at the time of the reach (the case of the big hit and the case of not making the big hit).

In this embodiment, at the time of a loss, as shown in FIG. 39 (A), in the “left” symbol display area of the variable display section 9, first, the symbol is changed according to the pattern a. The pattern a is a pattern in which the fluctuation speed increases little by little as shown in FIG. After that, the pattern b is fluctuated at a constant speed, and the pattern three symbols before the stop symbol is controlled to be displayed, and then the pattern c is fluctuated according to the pattern c. As shown in FIG. 38, the pattern c is a pattern that is gradually delayed and stops.

Further, in the “right” symbol display area of the variable display section 9, symbols are changed according to the pattern a. Then, after the constant speed fluctuation, the symbol is controlled so that the symbol three symbols before the stopped symbol is displayed, and then the symbol is varied according to the pattern c. Also in the "medium" symbol display area, symbols are first changed in accordance with the pattern a. Then, after the constant speed fluctuation, the symbol is controlled so that the symbol three symbols before the stopped symbol is displayed, and then the symbol is varied according to the pattern c.

The display control CPU 101 of the symbol control board 80 repeatedly fluctuates the left and right symbols in the direction opposite to the normal direction until the middle symbol is determined. That is, display control of the left and right symbols is performed in a so-called swing fluctuation state. The swing fluctuation means that the symbol is displayed swinging up and down. Further, the swing fluctuation is performed until the final stop symbol (fixed symbol) is displayed. Then, when a display control command instructing stop of all the symbols is received from the main board 31, the swing fluctuation state of the left and right symbols is ended, and the left and right symbols are fixed so as not to move. Note that the medium symbol may also perform a swinging operation after the fluctuation due to the pattern c, and then may be set to the final state. Further, the swing fluctuation may be a mode in which the symbol is swung right and left, instead of the mode in which the symbol is swung up and down.

While the design is changing, the display control CPU 101 controls the display so that “Dojo” (see FIG. 31) is displayed as the background, and displays the character A (see FIG. 32) on the screen. The display control is performed so that the character A moves appropriately. Specifically, the VDP 103 is notified of the background and the character. Then, the VDP 103 creates image data of the instructed background. Further, image data of the designated character is created and combined with the background image. Further, the VDP 103 combines the left and right middle pattern image data with the combined image. The VDP 103 also performs display control for moving the character and display control for changing the design. That is, the shape and display position of the character are changed according to a predetermined exercise pattern. Further, the symbol display position is changed according to the fluctuation speed notified from the display control CPU 101.

In addition, the display control CPU 101 controls the display of the symbol three symbols before the stop symbol at a predetermined timing in the symbol display area in the left and right so that the symbol change stops at the specified stop symbol. At the start of the change, the left and right stop symbols are notified, and the change pattern at the time of the loss is determined in advance, so the display control CPU 101 switches the pattern a from the pattern a to the pattern b and switches the pattern b from the pattern b to the pattern c. The switching timing can be recognized, and a symbol three symbols before to be replaced can be determined. The determined replacement symbol is notified to the VDP 103, and the VDP 103 displays the notified symbol regardless of the symbol displayed at that time.

FIG. 39 (B) shows an example of a fluctuation pattern at the time of a loss in the probability fluctuation state. In this variation pattern, as shown in the figure, the left and right middle symbols are simultaneously stopped after the left and right middle symbols are changed according to the pattern a, the pattern b, and the pattern c. Also when this variation pattern is used, the display control CPU 101 controls the display so that “Dojo” (see FIG. 31) is displayed as the background, and displays the character A (see FIG. 32) on the screen. The display control is performed so that the character A moves appropriately.

That is, in this embodiment, when the display control CPU 101 receives a display control command designating “out” from the game control means, that is, the CPU 56 of the main board 31, the display control CPU 101 returns to FIG. 39 (A) or (B). It is determined that the left and right middle symbols are variably displayed using the indicated variation pattern, that the character A appears, and that the "dojo" background screen is used.

FIG. 40 shows an example of a fluctuation pattern displayed when 19.5 seconds (reach short period) is notified from the main board 31 as a fluctuation time. Upon being notified of the reach short period, the display control CPU 101 uniquely determines which of the plurality of 19.5 second variation patterns is to be used. FIG. 40 illustrates three patterns (A) to (C) as a plurality of variation patterns.
Alternatively, the CPU 56 of the main board 31 may determine the reach type and send a command indicating a variation pattern according to the determined reach type.

In the variation pattern shown in FIG. 40A, the middle symbol of the pattern d is changed after the left and right symbols have stopped. Note that the display control CPU 101 swings the left and right symbols when the left and right symbols are stopped while the middle symbol is changing. Pattern d is a pattern in which the fluctuation speed gradually decreases and thereafter changes at a constant speed. Then, the reach operation is started, and the middle symbol is changed according to the pattern b and the pattern c. When a display control command instructing stop of all the symbols is received from the main board 31, the swing fluctuation state of the left and right symbols is ended, and the left and right symbols are fixed so that the middle symbols do not move.

{Circle around (1)} The display control CPU 101 performs symbol replacement (symbol skip control) before the start of the reach operation so that the symbol is determined by the stop symbol notified from the main board 31. Since the variation pattern is determined in advance, the display control CPU 101 can recognize the switching timing from the pattern d to the pattern b and the switching timing from the pattern b to the pattern c, and the symbol three symbols before to be replaced. Can also be determined. The background and the type of the character do not change during the change of the middle symbol.

In the variation pattern shown in FIG. 40 (B), the middle symbol of the pattern d is changed after the left and right symbols have stopped. Then, the reach operation is started, and the variation of the middle symbol is performed according to the pattern a and the pattern c. When a display control command instructing stop of all the symbols is received from the main board 31, the swing fluctuation state of the left and right symbols is ended, and the left and right symbols are fixed so that the middle symbols do not move. Further, the display control CPU 101 replaces the symbols before the start of the reach operation so that the symbols are determined by the stop symbols notified from the main board 31. In the variation pattern shown in FIG. 40B, when the right symbol is stopped, the display control CPU 101 performs display control so that the character A kicks the right symbol (see FIG. 32). Therefore, the player feels as if the reach has been established by the character A kicking the right symbol.

変 動 In the variation pattern shown in FIG. 40 (C), after the left and right symbols have stopped, the variation of the middle symbol of pattern d is performed. Then, the reach operation is started, and the fluctuation of the middle symbol is performed according to the pattern b, the pattern c and the pattern h. The pattern h is a pattern in which 0.9 symbols reversely fluctuate and 0.9 symbols sequentially fluctuate after a pause. When a display control command instructing stop of all the symbols is received from the main board 31, the swing fluctuation state of the left and right symbols is ended, and the left and right symbols are fixed so that the middle symbols do not move.

(4) The display control CPU 101 replaces the symbols before the reach operation starts so that the symbols are determined by the stopped symbols notified from the main board 31. In the variation pattern shown in FIG. 40C, when the right symbol stops, the display control CPU 101 switches the background image to “aura” (see FIG. 31) and changes the character appearing on the screen to the character B ( (See FIG. 33).

As described above, in this embodiment, when the display control CPU 101 receives the display control command designating the “reach short period” from the CPU 56 of the main board 31, the display control CPU 101 shown in FIGS. Is determined to use any of the variation patterns shown in FIG.

When it is determined to use the variation pattern of (A) or (B), when the left and right symbols stop and reach a state, the determination is made to continue to use the background screen of the character A and the “dojo”. I do. When it is determined to use the variation pattern of (C), it is determined to switch to the background screen of the character B and the “aura” in the reach state.

Note that the display control CPU 101 also swings the left and right symbols up and down until the middle symbol is determined, even in the variation pattern with a variation time of 19.5 seconds shown in FIGS. 40 (A) to (C). The symbol replacement control for the middle symbol is executed at the timing when the right symbol stops. The display control CPU 101 determines the middle stop symbol notified from the main board 31 at the start of the fluctuation and the number of fluctuations of the symbol during the reach fluctuation period (for example, the fluctuation period of the pattern d, the pattern b, and the pattern c in FIG. 40A). The replacement symbol is determined according to the above.

Further, when the display control CPU 101 determines to perform the reach announcement, the display control CPU 101 controls the VDP 103 so that the character A is displayed on the variable display unit 9 in the form of the reach announcement 1 or the reach announcement 2, When it is determined that the jackpot notice is to be given, the VDP 103 is set so that the character displayed at that time is displayed on the variable display section 9 in the jackpot notice 1 or the jackpot notice 2 during the reach operation. Control. The big hit notice 2 is a development of the big hit notice 1. When the display control CPU 101 receives the display control command indicating the reach, the display control CPU 101 independently determines whether or not to perform the reach announcement and the jackpot announcement, and the manner of the announcement. The specific determination method will be described later.

FIG. 41 shows an example of a variation pattern displayed when the main substrate 31 notifies the user of a variation time of 24.5 seconds (during a reach period). When notified of the change time of 24.5 seconds, the display control CPU 101 independently determines which of the plurality of change patterns is to be used. FIG. 41 illustrates three patterns (A) to (C) as a plurality of variation patterns.

In the variation pattern shown in FIG. 41A, the middle symbol of the pattern d is changed after the left and right symbols stop. Then, the reach operation is started, and the fluctuation of the middle symbol is performed according to the pattern b and the pattern f. The pattern f is a high-speed change, and a pause period is set before the start of the change by the pattern f. When a display control command instructing stop of all the symbols is received from the main board 31, the swing fluctuation state of the left and right symbols is ended, and the left and right symbols are fixed so that the middle symbols do not move.

(4) The display control CPU 101 replaces the symbols before the reach operation starts so that the symbols are determined by the stopped symbols notified from the main board 31. In the variation pattern shown in FIG. 41A, when the right symbol stops, the display control CPU 101 switches the background image to “flash” (see FIG. 31). When the right symbol is stopped, the display control CPU 101 performs display control so that the character A kicks the right symbol (see FIG. 32).

変 動 In the variation pattern shown in FIG. 41 (B), after the left and right symbols have stopped, the middle symbol of pattern d changes. Then, the reach operation is started, and the fluctuation of the middle symbol is performed according to the pattern b, the pattern c and the pattern h. When a display control command instructing stop of all the symbols is received from the main board 31, the swing fluctuation state of the left and right symbols is ended, and the left and right symbols are fixed so that the middle symbols do not move. Further, the display control CPU 101 replaces the symbols before the reach operation starts so that the symbols are determined by the stop symbols notified from the main board 31. In the variation pattern shown in FIG. 41B, when the right symbol stops, the display control CPU 101 switches the background image to “flash” (see FIG. 31).

変 動 In the variation pattern shown in FIG. 41 (C), after the left and right symbols stop, the variation of the middle symbol of pattern d is performed. Then, the reach operation is started, and the middle symbol is changed according to the pattern b and the pattern c. When a display control command instructing stop of all the symbols is received from the main board 31, the swing fluctuation state of the left and right symbols is ended, and the left and right symbols are fixed so that the middle symbols do not move. Further, the display control CPU 101 performs symbol replacement (symbol skip control) before the start of the reach operation so that the symbol is determined by the stop symbol notified from the main board 31. In the variation pattern shown in FIG. 41C, when the right symbol stops, the display control CPU 101 switches the background image to “aura” (see FIG. 31) and changes the character appearing on the screen to the character B (FIG. 33). Switch).

As described above, in this embodiment, when the display control CPU 101 receives the display control command designating the “reaching period” from the CPU 56 of the main board 31, the display control CPU 101 shown in FIGS. Is determined to use any of the variation patterns shown in FIG.

Then, when it is determined to use the variation pattern of (A) or (B), when the left and right symbols stop and reach the state, it is determined to switch the background screen to “flash”. If it is determined to use the variation pattern (C), it is determined that the background screen is switched to “aura” when the reach state is reached.

で も Even with the fluctuation pattern of the fluctuation time of 24.5 seconds shown in FIGS. 41A to 41C, the display control CPU 101 swings the left and right symbols up and down until the middle symbol is determined. The symbol skip control of the middle symbol is executed at the timing when the right symbol stops.

Further, when the display control CPU 101 determines to perform the reach announcement, the display control CPU 101 controls the VDP 103 so that the character A is displayed on the variable display unit 9 in the form of the reach announcement 1 or the reach announcement 2, When it is determined that the jackpot notice is to be given, the VDP 103 is set so that the character displayed at that time is displayed on the variable display section 9 in the jackpot notice 1 or the jackpot notice 2 during the reach operation. Control.

FIGS. 42 and 43 show examples of fluctuation patterns displayed when the main substrate 31 notifies the fluctuation time of 29.5 seconds (reach long period). Upon being notified of the fluctuation time of 29.5 seconds, the display control CPU 101 uniquely determines which of the plurality of fluctuation patterns is to be used. FIGS. 42 and 43 illustrate three patterns as a plurality of variation patterns. The variation patterns (C1) and (C2) are examples showing different aspects of one variation pattern. Therefore, hereinafter, the variation patterns illustrated in FIGS. 27C1 and 27C may be referred to as variation patterns illustrated in FIG. 43C.

In the variation pattern shown in FIG. 42 (A), the middle symbol of pattern d is changed after the left and right symbols stop. Then, the reach operation is started, and after the fluctuation by the pattern b and the pattern c, the fluctuation of the middle symbol is performed according to the pattern f after a pause period. Further, the display control CPU 101 replaces the symbols before the reach operation starts so that the symbols are determined by the stop symbols notified from the main board 31. In the variation pattern shown in FIG. 42A, when the right symbol stops, the display control CPU 101 switches the background image to “flash” (see FIG. 31).

Further, in the variation pattern shown in FIG. 42A, when the middle symbol fluctuates at high speed in the pattern f, the left and right symbols also fluctuate at high speed. Therefore, when the final stop symbol is a combination of the big hit symbols, the temporary stop symbol at the time of the temporary stop is also a combination of the big hit symbols, though the types of the symbols are different. For example, a temporary stop symbol is a non-probable variable symbol and a final stop symbol is a probable variable symbol.

Therefore, the player feels that the big hit has occurred at the time of the temporary stop, and the big hit symbol is provided again after the fluctuation, so that the interest is re-established. Note that the pause symbol is a symbol that the display control CPU 101 has independently determined by calculating backward from the stop symbol. Since the change speed and the change period of the pattern f are determined in advance, the display control CPU 101 can easily calculate the temporary stop symbol from the final stop symbol.

In the variation pattern shown in FIG. 42 (B), after the left and right symbols are stopped, the variation of the middle symbol of the pattern d is performed. Then, the reach operation is started, and after the fluctuation by the pattern b and the pattern h, the fluctuation of the middle symbol is performed according to the pattern f after a pause period. Further, the display control CPU 101 replaces the symbols before the reach operation starts so that the symbols are determined by the stop symbols notified from the main board 31. In the variation pattern shown in FIG. 42B, when the right symbol stops, the display control CPU 101 switches the background image to “aura” (see FIG. 31) and changes the character appearing on the screen to the character B ( (See FIG. 33).

変 動 In the variation pattern shown in FIG. 43 (C), after the left and right symbols stop, the variation of the middle symbol is performed according to the pattern c. After that, the middle symbol is changed according to the pattern g. The pattern g is a frame feed pattern. Further, the display control CPU 101 replaces the symbols before the reach operation starts so that the symbols are determined by the stop symbols notified from the main board 31. In the variation pattern shown in FIG. 43C, when the right symbol stops, the display control CPU 101 switches the background image to “smoke” (see FIG. 31) and changes the character appearing on the screen to the character C ( (See FIG. 33).

で も Even with the fluctuation pattern of the fluctuation time of 29.5 seconds shown in FIGS. 42 and 43, the display control CPU 101 swings the left and right symbols up and down until the middle symbol is determined. The symbol skip control of the middle symbol is executed at the timing when the right symbol stops.

変 動 In the variation pattern including the frame feed shown in FIG. 43 (C), it is assumed that the left and right display symbols are aligned at the start of the reach operation regardless of whether or not a big hit is made. Then, since the stop symbol of the middle left and right symbols is transmitted from the main board 31 to the symbol control board 80 at the start of the change, the stop symbol and the symbol at the time of the start of the reach operation (the left and right middle ones are aligned) are used for frame advance. Is determined.

For example, the example shown in FIG. 43 (C1) is an example in which the determined symbols are “seven” (left symbol), “five” (middle symbol), and “seven” (right symbol). Since the symbols at the start of the reach operation are "seven", "seven", and "seven", it is necessary to change ten symbols at the time of frame advance. Also, the example shown in FIG. 43 (C2) is an example in which the determined symbols are “seven” (left symbol), “two” (middle symbol), and “seven” (right symbol). Since the symbols at the start of the reach operation are "seven", "seven" and "seven", it is necessary to change seven symbols at the time of frame advance.

Then, if the period of frame advance is always kept constant, the fluctuation time deviates from 29.5 seconds. In order to prevent the frame from being shifted, the speed at which the frame is fed must be changed in accordance with the number of frames to be fed. It is unnatural to perform such display control. That is, it gives the player distrust. Therefore, in this embodiment, when the display control CPU 101 determines to use the variation pattern shown in FIG. 43C, the display control CPU 101 sets the reach speed so that the variation speed at the time of the frame feed variation is always constant. Adjust the timing at the start of operation.

That is, when the number of frames to be sent is small, the timing of starting the reach operation is delayed, and when the number of frames to be sent is large, the timing of starting the reach operation is relatively advanced. By performing such display control, it is possible to keep the overall fluctuation time at 29.5 seconds and keep the fluctuation speed during the frame feed fluctuation constant.

As described above, in this embodiment, when the display control CPU 101 receives the display control command designating the “reach long period” from the CPU 56 of the main board 31, the display control CPU 101 shown in FIGS. And which of the variation patterns shown in FIG. 43 (C) is to be used to variably display the middle left and right symbols.

{Circle around (4)} When it is determined to use the variation pattern of (A), when the left and right symbols stop and reach the reach state, the background screen is switched to “flash”. Further, when it is determined to use the variation pattern of (B), when the left and right symbols stop and reach the reach state, it is determined to switch the background screen to “aura”. When it is determined to use the variation pattern of (C), it is determined that the background screen is switched to “smoke” when it reaches the reach state.

Hereinafter, control of the game control unit and the display control unit for realizing the above-described display example will be described.
FIG. 44 is a flowchart showing the process of waiting for the start of all symbol change (step S304) in the special symbol process process shown in FIG. When the variable time and the stop symbol are determined in the stop symbol setting process and the reach operation setting process in steps S302 and S303, transmission control of a display control command for instructing them is performed. In step S304, the CPU 56 Waits for the completion of sending the command (step S304a). Note that the program can be configured so that the command transmission completion is notified from the command control process (step S27) in the game control process (see FIG. 15). Alternatively, when the transmission command is set in the command transmission table, it may be determined that the command transmission is completed.

In this embodiment, when starting the symbol change, the CPU 56 of the main board 31 controls one of the commands A0, A2, B1, B2, B3 capable of specifying the change time shown in FIG. It is sent to the substrate 80. Subsequently, a display control command indicating the left and right stopped symbols that have been determined is sent to the symbol control board 80. Therefore, in the command transmission completion processing of step S304a, it is confirmed whether or not transmission of all these commands has been completed. Note that the CPU 56 may transmit any of the commands A0, A2, B1, B2, and B3 after transmitting the display control command indicating the left and right middle stop symbols.

When the transmission of the display control command is completed, the CPU 56 starts a variable time timer for measuring the variable time notified to the symbol control board 80 (step S304b). Then, the special symbol process flag is updated so as to proceed to step S305 (step S304c).

FIG. 45 is a flowchart showing the all symbol stop waiting process (step S305) in the special symbol process process shown in FIG. In step S305, the CPU 56 checks whether or not the variable time timer has expired (step S305a). When the time is up, a display control command instructing stop of all symbols is set (step S305b). Then, a display control command data transmission request is set (step S305c), and the special symbol process flag is updated so as to proceed to step S306 (step S305d).

As described above, in the special symbol process process, the CPU 56 sends the information that can specify the variation time and the information that indicates the stop symbol at the start of the variation to the symbol control board 80, and when the variation time timer times out, That is, when the instructed fluctuation time ends, the information instructing to stop all the symbols is sent to the symbol control board 80. During that time, the CPU 56 does not send a display control command to the symbol control board 80. Therefore, the load required for the display control of the CPU 56 of the main board 31 is greatly reduced.

FIG. 46 is a flowchart showing a main process executed by the display control CPU 101. The display control means by the display control CPU 101 is also an identification information control means for controlling the identification information.

In the main process, first, an initial value setting process such as clearing a RAM area is performed (step S281). After that, in this embodiment, the display control CPU 101 shifts to a loop process for checking the monitoring of the timer interrupt flag (step S282). Then, as shown in FIG. 47, when a timer interrupt occurs, the display control CPU 101 sets a timer interrupt flag (step S287). If the timer interrupt flag is set in the main process, the display control CPU 101 clears the flag (step S283) and performs a display control process process (step S285). In the display control process, a process corresponding to the current control state is selected and executed from among the processes corresponding to the control state.

で は In this embodiment, it is assumed that the timer interrupt is performed every 2 ms. That is, the display control process is activated every 2 ms.

FIG. 48 is a flowchart showing the display control command receiving process by the interrupt process. The display control INT signal from the main board 31 is input to an interrupt terminal of the display control CPU 101. Therefore, when the INT signal from the main board 31 is turned on, the display control CPU 101 is interrupted. Then, the reception processing of the display control command shown in FIG. 48 is started.

In the display control command receiving process, the display controlling CPU 101 first saves each register on the stack (step S850). Next, data is read from the input port assigned to the input of the display control command data (step S851). Then, it is confirmed whether or not this is the first byte of the display control command having the 2-byte configuration (step S852). Whether it is the first byte or not is confirmed by whether or not the first bit of the received command is “1”. The first bit should be “1” in the MODE byte (first byte) of the display control command having the 2-byte configuration (see FIG. 21). Therefore, if the first bit is “1”, the display control CPU 101 determines that a valid first byte has been received, and stores the received command in the confirmed command buffer indicated by the command reception number counter in the reception buffer area (step S853).

If it is not the first byte of the display control command, it is checked whether the first byte has already been received (step S854). Whether or not the data has already been received is confirmed based on whether or not valid data is set in the reception buffer.

に は If the first byte has already been received, check whether the first bit of the received one byte is “0”. If the first bit is "0", it is determined that the valid second byte has been received, and the received command is stored in the fixed command buffer indicated by the command reception number counter +1 in the reception buffer area (step S855). The first bit should be “0” in the EXT byte (second byte) of the display control command having the 2-byte configuration (see FIG. 21). If the confirmation result in step S854 indicates that the first byte has already been received, the process ends if the first bit of the data received as the second byte is not “0”.

(4) When the command data of the second byte is stored in step S855, 2 is added to the command reception number counter (step S856). Then, it is checked whether or not the command reception counter is 12 or more (step S857), and if it is 12, the command reception number counter is cleared (step S858). Thereafter, the saved register is restored (step S859), and interrupt permission is set (step S859).

In this example, a ring buffer type reception buffer capable of storing six 2-byte display control commands is used. Therefore, the reception buffer is formed of a 12-byte area of buffers 1 to 12. Then, a command reception number counter indicating in which area the received command is to be stored is used. The command reception number counter takes a value from 0 to 11.

The display control command has a two-byte configuration, and the first byte (MODE) and the second byte (EXT) can be immediately distinguished on the receiving side. That is, the receiving side can immediately detect whether the data as MODE or the data as EXT has been received by the first bit. Therefore, as described above, it can be easily determined whether or not appropriate data has been received. Then, the incorrect data is erased by being overwritten with the next received data in the reception buffer.

FIG. 49 is an explanatory diagram showing display random numbers handled by the display control CPU 101. As shown in FIG. 49, in this embodiment, the display random numbers include a reach type determination random number, a reach announcement random number, and a jackpot announcement random number. The reach type determination random number is for determining a variation pattern (reach type). The reach announcement random number is used to determine whether to perform the reach announcement, and the jackpot announcement random number is used to determine whether to perform the jackpot announcement.

FIG. 50 shows the relationship between the extracted reach type determination random value and the reach type (FIG. 50 (A)), the relationship between the extracted reach notification random number and the reach notification (FIG. 50 (B)), and the extracted relationship. It is explanatory drawing which shows the relationship between the big random number for big hit notices, and big hit notice (FIG. 50 (C)).

に お い て In FIG. 50 (A), A, B and C correspond to (A), (B) and (C) in FIGS. That is, if the value of the extracted reach type determination random number is the value shown in the upper part, the display CPU 101 determines to change the symbol in the variation pattern shown in the lower part. For example, when the main board 31 notifies the fluctuating time of 29.5 seconds (reach long term) and the value of the extracted reach type determination random number is 21, which is a big hit, as shown in FIG. It is determined that the fluctuation is to be performed according to the specified fluctuation pattern. It should be noted that whether or not to make a big hit is determined based on the display control command indicating the stop symbol of the middle left and right symbols sent together with the display control command for designating the fluctuation time.

Further, when the display control command indicating the reach is received, the display control CPU 101 extracts the reach announcement random number, and does not perform the reach announcement if the value is any one of 0 to 3. If the extracted value is 4 or 5, it is decided to perform the reach announcement in the mode of reach announcement 1, and if the extracted value is 6 or 7, it is decided to perform the reach announcement in the mode of reach announcement 2. I do. When receiving the display control command indicating that it is out of range, the display control CPU 101 determines to perform the reach announcement in the form of the reach announcement 1 when the extracted value of the reach announcement random number is 7. .

Further, when the display control command indicating that the reach is set is received, the display control CPU 101 extracts the random number for the jackpot announcement, and performs the jackpot announcement if the value is 0 in the case of the jackpot. If the extracted value is 1, it is determined to perform the jackpot notice in the mode of the jackpot notice 1, and if the extracted value is 2, it is determined to perform the jackpot notice in the form of the jackpot notice 2. When the jackpot is not determined to be a jackpot, if the extracted value of the random number for the jackpot notice is 0 or 1, it is determined that the jackpot notice is not performed. If the extracted value is 2, the jackpot notice is performed in the form of the jackpot notice 1. To decide.

FIG. 51 is a flowchart showing the display control process (step S285) in the main process shown in FIG. In the display control process, any one of steps S720 to S870 is performed according to the value of the display control process flag. In each process, the following process is performed.

(4) Display control command reception waiting process (step S720): It is confirmed whether or not a display control command capable of specifying the fluctuation time has been received by the command reception interrupt process. Specifically, it is confirmed whether or not the received command stored in the confirmed command buffer is a display control command capable of specifying a fluctuation time.

(4) Reach operation setting process (step S750): At the time of reach, which of the variation patterns shown in FIGS. 40 to 43 is used is determined. In addition, it is determined whether or not to perform the reach announcement and the jackpot announcement, and if the announcement is decided, the type of the announcement is determined.

All symbol variation start processing (step S780): Control is performed so that the variation of the left and right middle symbols is started.

(5) Symbol change processing (step S810): The switching timing of each change state (change speed, background, character) constituting the change pattern is controlled, and the end of the change time is monitored. Also, stop control of the left and right symbols is performed.

All symbols stop wait setting process (step S840): At the end of the variation time, if a display control command instructing to stop all symbols has been received, control to stop the variation of symbols and display the final stop symbol (fixed symbol) is performed. Do.

Big hit display processing (step S870): After the end of the fluctuation time, the control of the probability change big hit display or the normal big hit display is performed.

FIG. 52 is a flowchart showing the display control command reception waiting process (step S720). In the display control command reception waiting process, the display control CPU 101 first checks whether the command non-reception timer has timed out (step S721). The command non-reception timer is set to time out when a display control command indicating a symbol change is not received from the main board 31 for a predetermined period or more. If a timeout has occurred, the display control CPU 101 performs control to display a demonstration screen on the variable display unit 9 (step S722).

If the command non-reception timer has not timed out, the display control CPU 101 confirms whether or not a display control command capable of specifying the fluctuation time has been received (step S723). In this embodiment, the display control command capable of specifying the fluctuation time is any of the commands A0, A2, B1, B2, and B3 shown in FIG. When a display control command capable of specifying the fluctuation time is received, the value of the display control process flag is changed to a value corresponding to the reach operation setting process (step S750) (step S724).

When the special symbol is changed, the display control command transmitted first from the main board 31 to the symbol control board 80 is a command indicating a change time and a command for designating a stop symbol of the middle left and right symbols. They are stored in the confirmation command buffer. Hereinafter, the stop symbol sent together with the command indicating the fluctuation time is referred to as a temporary stop symbol.

FIG. 53 is a flowchart showing the reach operation setting process (step S750). In the reach operation setting process, the display control CPU 101 first determines whether or not to perform a reach announcement (step S751). Next, it is determined whether or not the display control command that can specify the fluctuation time is not out of reach (step S752). Specifically, it is wrong if command A0 or A2 has been received.

If it is not, it is checked whether the left and right temporary stop symbols are different (step S753). If they match, the right temporary stop symbol is shifted by one symbol (step S754). Then, the temporary stop symbols in the left and right are stored in a predetermined storage area (step S755). The monitoring timer is set to 7.9 seconds (step S756). The value of 7.9 seconds is a value that has a margin with respect to the variation time of 7.8 seconds at the time of loss, and a predetermined process is performed when a command designating stop of all symbols cannot be received before the monitoring timer times out. Is performed.

In step S752, if it is not a loss, that is, if any of the commands B1, B2, and B3 has been received, it is checked whether the left and right temporary stop symbols are the same (step S757). If not, the right temporary stop symbol is made the same as the left temporary stop symbol (step S758). Then, the right and left temporarily stopped symbols are stored in a predetermined storage area (step S759). Further, the display control CPU 101 sets a value obtained by adding 0.1 seconds to the fluctuation time according to the command B1, B2 or B3 in the monitoring timer (step S760). Then, the reach type, that is, the fluctuation pattern is determined (step S761). In addition, it is determined whether or not to perform the big hit notice (step S762).

As described above, in this embodiment, the display control CPU 101 determines whether the command A0, A2, B1, B2, or B3 sent from the main board 31 when the variable display is started and the received right and left middle temporary stop symbol. When is inconsistent, the temporary stop symbol is corrected. Therefore, even if an error occurs in the left and right temporary stop symbols for some reason, the error is corrected. The error is, for example, a case in which a noise from the cable from the main board 31 to the symbol control board 80 causes a bit error in the command. As a result, it is possible to prevent the display of the fixed symbol inconsistent with the loss / reach determined by the game control means.

Furthermore, when the variation time is made different between the case with and without the re-variation, and the variation pattern for performing the re-variation is configured to be determined by the certain variation symbol, the command received from the main board 31 indicates that the variation is present. When the instruction is given and the stop symbol received from the main board 31 is not a probability-changing symbol, the display control CPU 101 may correct the symbol to a probability-variable symbol. For example, when a command indicating "seven", "six", or "seven" as a stop symbol is received from the main board 31, the command is corrected to "seven", "seven", or "seven".

The display control means may determine whether to make a big hit or a miss based on the received display control command, and perform a game effect according to the stop symbol. For example, before the symbol is stopped, a unique performance that reminds the player of success (leads to success at the time of a big hit), failure (leads to a failure at the time of a hit), or loss (win at the time of a big hit, loss at the time of a hit), etc. Is also good. Furthermore, a character design such as a human face is prepared as a design, and a character design (for example, a happy face) that reminds the user at the time of a big hit is displayed. The effect of displaying may be performed independently.

Then, the display control CPU 101 determines to use a process table corresponding to the selected variation pattern (step S763). In each process table, each variation state (variation speed, variation period at that speed, and the like) in the variation pattern is set. Each process table is set in the ROM. Then, the display control CPU 101 changes the value of the display control process flag to a value corresponding to the all symbol variation start process (step S780) (step S764).

FIG. 54 is a flowchart showing the reach announcement determination process in step S751. In the reach announcement determination process, the display control CPU 101 first extracts a reach announcement random number (step S751a). Then, it is confirmed whether to reach or not to reach (step S751b). The confirmation is performed using the display control command indicating the stop symbol received from the main board 31. If it is determined to be a miss, it is determined whether or not to perform the reach announcement using the table shown on the right side of FIG. 50B, and if the advance notice is to be made, the mode of the advance notice is determined (step S751c). Also, in the case of the reach, it is determined whether or not to perform the advance notice using the table shown on the left side of FIG. 50B, and in the case of the advance notice, the mode of the advance notice is determined (step S751d). ).

(4) When it is determined that the reach announcement is to be performed, the reach announcement start time determination timer is started (step S751e). The reach announcement start time determination timer is a timer that determines the time from the start of the symbol change to the occurrence of the reach announcement.

FIG. 55 is a flowchart showing the reach mode determination processing in step S761. In the reach mode determination process, the display control CPU 101 first extracts a reach type determination random number (step S761a). Then, the reach type is determined using the table shown in FIG. 50A (step S761b).

FIG. 56 is a flowchart showing the jackpot announcement determination process in step S762. In the jackpot announcement determination process, the display control CPU 101 first extracts a jackpot announcement random number (step S762a). Then, it is confirmed whether or not to make a big hit (step S762b). The confirmation is performed using the display control command indicating the left and right middle stop symbols received from the main board 31. If a big hit is not to be made, a decision is made as to whether or not to make a big hit notice using the table shown on the right side of FIG. 50 (C), and if so, a mode of the notice is decided (step S762c). If a big hit is to be made, it is determined whether or not to make a big hit notice using the table shown on the left side of FIG. 50 (C), and if a big notice is to be made, the mode of the notice is determined (step S762d). ).

{Circle around (4)} When it is determined that the big hit notice is to be given, the big hit notice start time determination timer is started (step S762e). The jackpot announcement start time determination timer is a timer that determines the time from the start of the symbol change to the start of the display of the jackpot announcement 1 mode.

FIG. 57 is an explanatory diagram showing a configuration example of the process table. In each process table corresponding to each variation pattern, a variation speed, a variation period at that speed, a background, a character switching timing, and the like are set in time series. Also, a process timer value for determining a fluctuation period at a certain speed is set. Each process table is composed of a plurality of 3-byte process data.

For example, in the process table corresponding to the variation pattern shown in FIG. 41A, the first process data (3 bytes) includes a pattern in which the middle left and right symbols are changed at a low speed and a time until the next display state switching timing. A process timer value indicating the time is set. This is because the first fluctuation is the fluctuation (acceleration) due to the pattern a, and the low-speed fluctuation should be started first.

Next, the process is performed by changing the left symbol at a medium speed and a process timer value indicating the time until the next display state switching timing. Next, the process is performed by changing the right symbol at a medium speed and a process timer value indicating a time until the next display state switching timing. Further, a process timer value indicating that the medium symbol is fluctuated at a medium speed and a time until the next display state switching timing is set. Thereafter, how to switch the display state and a process timer value indicating the time until the next display state switching timing are sequentially set.

Note that the display state switching timing is a timing at which one of the left and right middle symbols is changed, and further includes a timing at which the background and the character are switched and a timing at which the symbols are to be replaced.

Accordingly, the display control CPU 101 can know that some display state needs to be changed due to the expiration of the process timer. The display state to be changed can be known from the set value of the third byte of the next process data in the process table.

In the variation pattern including the frame advance as shown in FIG. 43C, each period constituting the variation pattern is variable according to the number of frames to be transmitted. Therefore, each process table corresponding to the number of frames to be sent is prepared. The display control CPU 101 calculates the number of frames to be sent from the temporary stop symbol if it is determined at the start of the change that the change pattern including the frame feed as shown in FIG. 43C is used. Then, in step S765, it is determined to use a process table corresponding to the number of frames to be sent. If each process table according to the number of frames to be sent is prepared, even if each period constituting the variation pattern is variable, the process timer value set in the process table and the set value of the third byte are used. Thus, the variable display control can be easily performed.

FIG. 58 is a flowchart showing the whole symbol change start process (step S780). In the all symbol variation start processing, the display control CPU 101 starts the timer with the process timer value set first in the process table determined to be used (step S781). In addition, based on the data indicating the fluctuation state set in the third byte, the pattern fluctuation control and the background and character display control are started (step S782). Then, the value of the display control process flag is changed to a value corresponding to the symbol change processing (step S810) (step S783).

FIG. 59 is a flowchart showing the symbol change processing (step S810). In the symbol change processing, the display control CPU 101 checks whether or not the reach notification start time determination timer has timed out (step S811). If the time-out has occurred, the VDP 103 is controlled so that the display according to the reach announcement mode that has been determined is performed (step S812). In addition, it is determined whether or not the big hit notice start time determination timer has timed out (step S813). If the timeout has occurred, the VDP 103 is controlled so that the display according to the mode of the big hit notice 1 is performed (step S814).

If it is determined that the announcement by the big hit notice 2 will be performed (step S815), the big hit notice 2 start time determination timer is started (step S816). In this embodiment, since the big hit notice 2 is a development of the big hit notice 1, the notice by the big hit notice 2 is given a predetermined time after the notice by the big hit notice 1 is made (the big hit notice 2 start time determination timer). Till the timeout).

The display control CPU 101 checks whether or not the big hit notice 2 start time determination timer has timed out (step S817). If the timeout has occurred, the VDP 103 is controlled so that the display according to the mode of the big hit notice 2 is performed (step S818).

Next, the display control CPU 101 checks whether or not the process timer has timed out (step S819). If the process timer has timed out, the pointer indicating the data in the process table is incremented by +3 (step S820). Then, it is determined whether or not the data in the area pointed to by the pointer is an end code (step S821). If it is not the end code, the symbol variation control and the display control of the background and the character are changed based on the data indicating the variation state set in the third byte of the process data indicated by the pointer (step S822). The timer is started with the process timer value set in the byte (step S823).

If it is an end code in step S821, the value of the display control process flag is changed to a value corresponding to the all symbol stop waiting process (step S840) (step S824).

FIG. 60 is a flowchart showing the all symbol stop waiting process (step S840). In the all symbol stop waiting process, the display control CPU 101 checks whether or not a display control command instructing stop of all symbols has been received (step S841). If the display control command instructing the stop of all the symbols has been received, the control for stopping the symbols with the stored temporarily stopped symbols is performed (step S842). Then, a command non-reception timer is started to monitor the time until the reception of the next display control command (step S843).

(4) If a display control command designating stop of all symbols has not been received, it is checked whether or not the monitoring timer has timed out (step S845). If a timeout has occurred, it is determined that some abnormality has occurred, and control is performed to display an error screen on the variable display unit 9 (step S846).

After performing the processing in step S843, the display control CPU 101 sets the value of the display control process flag to a value corresponding to the big hit display processing (step S870) (step S844).

FIG. 61 is a flowchart showing the big hit display process (step S870). In the big hit display process, the display control CPU 101 determines whether or not it is a probability change big hit (step S871). The display control CPU 101 can determine, for example, whether or not it is a probable change big hit based on a confirmed symbol. If it is a probability variable hit, the display control CPU 101 performs display control to display, for example, "variable probability hit" on the variable display unit 9 (step S872). Specifically, the display instruction of “probable change big hit” is notified to the VDP 103. Then, the VDP 103 creates image data of the indicated display. Further, the image data is combined with the background image. If it is not the probability change big hit, the display control CPU 101 performs display control to display, for example, "big hit" on the variable display unit 9 (step S873).

After that, in the big hit display process, the display control of the variable display unit 9 is performed based on the display control command in the big hit game state transmitted from the main board 31. For example, the number of rounds is displayed. When a display control command indicating the end of the big hit game is received from the main board 31 (step S874), the value of the display control process flag is set to a value corresponding to the display control command reception wait (step S720) (step S844).

As described above, based on the display control command received from the game control means, the display control means performs the variable display pattern of the reach type, that is, the identification information (low-speed fluctuation, medium-speed fluctuation, high-speed fluctuation, frame feed, and the like). Is determined, the game control means does not need to perform a process of determining a specific reach type. Therefore, the load on the variable display control of the symbols by the game control means is reduced.

The display control means also determines whether or not a character is to be displayed on the variable display section 9 during the variable display of the symbol based on the display control command received from the game control means, and also determines the type of the character if it is to be displayed. . Therefore, the game control means does not need to perform any control on the display character, so that the load required for the display control of the game control means is reduced.

The display control means determines, based on the display control command received from the game control means, whether or not to perform the reach announcement and, when performing the reach announcement, which reach announcement mode to use. Therefore, the game control means does not need to perform any control on the reach announcement, so that the load required for the display control of the game control means is reduced.

Further, the display control means determines, based on the display control command received from the game control means, whether or not to perform the jackpot notice and, when performing the jackpot notice, which jackpot notice mode to use. Therefore, since the game control means does not need to perform any control regarding the big hit notice, the load required for the display control of the game control means is reduced.

Further, at the end of the variable display, symbol replacement control is performed at a predetermined timing so as to stop at a stop symbol instructed by the game control means. Therefore, the game control means can further reduce the control load related to the fluctuation of the symbols. In the case of the variable display pattern in which the symbol is re-changed, the type of the symbol to be derived before the change is determined. For example, if a probable change symbol is designated as a stop symbol that will be a big hit from the game control means, a symbol that does not become probable as a symbol derived before re-variation is determined, and after deriving this, re-variation is executed, After that, a stop symbol designated as the stop symbol is derived. For example, in the variable display pattern shown in FIG. 42, the type of the symbol displayed before the start of the variation pattern f can be determined by replacing the symbols at the start of the variation pattern d. Therefore, the game control means can further reduce the control load related to the fluctuation of the symbols.

In the above embodiment, the background and character to be used are determined in advance according to each variation pattern (see FIGS. 40 to 43). Therefore, the fact that the display control CPU 101 determines the variation pattern (reach type) according to the received display control command also means that the process of selecting the background and the character to be displayed respectively from a plurality of types is performed. Will be. However, the background and the character may be determined independently of the variation pattern. Further, in the above-described embodiment, a character is displayed in any of the variation patterns. However, the character may not appear in a certain variation pattern, or may appear in the middle.

In the above embodiment, the stop state is defined as including the swing operation state and the fixed state described above. That is, when the symbol displayed in that state is not changed to the next symbol, it is defined as a stopped state.

Next, the operation of the lamp control means will be described. FIG. 62 is a flowchart showing a main process executed by the lamp control CPU 351. In the main process, first, an initial value setting process such as clearing a RAM area is performed (step S441). After that, in this embodiment, the lamp control CPU 351 shifts to a loop process for checking the monitoring of the timer interrupt flag (step S442). Then, as shown in FIG. 63, when a timer interrupt occurs, the lamp control CPU 351 sets a timer interrupt flag (step S447). If the timer interrupt flag is set in the main process, the lamp control CPU 351 clears the flag (step S443) and performs the lamp control process (step S445).

で は In this embodiment, it is assumed that the timer interrupt is performed every 2 ms. That is, the lamp control process is started every 2 ms.

The lamp control CPU 351 has an interrupt terminal connected to a lamp control INT signal as a signal taken from the main board 31. When the lamp control command is sent from the main board 31 while the lamp control CPU 351 is performing the lamp control main process, an interrupt based on the capture signal occurs, and the lamp control command reception process is performed by the interrupt process. Be executed. The lamp control command receiving process can be configured similarly to the display control command receiving interrupt process shown in FIG.

FIG. 64 is a flowchart showing the lamp control process (step S445). In the lamp control process, the lamp control CPU 351 checks whether or not the value of the command reception number counter is 2 or more (step S461). The command reception number counter is a counter that indicates the number of command data stored in the fixed command buffer that stores the command received from the main board 31. When the value of the command reception number counter is 2 or more, it means that one or more lamp control commands have been received.

Therefore, if the value of the command reception number counter is 2 or more, after reading the received command from the fixed command buffer (step S462), the pattern data corresponding to the received command in the ramp pattern table is read (step S463). When the received command is read, the value of the command reception number counter is decremented by -2. The lamp pattern table includes, for example, each lamp control command shown in FIG. 25 and pattern data indicating a control pattern corresponding to each command.

(4) If the pattern data exists in the ramp pattern table, that is, if the pattern data is described (step S464), the corresponding control pattern is changed (step S465). For example, when the lamp control command of “A000” is received, the control pattern of the decoration lamp and the game effect lamp / LED is changed to the display pattern at the time of stopping the fluctuation of the special symbol. Then, a lamp / LED control process (step S466) is executed.

FIG. 65 is an explanatory diagram showing an example of a lamp / LED control pattern corresponding to the pattern data. The lamp / LED control pattern is also set in the ROM. The example shown in FIG. 65 is a lamp / LED control pattern in a case where control is performed so that lighting and extinguishing are repeated, and a lighting time and an extinguishing time are set.

In the lamp / LED control process, the lamp control CPU 351 performs lamp / LED lighting / light-out control according to the lighting time and the light-out time set in the lamp / LED control pattern. The example shown in FIG. 65 is a simple example in which lighting and extinguishing are repeated. However, even when a more complicated lighting / extinguishing pattern is realized, the pattern data corresponding to the lamp control command is stored in the lamp pattern table. Is set, and a lamp / LED control pattern (table in which specific lighting times and the like are set) corresponding to each pattern data is prepared, so that an arbitrary lighting / extinguishing pattern can be realized.

As described above, in this embodiment, the lamp control means controls the light emitter such as the lamp and LED provided on the frame side, and controls the light emitter such as the lamp and LED provided on the game board. Control. Therefore, in a configuration in which the lamp control board 35 is provided separately from the main board 31, light-emitting body control can be simply realized. In addition, since the game control means does not need to control the illuminants such as the lamps and LEDs of the game board, the load required for the illuminant control of the game control means is reduced, and the time required for the game progress control is increased, The program capacity that can be allocated to progress control increases.

(4) The lamp control means controls both the luminous body provided on the frame side and the luminous body provided on the game board based on the pattern data. Therefore, even if the illuminant display control is performed in response to a command from the game control means, the configuration of the lamp control means can be simply realized.

Next, the operation of the voice control means will be described. FIG. 66 is a flowchart showing the main processing executed by the voice control CPU 701. In the main process, first, an initial value setting process such as clearing a RAM area is performed (step S401). After that, in this embodiment, the voice control CPU 701 shifts to a loop process for checking the timer interrupt flag (step S402). Then, as shown in FIG. 67, when a timer interrupt occurs, the voice control CPU 701 sets a timer interrupt flag (step S407). If the timer interrupt flag is set in the main processing, the voice control CPU 701 clears the flag (step S403) and performs the voice control processing (step S405).

で は In this embodiment, it is assumed that the timer interrupt is performed every 2 ms. That is, the voice control process is activated every 2 ms.

(4) A voice control INT signal as a capture signal from the main board 31 is connected to an interrupt terminal of the voice control CPU 701. When a voice control command is transmitted from the main board 31 while the voice control CPU 701 is performing the voice control main process, an interrupt based on the capture signal occurs, and the voice control command reception process is performed by the interrupt process. Be executed. The voice control command receiving process can be configured similarly to the display control command receiving interrupt process shown in FIG.

FIG. 68 is a flowchart showing the voice control process (step S405). In the voice control processing, the voice control CPU 701 checks whether or not the value of the command reception number counter is 2 or more (step S431). The command reception number counter is a counter that indicates the number of command data stored in the fixed command buffer that stores the command received from the main board 31. When the value of the command reception number counter is 2 or more, it means that one or more voice control commands have been received.

If the value of the command reception number counter is 2 or more, the received command is read from the fixed command buffer (step S432), and then the pattern data corresponding to the received command in the voice pattern table is read (step S433). When the received command is read, the value of the command reception number counter is decremented by -2. The voice pattern table includes, for example, each voice control command shown in FIG. 26 and pattern data indicating a control pattern corresponding to each command.

Then, control data corresponding to the read pattern data is read from the ROM (step S434), and the following voice control is performed based on the read control data. The control data is data such as a sound type and a sound continuation time, and is set in the ROM corresponding to each pattern data.

In this embodiment, the speech synthesis circuit 702 is controlled by a transfer request signal (SIRQ), a serial clock signal (SICK), a serial data signal (SI), and a transfer end signal (SRDY). When the SIRQ goes low, the speech synthesis circuit 702 takes in the SI one bit at a time in synchronism with SICK, and interprets the data consisting of each SI received up to that time as one audio reproduction data when the SRDY goes low. I do. Therefore, the audio control CPU 701 turns on SIRQ (low level) (step S435), outputs the control data read from the ROM as SI in synchronization with SICK (step S436), and when the output is completed, sets SRDY low. The level is set (step S437). When receiving the control data by the SI, the voice synthesis circuit 702 generates a voice according to the received control data.

As described above, each effect control means controls the effect components in accordance with the control command received from the game control means. Then, the display control means determines whether or not to perform a notice effect such as a jackpot notice based on the received control command. However, the lamp control means and the sound control means also determine whether or not to perform the jackpot notice based on the received control command. It is also possible to determine whether or not to perform a notice effect such as a reach notice, a probable change notice, etc., and to perform a notice effect by a lamp lighting pattern or a sound generation pattern.

In this embodiment, the lamp control board 35, the voice control board 70, and the symbol control board 80 are provided. However, one effect control board is provided, and each effect control unit is mounted on the effect control board. A configuration may be adopted in which a control command is transmitted from the game control means to the effect control board. That is, the game control means sends a lamp control command, a voice control command, and a display control command to the effect control board.

However, the lamp control means, the sound control means, and the display control means mounted on the effect control board may perform the effect control in accordance with only necessary control commands received from the game control means. In this case, even if a plurality of effect control means are mounted on the effect control board, it is not necessary for the game control means to transmit control commands separately for each of the plurality of effect control means. That is, one effect control command according to the effect content is transmitted to the effect control board. Then, an effect control command for controlling electrical components that are not directly related to the game effect such as the prize ball lamp 51 and the ball cut lamp 52 is defined separately from the effect control command related to the game effect.

FIG. 69 is a flowchart showing the main processing of the payout control CPU 371. In the main process, the payout control CPU 371 first performs necessary initialization (step S601).

Then, the payout control CPU 371 checks whether backup data exists in the payout control backup RAM area (step S602). That is, for example, similarly to the processing of the CPU 56 of the main board 31, it is confirmed whether or not the backup data exists by determining whether or not the backup flag set when the power is turned off is set. If the backup flag is set, it is determined that there is backup data. If it is determined that there is no backup data, it means that there were no unpaid game balls when the power was last turned off, and there is no need to return the internal state to the state when the power was turned off. Accordingly, the payout control CPU 371 executes an initialization process that is executed when the power is turned on, not when the power failure is restored (steps S602 and S603).

If the backup data exists in the backup RAM area, the payout control CPU 371 checks the data in the backup RAM area (parity check in this example) (step S604). If the power is restored after an unexpected power failure, the data in the backup RAM area should have been saved, and the check result becomes normal. If the check result is not normal, since the internal state cannot be returned to the state at the time of power failure, initialization processing executed at the time of power-on without power recovery is executed (steps S605 and S603).

If the check result is normal, the payout control CPU 371 performs a payout state restoring process for returning the internal state to the power-off state (step S606). Then, the process returns to the address indicated by the PC (program counter) stored in the backup RAM area (step S607).

After the execution of the normal initialization process (step S603), the main process executed by the payout control CPU 371 shifts to a loop process in which the monitoring of the timer interrupt flag is checked (step S608).

In the normal initialization process, as shown in FIG. 70, the register and RAM are cleared (step S621), and a predetermined initial value is set (step S622). Then, before the initialization processing is completed, an interrupt is permitted (step S623).

In this embodiment, the built-in timer / counter of the payout control CPU 371 is set to repeatedly generate a timer interrupt. Further, the repetition period is set to 2 ms. Then, as shown in FIG. 71, when a timer interrupt occurs, the payout control CPU 371 sets a timer interrupt flag (step S631). Although FIG. 71 also clearly indicates that the interruption is permitted (step S630), in the 2 ms timer interruption processing, the interruption is first set to the permitted state. That is, the interrupt is permitted during the 2 ms timer interrupt process.

When detecting that the timer interrupt flag has been set in step S608, the payout control CPU 371 resets the timer interrupt flag (step S609) and executes a payout control process (step S610). According to the above control, in this embodiment, the payout control process is started every 2 ms. In this embodiment, only the flag is set in the timer interrupt processing, and the payout control processing is executed in the main processing. However, the payout control processing may be executed in the timer interrupt processing.

FIG. 72 is a flowchart showing the payout control processing in step S610. In the payout control processing, the payout control CPU 371 first determines whether or not the prize ball count switch 301A and the ball lending count switch 301B input to the input port 372b via the relay board 72 are turned on (switch processing: Step S651).

Next, the payout control CPU 371 performs processing such as checking the signal input state from a sensor (for example, a motor position sensor that detects the number of revolutions of the payout motor 289) to determine the state of the sensor (input determination processing). : Step S652). The payout control CPU 371 further analyzes the received payout control command, and executes a process according to the analysis result (command analysis execution process: step S653).

Next, the payout control CPU 371 sets the payout stop state if the payout stop command is received from the main board 31, and releases the payout stop state if the payout start instruction command is received (step S654). Further, a prepaid card unit control process is performed (step S655).

The payout control CPU 371 performs control to pay out the lent ball in response to the ball lending request (step S656). Further, the payout control CPU 371 performs a prize ball control process of paying out a predetermined prize ball (step S657). Then, the payout control CPU 371 outputs a drive signal to the payout motor 289 in the payout mechanism portion of the ball payout device 97 via the output port 372c and the relay board 72, and the ball lending control processing in step S656 or the ball lending control processing in step S657. A payout motor control process for rotating the payout motor 289 by the number of revolutions set in the prize ball control process is performed (step S658).

In this embodiment, a stepping motor is used as the payout motor 289, and a 1-2-phase excitation method is used to control the payout motor 289. Therefore, specifically, in the payout motor control processing, eight types of excitation pattern data are repeatedly output to the payout motor 289. In this embodiment, each excitation pattern data is output for 4 ms.

Next, error detection processing is performed, and a predetermined display is performed on the error display LED 374 according to the result (error processing: step S659).

(4) Further, a process of outputting an information signal to the terminal board 160 is performed (output process: step S660). Note that the information signal is a signal that is turned on for a predetermined time for each unit (for example, 25 pieces) of loaned balls, and then is output for a predetermined time.

FIG. 73 is an explanatory diagram showing an example of use of the RAM incorporated in the payout control CPU 371. In this example, a total number storage (for example, 2 bytes) and a rental ball number storage are formed in the backup RAM area. The total number storage stores the total number of winning ball payouts instructed from the main board 31 side. The loaned ball number storage stores the number of unpaid ball lendings.

FIG. 74 is an explanatory diagram showing a configuration example of a reception buffer for storing a payout control command received from the main board 31. In this example, a ring buffer type receiving buffer capable of storing six payout control commands having a 2-byte configuration is used. Therefore, the reception buffer is constituted by a 12-byte area of the fixed command buffers 1 to 12. Then, a command reception number counter indicating in which area the received command is to be stored is used. The command reception number counter takes a value from 0 to 11.

FIG. 75 is a flowchart showing a payout control command receiving process by the interrupt process. The INT signal for payout control from the main board 31 is input to the CLK / TRG2 terminal of the payout control CPU 371. For example, when the INT signal from the main board 31 is turned on, the value of the timer counter register CLK / TRG2, for which the initial value is set to "1", becomes 0, and the payout control CPU 371 is interrupted. Then, the receiving process of the payout control command shown in FIG. 75 is started. Note that the start address of the payout control command receiving process is an address determined by the interrupt vector output from the built-in CTC and the value set in the I register. When the value of the timer counter register CLK / TRG2 becomes 0, the value is automatically returned to the initial value ("1" in this example).

In the process of receiving the payout control command, the payout control CPU 371 first saves each register on the stack (step S670). Note that when an interrupt occurs, the CPU 371 automatically sets the interrupt prohibition state. However, when a CPU that does not automatically enter the interrupt prohibition state is used, the interrupt prohibition is performed before the execution of the process of step S670. It is preferable to issue an instruction (DI instruction). Next, data is read from the input port 372a assigned to the input of the payout control command data (step S671). Then, it is confirmed whether or not the payout control command is the first byte of the payout control command having the 2-byte structure (step S672). Whether it is the first byte or not is confirmed by whether or not the first bit of the received command is “1”. The first bit should be “1” in the MODE byte (first byte) of the payout control command having a 2-byte configuration (see FIG. 21). Therefore, if the first bit is “1”, the payout control CPU 371 determines that the valid first byte has been received, and stores the received command in the confirmed command buffer indicated by the command reception number counter in the reception buffer area (step S673).

If it is not the first byte of the payout control command, it is checked whether the first byte has already been received (step S674). Whether or not the data has already been received is confirmed based on whether or not valid data is set in the reception buffer (determination command buffer).

に は If the first byte has already been received, check whether the first bit of the received one byte is “0”. If the first bit is “0”, it is determined that the valid second byte has been received, and the received command is stored in the fixed command buffer indicated by the command reception number counter + 1 in the reception buffer area (step S675). The first bit should be “0” in the EXT byte (second byte) of the payout control command having the two-byte structure (see FIG. 21). If the confirmation result in step S674 indicates that the first byte has already been received, the process ends if the first bit of the data received as the second byte is not “0”.

(4) When the command data of the second byte is stored in step S675, 2 is added to the command reception number counter (step S676). Then, it is checked whether or not the command reception counter is 12 or more (step S677), and if it is 12, the command reception number counter is cleared (step S678). Thereafter, the saved register is restored (step S679), and interrupt permission is set (step S680).

The payout control command has a 2-byte configuration, and the first byte (MODE) and the second byte (EXT) can be immediately distinguished on the receiving side. That is, the receiving side can immediately detect whether the data as MODE or the data as EXT has been received by the first bit. Therefore, as described above, it can be easily determined whether or not appropriate data has been received. The same applies to the display control command, the lamp control command, and the voice control command.

FIG. 76 is a flowchart illustrating an example of the command analysis execution process in step S653 in the payout control process. In the command analysis execution processing, the payout control CPU 371 checks whether or not there is a received command in the confirmed command buffer area (step S653a). If there is a received command, it is checked whether the received payout control command is a payout number instruction command (step S653b). When there are a plurality of received commands in the confirmed command buffer area, whether or not the received payout control command is the payout number instruction command is checked for the received command received first.

If the received payout control command is the payout number instruction command, the number specified by the payout number instruction command is added to the total number storage (step S653c). That is, the payout control CPU 371 stores the number of prize balls included in the payout number instruction command sent from the CPU 56 of the main board 31 in the backup RAM area (total number storage).

The payout control CPU 371 performs, if necessary, decrements the command reception number counter and shifts the received command in the confirmed command buffer area. Further, as shown in FIG. 23, the payout control command has a 2-byte configuration, and if the first byte is “F0 (H)”, it can be confirmed immediately that the payout number command is. Then, the designated payout number can be immediately recognized by the data of the second byte. That is, it is recognized by one control signal (MODE byte) whether or not the command indicates the number of payouts, and the actual number of payouts is specified by another control signal (EXT byte).

FIG. 77 is a flowchart illustrating an example of the payout stop state setting process in step S654 in the payout control process. In the payout stop state setting process, the payout control CPU 371 checks whether or not there is a received command in the confirmed command buffer area (step S654a). If there is a received command in the confirmed command buffer area, it is checked whether or not the received payout control command is a payout stop instruction command (step S654b). If the command is a payout stop instruction command, the payout control CPU 371 sets the winning ball payout stop state (step S654c).

If it is confirmed in step S654b that the received command is not a payout stop instruction command, it is checked whether the received payout control command is a payout start instruction command (step S654d). If it is the payout start command, the award ball payout stop state is released (step S654e).

The payout control means recognizes information indicating whether or not payout is possible with one control signal (MODE byte) and specifies whether or not the payout is actually possible with another control signal (EXT byte). I do.

FIGS. 78 and 79 are flowcharts showing an example of the ball lending control process of step S656 in the payout control process. In this embodiment, the maximum value of the number of continuous payouts is set to one unit of the lending ball (for example, 25), but the maximum value of the number of continuous payouts may be another number.

In the ball lending control process, the payout control CPU 371 checks whether or not a ball is being paid out (step S511). If the ball is being paid out, the process proceeds to a ball lending process shown in FIG. 79. Whether or not the ball is being paid out is determined based on the state of a ball lending process flag described later. If the ball is not being paid out, it is confirmed whether or not the prize ball is being paid out (step S512). Whether or not a prize ball is being paid out is determined based on a state of a prize ball processing flag described later.

If neither the loaned ball is paid out nor the prize ball is paid out, the payout control CPU 371 checks whether or not a ball lending request has been issued from the card unit 50 (step S513). If there is a request, the ball lending process flag is turned on (step S514), and 25 (the number of ball lending units: 100 yen in this case) is set in the lending ball number storage in the backup RAM area (step S515). Then, the payout control CPU 371 turns on the EXS signal (step S516). In addition, the distributing solenoid 310 is driven to set the ball distributing member 311 below the ball dispensing device 97 to the ball lending side (step S517). Further, the payout motor 289 is turned on (step S518), and the processing shifts to a ball lending process shown in FIG.

Strictly, the payout motor 289 is turned on after the BRQ signal is turned off to indicate that the card unit 50 has recognized the reception. Further, the ball lending process flag is set in the backup RAM area.

FIG. 79 is a flowchart showing the ball lending process in the payout control process by the payout control CPU 371. In the ball lending process, if the payout motor 289 is not on, it is turned on. Further, in this embodiment, in the switch processing of step S751, it is checked whether or not the game balls have been paid out based on the detection output of the ball lending count switch 301B. Is not performed.

In the process of lending a ball, the payout control CPU 371 checks whether or not a lending ball passage waiting time is in progress (step S519). If it is not during the lending ball passage waiting time, the lending ball is paid out (step S520), and it is confirmed whether the driving of the payout motor 289 should be terminated (whether one unit of the payout operation has been completed) (step S521). ). Specifically, it is confirmed whether or not the rotation corresponding to the predetermined number of payouts has been completed. The rotation corresponding to the predetermined number of payouts is monitored by the output of the payout motor position sensor. When the rotation corresponding to the predetermined number of payouts is completed, the payout control CPU 371 stops driving the payout motor 289 (step S522), and sets a loan ball passing waiting time (step S523).

In the ball lending process in step S520, the on / off state of the payout motor position sensor is monitored by a timer. If the on state or the off state continues for a predetermined time or more, the payout control CPU 371 issues a payout motor ball bite error. Is determined to have occurred.

If it is during the waiting time for passing a lending ball in step S519, the payout control CPU 371 checks whether or not the waiting time for passing a lending ball has ended (step S524). The lending ball passing waiting time is the time from when the last payout ball is paid out by the payout motor 289 to when it passes through the ball lending count switch 301B. When confirming the end of the waiting time for passing a lending ball, since all lending balls have been paid out, it is necessary to indicate to the card unit 50 that the next lending ball lending request can be accepted. The EXS signal is turned off (step S524). In addition, the distribution solenoid is turned off (step S525), and the ball lending process flag is turned off (step S527).

If the last payout ball has not passed through the ball lending count switch 301B before the lending ball passage waiting time has elapsed, a ball lending path error is determined. In this embodiment, the prize ball and the ball lending are performed by the same payout device.

After turning off the EXS signal indicating the acceptance of the ball lending request, if the BRQ signal as the ball lending request signal is turned on again within a predetermined period, the ball lending process is continued without turning off the sorting solenoid and the payout motor. It may be. That is, instead of performing the ball lending process for each predetermined unit (100 yen unit in this example), the ball lending process may be performed continuously.

内容 The contents of the stored number of lent balls are retained by the backup power supply of the power supply board 910 for a predetermined period even if the power of the gaming machine is turned off. Therefore, when the power is restored during the predetermined period, the payout control CPU 371 can continue the ball lending process based on the content of the lending ball number storage.

FIGS. 80 and 81 are flowcharts showing an example of the winning ball control process in step S757. In this example, the maximum value of the number of continuous payouts is the same as one unit of the lending sphere (for example, 25), but the maximum value of the number of continuous payouts may be another number.

In the prize ball control processing, the payout control CPU 371 checks whether or not the rental ball is being paid out (step S531). Whether or not the loaned ball is being paid out is determined by the state of the ball lending processing flag. If the ball is not being paid out, it is determined whether or not a prize ball is being paid out (step S532). If the ball is being paid out, the processing shifts to the processing for awarded ball shown in FIG. Whether or not a prize ball is being paid out is determined based on a state of a prize ball processing flag described later.

If neither the loaned ball is paid out nor the prize ball is paid out, the payout control CPU 371 checks whether there is a ball lending preparation request from the card unit 50 (step S533). Whether or not there is a ball lending preparation request is performed by confirming whether the BRDY signal input from the card unit 50 is on (requested) or off (no request).

If there is no ball lending preparation request from the card unit 50, the payout control CPU 371 checks whether the number of prize balls (the number of unpaid prize balls) stored in the total number memory is not 0 (step S534). . If the number of prize balls stored in the total number storage is not 0, the prize ball control CPU 371 turns on the prize ball processing flag (step S535), and determines whether the value of the total number storage is 25 or more. Confirm (step S536). The award ball processing flag is set in the backup RAM area.

If the number of prize balls stored in the total number memory is 25 or more, the payout control CPU 371 sends a drive signal to the payout motor 289 so as to rotate the payout motor 289 until paying out 25 game balls. Is set (step S537). If the number of prize balls stored in the total number memory is not 25 or more, the payout control CPU 371 drives the payout motor 289 to rotate the payout motor 289 until all game balls stored in the total number memory are paid out. Is set (step S538). Next, the payout motor 289 is turned on (step S538). Since the distribution solenoid is off, the ball distribution member below the ball payout device 97 is set to the winning ball side. Then, the flow shifts to a processing during payout of prize balls in a prize ball control processing shown in FIG. 81.

FIG. 81 is a flowchart illustrating an example of processing during a winning ball in the payout control processing by the payout control CPU 371. In the process during the prize ball, if the payout motor 289 is not turned on, it is turned on. Further, in this embodiment, in the switch processing of step S751, it is checked whether or not the payout of the game ball has been performed by the detection output of the prize ball count switch 301A. Is not done.

In the processing during the prize ball, the payout control CPU 371 checks whether or not the prize ball passage waiting time is in progress (step S540). If it is not during the waiting time for passing a prize ball, a prize ball is paid out (step S541), and whether the driving of the payout motor 289 should be ended (whether 25 or a predetermined number of payout operations less than 25 have ended). Is confirmed (step S542).
Specifically, it is confirmed whether or not the rotation corresponding to the predetermined number of payouts has been completed. The rotation corresponding to the predetermined number of payouts is monitored by the output of the payout motor position sensor. When the rotation corresponding to the predetermined number of payouts is completed, the payout control CPU 371 stops driving the payout motor 289 (step S543), and sets a prize ball passing waiting time (step S544). The prize ball passage waiting time is the time from when the last payout ball is paid out by the payout motor 289 to when it passes through the prize ball count switch 301A.

The contents of the total number storage and the number of lent balls storage are retained by the backup power supply of the power supply board 910 for a predetermined period even if the power of the gaming machine is turned off. Therefore, when the power is restored during the predetermined period, the payout control CPU 371 can continue the payout process based on the contents of the total number storage.

Note that the payout control CPU 371 manages the number of prize balls instructed from the main board 31 as a total number in the prize ball number storage, but manages the number of prize balls for each (for example, 15, 10, or 6). Good. For example, a number counter corresponding to each award ball number is provided, and when a payout number designation command is received, the number counter corresponding to the number designated by the command is incremented by one. When the payout corresponding to the number counter is performed, the number counter is decremented by one (in this case, the subtraction processing is performed in the payout control processing). Also in this case, each number counter is formed in the backup RAM area. Therefore, even if the power of the gaming machine is turned off, if the power is restored during the predetermined period, the payout control CPU 371 can continue the prize ball payout process based on the content of each number counter.

If it is determined in step S540 that the waiting time for passing a prize ball is in progress, the payout control CPU 371 checks whether the waiting time for passing a prize ball has ended (step S545). When the prize ball passing waiting time ends, all the prize balls set in step S537 or step S538 have been paid out. Therefore, the payout control CPU 371 turns off the prize ball processing flag if the prize ball passage waiting time has expired (step S546). If the last payout ball has not passed through the prize ball count switch 301A before the prize ball passage waiting time has elapsed, a prize ball path error is determined.

In this embodiment, the ball lending is given priority over the prize ball processing according to the determinations in steps S511 and S531, but the prize ball processing may be given priority over the ball lending.

As described above, in this embodiment, in addition to the main board 31, the symbol control board 80, the lamp control board 35, the voice control board 70, and the payout control board 37 are provided, and each control on the electric component control board is performed. Since the means is configured to perform specific game effect control or value giving control, the control load on the game control means is greatly reduced. In addition, since the power supply board 910 supplies the working voltage to each board, the cost for power supply is reduced.

Further, a control command from the main board 31 to each electric component control board is composed of two control signals, and when they are correctly received, control based on the control command is started, so that erroneous control is performed. The possibility of occurrence is greatly reduced. Each control means recognizes the type of the control content by one of the two control signals and specifies the detailed control content by the other control signal. Therefore, the control means can flexibly change the command system. It can also correspond to.

In particular, of the electric component control means, the effect component control means (in this example, the display control means, the lamp control means, and the voice control means) for controlling the effect parts, which are electric parts used in the game effect, are provided with two control signals. One of which recognizes the type of production content, and the other control signal specifies the detailed production content, so it can flexibly respond to changes in the command system etc. according to changes in game production etc. be able to.

Further, since the power supply board 910 separate from each electric component control board is provided, power can be intensively supplied to the plurality of electric component control boards. Therefore, the cost of supplying power to the gaming machine does not increase so much. Further, since the power supply creating means is one in the gaming machine, it is easy to order the power supply to each electric component control board. For example, if the power supply to another electric component control board is started before the power supply to the main board 31 is started, the control signal is sent from the game control means immediately after the power supply to the gaming machine is started. , Each electric component control means can reliably detect a take-in signal and a control signal from the game control means. In particular, since the part of the electric component control means that causes the interruption of the CPU has also started its operation reliably, the interruption based on the fetch signal is also surely generated.

The game control means can transmit a common control signal to each of the electric component control means for controlling the electric components, so that the configuration of the control signal output portion in the game control means is simplified. For example, control signal output processing for each electric component control means can be realized by one module. Furthermore, as in the above-described embodiment, if the capture signal (INT signal) for each electric component control means is output from one output port (see FIG. 27 and the like), the control signal is shared. In addition, the output of the capture signal can be facilitated, so that the configuration of the control signal output portion can be further simplified.

Further, since two common control signals are transmitted for one command, even if an error occurs in one of the data between the boards, the electric component control means can easily detect the error, and Electric component control based on an erroneous control signal is more reliably prevented. For example, if different values are set in the respective specific bits of the two control signals as in the above-described embodiment, the electric component control unit can easily determine which data has been received. It is possible to easily detect the occurrence of an error (that is, missing one byte). Further, when the control signal is fetched in the interrupt processing based on the fetch signal, a data error can be easily detected in the interrupt processing, so that the execution time of the interrupt processing is shortened. be able to.

Then, in the case where the effect component control means is configured to perform an effect by selecting from a plurality of types of effect contents when the control signal is received, for effect control (for example, reach effect) performed in response to the control signal. With this configuration, the burden on the game effect selection of the game control means is reduced. Also, the types of control signals are reduced. Since the burden on the game control means relating to the selection of the game effect is reduced, the game control means can secure more time than can be used for other controls, and can enrich the contents of the game effect as a whole.

In the pachinko gaming machine 1 of each of the above-described embodiments, the predetermined game value is given to the player when the stop symbol of the special symbol variably displayed on the variable display portion 9 based on the winning start is a combination of the predetermined symbol. Although it was a first-class pachinko gaming machine that can be given, a second-type pachinko machine that can give a predetermined game value to a player if there is a prize in a predetermined area of an electric accessory that is opened based on a starting prize. A third kind of pachinko machine in which a predetermined right is generated or continued when there is a prize to a predetermined gaming combination that is opened when a stop symbol of a game variably displayed based on a winning prize is a predetermined symbol combination. The present invention can be applied to a gaming machine.

The present invention is not limited to the pachinko gaming machine, but may be applied to a slot machine or the like in the case where an electric component control board for controlling an electric component that performs some operation is provided.

It is the front view which looked at the pachinko gaming machine from the front. It is an explanatory view showing each substrate provided on the back of the pachinko gaming machine. It is the back view which looked at the mechanism board of the pachinko gaming machine from the back. FIG. 4 is a front view illustrating a configuration around an intermediate base unit installed on a mechanism plate. It is an exploded perspective view showing a ball payout device. It is a block diagram which shows the circuit structure of a game control board (main board). It is a block diagram which shows the circuit structure in a symbol control board. FIG. 3 is a block diagram illustrating a circuit configuration in a lamp control board. FIG. 3 is a block diagram illustrating a circuit configuration in a voice control board. It is a block diagram showing components related to a prize ball, such as components of a payout control board and a ball payout device. FIG. 3 is a block diagram illustrating a configuration example of a power supply board. FIG. 3 is a block diagram illustrating a configuration example of a reset management circuit. FIG. 9 is a timing chart showing the state of output signals of a reset IC and peripheral ICs. 9 is a flowchart illustrating an example of a main process executed by a CPU on a main board. It is a flowchart showing an example of a game control process. FIG. 4 is an explanatory diagram showing each random number. It is a flow chart which shows processing which judges that a hit ball has won a start winning opening. It is a flowchart which shows the process which determines the stop symbol of variable display, and the process which determines a reach type. It is a flowchart which shows the process of a big hit determination. It is a flowchart which shows a special symbol process process FIG. 4 is an explanatory diagram illustrating an example of a command form of a control command. FIG. 6 is a timing chart showing a relationship between an 8-bit control signal and an INT signal which constitute a control command. It is an explanatory view showing an example of the contents of a payout control command. FIG. 9 is an explanatory diagram illustrating an example of the content of a display control command. FIG. 8 is an explanatory diagram illustrating an example of the content of a lamp control command. FIG. 4 is an explanatory diagram illustrating an example of the content of a voice control command. FIG. 4 is an explanatory diagram illustrating a configuration example of a command transmission table. It is a flowchart which shows the example of a process of a command control process. It is a flowchart which shows a command transmission routine. It is explanatory drawing which shows the example of a left and right middle symbol displayed on a variable display part. It is explanatory drawing which shows the example of the background design displayed on a variable display part. FIG. 9 is an explanatory diagram illustrating an example of a character displayed on a variable display unit. FIG. 9 is an explanatory diagram illustrating an example of a character displayed on a variable display unit. It is an explanatory view showing a display control command capable of specifying a variable display period of a symbol and a display control command instructing stop of all symbols. It is explanatory drawing which shows the display control command of the stop symbol of a left symbol. It is explanatory drawing which shows the display control command of the stop symbol of a middle symbol. It is explanatory drawing which shows the display control command of the stop symbol of a right symbol. It is explanatory drawing which shows the fluctuation | variation state which comprises each fluctuation | variation pattern of a symbol. It is a timing chart which shows an example of the change of the symbol at the time of the out of reach. It is a timing chart which shows an example of the fluctuation of the symbol at the time of the reach. It is a timing chart which shows an example of the fluctuation of the symbol at the time of the reach. It is a timing chart which shows an example of the fluctuation of the symbol at the time of the reach. It is a timing chart which shows an example of the fluctuation of the symbol at the time of the reach. It is a flowchart which shows the process of waiting for the start of all the symbol change in the special symbol process process. It is a flowchart which shows the all symbol stop waiting process in a special symbol process process. 9 is a flowchart illustrating a main process executed by a display control CPU. It is a flowchart which shows a timer interruption process. It is a flowchart which shows a command reception interruption process. FIG. 9 is an explanatory diagram showing display random numbers. It is explanatory drawing which shows the relationship between a display random number, a reach mode, a reach announcement mode, and a big hit announcement mode. It is a flowchart which shows a display control process process. It is a flowchart which shows the display control command reception waiting process of a display control process process. It is a flowchart which shows the reach operation setting process of a display control process process. It is a flowchart which shows a reach announcement determination process. It is a flowchart which shows a reach mode determination process. It is a flowchart which shows a big hit notice determination process. FIG. 4 is an explanatory diagram illustrating a configuration example of a display control process table. It is a flowchart which shows the all symbol stop waiting process of a display control process process. It is a flowchart which shows all the symbol change start processes of a display control process process. It is a flowchart which shows the all symbol stop waiting process of a display control process process. It is a flowchart which shows the big hit display process of a display control process process. 9 is a flowchart illustrating main processing executed by a lamp control CPU. It is a flowchart which shows a timer interruption process. It is a flowchart which shows a lamp control process. FIG. 4 is an explanatory diagram illustrating an example of a lamp / LED control pattern corresponding to pattern data. 5 is a flowchart illustrating a main process executed by a voice control CPU. It is a flowchart which shows a timer interruption process. It is a flowchart which shows a voice control process. It is a flowchart which shows the example of the main process which CPU for payout control performs. It is a flow chart which shows an example of initialization processing of CPU for payout control. It is a flowchart which shows the example of the timer interruption process of the CPU for payout control. It is a flowchart which shows the example of the payout control process which CPU for payout control performs. It is an explanatory view showing an example of 1 composition of RAM in payout control means. FIG. 9 is an explanatory diagram illustrating a configuration example of a confirmation command buffer. It is a flowchart which shows the example of the command receiving process of the CPU for payout control. 9 is a flowchart illustrating an example of a command analysis execution process. It is a flowchart which shows the example of a payment stop state setting process. It is a flowchart which shows the example of a ball lending control process. It is a flowchart which shows the example of a ball lending control process. It is a flowchart which shows the example of a prize ball control process. It is a flowchart which shows the example of a prize ball control process.

Explanation of reference numerals

9 Variable display unit 10 Ordinary symbol display 31 Game control board (main board)
35 Lamp control board 37 Dispensing control board 56 CPU
57 I / O port 70 Voice control board 80 Symbol control board 101 Display control CPU
351 Lamp control CPU
371 Dispensing control CPU
701 Voice Control CPU
910 power supply board

Claims (4)

A gaming machine in which a player can perform a predetermined game,
Game control means for controlling the progress of the game,
Electrical component control means for controlling a predetermined type of electrical component provided in the gaming machine,
The game control means controls the electric component by sequentially outputting each control data in a control command including a plurality of control data and a capture signal for instructing the capture of the control data to the electrical component control means. Including output means for transmitting control content to the electric component control means,
The electric component control means,
An interruption unit that generates an interrupt in response to the interruption signal, and acquires control data by an interruption process executed in response to the occurrence of the interruption,
A plurality of control data captured by the capturing unit, a determination unit that determines that a control command has been correctly received when the plurality of control data was captured in the order output by the output unit,
Control means for performing an electrical component control process for controlling the electrical component according to the control command determined that the determination means has been correctly received,
The electrical component control process is performed in response to an interrupt that occurs periodically,
A gaming machine, wherein the interruption process is executed prior to the electric component control process. The gaming machine according to claim 1, wherein the output means outputs a specific portion in the first control data of the control command composed of the two control data and the specific portion in the second control data differently. 3. The gaming machine according to claim 1, wherein one of the plurality of control data is data that specifies a type of control, and the other control data is data that specifies details of the control content. 4. The predetermined type of electrical component includes a rendering component for producing a game,
The gaming machine according to any one of claims 1 to 3, wherein the electrical component control means specifies, using one control data, the information indicating the production period, and specifies the production period using another control data. .

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