JP2004000755A - Pachinko game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pachinko game machine which can prevent the fraudulence using a 'hanging board' or the like. <P>SOLUTION: Value of an initial value counter is updated repeatedly by initial value counter updating processing during the remaining time in a reset interrupt processing (S22). The reset interrupt processing is executed in every 2 ms. However, since each of the processing time for processing S1 to S20 executed in one reset interrupt processing varies according to the situations of games, the remaining time of the reset interrupt processing is not fixed but is an indefinite changing in response to the situations of the games. Since the 'hanging board' is incapable of grasping the indefinite time, and the value of the initial value counter which is updated repeatedly within such an indefinite time, is used as the updated initial value for a random number counter. This makes the 'hanging board' unable to grasp the timing of the occurrence of each big win, using the 'hanging board' thereby enabling the prevention of fraudulence using the 'hanging board'. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to a ball game machine typified by a pachinko game machine and the like, and more particularly to a ball game machine capable of preventing fraudulent acts such as a “hanging board”.

This kind of pachinko gaming machine is provided with a display device capable of variably displaying a plurality of types of symbols, and is configured to start the variability display when a hit ball hit into the game area passes through a symbol operation gate. . When the variable display is stopped in accordance with a predetermined combination of symbols, a big hit occurs, a predetermined game value is given to the player, and a large amount of game balls can be paid out.

有無 The presence or absence of such a big hit is determined at the timing when the hit ball passes through the symbol operation gate. That is, a counter that is updated periodically in a fixed range by one count (for example, in a range of 0 to 630 every 2 ms every one count) is provided, and when the hit ball passes through the symbol operation gate, the counter is updated. Is read, and when the read value of the counter matches a predetermined value such as “7”, a jackpot is generated. When a big hit occurs, a big hit command is transmitted to the display board of the display device via the cable connected to the connector of the control board. In the display device, the variable display is controlled based on the received big hit command, and a big hit display that stops at a predetermined combination of symbols appears.

However, recently, fraudulent activities using a fraudulent substrate called a “hanging substrate” have been reported. This fraudulent act involves hanging an improper board (attaching an improper “hanging board”) between the control board and the display board of the display device, thereby causing an unreasonable jackpot. Specifically, a counter (a counter that is periodically updated in a fixed range by one count) having the same function as the counter for determining the jackpot provided in the pachinko gaming machine is placed in the “hanging board”. By setting the value of the counter and resetting (clearing it to 0) when the power of the pachinko gaming machine is turned on, it is possible to grasp the timing of occurrence of a jackpot in the “hanging board”. Then, in accordance with the timing of the occurrence of the jackpot, the falsely generated signal for passing the gate operation symbol for the hit ball in the "hanging board" is output to the control board of the pachinko machine, thereby generating an unreasonable jackpot. It is to let. In a game arcade and the like, there has been a problem that an illegal act using the “hanging board” has caused a great deal of damage.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and makes it impossible to grasp the timing of occurrence of a jackpot, thereby preventing a fraudulent activity using a "hanging board" or the like. It is intended to provide.

In order to achieve this object, the ball game machine according to claim 1, wherein an interrupt process periodically executed, a random number counter, and a first updating means for updating the value of the random number counter by the interrupt process Reading means for reading the value of the random number counter in response to a predetermined trigger. When the value of the random number counter read by the reading means matches one of predetermined values, the player A predetermined game value is provided under the condition, an initial value memory for storing an initial value of the random number counter being updated, and a value written to the initial value memory and the random number counter, the next time of the random number counter. An initial value counter composed of at least 2 bytes for counting the initial value of the update of the random number counter, reading the value of the initial value counter, and setting the value within the range of the update of the random number counter. In the calculation direction, the updated value is written to the initial value counter in the order of the upper byte and the lower byte, and is repeatedly executed during the remaining time until the next interrupt processing is performed by the interrupt processing. A second updating unit; and a returning unit that returns the value of the initial value counter to a value within a range of updating the random number counter before writing the value of the initial value counter to the random number counter and the initial value memory.

Further, according to a second aspect of the present invention, there is provided a bullet-ball game machine, wherein an interrupt process periodically executed, a random number counter, a first updating means for updating the value of the random number counter by the interrupt process, Reading means for reading the value of the random number counter, and when the value of the random number counter read by the reading means matches one of predetermined values, the player is given a predetermined value under a predetermined condition. A game value is given, an initial value memory for storing an initial value of the random number counter being updated, and a value written to the initial value memory and the random number counter, the initial value of the next update of the random number counter. An initial value counter composed of at least 2 bytes for counting the value, reading the value of the initial value counter, and updating the value in the subtraction direction within the range of updating the random number counter; Second updating means for writing the new value to the initial value counter in the order of the lower byte and the upper byte, and repeatedly executing the remaining time until the next interrupt processing occurs by the interrupt processing; And a return means for returning the value of the initial value counter to a value within a range of updating the random number counter before writing the value to the random number counter and the initial value memory.

According to the bullet game machine of the present invention, in the interrupt processing that is periodically executed, the value of the random number counter is updated by the first updating means, and is read by the reading means at a predetermined timing. When the read value of the random number counter matches one of the predetermined values, a jackpot is won, and a predetermined game value is given to the player under predetermined conditions.

The value of the initial value counter that counts the initial value of the next update of the random number counter is written to the random number counter and the initial value memory, and the initial value of the update of the random number counter is changed. As described above, since the initial value of the update of the random number counter is not a fixed value but a value that is periodically changed, the “hanging board” or the like may become invalid when the ball game machine is turned on. Even if the counter is reset, the value of the incorrect counter cannot be matched with the value of the random number counter. Therefore, it is possible to prevent the “hanging substrate” or the like from knowing the timing of the occurrence of the big hit.

{Furthermore, the value of the initial value counter that counts the initial value of the update of the random number counter is repeatedly updated by the second updating means during the remaining time of the interrupt processing that is periodically executed. The length of the remaining time of the interrupt process changes according to the state of the game, and cannot be grasped by a “hanging board” or the like. Therefore, since the value of the initial value counter is updated by repeatedly executing the second updating means during the remaining time, it is possible to prevent the value of the random number counter from being grasped by a "hanging board" or the like in this regard. it can.

By the way, in the first aspect of the present invention, the value of the initial value counter is composed of at least 2 bytes, and the value is read out by the second updating means and added in the range of the updating of the random number counter. , The updated value is written to the initial value counter in the order of upper byte and lower byte. After the updated value is written to the upper byte of the initial value counter and before writing to the lower byte, if the remaining interrupt processing time runs out and the next interrupt occurs, the value of the initial value counter becomes a random number. The value may be out of the range for updating the counter.

{For example, a case where the value of the random number counter is updated within the range of “0 to 276h” and the value of the initial value counter is “1FFh” will be described. In this case, the value of the initial value counter must also be updated within the range of "0 to 276h". It is assumed that the value of the initial value counter of "1FFh" is read by the second updating means, and the value is updated in the addition direction, for example, "+1", and the updated value becomes "200h". The updated value is written to the initial value counter in the order of the upper byte and the lower byte by the second updating means. Therefore, the value of the initial value counter changes from “1FFh” to “2FFh” after the writing of the upper byte, and further to the lower byte. Is updated to “200h”. However, if an interrupt occurs after writing to the upper byte and before writing to the lower byte, the updating of the initial value counter ends without writing to the lower byte. Becomes a value of “2FFh”, which is a value outside the range of updating the random number counter.

When the value of the initial value counter becomes a value outside the range of updating the random number counter, the value of the random number counter becomes a value outside the range that should be updated, and thus a predetermined problem occurs. For example, the probability of the jackpot occurrence becomes different from the expected probability, or the initial value of the update of the random number counter is not changed thereafter. However, since the value of the initial value counter is restored (returned) to a value within the range of updating the random number counter before writing to the random number counter and the initial value memory by the restoration means, these problems are avoided. You can do it.
Further, in the ball game machine according to the second aspect, the value of the initial value counter is composed of at least 2 bytes, and the value is read out by the second updating means and is subtracted in the range of the update of the random number counter. After the update, the updated value is written to the initial value counter in the order of the lower byte and the upper byte. Therefore, after the updated value is written to the lower byte of the initial value counter and before writing to the upper byte, the remaining time of the interrupt processing is exhausted and the next interrupt occurs. May be outside the range of updating the random number counter. If the value of the initial value counter becomes a value outside the range of updating the random number counter, the value of the random number counter becomes a value outside the range that should be updated as described above, causing a predetermined problem. However, the value of the initial value counter is returned (returned) to a value within the range of the update of the random number counter before writing to the random number counter and the initial value memory by the return means. Can be.
According to a third aspect of the present invention, in the ball game machine according to the first or second aspect, the return means updates the value of the initial value counter with a value within an update range of the random number counter. The third updating means is configured to be executed at least once before the first updating means is executed.

According to the first and second embodiments, the initial value of the update of the random number counter for determining the jackpot is not a fixed value, but a value that is changed periodically. Even if the "hanging board" resets an incorrect counter inside the apparatus when the machine is turned on, the value of the counter cannot be made to match the value of the random number counter. Therefore, there is an effect that it is impossible to know the timing of the occurrence of the jackpot by the "hanging board" or the like, and it is possible to prevent the illegal act by the "hanging board" or the like.
Moreover, the value of the initial value counter that counts the initial value of the update of the random number counter is repeatedly updated during the remaining time of the interrupt processing that is periodically executed. The length of the remaining time of the interrupt process changes according to the state of the game, and cannot be grasped by a “hanging board” or the like. Therefore, since the value of the initial value counter is repeatedly updated during the remaining time, it is possible to prevent the value of the random number counter from being grasped by a "hanging board" or the like.
The value of the initial value counter is returned to a value within the range of updating the random number counter by the return means before writing to the random number counter and the initial value memory. Therefore, the value of the random number counter can be updated within the range of the original value to be updated, so that the probability of occurrence of a jackpot changes to an unexpected probability, or the initial value of the random number counter is updated. This has the effect of avoiding the problem of no longer being changed.
According to the third aspect of the present invention, in addition to the effect of the first aspect of the present invention, the updating of the initial value counter by the third updating means is performed by the first updating means. Executed at least once before execution. Therefore, even when the value of the initial value counter becomes a value outside the update range of the random number counter, the value can be returned to a value within the update range of the random number counter before execution of the first updating means. Therefore, there is an effect that the value of the random number counter can always be updated within a predetermined update range.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. In this embodiment, a description will be given using a pachinko gaming machine as an example of a ball-and-ball gaming machine, in particular, a first-type pachinko gaming machine. Note that it is naturally possible to use the present invention for a third-type pachinko game machine and other ball and ball game machines.

FIG. 1 is a front view of a game board of the pachinko gaming machine P in the first embodiment. Around the game board 1, there are provided a plurality of winning ports 2 from which 5 to 15 game balls are paid out when a hit ball wins. In the center of the game board 1, a liquid crystal (LCD) display 3 for displaying a plurality of kinds of symbols as identification information is provided. The display screen of the LCD display 3 is divided into three parts in the horizontal direction, and in each of the three divided display areas, a variable display of a symbol is performed.

(4) A symbol operation gate (first-type starting port) 4 is provided below the LCD display 3, and when the hit ball passes through the symbol operation gate 4, the above-described variable display of the LCD display 3 is started. Below the symbol operation gate 4, a specific winning opening (large winning opening) 5 is provided. When the display result after the change of the LCD display 3 matches one of the predetermined symbol combinations, the specific winning opening 5 becomes a big hit and a predetermined time (for example, 30) is set so that the hit ball can easily win. The winning opening is opened until the second elapses or until 10 hit balls are won. The specific winning opening 5 is provided with a V zone 5a. If a hit ball passes through the V zone 5a while the specific winning opening 5 is open, a continuation right is established and the specific winning opening 5 is closed. Thereafter, the specific winning opening 5 is opened again for a predetermined time (or until a predetermined number of hit balls are won in the specific winning opening 5). The opening and closing operation of the specific winning opening 5 can be repeated up to 16 times (16 rounds), and a state in which the opening and closing operation can be performed is a state in which a predetermined game value is given (a special game state). is there.

FIG. 2 is a block diagram showing an electrical configuration of the pachinko gaming machine P. The control unit C of the pachinko gaming machine P includes a CPU 11 as an arithmetic unit, a ROM 12 storing various control programs executed by the CPU 11 and fixed value data, and a memory for temporarily storing various data. And a RAM 13. 3 to 5 are stored in the ROM 12 as a part of the control program.

The CPU 11 includes an ALU for performing an operation, an accumulator (hereinafter referred to as “Acc”) 11a, a plurality of internal registers 11b, and a flag register 11c. The value of the counter or the like provided in the RAM 13 is temporarily loaded (written) into the internal register 11b of the CPU 11, updated in the internal register 11b, and then saved (written) into the original counter of the RAM 13. T), will be updated.

The 68-system 8-bit CPU 11 saves (writes) a pair of 2-byte (16-bit) values of the internal register 11b to a 2-byte memory (in the RAM 13) of a continuous address with one instruction. be able to. In this case, the writing is performed in the order of the upper byte and the lower byte since the data bus of the bus line 14 is composed of 8 bits. On the other hand, in the 80-series 8-bit CPU, contrary to the 68-series CPU 11, the paired 2-byte (16-bit) internal register values are transferred to the 2-byte memory of the continuous address by the lower byte upper byte. It can be saved by one instruction in byte order.

The RAM 13 includes a random number counter 13a, an initial value counter 13b, and an initial value memory 13c. The random number counter 13a is a counter for determining occurrence of a jackpot, and is updated by one count every 2 ms within a range of “0 to 630 (0 to 276h)” by the random number update process (S7) in FIG. You. Therefore, the random number counter 13a is composed of 2 bytes. If the value of the random number counter 13a acquired when the hit ball passes through the symbol operation gate 4 is, for example, "7", a big hit occurs. When a big hit occurs, a big hit command is sent from the control unit C to a display device D described later. The display device D controls the variable display of the LCD display 3 to a jackpot state based on the jackpot command.

The initial value counter 13b is a counter for counting the initial value of the update of the random number counter 13a, and is composed of 2 bytes like the random number counter 13a. The value of the initial value counter 13b is updated by one count in the initial value counter update process (S6, S22) of FIG. 5 in the same range of "0 to 630 (276h)" as the update range of the random number counter 13a. .

The update processing of the initial value counter of FIG. 5 is repeated during the remaining time in the reset interrupt processing of FIG. 3, that is, after the end of the sound effect processing (S20) and until the next reset interrupt processing occurs. It is executed (S22). The reset interrupt processing is executed every 2 ms. However, since the processing time of each processing from S1 to S20 executed in one reset interrupt processing changes according to the game situation, the remaining time of the reset interrupt processing is not changed. The time is not a fixed time but an indefinite time that changes according to the game situation. Since the "hanging board" cannot grasp this indefinite time, by using the value of the initial value counter 13b repeatedly updated within the indefinite time as the initial value of the update of the random number counter 13a, the "hanging board" It is impossible to grasp the timing of the jackpot occurrence by the "substrate".

As described later in the description of FIG. 5, the value of the initial value counter 13b is updated via the internal register 11b of the CPU 11. Writing from the internal register 11b to the initial value counter 13b is performed in the order of the upper byte and the lower byte by one instruction of the 68 system CPU 11. Therefore, for example, when the value of the initial value counter 13b before the update is “1FFh”, after the value is updated to “200h” in the internal register 11b, the updated value is transferred to the initial value counter 13b in the order of the upper byte and the lower byte. It is written (S45). That is, the value of the initial value counter 13b is temporarily changed to "2FFh" by writing the upper byte of the internal register 11b from the state of "1FFh", and thereafter, the lower byte of the internal register 11b is written and updated to "200h". It is done.

However, since the initial value counter updating process of FIG. 5 is repeatedly executed during the remaining time of the reset interrupt process, the upper byte of the updated internal register 11b is written to the initial value counter 13b, and the internal register is updated. Before writing the lower byte of 11b (during the process of S45), the next reset interrupt process may occur. The reset interrupt is a non-maskable interrupt for which the occurrence of an interrupt cannot be prohibited, has the highest priority, and is forcibly started even during the execution of an instruction of the CPU 11. It is. Therefore, at this timing (after writing the upper byte of the updated internal register 11b to the initial value counter 13b and before writing the lower byte of the internal register 11b), when a reset interrupt occurs, the initial value counter 13b May be “767 (2FFh)” which exceeds the range of “0-630 (0-276h)” which is the original update range.

Since the update range of the value of the random number counter 13a is also "0 to 630 (0 to 276h)", assuming that the value (767 (2FFh)) of the initial value counter 13b is the initial value of the random number counter 13a, the update cycle of the random number counter 13a Fluctuates to make the probability of occurrence of a jackpot different from the set value, or the update initial value of the random number counter 13a cannot be changed thereafter. In the random number updating process (S7) of FIG. 4, the value of the random number counter 13a cannot be equal to or more than "631 (277h)" (S33: Yes, S34). Is written to the initial value memory 13c as the initial value of the update of the random number counter 13a (S36, S37), no branch of Yes can occur in the processing of S35 thereafter. Because.

Here, the value of the initial value counter 13b is written to the random number counter 13a as the initial value in the random number updating process (S36 to S38 in S7). On the other hand, the value of the initial value counter 13b that has become a value outside the original update range is returned to a value within the original update range by re-executing the initial value counter update process of FIG. This is because the value of the initial value counter 13b equal to or greater than "631 (277h)" is cleared to "0" (S43: Yes, S44, S45). Therefore, in the present embodiment, in order to avoid the occurrence of the above-described inconvenience, not only the initial value counter update process of FIG. 5 is repeatedly executed during the remaining time of the reset interrupt process (S22), but also the random number update process is executed. It is executed at least once before the execution of (S7) (S6).

The initial value memory 13c is a memory for storing the initial value of the update of the random number counter 13a, and is composed of 2 bytes like the random number counter 13a. In this embodiment, the initial value of the update of the random number counter 13a is changed every time the random number counter is updated. Therefore, when the updated value of the random number counter 13a matches the value of the initial value memory 13c, it means that one round of updating of the random number counter 13a has been completed, and when the values 13a and 13c match, the Is written to the random number counter 13a and the initial value memory 13c, and the updated initial value of the random number counter 13a is changed. Therefore, even if the initial value of the update of the random number counter 13a is changed, there is uniformity of the random numbers (the same value is not obtained when continuously obtained, and all values can be extracted with the same probability). You can get a random value.

The CPU 11, the ROM 12, and the RAM 13 are connected to each other via a bus line 14, and the bus line 14 is also connected to an input / output port 15. The input / output port 15 is connected to the display device D and another input / output device 16. The control unit C sends operation commands to the display device D and other input / output devices 16 via the input / output port 15 to control those devices. The variable display on the LCD display 3 and the opening / closing operation of the specific winning opening 5 are also controlled based on this operation command.

The display device D includes a CPU 21, a program ROM 22, a work RAM 23, a video RAM 24, a character ROM 25, an image controller 26, an input / output port 27, and the LCD display 3. The CPU 21 of the display device D performs display control (variable display) of the LCD display 3 in response to an operation command output from the control unit C. The program ROM 22 stores a program executed by the CPU 21. Have been. The work RAM 23 is a memory that stores work data used when the CPU 21 executes a program.

The video RAM 24 is a memory in which data displayed on the LCD display 3 is stored. By rewriting the contents of the video RAM 24, the display contents of the LCD display 3 are changed. That is, the change display of the symbol in each display area is performed by rewriting the contents of the video RAM 24. The character ROM 25 is a memory for storing character data such as symbols displayed on the LCD display 3. The image controller 26 adjusts the timing of each of the CPU 21, the video RAM 24, and the input / output port 27 to intervene reading and writing of data, and to display the display data stored in the video RAM 24 at a predetermined timing with reference to the character ROM 25. This is to be displayed on the LCD display 3.

Next, each processing executed in the pachinko gaming machine P configured as described above will be described with reference to the flowcharts of FIGS. FIG. 3 is a flowchart of a reset interrupt process executed every 2 ms in the control unit C of the pachinko gaming machine P. The main control of the pachinko gaming machine P is executed by this reset interrupt processing.

In the reset interrupt processing, first, a stack pointer is set (S1), and a pattern written in a predetermined area of the RAM 13 is checked (S2). As a result of the check, if the predetermined pattern is written in the predetermined area, the RAM 13 is normal without any abnormality (S2: normal), and the process proceeds to S3. On the other hand, as a result of the check in S2, if the predetermined pattern is not written in the predetermined area, it is the reset interrupt processing executed first after the power is turned on, or the RAM 13 is abnormal (S2: abnormal). In this case, the process proceeds to S23, where the contents of the RAM 13 are once cleared, and then an initial value is written into the RAM 13 (S23), and the process waits for the next reset interrupt process.

で は In the process of S3, the timer interrupt is set (S3). The timer interrupt set here includes a timer interrupt for generating a strobe signal for transmitting a command for controlling the display on the LCD display 3 to the display device D. After the setting of the timer interrupt, each interrupt is enabled (S4). After the permission of the interrupt, the output data updated in the previous reset interrupt process by the special symbol change process (S16), the display data creation process (S18), the ramp / information processing (S19), and the like are simultaneously processed. A port output process for outputting to a port is executed (S5). Thereafter, an initial value counter update process (S6) described later is executed to update the initial value counter 13b by "+1" in the adding direction, and a random number update process (S7) is executed to change the value of the random number counter 13a to "1". +1 "is updated, and a storage timer subtraction process is executed (S8). The storage timer subtraction process shortens the symbol change display time when the number of reserved balls for the jackpot determination is equal to or more than a predetermined number and the symbol display is being displayed on the LCD display 3.

In the switch reading process (S9), the value of each switch is read, whereby the hit ball 2 hit into the game area 1 wins the winning opening 2 or the large winning opening 5 (including the V zone 5a), and the symbol operation gate 4 This is a process for detecting a passing ball and a prize ball or a lending ball. The count abnormality monitoring process (S10) is a process for monitoring whether there is an abnormality in the switch data read by the switch reading process of S9. For example, even if the special winning opening 5 is opened and the hit ball is detected by the V count switch for detecting the passing of the hit ball through the V zone 5a, the winning in the special winning opening 5 other than the V zone 5a is detected. If one ball cannot be detected by the count switch, the 10 count switch has some abnormality, for example, the 10 count switch is removed. In addition, if one prize ball is not paid out even though the motor for paying out the prize ball is driven, some abnormality has occurred in the prize ball payout device. As described above, in the count abnormality monitoring process (S10), the presence or absence of the above-described abnormality is monitored based on the switch data read in the switch reading process (S9).

In the symbol counter updating process (S11), a counter updating process for determining a symbol to be stopped and displayed as a result of the variable display performed on the LCD display 3 is performed. Further, in the symbol check process (S12), based on the value of the counter updated in the symbol counter update process (S11), a big hit symbol used in the special symbol variation process (S16), a lost symbol, and a reach symbol. Is determined.

In the process from S3 to S12, if no error has occurred (S13: normal), the normal symbol variation process (S14) displays the 7-segment LED variation, and as a result of the variation display, a hit occurs. In such a case, a hitting process is performed to open the electric accessory (not shown) for a predetermined time. Thereafter, the state flag is checked (S15), and if the symbol is being displayed on the LCD display 3 while the symbol is being changed (S15: symbol is being changed), the timing at which the hit ball passes through the symbol operating gate 4 by the special symbol changing process (S16). Based on the value of the random number counter 13a read in step (1), it is determined whether or not a big hit has occurred, and a process of changing the display symbol on the LCD display 3 is executed. On the other hand, as a result of checking the status flag, if a big hit is being made (S15: big hit), a big hit process (S17) such as opening the big winning port 5 is executed. Further, as a result of checking the state flag, if the symbol is not fluctuating or a big hit (S15: other), the processing of S16 and S17 is skipped, and the process proceeds to the display data creation processing of S18. In the process of S13, if an error is confirmed (S13: error), each process of S14 to S17 is skipped, and the process proceeds to the display data creation process of S18.

In the display data creation process (S18), demonstration data to be displayed on the LCD display 3 and display data of a 7-segment LED are created in addition to the symbol change display. Various lamp data including data are created. In the sound effect processing (S20), sound effect data according to the game situation is created. The display data and the sound effect data are output to each device by the port output process (S5) and the timer interrupt process described above.

After the end of the sound effect processing (S20), the symbol counter updating processing (S21), which is the same processing as S11, and the same processing as S6, for the remaining time until the next reset interrupt processing occurs. The initial value counter updating process (S22) is repeatedly executed. Since the execution time of each processing of S1 to S20 changes according to the state of the game, the remaining time until the next reset interrupt processing occurs is not a fixed time but changes according to the state of the game. Therefore, by repeatedly executing the symbol counter updating process (S21) using the remaining time, the stopped symbol can be changed at random. In addition, by repeatedly executing the initial value counter updating process (S22) using the remaining time, the value of the initial value counter 13b, which is the initial value of the update of the random number counter 13a, cannot be grasped by the "hanging board". can do.

FIG. 4 is a flowchart of the random number updating process. In the random number updating process (S7), the value of the random number counter 13a is updated by "+1" in the range of "0 to 630 (0 to 276h)" via the internal register 11b of the CPU 11 and used by the control unit C. Other random numbers are being updated.

{First, the value of the 2-byte random number counter 13a is written to the 2-byte internal register 11b (S31). The value of the internal register 11b is incremented by 1 (S32), and it is checked whether or not the value of the internal register 11b after the addition is equal to or more than "631", that is, whether or not the value exceeds the value of the update range of the random number counter 13a. (S33). If the value of the internal register 11b after the addition is equal to or more than "631" (S33: Yes), the value of the internal register 11b is cleared to "0" because it exceeds the value of the update range (S34). On the other hand, if the value of the internal register 11b after the addition is equal to or less than “630” (S33: No), since the value is within the update range, the process of S34 is skipped and the process proceeds to S35.

In the process of S35, the updated value of the internal register 11b is compared with the value of the initial value memory 13c. Since the initial value memory 13c stores the initial value of the update of the random number counter 13a, if both values are equal (S35: Yes), it means that the update of the random number counter 13a has been completed once. Therefore, in such a case, the value of the 2-byte initial value counter 13b is written to the internal register 11b (S36), and the value of the internal register 11b is written to the initial value memory 13c and the random number counter 13a (S37, S38). The initial value of the update of the random number counter 13a is changed.

On the other hand, when the updated value of the internal register 11b is not equal to the value of the initial value memory 13c (S35: No), the updating of the random number counter 13a has not been completed yet, so the processing of S36 and S37 is performed. Is skipped, the value of the internal register 11b updated in the processing from S32 to S34 is written to the random number counter 13a (S38), and the random number counter 13a is updated. After that, another random number update process used by the control unit C is performed (S39), and this random number update process ends.

FIG. 5 is a flowchart of the initial value counter updating process. In the initial value counter updating process (S6, S22), the value of the initial value counter 13b for counting the initial value of the update of the random number counter 13a is set to “0” in the update range of the random number counter 13a via the internal register 11b of the CPU 11. 630 (0 to 276h) ”in increments of“ +1 ”.

First, the value of the initial value counter 13b composed of 2 bytes is written to the internal register 11b of 2 bytes (S41). The value of the internal register 11b is incremented by 1 (S42), and it is checked whether or not the value of the internal register 11b after the addition is equal to or more than "631", that is, whether or not the value exceeds the value of the update range of the random number counter 13a. (S43). If the value of the internal register 11b after the addition is equal to or more than "631" (S43: Yes), the value of the internal register 11b is cleared to "0" because it exceeds the update range value of the random number counter 13a (S44). . On the other hand, if the value of the internal register 11b after the addition is equal to or less than “630” (S43: No), since the value is within the update range of the random number counter 13a, the process of S44 is skipped and the process proceeds to S45. I do.

In the process of S45, the 2-byte value of the 2-byte internal register 11b is written to the initial value counter 13b in the order of the upper byte and the lower byte by one instruction in response to the 2-byte write instruction of the 68-series CPU 11 (S45). The counter 13b is updated. In the 80-system CPU, the updated 2-byte internal register value is written to the initial value counter 13b by two instructions, one byte at a time, in the order of the upper byte and the lower byte.

As described above, the initial value counter updating process is repeatedly executed during the remaining time until the next reset interrupt occurs in the reset interrupt process (S22). Therefore, in the process of S45, when the next reset interrupt occurs after the upper byte of the internal register 11b is written to the initial value counter 13b and before the writing of the lower byte, the value of the lower byte of the internal register 11b is Is written to the initial value counter 13b, and the process of S1 in FIG. 3 is executed.

For example, if the value of the initial value counter 13b is "1FFh", the value of the internal register 11b is set to "200h" by the processing of S41 to S44. When the upper byte of the internal register 11b is written into the initial value counter 13b by the processing of S45, the value of the initial value counter 13b once becomes "2FFh", which is outside the update range of the random number counter 13a. Normally, immediately after that, the lower byte of the internal register 11b is written to the initial value counter 13b, and the value of the initial value counter 13b becomes a value of "200h". When the next reset interrupt occurs, writing of the lower byte is stopped, and the value of the initial value counter 13b remains "2FFh".

If the value of the initial value counter 13b is used in the processing of S36 of the random number update processing (S7), the initial value of the update of the random number counter 13a is set to a value outside the update range. However, in this embodiment, since the initial value counter updating process is also performed before the random number updating process (S7) (S6), the value of the initial value counter 13b is out of the updating range of the random number counter 13a. Even when the value becomes a value, the value can be returned to a value within the update range of the random number counter 13a before the random number updating process (S7). This is because in the initial value counter update process, the value “631” or more is cleared to “0” (S43: Yes, S44). Therefore, the value of the random number counter 13a can always be updated within a predetermined update range.

Also, as in the present embodiment, by executing the initial value counter updating process not only for the remaining time (S22) but also before the random number updating process (S7) (S6), the remaining time may be insufficient. However, it is possible to reliably update the initial value counter 13b.

FIG. 6 is a flowchart of the initial value counter updating process in the second embodiment. The updating process of the initial value counter of the first embodiment updates the value of the initial value counter 13b by "+1" in the adding direction and writes the updated value to the initial value counter 13b in the order of the upper byte and the lower byte. On the other hand, in the initial value counter updating process of the second embodiment, the value of the initial value counter 13b is updated by “−1” in the subtraction direction, and the updated value is sent to the initial value counter 13b in the order of the lower byte and the upper byte. Writing. The same portions as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

First, the value of the initial value counter 13b composed of 2 bytes is written to the internal register 11b of 2 bytes (S51). The value of the internal register 11b is subtracted by 1 (S52), and it is checked whether or not the value of the internal register 11b after the subtraction is equal to or greater than "631 (277h)" (S53). If the value of the internal register 11b before the subtraction is “0”, the value becomes “0FFFFh” by the subtraction. Therefore, if the value of the internal register 11b after the subtraction is equal to or greater than “631 (277h)” including “0FFFFh” (S53: Yes), “630 (276h)” which is the maximum value of the update range of the random number counter 13a. Is written into the internal register 11b (S54). On the other hand, if the value of the internal register 11b after the subtraction is equal to or less than “630 (276h)” (S53: No), the process of S54 is skipped and the process proceeds to S55.

In the process of S55, the value of the lower byte of the 2-byte internal register 11b updated in the subtraction direction is written to the lower byte of the 2-byte initial value counter 13b (S55), and then the upper byte of the 2-byte internal register 11b is written. The byte value is written to the upper byte of the 2-byte initial value counter 13b (S56). That is, the updated 2-byte value of the internal register 11b is written into the initial value counter 13b by two instructions, one byte at a time, in the order of the lower byte and the upper byte. The 80-system CPU can write the value of the 2-byte internal register to the initial value counter 13b in the order of the lower byte and the upper byte with one instruction by a two-byte write instruction.

As described above, the initial value counter updating process is repeatedly executed during the remaining time until the next reset interrupt occurs in the reset interrupt process (S22). Therefore, after the lower byte of the internal register 11b is written to the initial value counter 13b by the processing of S55, and before the writing of the upper byte by the processing of S56, the next reset interrupt may occur. Since the reset interrupt has the highest priority of the interrupt and is a non-maskable interrupt in which the start of the interrupt process cannot be prohibited, in such a case, the initial value counter updating process is performed without performing the process of S56. The process is forcibly terminated, and the process of S1 in FIG. 3 is executed. As a result, the value being written becomes the value of the updated initial value counter 13b.

For example, when the value of the initial value counter 13b is “200h”, the value of the internal register 11b of the CPU 11 is updated to “1FFh” by the processing from S51 to S53. Since the updated value is written from the internal register 11b to the initial value counter 13b in the order of the lower byte upper byte, the value of the initial value counter 13b is temporarily set to "2FFh" by writing the lower byte (S55). Becomes "1FFh" (S56), and the updating of the initial value counter 13b is completed. Therefore, when the next reset interrupt occurs after writing to the lower byte of the initial value counter 13b and before writing to the upper byte, the value of the initial value counter 13b becomes "2FFh", and the original update range The value is out of the range of the value “0-630 (0-276h)”.

If the value of the initial value counter 13b is used in the processing of S36 of the random number update processing (S7), the initial value of the update of the random number counter 13a is set to a value outside the update range. However, in this embodiment, since the initial value counter updating process is also performed before the random number updating process (S7) (S6), the value of the initial value counter 13b is out of the updating range of the random number counter 13a. Even when the value becomes a value, the value can be returned to a value within the update range of the random number counter 13a before the random number updating process (S7). This is because in the initial value counter update processing, the value equal to or greater than "631 (277h)" is returned to "630 (276h)" which is the maximum value of the update range of the random number counter 13a (S53: Yes, S54). Therefore, the value of the random number counter 13a can always be updated within a predetermined update range.

In each of the above embodiments, the non-maskable reset interrupt processing corresponds to the interrupt processing according to claims 1 and 2, and the first updating means includes steps S31 to S34 of the random number update processing (S7) in FIG. This corresponds to the process of S38. The second updating means corresponds to the initial value counter updating processing in S22, and the returning means corresponds to the initial value counter updating processing in S6 executed before the random number updating processing (S7).

As described above, the present invention has been described based on the embodiments. However, the present invention is not limited to the above embodiments, and it is easily understood that various improvements and modifications can be made without departing from the spirit of the present invention. It can be inferred.

For example, in the present embodiment, before the random number updating process (S7) for updating the random number counter 13a, the initial value counter updating process (S6) is executed to change the value of the initial value counter 13b to the update range of the random number counter 13a. Was returned to the value of However, the present invention is not necessarily limited to such a method. For example, before writing the value of the initial value counter 13b to the random number counter 13a and the initial value memory 13c (before the process of S36), the value of the initial value counter 13b is changed. If the value is not less than "631" outside the update range of the random number counter 13a, "0" or "630" is written to the initial value counter 13b, and the value of the initial value counter 13b is changed to the random number counter 13a. May be returned to a value within the update range of, and the returned value may be written to the random number counter 13a and the initial value memory 13c.

The update of the value of the initial value counter 13b is performed after the value is once read into the internal register 11b of the CPU 11, but the value is updated by directly reading into the ALU in the CPU 11 without going through the internal register 11b. May be.

(5) Modifications of the present invention are described below. 3. The ball-and-ball game machine according to claim 1, wherein said return means is constituted by third update means for updating a value of said initial value counter with a value within an update range of said random number counter. 3. The ball and ball game machine 1 wherein the updating means is executed at least once before the execution of the first updating means.

2. The ball game machine or the ball game machine 1 according to claim 1, wherein writing of the value updated by the second updating means to the initial value counter is performed by writing two bytes in the order of upper byte and lower byte. A ball game machine 2 which is executed by a write command performed by the game machine.

3. The ball game machine or the ball game machine 1 or 2 according to claim 1, wherein the value of the initial value counter is the random number when the value of the random number counter matches the value of the initial value memory. A ball game machine 3 written in a counter and an initial value memory.

1 is a front view of a game board of a pachinko gaming machine according to a first embodiment of the present invention. It is a block diagram showing the electrical configuration of the pachinko gaming machine. 9 is a flowchart illustrating a reset interrupt process. 9 is a flowchart illustrating a random number update process. 9 is a flowchart illustrating an initial value counter update process. 9 is a flowchart illustrating an initial value counter update process according to the second embodiment.

Explanation of reference numerals

11 CPU of control unit
11b Internal register of CPU of control unit 13 RAM of control unit
13a Random number counter 13b Initial value counter 13c Initial value memory C Control unit P Pachinko game machine (ball game machine)

Claims (3)

An interrupt process that is periodically executed, a random number counter, a first updating unit that updates the value of the random number counter by the interrupt process, and a reading unit that reads out the value of the random number counter at a predetermined timing A ball game machine that provides a player with a predetermined game value under a predetermined condition when the value of the random number counter read by the reading unit matches one of predetermined values;
An initial value memory for storing an initial value of the random number counter being updated;
An initial value counter composed of at least 2 bytes which is a value written to the initial value memory and the random number counter and counts an initial value of a next update of the random number counter;
The value of the initial value counter is read, the value is updated in the adding direction within the range of updating the random number counter, and the updated value is written to the initial value counter in the order of the upper byte and the lower byte, and the interrupt is performed. Second updating means which is repeatedly executed during the remaining time until the next interrupt processing is performed by the processing;
And a return means for returning the value of the initial value counter to a value within an update range of the random number counter before writing to the random number counter and the initial value memory. An interrupt process that is periodically executed, a random number counter, a first updating unit that updates the value of the random number counter by the interrupt process, and a reading unit that reads out the value of the random number counter at a predetermined timing A ball game machine that provides a player with a predetermined game value under a predetermined condition when the value of the random number counter read by the reading unit matches one of predetermined values;
An initial value memory for storing an initial value of the random number counter being updated;
An initial value counter composed of at least 2 bytes which is a value written to the initial value memory and the random number counter and counts an initial value of a next update of the random number counter;
The value of the initial value counter is read, the value is updated in the subtraction direction within the range of the update of the random number counter, and the updated value is written to the initial value counter in the order of the lower byte and the upper byte, and the interrupt is performed. Second updating means which is repeatedly executed during the remaining time until the next interrupt processing is performed by the processing;
And a return means for returning the value of the initial value counter to a value within an update range of the random number counter before writing to the random number counter and the initial value memory. The return means is constituted by third update means for updating the value of the initial value counter with a value within the range of the update of the random number counter, and the third update means is at least before execution of the first update means. The ball game machine according to claim 1, wherein the game is executed once.

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