JP2003506900A - 半導体装置を特徴付けるための方法および装置 - Google Patents

半導体装置を特徴付けるための方法および装置

Info

Publication number
JP2003506900A
JP2003506900A JP2001516240A JP2001516240A JP2003506900A JP 2003506900 A JP2003506900 A JP 2003506900A JP 2001516240 A JP2001516240 A JP 2001516240A JP 2001516240 A JP2001516240 A JP 2001516240A JP 2003506900 A JP2003506900 A JP 2003506900A
Authority
JP
Japan
Prior art keywords
data
data set
semiconductor device
characterization
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001516240A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003506900A5 (https=
Inventor
パトナム，ゲリー・ジーン
チェン，ジェニファー・メン−ツ
サン，チン−ヤン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JP2003506900A publication Critical patent/JP2003506900A/ja
Publication of JP2003506900A5 publication Critical patent/JP2003506900A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP2001516240A 1999-08-10 2000-03-13 半導体装置を特徴付けるための方法および装置 Pending JP2003506900A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/371,498 US6319737B1 (en) 1999-08-10 1999-08-10 Method and apparatus for characterizing a semiconductor device
US09/371,498 1999-08-10
PCT/US2000/006598 WO2001011680A1 (en) 1999-08-10 2000-03-13 Method and apparatus for characterizing a semiconductor device

Publications (2)

Publication Number Publication Date
JP2003506900A true JP2003506900A (ja) 2003-02-18
JP2003506900A5 JP2003506900A5 (https=) 2007-04-05

Family

ID=23464208

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001516240A Pending JP2003506900A (ja) 1999-08-10 2000-03-13 半導体装置を特徴付けるための方法および装置

Country Status (5)

Country Link
US (1) US6319737B1 (https=)
EP (1) EP1208591A1 (https=)
JP (1) JP2003506900A (https=)
KR (1) KR100682641B1 (https=)
WO (1) WO2001011680A1 (https=)

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US7113919B1 (en) * 2000-02-29 2006-09-26 Chemdomain, Inc. System and method for configuring products over a communications network
US6606582B1 (en) * 2000-03-27 2003-08-12 Seh America, Inc. Universal system, method and computer program product for collecting and processing process data including particle measurement data
JP2003022378A (ja) * 2001-07-06 2003-01-24 Mitsubishi Electric Corp 半導体設計資産流通システム
US6773932B2 (en) 2001-11-30 2004-08-10 Seh America, Inc. System and method for collecting, storing, and displaying process data including particle measurement data
US6823228B2 (en) * 2002-02-21 2004-11-23 International Business Machines Corporation Fabricator capacity analysis
US20030171897A1 (en) * 2002-02-28 2003-09-11 John Bieda Product performance integrated database apparatus and method
DE10210712A1 (de) * 2002-03-12 2003-10-02 Deutsche Telekom Ag Verfahren zur Übertragung von Messdaten von einem Messrechner zu einem Steuerrechner eines Messsystems
US7047442B2 (en) * 2002-04-23 2006-05-16 Agilent Technologies, Inc. Electronic test program that can distinguish results
US6898545B2 (en) * 2002-06-28 2005-05-24 Agilent Technologies Inc Semiconductor test data analysis system
US6845278B2 (en) 2002-08-07 2005-01-18 Kimberly-Clark Worldwide, Inc. Product attribute data mining in connection with a web converting manufacturing process
US7168853B2 (en) * 2003-01-10 2007-01-30 International Business Machines Corporation Digital measuring system and method for integrated circuit chip operating parameters
US7020859B2 (en) * 2003-06-02 2006-03-28 Lsi Logic Corporation Process skew results for integrated circuits
US7155361B2 (en) * 2005-02-24 2006-12-26 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor test management system and method
US20080126001A1 (en) * 2006-09-01 2008-05-29 Murray David W Equipment testing system and method having scaleable test line limits
US9087164B2 (en) 2008-01-26 2015-07-21 National Semiconductor Corporation Visualization of tradeoffs between circuit designs
US7966588B1 (en) 2008-01-26 2011-06-21 National Semiconductor Corporation Optimization of electrical circuits
US8712741B2 (en) 2010-06-28 2014-04-29 National Semiconductor Corporation Power supply architecture system designer
JP2012099603A (ja) * 2010-11-01 2012-05-24 Elpida Memory Inc ウェハテスト装置、ウェハテスト方法およびプログラム
US20140303912A1 (en) * 2013-04-07 2014-10-09 Kla-Tencor Corporation System and method for the automatic determination of critical parametric electrical test parameters for inline yield monitoring
US10001800B1 (en) 2015-09-10 2018-06-19 Apple Inc. Systems and methods for determining temperatures of integrated circuits
JP7546418B2 (ja) * 2020-09-09 2024-09-06 東京エレクトロン株式会社 基板処理方法および基板処理装置
KR102442512B1 (ko) * 2020-10-08 2022-09-13 고려대학교 산학협력단 트랩 사이트 정보의 판별 기능을 갖는 반도체 소자의 검사 방법 및 반도체 소자의 검사 장치
CN118425776B (zh) * 2024-05-09 2024-11-08 江苏欧力特能源科技有限公司 一种磷酸铁锂电池用循环寿命测试系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997013158A1 (en) * 1995-10-06 1997-04-10 Advanced Micro Devices, Inc. Wafer defect management system
JPH1056048A (ja) * 1996-08-09 1998-02-24 Sony Corp 半導体装置の製造方法
US5726920A (en) * 1995-09-29 1998-03-10 Advanced Micro Devices, Inc. Watchdog system having data differentiating means for use in monitoring of semiconductor wafer testing line
JPH10214870A (ja) * 1997-01-29 1998-08-11 Hitachi Ltd 半導体装置の製造方法
JPH11150047A (ja) * 1997-11-17 1999-06-02 Matsushita Electron Corp 半導体装置の製造方法

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US5270222A (en) * 1990-12-31 1993-12-14 Texas Instruments Incorporated Method and apparatus for semiconductor device fabrication diagnosis and prognosis
JP3099932B2 (ja) 1993-12-14 2000-10-16 株式会社東芝 インテリジェントテストラインシステム
US5563095A (en) * 1994-12-01 1996-10-08 Frey; Jeffrey Method for manufacturing semiconductor devices
US6013536A (en) * 1997-04-22 2000-01-11 Vlsi Technology, Inc. Apparatus for automated pillar layout and method for implementing same
US6162715A (en) * 1997-06-30 2000-12-19 Applied Materials, Inc. Method of forming gate electrode connection structure by in situ chemical vapor deposition of tungsten and tungsten nitride
JP3204204B2 (ja) * 1997-11-21 2001-09-04 日本電気株式会社 論理ｌｓｉの製造プロセス診断システム、方法及び記録媒体
US5866437A (en) 1997-12-05 1999-02-02 Advanced Micro Devices, Inc. Dynamic process window control using simulated wet data from current and previous layer data
US6171945B1 (en) * 1998-10-22 2001-01-09 Applied Materials, Inc. CVD nanoporous silica low dielectric constant films

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726920A (en) * 1995-09-29 1998-03-10 Advanced Micro Devices, Inc. Watchdog system having data differentiating means for use in monitoring of semiconductor wafer testing line
WO1997013158A1 (en) * 1995-10-06 1997-04-10 Advanced Micro Devices, Inc. Wafer defect management system
JPH1056048A (ja) * 1996-08-09 1998-02-24 Sony Corp 半導体装置の製造方法
JPH10214870A (ja) * 1997-01-29 1998-08-11 Hitachi Ltd 半導体装置の製造方法
JPH11150047A (ja) * 1997-11-17 1999-06-02 Matsushita Electron Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
EP1208591A1 (en) 2002-05-29
WO2001011680A1 (en) 2001-02-15
US6319737B1 (en) 2001-11-20
KR100682641B1 (ko) 2007-02-15
KR20020018202A (ko) 2002-03-07

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