JP2003347596A - Optical semiconductor device - Google Patents

Optical semiconductor device

Info

Publication number
JP2003347596A
JP2003347596A JP2002150588A JP2002150588A JP2003347596A JP 2003347596 A JP2003347596 A JP 2003347596A JP 2002150588 A JP2002150588 A JP 2002150588A JP 2002150588 A JP2002150588 A JP 2002150588A JP 2003347596 A JP2003347596 A JP 2003347596A
Authority
JP
Japan
Prior art keywords
substrate
conductive paste
optical semiconductor
led
mount
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002150588A
Other languages
Japanese (ja)
Inventor
Yoshio Ariizumi
喜夫 有泉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2002150588A priority Critical patent/JP2003347596A/en
Publication of JP2003347596A publication Critical patent/JP2003347596A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

<P>PROBLEM TO BE SOLVED: To provide an optical semiconductor device in which reliability is enhanced by enhancing adhesion strength of a substrate and a sealing resin material, and adhesion strength of the substrate and conductive paste. <P>SOLUTION: An LED 23 is bonded through conductive paste 30 to the mount part 26 of a circuit pattern 25 formed on the surface of a substrate 22 having an insulating basic material 24 and applied with gold plating on the surface, and then it is sealed with an epoxy resin sealing member 33. The mount part 26 has an area not larger than the area at the bonded bottom face of the LED 23. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、例えば表面実装型
LEDランプ等の光半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device such as a surface mount type LED lamp.

【0002】[0002]

【従来の技術】従来技術を図7及び図8を参照して説明
する。図7は基板の平面図であり、図8は断面図であ
る。
2. Description of the Related Art The prior art will be described with reference to FIGS. FIG. 7 is a plan view of the substrate, and FIG. 8 is a sectional view.

【0003】図7及び図8において、1は表面実装型の
LEDランプで、基板2の上面にはLED3が導電性材
料として銀(Ag)を含む導電性ペースト4を用いて固
着され、さらにLED3をエポキシ系樹脂でなる封止樹
脂材料で封止部材5を形成するようにして構成されてい
る。また基板2には、例えばビスマレイミドトリアジン
とガラス繊維を主部とした絶縁性材料でなる基材6の上
面側に、LED3を固着するマウント部7とワイヤボン
ディング部8を、また基材6の対向する上面縁部分から
下面側にかけて、マウント部7及びワイヤボンディング
部8にそれぞれ接続部9a,10aを設けて導通する外
電極部9,10を備える回路パターン11が、それぞれ
導電性材料、例えば銅あるいは銅合金で形成されてお
り、回路パターン11の表面には金(Au)めっきが施
されている。
In FIGS. 7 and 8, reference numeral 1 denotes a surface-mount type LED lamp. An LED 3 is fixed on the upper surface of a substrate 2 by using a conductive paste 4 containing silver (Ag) as a conductive material. The sealing member 5 is formed of a sealing resin material made of an epoxy resin. Further, the substrate 2 is provided with a mount portion 7 for fixing the LED 3 and a wire bonding portion 8 on an upper surface side of a base material 6 made of an insulating material mainly composed of, for example, bismaleimide triazine and glass fiber. The circuit pattern 11 including the outer electrode portions 9 and 10 provided with the connection portions 9a and 10a on the mount portion 7 and the wire bonding portion 8 respectively from the opposing upper edge portion to the lower surface side is made of a conductive material such as copper. Alternatively, it is formed of a copper alloy, and the surface of the circuit pattern 11 is plated with gold (Au).

【0004】そして、基板2の縦×横寸法が、例えば
2.0mm×1.25mmのものでは、マウント部7が
600μm×600μmの正方形をなしており、これに
底面が200μm×200μmの正方形をなすLED3
が固着、搭載される。なお、LED3には、上面に直径
が100μmの上面電極12が設けられており、LED
3をマウント部7に固着した後、上面電極12とワイヤ
ボンディング部8にAuワイヤのボンディングワイヤ1
3の両端がそれぞれボンディングされ、ボンディング後
に基板2面との接触部分の大きさが1.4mm×1.2
5mmの封止部材5を封止樹脂材料により成形すること
によって封止が行なわれる。
When the substrate 2 has a vertical and horizontal dimension of, for example, 2.0 mm × 1.25 mm, the mounting portion 7 has a square shape of 600 μm × 600 μm, and a square having a bottom surface of 200 μm × 200 μm. Eggplant LED3
Is fixed and mounted. The LED 3 is provided with an upper electrode 12 having a diameter of 100 μm on the upper surface.
3 is fixed to the mounting portion 7, and the upper surface electrode 12 and the wire bonding portion 8 are bonded to the bonding wire 1 of Au wire.
3 are bonded at both ends, and the size of a contact portion with the surface of the substrate 2 after bonding is 1.4 mm × 1.2.
Sealing is performed by molding a sealing member 5 of 5 mm with a sealing resin material.

【0005】このように、マウント部7の大きさは、固
着時、LED3がマウント部7からはみ出さないように
するため、LED3の寸法ばらつきやマウント部7の形
成精度を考慮して、LED3の底面の大きさよりも10
0μm以上の大きさとなるようにしていた。また導電性
ペースト4のマイグレーション現象を考慮する場合に
は、マウント部7に塗布する導電性ペースト4がはみ出
さないよう、さらにマウント部7の大きさを大きくする
ようにしていた。
As described above, the size of the mounting portion 7 is determined in consideration of the dimensional variation of the LED 3 and the forming accuracy of the mounting portion 7 so that the LED 3 does not protrude from the mounting portion 7 at the time of fixing. 10 than the size of the bottom
The size was set to 0 μm or more. When the migration phenomenon of the conductive paste 4 is taken into consideration, the size of the mount 7 is further increased so that the conductive paste 4 applied to the mount 7 does not protrude.

【0006】しかしながら上記の従来技術においては、
マウント部7の大きさが大きくなると、これにしたがい
マウント部7の表面に施されたAuめっきと封止部材5
のエポキシ系樹脂の接触する面積が増すことになる。A
uは不活性物質であるため、エポキシ系樹脂との密着性
が悪く、基板2と封止部材5の密着強度は低いものとな
ってしまう。また、Auめっきされたマウント部7の表
面に導電性ペースト4を塗布し、これによりLED3を
固着することとなるため、同様に基板2と導電性ペース
ト4の密着強度も低く、LED3の固着強度も高いもの
ではなかった。
[0006] However, in the above prior art,
When the size of the mount 7 increases, the Au plating and the sealing member 5 applied to the surface of the mount 7 accordingly.
The area in contact with the epoxy resin increases. A
Since u is an inert substance, the adhesiveness with the epoxy resin is poor, and the adhesive strength between the substrate 2 and the sealing member 5 is low. In addition, since the conductive paste 4 is applied to the surface of the Au-plated mount portion 7 to fix the LED 3, the adhesion strength between the substrate 2 and the conductive paste 4 is similarly low, and the fixing strength of the LED 3 is also low. Was not too expensive.

【0007】[0007]

【発明が解決しようとする課題】上記のような状況に鑑
みて本発明はなされたもので、その目的とするところは
基板と封止部材の密着強度、基板と導電性ペーストの密
着強度を高くし、信頼性を向上させた光半導体装置を提
供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to increase the adhesion strength between a substrate and a sealing member and the adhesion strength between a substrate and a conductive paste. Another object of the present invention is to provide an optical semiconductor device with improved reliability.

【0008】[0008]

【課題を解決するための手段】本発明の光半導体装置
は、基板表面に形成された回路パターンのマウント部に
光半導体チップを導電性ペーストにより固着し、封止樹
脂材料で封止してなる光半導体装置において、前記マウ
ント部は、その面積が前記光半導体チップの固着底面の
面積と等しいか、または固着底面の面積よりも小さいこ
とを特徴とするものであり、さらに、前記封止樹脂材料
がエポキシ系樹脂であって、前記マウント部に金めっき
が施されていることを特徴とするものであり、また、基
板表面に形成された回路パターンに設けられたマウント
部分に、光半導体チップを前記回路パターンに導通する
よう導電性ペーストにより固着し、封止樹脂材料で封止
してなる光半導体装置において、前記マウント部分が、
基板に形成された基材の露出表面であって、前記光半導
体チップを、前記基材の表面に前記導電性ペーストによ
り固着すると共に該導電性ペーストにより前記回路パタ
ーンに導通させたことを特徴とするものである。
An optical semiconductor device according to the present invention comprises an optical semiconductor chip fixed to a mount portion of a circuit pattern formed on a substrate surface with a conductive paste and sealed with a sealing resin material. In the optical semiconductor device, the mount portion has an area equal to or smaller than the area of the fixed bottom surface of the optical semiconductor chip, and further includes the sealing resin material. Is an epoxy resin, wherein the mounting portion is plated with gold, and an optical semiconductor chip is mounted on a mounting portion provided in a circuit pattern formed on the surface of the substrate. In the optical semiconductor device fixed with a conductive paste so as to be electrically connected to the circuit pattern and sealed with a sealing resin material, the mount portion is
An exposed surface of a substrate formed on a substrate, wherein the optical semiconductor chip is fixed to the surface of the substrate with the conductive paste and is electrically connected to the circuit pattern by the conductive paste. Is what you do.

【0009】[0009]

【発明の実施の形態】以下本発明の実施の形態を、図面
を参照して説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0010】先ず第1の実施形態を図1乃至図4により
説明する。図1は断面図であり、図2は基板の平面図で
あり、図3は封止部材を成形する前の状態を示す平面図
であり、図4は要部の断面図である。
First, a first embodiment will be described with reference to FIGS. 1 is a sectional view, FIG. 2 is a plan view of a substrate, FIG. 3 is a plan view showing a state before a sealing member is formed, and FIG. 4 is a sectional view of a main part.

【0011】図1乃至図4において、21は表面実装型
の光半導体装置であるLEDランプで、例えば縦×横寸
法が2.0mm×1.25mmの方形状に形成された基
板22の上面の所定部分に、光半導体チップの直方体状
のLED23を固着、搭載して構成されている。また基
板22は、例えばビスマレイミドトリアジンとガラス繊
維を主部とし、さらにエポキシ樹脂を含む絶縁性材料で
なる基材24に、導電性材料、例えば銅あるいは銅合金
で形成された所定形状の回路パターン25を上面から下
面にかけて設けるようにして形成されている。
1 to 4, reference numeral 21 denotes an LED lamp, which is a surface-mount type optical semiconductor device. The LED lamp 21 has, for example, an upper surface of a substrate 22 formed in a square shape having a vertical and horizontal dimension of 2.0 mm × 1.25 mm. A rectangular parallelepiped LED 23 of an optical semiconductor chip is fixed and mounted on a predetermined portion. The substrate 22 is made of, for example, bismaleimide triazine and glass fiber as a main part, and a circuit pattern of a predetermined shape formed of a conductive material such as copper or a copper alloy on a base material 24 made of an insulating material containing an epoxy resin. 25 is provided from the upper surface to the lower surface.

【0012】また回路パターン25は、基板22の上面
側の略中央部分に直径200μmのマウント部26を有
し、さらに上面側にマウント部26に対応する幅が0.
25mmのワイヤボンディング部27を離間して備えて
おり、さらにまた対向する基材24の上面辺縁部分から
下面側にかけて外電極部28,29を備えたものとなっ
ている。そして外電極部28,29とマウント部26及
びワイヤボンディング部27とは、対応するものとの間
にそれぞれ幅が0.25mmの接続部28a,29aを
設けて接続されている。なお、回路パターン25の表面
には金(Au)めっきが施されている。
The circuit pattern 25 has a mount portion 26 having a diameter of 200 μm at a substantially central portion on the upper surface side of the substrate 22, and further has a width corresponding to 0.
A 25 mm wire bonding portion 27 is provided at a distance, and external electrode portions 28 and 29 are provided from the upper surface edge portion of the opposing base material 24 to the lower surface side. The outer electrode portions 28, 29, the mount portion 26, and the wire bonding portion 27 are connected with corresponding portions by providing connection portions 28a, 29a each having a width of 0.25 mm. The surface of the circuit pattern 25 is plated with gold (Au).

【0013】また、マウント部26には、LED23
が、その200μm×200μmの正方形をなす底面
を、エポキシ樹脂に導電性材料として銀(Ag)を含ま
せるようにしてなる導電性ペースト30を用い、底面中
心がマウント部26の略中央に位置するよう固着するこ
とにより、搭載されている。また導電性ペースト30に
よる固着は、先ずマウンド部26にLED23の固着時
に外周からはみ出す程度に導電性ペースト30を塗布
し、その後にLED23をマウンド部26上に載置して
行う。なお、LED23の底面が、円形のマウント部2
6の外周からはみ出して、基材24上面との間に空間A
を生じる場合には、導電性ペースト30をLED23の
下部周囲に塗布するようにして、空間Aに導電性ペース
ト30を充填するようにしてもよい。
The mount 26 includes an LED 23.
However, the bottom surface forming a square of 200 μm × 200 μm is formed by using a conductive paste 30 made of epoxy resin containing silver (Ag) as a conductive material, and the center of the bottom surface is located substantially at the center of the mount portion 26. So that it is mounted. Further, the fixing by the conductive paste 30 is performed by first applying the conductive paste 30 to the mound portion 26 so as to protrude from the outer periphery when the LED 23 is fixed, and then mounting the LED 23 on the mound portion 26. Note that the bottom surface of the LED 23 is
6 protrudes from the outer periphery of the base material 24 and the space A
In this case, the space A may be filled with the conductive paste 30 by applying the conductive paste 30 around the lower part of the LED 23.

【0014】また、マウント部26に固着されたLED
23には、上面に設けられた直径が100μmの上面電
極31にAuワイヤのボンディングワイヤ32の一端が
ボンディングされ、ワイヤボンディング部27には、ボ
ンディングワイヤ32の他端がボンディングされる。な
お、ボンディングワイヤ32をボンディングする際、上
面電極31に上下方向のボンディング圧力が加えられ、
LED23にも大きな力が加わるが、上面電極31が加
工誤差、組立て誤差を考慮してもマウント部26の直上
範囲からはみ出さない程度の大きさにマウント部26を
形成し、またマウント部26の略中央にLED23の底
面中心が位置するよう固着することで、LED23に偏
った力が加わらず、破損等を招くことがない。
An LED fixed to the mount 26
One end of a bonding wire 32 of an Au wire is bonded to an upper surface electrode 31 having a diameter of 100 μm provided on the upper surface, and the other end of the bonding wire 32 is bonded to a wire bonding portion 27. When bonding the bonding wire 32, a vertical bonding pressure is applied to the upper surface electrode 31,
Although a large force is also applied to the LED 23, the mount portion 26 is formed in such a size that the upper surface electrode 31 does not protrude from the area immediately above the mount portion 26 even when processing errors and assembly errors are taken into consideration. By fixing the LED 23 so that the center of the bottom of the LED 23 is located substantially at the center, a biased force is not applied to the LED 23, and the LED 23 is not damaged.

【0015】そして、ボンディング後に、エポキシ系樹
脂でなる封止樹脂材料により、基板22面との接触部分
の大きさが1.4mm×1.25mmの角錐台形状の封
止部材33を成形することによって封止が行なわれ、L
EDランプ21が完成する。その後、LEDランプ21
は図示しない配線基板表面の実装部に、外電極部28,
29をリフロー等による半田付けを行うことによって表
面実装される。
After bonding, a truncated pyramid-shaped sealing member 33 having a size of 1.4 mm × 1.25 mm in contact with the surface of the substrate 22 is formed of a sealing resin material made of an epoxy resin. Sealing is performed by L
The ED lamp 21 is completed. Then, the LED lamp 21
Indicate the external electrode portions 28,
29 is surface-mounted by soldering by reflow or the like.

【0016】以上のようにLEDランプ21を構成する
ことによって、封止部材33と基板22の接触する総面
積Sが1.75mmであるのに対し、例えばマウント
部26への導電性ペースト30の塗布直径を、マウント
部26の直径と等しい200μmとした場合には、エポ
キシ系樹脂でなる封止部材33により封止されるAuめ
っきされた接続部28aの長さを0.45mm、ワイヤ
ボンディング部27と接続部29aの長さを0.25m
mとすると、回路パターン25表面のAuめっき部分の
面積Sが略0.175mmとなり、Auめっき部分
の面積Sは、総面積Sの略10%に相当する。
By configuring the LED lamp 21 as described above, the total area S of the contact between the sealing member 33 and the substrate 22 is 1.75 mm 2 , whereas, for example, the conductive paste 30 Is 200 μm, which is equal to the diameter of the mount 26, the length of the Au-plated connection portion 28a sealed by the sealing member 33 made of epoxy resin is 0.45 mm, and the wire bonding is performed. The length of the part 27 and the connecting part 29a is 0.25 m
When m, the area S a is approximately 0.175 mm 2 next to Au plating part of the circuit pattern 25 surface, the area S a of the Au plating portion corresponds to approximately 10% of the total area S.

【0017】これに対し、従来技術で示した大きさが6
00μm×600μmのマウント部7を基板2上、本実
施形態と同位置に設け、このマウント部7への導電性ペ
ースト4の塗布直径を同様に200μmとし、エポキシ
系樹脂でなる封止部材5により封止されるAuめっきさ
れた接続部9aの長さを0.25mm、ワイヤボンディ
ング部8と接続部10aの長さを0.25mmとする
と、マウント部7の導電性ペースト4が塗布されていな
い部分を含め、回路パターン11表面のAuめっき部分
の面積Sが略0.454mmとなり、Auめっき部
分の面積Sは、総面積Sの略25.9%に相当する。
On the other hand, the size shown in the prior art is 6
A mounting portion 7 of 00 μm × 600 μm is provided on the substrate 2 at the same position as in the present embodiment, the diameter of the conductive paste 4 applied to the mounting portion 7 is set to 200 μm, and the sealing member 5 made of epoxy resin is used. Assuming that the length of the Au-plated connection portion 9a to be sealed is 0.25 mm and the length of the wire bonding portion 8 and the connection portion 10a is 0.25 mm, the conductive paste 4 of the mount portion 7 is not applied. including the part, the area S b of the Au-plated portions of the circuit pattern 11 surface substantially 0.454Mm 2, and the area S b of the Au plating portion corresponds to approximately 25.9 percent of the total area S.

【0018】この結果、本実施形態では、Auめっき部
分と封止部材33とが接触する面積は大幅に削減される
ことになる。このため、封止樹脂材料のエポキシ系樹脂
と基材24の接触面積が増大し、基板22と封止部材3
3の密着強度は高くなる。さらに、導電性ペースト30
もマウント部26のAuめっき表面と接触するだけでな
く、一部が基材24と接触してLED23を固着させる
のことになるので、導電性ペースト30と基板22の密
着強度が増し、より強固にLED23を固着させること
ができ、LEDランプ21の信頼性を向上させることが
できる。
As a result, in the present embodiment, the area where the Au plating portion comes into contact with the sealing member 33 is greatly reduced. For this reason, the contact area between the epoxy resin of the sealing resin material and the base material 24 increases, and the substrate 22 and the sealing member 3
The adhesion strength of No. 3 increases. Further, the conductive paste 30
Also, not only does the contact with the Au plating surface of the mount portion 26, but also a portion thereof comes into contact with the base material 24 to fix the LED 23, so that the adhesion strength between the conductive paste 30 and the substrate 22 increases, and the The LED 23 can be fixed to the LED lamp 21 and the reliability of the LED lamp 21 can be improved.

【0019】なお、上記実施形態においては、マウント
部26の形状を、基板22に搭載するLED23の正方
形底面の一片の長さと同じ寸法の直径を有する円形とし
たが、例えばLED23の正方形底面と同一の正方形、
あるいはLED23の正方形底面より小面積で、所定の
密着強度が得られる組立てにおいても支障のない形状と
してもよい。
In the above embodiment, the shape of the mounting portion 26 is a circle having a diameter the same as the length of one piece of the square bottom surface of the LED 23 mounted on the substrate 22. Square,
Alternatively, the LED 23 may have a smaller area than the square bottom surface, and may have a shape that does not hinder the assembling in which a predetermined adhesion strength is obtained.

【0020】次に、第2の実施形態を図5及び図6によ
り説明する。図5は基板の平面図であり、図6は断面図
である。なお、第1の実施形態と同一部分には同一符号
を付して説明を省略し、第1の実施形態と異なる本実施
形態の構成について説明する。
Next, a second embodiment will be described with reference to FIGS. FIG. 5 is a plan view of the substrate, and FIG. 6 is a sectional view. The same parts as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted. The configuration of the present embodiment that is different from the first embodiment will be described.

【0021】図5及び図6において、41は表面実装型
の光半導体装置であるLEDランプで、例えば縦×横寸
法が2.0mm×1.25mmの方形状に形成された基
板42の上面の所定部分に、光半導体チップの直方体状
のLED23を固着、搭載して構成されている。また基
板42は、絶縁性材料でなる基材24に、導電性材料、
例えば銅あるいは銅合金で形成された所定形状の回路パ
ターン43を上面から下面にかけて設けるようにして形
成されている。
5 and 6, reference numeral 41 denotes an LED lamp, which is a surface-mount type optical semiconductor device. The LED lamp 41 is, for example, an upper surface of a substrate 42 formed in a square shape having a vertical and horizontal dimension of 2.0 mm × 1.25 mm. A rectangular parallelepiped LED 23 of an optical semiconductor chip is fixed and mounted on a predetermined portion. In addition, the substrate 42 includes a base material 24 made of an insulating material, a conductive material,
For example, a circuit pattern 43 having a predetermined shape made of copper or a copper alloy is provided from the upper surface to the lower surface.

【0022】また回路パターン43は、基板42の上面
側中央に基材24の上面が露出したマウント領域44を
設けるようにして、対向する基材24の上面辺縁部分か
ら下面側にかけて外電極部28,29を備えており、一
方の外電極部28の上面側からはマウント領域44に向
けて接続部28aが延出し、他方の外電極部29の上面
側からはマウント領域44に向けてワイヤボンディング
部27が接続部29aを設けるようにして延出してい
る。なお、回路パターン43の表面には金(Au)めっ
きが施されている。
The circuit pattern 43 is formed such that a mounting area 44 where the upper surface of the base material 24 is exposed is provided at the center of the upper surface side of the substrate 42 so that the outer electrode portion extends from the upper edge to the lower surface of the opposing base material 24. 28, 29, a connection portion 28a extends from the upper surface side of one external electrode portion 28 toward the mount region 44, and a wire extends from the upper surface side of the other external electrode portion 29 toward the mount region 44. The bonding portion 27 extends so as to provide the connection portion 29a. The surface of the circuit pattern 43 is plated with gold (Au).

【0023】そして、マウント領域44には、LED2
3が、その200μm×200μmの正方形をなす底面
を、エポキシ樹脂に導電性材料として銀(Ag)を含ま
せるようにしてなる導電性ペースト30を用い、底面中
心がマウント領域44の略中央に位置するよう固着する
ことにより、搭載されている。また導電性ペースト30
による固着は、先ずマウント領域44に、接続部28a
に連設するよう直径200μm程度に導電性ペースト3
0を塗布し、その後にLED23をマウント領域44に
塗布した導電性ペースト30の上に載置して行う。
The LED 2 is provided in the mount area 44.
3 uses a conductive paste 30 in which the epoxy resin contains silver (Ag) as a conductive material, and the center of the bottom is located substantially at the center of the mount region 44. It is mounted by fixing so that The conductive paste 30
First, the connection area 28a is attached to the mount area 44.
Conductive paste 3 having a diameter of about 200 μm so that
0 is applied, and then the LED 23 is mounted on the conductive paste 30 applied to the mount area 44.

【0024】また、マウント領域44に固着されたLE
D23には、上面に設けられた直径が100μmの上面
電極31にAuワイヤのボンディングワイヤ32の一端
がボンディングされ、ワイヤボンディング部27には、
ボンディングワイヤ32の他端がボンディングされる。
The LE fixed to the mount area 44
One end of a bonding wire 32 of an Au wire is bonded to an upper electrode 31 having a diameter of 100 μm provided on the upper surface of D23.
The other end of the bonding wire 32 is bonded.

【0025】そして、ボンディング後にエポキシ系樹脂
でなる封止部材33を成形することによって封止が行な
われ、LEDランプ41が完成する。さらに、形成され
たLEDランプ41は、図示しない配線基板表面の実装
部に、外電極部28,29をリフロー等による半田付け
を行うことによって表面実装される。
After the bonding, the sealing is performed by molding a sealing member 33 made of an epoxy resin, and the LED lamp 41 is completed. Further, the formed LED lamp 41 is surface-mounted on a mounting portion on the surface of a wiring board (not shown) by soldering the external electrode portions 28 and 29 by reflow or the like.

【0026】このように構成することで、本実施形態に
おいても、第1の実施形態と同様に、Auめっき部分と
封止部材33とが接触する面積は大幅に削減されること
になり、その結果、エポキシ系樹脂と基材24の接触面
積が増大し、基板42と封止部材33の密着強度は高く
なり、また導電性ペースト30と基板42の密着強度が
さらに増したものとなって、より強固にLED23を固
着させることができる等の効果を得ることができる。
With such a configuration, also in the present embodiment, as in the first embodiment, the area where the Au plating portion and the sealing member 33 are in contact is greatly reduced. As a result, the contact area between the epoxy resin and the base material 24 increases, the adhesion strength between the substrate 42 and the sealing member 33 increases, and the adhesion strength between the conductive paste 30 and the substrate 42 further increases. The effect that the LED 23 can be more firmly fixed can be obtained.

【0027】[0027]

【発明の効果】以上の説明から明らかなように、本発明
によれば、基板と封止部材の封止樹脂材料との密着強
度、基板と導電性ペーストの密着強度が高くなり、装置
の信頼性を向上させることができる等の効果を奏する。
As is apparent from the above description, according to the present invention, the adhesion strength between the substrate and the sealing resin material of the sealing member and the adhesion strength between the substrate and the conductive paste are increased, and the reliability of the device is improved. The effect is that the performance can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施形態を示す断面図である。FIG. 1 is a cross-sectional view illustrating a first embodiment of the present invention.

【図2】本発明の第1の実施形態における基板の平面図
である。
FIG. 2 is a plan view of a substrate according to the first embodiment of the present invention.

【図3】本発明の第1の実施形態における封止部材を成
形する前の状態を示す平面図である。
FIG. 3 is a plan view showing a state before molding a sealing member according to the first embodiment of the present invention.

【図4】本発明の第1の実施形態における要部の断面図
である。
FIG. 4 is a sectional view of a main part according to the first embodiment of the present invention.

【図5】本発明の第2の実施形態における基板の平面図
である。
FIG. 5 is a plan view of a substrate according to a second embodiment of the present invention.

【図6】本発明の第2の実施形態を示す断面図である。FIG. 6 is a sectional view showing a second embodiment of the present invention.

【図7】従来技術における基板の平面図である。FIG. 7 is a plan view of a substrate according to the related art.

【図8】従来技術を示す断面図である。FIG. 8 is a sectional view showing a conventional technique.

【符号の説明】[Explanation of symbols]

22,42…基板 23…LED 24…基材 25,43…回路パターン 26…マウント部 44…マウント領域 22, 42 ... substrate 23… LED 24 ... Base material 25, 43 ... circuit pattern 26 ... Mount section 44… Mount area

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 基板表面に形成された回路パターンのマ
ウント部に光半導体チップを導電性ペーストにより固着
し、封止樹脂材料で封止してなる光半導体装置におい
て、前記マウント部は、その面積が前記光半導体チップ
の固着底面の面積と等しいか、または固着底面の面積よ
りも小さいことを特徴とする光半導体装置。
1. An optical semiconductor device comprising an optical semiconductor chip fixed to a mount portion of a circuit pattern formed on a substrate surface with a conductive paste and sealed with a sealing resin material, wherein the mount portion has an area corresponding to the area of the mount portion. Is equal to or smaller than the area of the fixed bottom surface of the optical semiconductor chip.
【請求項2】 前記封止樹脂材料がエポキシ系樹脂であ
って、前記マウント部に金めっきが施されていることを
特徴とする請求項1記載の光半導体装置。
2. The optical semiconductor device according to claim 1, wherein the sealing resin material is an epoxy resin, and the mount portion is plated with gold.
【請求項3】 基板表面に形成された回路パターンに設
けられたマウント部分に、光半導体チップを前記回路パ
ターンに導通するよう導電性ペーストにより固着し、封
止樹脂材料で封止してなる光半導体装置において、前記
マウント部分が、基板に形成された基材の露出表面であ
って、前記光半導体チップを、前記基材の表面に前記導
電性ペーストにより固着すると共に該導電性ペーストに
より前記回路パターンに導通させたことを特徴とする光
半導体装置。
3. A light obtained by fixing an optical semiconductor chip to a mount portion provided on a circuit pattern formed on a substrate surface with a conductive paste so as to conduct the circuit pattern, and sealing the chip with a sealing resin material. In the semiconductor device, the mount portion is an exposed surface of a substrate formed on a substrate, and the optical semiconductor chip is fixed to a surface of the substrate with the conductive paste and the circuit is formed by the conductive paste. An optical semiconductor device characterized by being electrically connected to a pattern.
JP2002150588A 2002-05-24 2002-05-24 Optical semiconductor device Pending JP2003347596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002150588A JP2003347596A (en) 2002-05-24 2002-05-24 Optical semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002150588A JP2003347596A (en) 2002-05-24 2002-05-24 Optical semiconductor device

Publications (1)

Publication Number Publication Date
JP2003347596A true JP2003347596A (en) 2003-12-05

Family

ID=29768411

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002150588A Pending JP2003347596A (en) 2002-05-24 2002-05-24 Optical semiconductor device

Country Status (1)

Country Link
JP (1) JP2003347596A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007266445A (en) * 2006-03-29 2007-10-11 Kyocera Corp Light emitting device and lighting device using same
JP2011529628A (en) * 2008-07-29 2011-12-08 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング Optoelectronic semiconductor elements
US11152547B2 (en) 2018-09-27 2021-10-19 Nichia Corporation Metallic structure for optical semiconductor device, method for producing the same, and optical semiconductor device using the same
US11264546B2 (en) 2018-09-27 2022-03-01 Nichia Corporation Metallic structure for optical semiconductor device, method for producing the same, and optical semiconductor device using the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007266445A (en) * 2006-03-29 2007-10-11 Kyocera Corp Light emitting device and lighting device using same
JP2011529628A (en) * 2008-07-29 2011-12-08 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング Optoelectronic semiconductor elements
US9099622B2 (en) 2008-07-29 2015-08-04 Osram Opto Semiconductors Gmbh Optoelectronic semiconductor component
US9831394B2 (en) 2008-07-29 2017-11-28 Osram Opto Semiconductors Gmbh Optoelectronic semiconductor component
US10580941B2 (en) 2008-07-29 2020-03-03 Osram Oled Gmbh Optoelectronic semiconductor component
US11152547B2 (en) 2018-09-27 2021-10-19 Nichia Corporation Metallic structure for optical semiconductor device, method for producing the same, and optical semiconductor device using the same
US11264546B2 (en) 2018-09-27 2022-03-01 Nichia Corporation Metallic structure for optical semiconductor device, method for producing the same, and optical semiconductor device using the same

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