JP2003345648A5 - - Google Patents

Download PDF

Info

Publication number
JP2003345648A5
JP2003345648A5 JP2003115385A JP2003115385A JP2003345648A5 JP 2003345648 A5 JP2003345648 A5 JP 2003345648A5 JP 2003115385 A JP2003115385 A JP 2003115385A JP 2003115385 A JP2003115385 A JP 2003115385A JP 2003345648 A5 JP2003345648 A5 JP 2003345648A5
Authority
JP
Japan
Prior art keywords
access
logic unit
access request
master logic
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003115385A
Other languages
English (en)
Japanese (ja)
Other versions
JP4166615B2 (ja
JP2003345648A (ja
Filing date
Publication date
Priority claimed from GB0211950A external-priority patent/GB2388929B/en
Application filed filed Critical
Publication of JP2003345648A publication Critical patent/JP2003345648A/ja
Publication of JP2003345648A5 publication Critical patent/JP2003345648A5/ja
Application granted granted Critical
Publication of JP4166615B2 publication Critical patent/JP4166615B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

JP2003115385A 2002-05-23 2003-04-21 データ処理装置におけるマルチアクセス命令を処理するデータ処理装置及び方法並びにその方法によるコンピュータ・プログラム製品 Expired - Lifetime JP4166615B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0211950A GB2388929B (en) 2002-05-23 2002-05-23 Handling of a multi-access instruction in a data processing apparatus
GB0211950.1 2002-05-23

Publications (3)

Publication Number Publication Date
JP2003345648A JP2003345648A (ja) 2003-12-05
JP2003345648A5 true JP2003345648A5 (enExample) 2005-10-06
JP4166615B2 JP4166615B2 (ja) 2008-10-15

Family

ID=9937323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003115385A Expired - Lifetime JP4166615B2 (ja) 2002-05-23 2003-04-21 データ処理装置におけるマルチアクセス命令を処理するデータ処理装置及び方法並びにその方法によるコンピュータ・プログラム製品

Country Status (3)

Country Link
US (1) US6959351B2 (enExample)
JP (1) JP4166615B2 (enExample)
GB (1) GB2388929B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4847036B2 (ja) * 2005-03-30 2011-12-28 キヤノン株式会社 バスアクセスを調停する制御装置およびデータ処理装置の制御方法
US20060248247A1 (en) * 2005-04-29 2006-11-02 Mtekvision Co., Ltd. Apparatus and method for controlling access to a memory
US7805578B2 (en) * 2005-04-29 2010-09-28 Mtekvision Co., Ltd. Data processor apparatus and memory interface
US7689735B2 (en) * 2005-10-03 2010-03-30 Arm Limited Instruction stream control
WO2007109810A2 (en) * 2006-03-23 2007-09-27 Novartis Ag Methods for the preparation of imidazole-containing compounds
EP2007765B1 (en) * 2006-03-23 2012-06-27 Novartis AG Immunopotentiating compounds
CA2646539A1 (en) * 2006-03-23 2007-09-27 Novartis Ag Imidazoquinoxaline compounds as immunomodulators
JP5600517B2 (ja) 2010-08-18 2014-10-01 キヤノン株式会社 情報処理装置、情報処理方法、およびプログラム
JP6107904B2 (ja) * 2015-09-09 2017-04-05 日本電気株式会社 プロセッサ及びストア命令の変換方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5175829A (en) * 1988-10-25 1992-12-29 Hewlett-Packard Company Method and apparatus for bus lock during atomic computer operations
WO1996003697A1 (en) * 1994-07-21 1996-02-08 Apple Computer, Inc. Method for semaphore communication between incompatible bus locking architectures
US5727172A (en) * 1995-05-01 1998-03-10 Motorola, Inc. Method and apparatus for performing atomic accesses in a data processing system
JPH10177560A (ja) * 1996-12-17 1998-06-30 Ricoh Co Ltd 記憶装置
US6473849B1 (en) * 1999-09-17 2002-10-29 Advanced Micro Devices, Inc. Implementing locks in a distributed processing system
EP1226493B1 (en) * 1999-11-05 2006-05-03 Analog Devices, Inc. Bus architecture and shared bus arbitration method for a communication processor
US6901505B2 (en) * 2001-08-09 2005-05-31 Advanced Micro Devices, Inc. Instruction causing swap of base address from segment register with address from another register

Similar Documents

Publication Publication Date Title
JP5787629B2 (ja) マシンビジョン用マルチプロセッサシステムオンチップ
CN102346683B (zh) 用于具有定向i/o的虚拟机的热交换有源存储器
TW201905714A (zh) 以輔助處理器記憶體進行儲存裝置的直接輸入輸出操作的計算系統操作方法、計算系統、車輛及電腦可讀媒體
US10209922B2 (en) Communication via a memory interface
US20170083240A1 (en) Selective data copying between memory modules
JP2004171209A (ja) 共有メモリデータ転送装置
JP2013054789A (ja) 異なるキャッシュ・コヒーレンス・ドメインの間の情報共有技法
JP2002117002A (ja) 共用型ペリフェラルアーキテクチャ
EP3224729A1 (en) Memory management device
US11093276B2 (en) System and method for batch accessing
JP3690295B2 (ja) ディスクアレイ制御装置
US20100058001A1 (en) Distributed shared memory multiprocessor and data processing method
JP2003345648A5 (enExample)
US20070083715A1 (en) Early return indication for return data prior to receiving all responses in shared memory architecture
TWI759397B (zh) 用於比較並交換異動的裝置、主機設備及方法
US20070061519A1 (en) Early return indication for read exclusive requests in shared memory architecture
US8010682B2 (en) Early coherency indication for return data in shared memory architecture
JP4166615B2 (ja) データ処理装置におけるマルチアクセス命令を処理するデータ処理装置及び方法並びにその方法によるコンピュータ・プログラム製品
CN114298892A (zh) 一种应用于分布式处理单元的高速缓存模块和系统
US9652560B1 (en) Non-blocking memory management unit
US20100058024A1 (en) Data Transfer Apparatus, Data Transfer Method And Processor
US20080209085A1 (en) Semiconductor device and dma transfer method
CN116225318A (zh) 命令调度方法、闪存控制器、闪存设备及存储介质
JP2023544538A (ja) キャッシュライン追い出しのためのマルチレベルキャッシュコヒーレンシプロトコル
JP6565729B2 (ja) 演算処理装置、制御装置、情報処理装置及び情報処理装置の制御方法