JP2003345294A - Plasma display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce change in power consumption in a plasma display device. <P>SOLUTION: A plasma display device is provided with a dummy load 20 for consuming power equivalent to power by which the power of the display device becomes smaller from its maximum power when pictures of the display device become dark and the power consumption of the device is lowered and a dummy load control circuit 21 which detects the change in power of the device to control power to be consumed in the dummy load 20. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a large screen, thin type,
The present invention relates to a plasma display device known as a lightweight display device.

[0002]

2. Description of the Related Art Plasma display devices are capable of high-speed display and have a wide viewing angle compared to liquid crystal panels.
Recently, the flat panel display technology has been attracting a lot of attention because it can be easily upsized and its display quality is high because it is a self-luminous type.

Generally, in this plasma display device, ultraviolet rays are generated by gas discharge, and the ultraviolet rays excite phosphors to emit light, thereby performing color display. The display cell partitioned by the partition is provided on the substrate, and the phosphor layer is formed on the display cell.

This plasma display device is roughly classified into an AC type and a DC type in terms of driving, and there are two types of discharge types: a surface discharge type and a counter discharge type. However, high definition, large screen and Due to the ease of manufacturing, at present, the mainstream plasma display device is a surface discharge type of three-electrode structure, which has a pair of display electrodes adjacent in parallel on one substrate and the other. It has address electrodes arranged in a direction intersecting with the display electrodes on the substrate, partition walls, and a phosphor layer. Since the phosphor layer can be relatively thick, it is suitable for color display by the phosphor.

An example of the plasma display device will be described below with reference to FIGS.

First, the structure of the plasma display panel in the plasma display device will be described with reference to FIG. As shown in FIG. 3, a plurality of stripe-shaped display electrodes 2 forming pairs of scan electrodes and sustain electrodes are formed on a transparent front substrate 1 such as a glass substrate, and the electrode groups are covered. Thus, the dielectric layer 3 is formed, and the protective film 4 is formed on the dielectric layer 3.

A plurality of columns covered with an overcoat layer 6 are formed on the rear substrate 5 facing the front substrate 1 so as to intersect the display electrodes 2 of scan electrodes and sustain electrodes. Stripe-shaped address electrodes 7 are formed. A plurality of partition walls 8 are arranged on the overcoat layer 6 between the address electrodes 7 in parallel with the address electrodes 7, and a phosphor layer 9 is provided on a side surface between the partition walls 8 and a surface of the overcoat layer 6. There is.

The substrate 1 and the substrate 5 are a display electrode 2 and an address electrode 7 which are scan electrodes and sustain electrodes.
Are arranged so as to be substantially orthogonal to each other, and are opposed to each other with a minute discharge space interposed therebetween, and the periphery is sealed, and one kind of helium, neon, argon, and xenon or a mixed gas is discharged into the discharge space. It is enclosed as a gas. Further, the discharge space is partitioned into a plurality of partitions by partition walls 8 to provide a plurality of discharge cells at which the intersections of the display electrodes 2 and the address electrodes 7 are located, and each of the discharge cells has red, green, and blue. The phosphor layers 9 are sequentially arranged for each color so that

FIG. 4 shows an electrode array of this plasma display panel. As shown in FIG. 4, the scan electrodes, the sustain electrodes and the address electrodes have a matrix structure of M rows × N columns, and in the row direction. M rows of scan electrodes SCN1 to SCNM and sustain electrodes SUS1 to
Address electrodes D1 of N columns in which the SUSMs are arranged in the column direction
~ DN are arranged.

In the plasma display panel having such an electrode structure, by applying a write pulse between the address electrode and the scan electrode, an address discharge is generated between the address electrode and the scan electrode, and after selecting a discharge cell. , Between the scan electrode and the sustain electrode,
By applying a periodic sustain pulse that is alternately inverted, a sustain discharge is generated between the scan electrode and the sustain electrode, and a predetermined display is performed.

FIG. 5 shows the configuration of the display drive circuit of the plasma display device according to the present embodiment. As shown in FIG. 5, the plasma display panel (PDP) 10 having the configuration shown in FIG. 3, the address driver circuit 11,
Scan driver circuit 12 and sustain driver circuit 1
3, discharge control timing generation circuit 14, power supply circuit 15,
16, A / D converter (analog / digital converter)
17, scan number converter 18, and subfield converter 1
9 is equipped.

In the circuit of FIG. 5, first, the video signal VD
Is input to the A / D converter 17. The horizontal synchronization signal H and the vertical synchronization signal V are supplied to the discharge control timing generation circuit 14, the A / D converter 17, the scanning number conversion unit 18,
It is given to the subfield converter 19. The A / D converter 17 converts the video signal VD into a digital signal and supplies the image data to the scanning number conversion unit 18.

The scanning number converter 18 converts the image data into a PDP.
Converted to image data of the number of lines according to the number of pixels of 10,
The image data for each line is converted into the subfield conversion unit 19
Give to. The subfield conversion unit 19 divides each pixel data of the image data of each line into a plurality of bits corresponding to a plurality of subfields, and the bit of each pixel data of each subfield is addressed by the address driver circuit 11.
Output serially to. The address driver circuit 11 is
It is connected to the power supply circuit 15 and converts the data serially given from the subfield converter 19 for each subfield into parallel data, and supplies a voltage to a plurality of address electrodes based on the parallel data.

The discharge control timing generating circuit 14 generates discharge control timing signals SC and SU with reference to the horizontal synchronizing signal H and the vertical synchronizing signal V and supplies them to the scan driver circuit 12 and the sustain driver circuit 13, respectively. The scan driver circuit 12 includes an output circuit 121 and a shift register 122. The sustain driver circuit 13 also has an output circuit 131 and a shift register 132. The scan driver circuit 12 and the sustain driver circuit 13 are connected to a common power supply circuit 16.

The shift register 122 of the scan driver circuit 12 shifts the discharge control timing signal SC supplied from the discharge control timing generation circuit 14 to the output circuit 121 while shifting it in the vertical scanning direction. Output circuit 121
Supplies the drive signal voltage to the plurality of scan electrodes in order in response to the discharge control timing signal SC provided from the shift register 122.

The shift register 132 of the sustain driver circuit 13 shifts the discharge control timing signal SU given from the discharge control timing generating circuit 14 to the output circuit 131 while shifting it in the vertical scanning direction. Output circuit 131
Supplies the drive signal voltage to the plurality of sustain electrodes in order in response to the discharge control timing signal SU provided from the shift register 132.

FIG. 6 shows an example of a timing chart of the display drive circuit of this plasma display device.
As shown in FIG. 6, in the writing period, after all the sustain electrodes SUS1 to SUSM are held at 0 (V), positive voltages are applied to the predetermined address electrodes D1 to DN corresponding to the discharge cells to be displayed in the first row. Write pulse voltage + Vw (V)
When a negative scan pulse voltage −Vs (V) is applied to the scan electrodes SCN1 of the first row, the write discharge is generated at the intersections of the predetermined address electrodes D1 to DN and the scan electrodes SCN1 of the first row. Occur.

Next, a positive write pulse voltage + Vw (V) is applied to the predetermined address electrodes D1 to DN corresponding to the discharge cells to be displayed in the second row, and the scan electrode SCN2 in the second row.
When a negative scan pulse voltage -Vs (V) is applied to each of them, a write discharge occurs at the intersection of the predetermined address electrodes D1 to DN and the scan electrode SCN2 of the second row.

The same operation as described above is sequentially performed, and finally a positive write pulse voltage + Vw (V) is applied to predetermined address electrodes D1 to DN corresponding to the discharge cells to be displayed in the Mth row.
When a negative scan pulse voltage −Vs (V) is applied to the scan electrode SCNM of the M-th row, write discharge occurs at the intersection of the predetermined address electrodes D1 to DN and the scan electrode SCNM of the M-th row. Happens.

In the next sustain period, all scan electrodes S are
When CN1 to SCNM are once held at 0 (V) and a negative sustain pulse voltage -Vm (V) is applied to all sustain electrodes SUS1 to SUSM, scan electrodes SCN1 to SCNM at the intersections where the write discharge occurs. A sustain discharge occurs between the sustain electrodes SUS1 to SUSM and the sustain electrodes SUS1 to SUSM. Next, the negative sustain pulse voltage -Vm (V) is alternately applied to all the scan electrodes SCN1 to SCNM and all the sustain electrodes SUS1 to SUSM, so that the sustain discharge continues in the discharge cells to be displayed. Panel display is performed by the emission of this sustain discharge.

In the next erase period, all the scan electrodes SCN1 to SCNM are once held at 0 (V), and
When the erase pulse voltage -Ve (V) is applied to all the sustain electrodes SUS1 to SUSM, erase discharge occurs and the discharge is stopped.

By the above operation, one screen is displayed on the plasma display device.

However, in principle, the plasma display device has the characteristic that the power consumption greatly varies depending on the video signal to be displayed.

[0024]

By the way, since this plasma display device is configured to display an image or the like by causing discharge in a large number of discharge cells, compared with a TV using a general CRT, Power consumption varies greatly depending on the displayed video scene.

[0025] In recent years, when such plasma display devices have become widespread and a large number of plasma display devices are used at the same time in broadcasting with a high audience rate (high school baseball, world cup soccer, Olympics, etc.), they are synchronized with the video signal. Since the power consumption will fluctuate greatly, it will be difficult for the power company to control the power supply, and in the worst case, a power failure or the like is expected to occur.

An object of the present invention is to reduce fluctuations in power consumption in such a plasma display device.

[0027]

In order to achieve the above object, the plasma display device of the present invention comprises a dummy load which consumes the amount of power reduced from the maximum power when the image becomes dark and the power consumption decreases. It is provided with a dummy load control circuit that detects a power fluctuation and controls the power consumed by the dummy load.

With this configuration, it is possible to reduce fluctuations in power consumption of the plasma display device.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS That is, in the invention described in claim 1 of the present invention, a plurality of columns of display electrodes are arranged on a pair of substrates facing each other to form a discharge space, and the display electrodes are arranged to face each other. A plasma display panel having a plurality of discharge cells configured by providing a plurality of columns of address electrodes, and a display drive circuit that applies a signal to the plasma display panel to perform display, and consumes less power. It is characterized by including a dummy load that consumes the amount of power that has decreased from the maximum power when the power consumption has decreased, and a dummy load control circuit that detects power fluctuations and controls the power consumed by the dummy load.

The invention described in claim 2 is the same as claim 1.
In the above, the power control of the dummy load is performed according to the power consumption that changes depending on the average luminance of the video signal.

The invention described in claim 3 is the same as claim 1
In the above, the dummy load control circuit is configured to detect the case where the full screen black display is performed and stop the power supply to the dummy load when the black display continues for a long time.

Further, the invention according to claim 4 is characterized in that, in claim 1, the dummy load is a Peltier element whose temperature decreases when power is supplied. The invention according to claim 5 is characterized in that, in claim 4, the Peltier element is attached to a heat dissipation plate of a circuit element of the display drive circuit which consumes a large amount of power.

The invention described in claim 6 is the same as claim 1.
In the above, the power supply to the dummy load is switched between the time of receiving the broadcast and the non-broadcasting video source such as video and DVD.

Further, in the invention described in claim 7, in claim 1, the dummy load control circuit stops the power supply to the dummy load with or without stabilizing the power consumption by the dummy load. It is configured to switch between the case and the case.

A plasma display device according to an embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 is a block diagram of a display drive circuit of a plasma display device according to an embodiment of the present invention. In FIG. 1, 10 to 19 indicate the same parts as the parts shown in FIG.

Reference numeral 20 is a dummy load that consumes the amount of power reduced from the maximum power when the image is dark and power consumption is low, and 21 is a dummy load control that detects power fluctuations and controls the power consumed by the dummy load 20. It is a circuit and is connected to the main power supply circuit of the display drive circuit. That is, the dummy load control circuit 21 detects that the image becomes dark and the power consumption is reduced, and the dummy load 20 is made to consume the power reduced from the maximum power.

The dummy load 20 is composed of a Peltier element whose temperature decreases when power is supplied, and is attached to a heat dissipation plate of a circuit element of the display drive circuit which consumes a large amount of power and is installed inside the plasma display device. It is possible to stabilize the power consumption while suppressing the temperature rise.

Further, the dummy load control circuit 21 is provided with a function of detecting the full screen black display based on the video signal inputted to the display drive circuit. When the full screen black display continues for a long time, the dummy load control circuit 21 is operated. The power supply to 20 is stopped, so that wasteful power consumption can be reduced.

FIG. 2 shows characteristics of average luminance and power consumption of a general plasma display device. The solid line (A) shows the average luminance and power consumption characteristics of a general plasma display device, and the shaded portion (B) shows the power consumption fluctuation due to the average luminance change. The power consumption fluctuation (B) increases as the screen size of the plasma display device increases.

In the present embodiment, the dummy load control circuit 2
1 to detect fluctuations in power consumption of the scan driver circuit 12 and the power supply circuit 16 of the sustain driver circuit 13,
By supplying power to the dummy load 20 by the power consumption (FIG. 2B) reduced from the maximum power consumption due to the change of the video signal, the power consumption can be stabilized as the plasma display device. Although it has been described that the variation in power consumption is detected by the power supply circuit 16 of the scan driver circuit 12 and the sustain driver circuit 13, the power of the entire display drive circuit of the plasma display device may be detected, of course.

Further, the dummy load 20 due to the change in the average luminance is used.
The power supply to the broadcast is switched between the time of receiving the broadcast and the non-broadcasting video source such as a video and a DVD, so that a large number of plasma display devices have a high audience rating and the power consumption fluctuates in synchronization. During reception, the dummy load 20 is supplied with the amount of power reduced from the maximum power consumption due to the change in the average brightness to stabilize the power consumption of the plasma display device, and is used for many purposes such as home video, DVD, etc. If there is no possibility that the plasma display device of the present invention displays the same video signal, the power supply to the dummy load 20 can be stopped to minimize the power consumption.

Further, the dummy load control circuit 21 is configured to switch between the case of stabilizing the power consumption by the dummy load 20 and the case of stopping the power supply to the dummy load 20 without performing the stabilization, and By sending a control signal from the broadcasting station side via broadcasting or the Internet to control whether the dummy load 20 is supplied with power corresponding to the fluctuation in power consumption due to the average brightness,
It is possible to control so that the dummy load 20 stabilizes only when the audience rating is high.

The dummy load 20 may be a resistor, a nichrome wire, or the like that consumes power, in addition to the Peltier element.

[0045]

As is apparent from the above description, according to the plasma display device of the present invention, it is possible to reduce the large fluctuation of the power consumption of the plasma display device according to the video signal, and to reduce the number of plasmas. When the display devices are used simultaneously and the power consumption fluctuates greatly in synchronization with the video signal, it is possible to easily control the power plant of a power company, etc. The effect that the stability factor can be eliminated is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram of a driving circuit of a plasma display device according to an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing a relationship between average brightness and power consumption of the plasma display device.

FIG. 3 is a perspective view showing a schematic configuration of a panel of a plasma display device in a conventional example.

FIG. 4 is an explanatory diagram showing an electrode array of a panel of a plasma display device in a conventional example.

FIG. 5 is a block circuit diagram showing an example of a display drive circuit of a plasma display device in a conventional example.

FIG. 6 is a signal waveform diagram showing an example of a driving method of a plasma display device in a conventional example.

[Explanation of symbols]

1, 5 substrates 2 Display electrode 7 Address electrode 10 Plasma display panel 11 Address driver circuit 12 Scan driver circuit 13 Sustain driver circuit 14 Discharge control timing generation circuit 15, 16 power supply circuit 17 A / D converter (analog / digital converter) 18 Scan number converter 19 Subfield converter 20 Dummy load section 21 Dummy load control circuit

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/28 Z

Claims (7)

[Claims] 1. A plurality of display electrodes and a plurality of columns of address electrodes, which are arranged so as to intersect the display electrodes, are provided on a pair of substrates facing each other to form discharge spaces. And a display drive circuit that applies a signal to the plasma display panel to perform display, and consumes the amount of power reduced from the maximum power when the power consumption is reduced. A plasma display device comprising: a dummy load; and a dummy load control circuit that detects a power fluctuation and controls power consumed by the dummy load. 2. The plasma display device according to claim 1, wherein the dummy load is configured to perform power control according to power consumption that varies depending on the average luminance of the video signal. 3. The dummy load control circuit is configured to detect a case where full-screen black display is performed, and stop power supply to the dummy load when black display continues for a long time. Plasma display device. 4. The plasma display device according to claim 1, wherein the dummy load is a Peltier element whose temperature decreases when power is supplied. 5. The plasma display device according to claim 4, wherein the Peltier element is attached to a heat dissipation plate of a circuit element of the display drive circuit which consumes a large amount of power. 6. The plasma display device according to claim 1, wherein the power supply to the dummy load is switched between when a broadcast is received and when a video source such as a video or a DVD is not broadcast. 7. The dummy load control circuit is configured to switch between a case where power consumption is stabilized by the dummy load and a case where power supply to the dummy load is stopped without stabilization. The plasma display device according to claim 1.