JP2003330403A - Semiconductor device, semiconductor display device and its driving method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit and a driving method of the circuit in which occurrence of variation in the voltages of signal lines that are adjacent to each other is prevented while inputting signals into wirings for every several number of lines. <P>SOLUTION: When inputting signals to wirings for every m lines, the signals are again inputted to a wiring B, that is adjacent to a wiring A into which signals are inputted next, with a same timing of the wiring A. By performing the above, variation in the voltages caused by capacitive coupling between the wiring A and the wiring B is prevented. Thus when a divided driving is conducted for a semiconductor display device divided stripes are hardly visible for an observer. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention uses a plurality of wirings.
(M is a natural number of 2 or more) The present invention relates to a method for driving a semiconductor device in which signals are selected and input for each group. In particular,
The present invention relates to a method for driving a semiconductor display device, in which a plurality of wirings are selected for each group of m (m is a natural number of 2 or more) and a signal is input. Further, the present invention relates to a semiconductor display device which operates using the driving method.

[0002]

2. Description of the Related Art In recent years, thin film transistors (Thin
A technique for forming a film transistor (hereinafter referred to as a TFT) has made great progress, and its application and development to an active matrix type display device, which is one of semiconductor devices, is in progress. An active matrix type semiconductor display device displays an image by providing a TFT as a switching element for each pixel and sequentially writing a video signal to each pixel.

The drive circuit of an active matrix type semiconductor display device mainly includes a scanning line drive circuit and a signal line drive circuit. The scanning line driving circuit selects a plurality of scanning lines provided in the pixel portion one by one or in sequence, and the signal line driving circuit selects a signal line to a pixel connected to the selected scanning line. The video signals are sequentially input via.

The scanning line driving circuit and the signal line driving circuit are required to operate at high speed. In particular, the signal line driver circuit operates at a higher speed than the scan line driver circuit because a video signal is sequentially input to all the pixels connected to the scan line within a period in which one scan line is selected. There is a need to. For example, in the case of a VGA active matrix semiconductor display device, the drive frequency of the signal line drive circuit is generally about 25 MH.
It is about z.

The number of pixels in the scanning line direction (horizontal pixel number: Hn) of the active matrix type semiconductor display device tends to increase in order to display an image of higher definition, higher resolution and multiple gradations. As the number of horizontal pixels Hn increases, it is required to operate the signal line drive circuit at a higher speed. However, if the drive frequency of the signal line drive circuit is set too high, there is a possibility that the response speed of the TFT included in the signal line drive circuit may not correspond to the drive frequency.

Therefore, in order to prevent the driving frequency of the signal line driving circuit from increasing as the number of horizontal pixels Hn increases,
Various driving methods have been proposed. As one of them, the pixels lined up in the scanning line direction are divided into m (m is a positive number larger than 2 and is generally a natural number) groups, and each group is simultaneously divided during one line period. There is a division driving method in which a video signal is input to pixels. In the present specification, the term “one-line period” means that after a video signal is input to the first pixel among pixels on one line arranged in the horizontal direction,
It means a period until just before the video signal is input to the first pixel of the next one line.

In the division driving method with m division, when the length of one line period is the same, the time for inputting a video signal per pixel is m times as long as in the normal driving method. Therefore, the drive frequency of the signal line drive circuit can be reduced to about 1 / m of the normal frequency.

[0008]

By the way, the pixel portion is provided with a plurality of signal lines corresponding to the respective pixels, and the video signal is inputted to the respective pixels from the signal line drive circuit through the respective signal lines. It Then, in the signal line drive circuit, a video signal input from the outside is sampled at a predetermined timing and input to each signal line as a video signal.

In the case of the division driving method described above, a serial-format video signal input from the outside is sampled, and m
Input to the signal line of the book at the same time. FIG. 10 shows a configuration of a portion for sampling a video signal of the signal line driver circuit, in which m =
The case of 4 will be briefly described as an example. In FIG. 10, 300
Reference numeral 1 denotes a signal line drive circuit, which is connected via the same number of video signal lines V1 to Vm (V1 to V4 in FIG. 10) as the number of divisions m.
The video signal is supplied to the signal line driver circuit 3001.

The pixel portion 3003 is provided with signal lines S1, S2, ... Corresponding to each pixel. In FIG. 10, S1 to S
Although 12 signal lines 12 are shown, the number of signal lines varies depending on the panel standard. Each switch 3004 controls connection between each signal line and each video signal line, and m adjacent signal lines (four in FIG. 10) are connected to the switch 30.
They are connected to different video signal lines via 04.

Specifically, in FIG. 10, the signal lines S1, S5,
S9 is connected to the video signal line V1 via the switch 3004, and the signal lines S2, S6 and S10 are connected to the switch 3
004 is connected to the video signal line V2, signal lines S3, S7, S11 are connected to the video signal line V3 via the switch 3004, and signal lines S4, S8,
S12 is connected to the video signal line V4 via the switch 3004.

The ON / OFF of each switch 3004 is determined by the timing signal generated in the signal line drive circuit 3001. When the switch 3004 is turned on by m units in synchronization with the timing signal, the signal line m
The video signal is sampled and input for each book.

For example, in the case of FIG. 10, as shown in FIG. 11, after the video signals are simultaneously input to the signal lines S1 to S4, the signal lines S5 to S8 are next, and then the signal lines S9 to.
S12 and four video signals are sequentially input.
In addition, in FIG. 11, it means that a video signal is input to a signal line with a circle.

FIG. 12A shows the case of FIG.
The timing chart of the video signal input to each signal line is shown. Note that in FIG. 12A, it is assumed that the image information included in the video signal is the same for the sake of easy understanding of the description. The voltages of m (four in FIG. 12A) adjacent signal lines S1 to Sm (S1 to S4 in FIG. 12A) change depending on the input of the video signal. Then, the signal lines S (m + 1) to S2m (see FIG.
In 2 (A), the voltage of S5 to S8 changes depending on the input of the video signal. At this time, the switch 3004 connected to the signal lines S1 to Sm is turned off, and thus the signal lines S1 to Sm.
The voltage of m is retained. In this specification, the voltage means a potential difference from the ground unless otherwise specified.

At this time, among the adjacent signal lines, the signal lines S4 and S4 having different input timings of the video signal are inputted.
Pay attention to the change in voltage of No. 5. The signal line S is shown in FIG.
4 shows an enlarged view of timing charts 4 and S5. 12
As shown in (B), the voltage of the signal line S4 changes at the same time as the input of the video signal to S4, and thereafter is kept almost constant. However, when the voltage of the signal line S5 changes due to the input of the video signal, as indicated by a broken line 3010,
The voltage of the signal line S4 changes somewhat with the voltage of the signal line S5. This is because adjacent signal lines are capacitively coupled.

A change in voltage due to capacitive coupling is a phenomenon that occurs in all signal lines that are adjacent to signal lines with different input timings of video signals and to which video signals are input first. . In the case of FIG. 10, in the signal lines S4 and S8, the adjacent signal lines S5 and S
It changes slightly due to the change in the voltage of 9. But,
The voltage of the signal line that is not adjacent to the signal line to which the video signal is input next does not change, so a signal line whose voltage changes every m lines appears.

Therefore, when the division driving method of m division is used, the voltage difference generated for each m signal lines is displayed as light and dark in the pixel portion and is visually recognized by the observer as vertical stripes (divided stripes).

In view of the above, a plurality of wirings are
(M is a natural number of 2 or more) An object of the present invention is to provide a circuit capable of preventing a change in voltage of adjacent signal lines and a method for driving the circuit when selecting and inputting a signal for each group. . In particular, it is an object of the present invention to provide an active matrix type semiconductor display device and a driving method thereof, in which vertical stripes are hard to be visually recognized by an observer when division driving is performed, and high-definition, high resolution, and multi-tone image display To do.

[0019]

According to the present invention, in order to solve the above-mentioned problems, when a signal is input to a wiring every m lines, it is adjacent to the wiring A to which a signal is next input. By inputting a signal to the wiring B again at the same timing as the wiring A, a change in voltage due to capacitive coupling between the wiring A and the wiring B is prevented.

The division drive method for dividing the semiconductor display device into m divisions will be described as an example. In the present invention, S1
FIG. 1 shows the order of signal input when signals are input to the signal line of S12. Although FIG. 1 illustrates the case where m = 4 in FIG. 1, m may be a natural number of 2 or more.

In the present invention, as shown in FIG.
After the video signals are simultaneously input to 1 to S4, the signal line S4 adjacent to the signal line S5 to which the next signal is input is provided.
Then, the video signals are simultaneously input to the signal lines S5 to S8.
That is, the video signal is input twice to the signal line S4.

The video signal re-input to the signal line S4 has the same voltage level as the video signal previously input. Therefore, even if the voltage of the signal line S5 changes, the voltage of the signal line S4 is fixed, and the voltage does not change due to capacitive coupling with the signal line S5.

Further, immediately before the video signal is input to the signal line S4 again and immediately after the video signal is input, the voltage of the signal line S4 remains unchanged and is fixed. The voltage on line S3 also does not change.

Similarly, a signal line S9 to which a signal is next input is provided.
The video signal is simultaneously input to the signal line S8 and the signal lines S9 to S12 which are adjacent to each other. Note that, in FIG. 1, a video signal is input to a signal line marked with a circle. Similar to the signal line S4, the video signal is input twice to the signal line S8.

As described above, by inputting a signal again to a wiring adjacent to a wiring to which a signal is next input at the timing of the next signal input, a change in voltage due to capacitive coupling is prevented. be able to. Therefore, it is possible to make it difficult for an observer to visually recognize the division stripes when the semiconductor display device is divided and driven.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, in a semiconductor display device which is divided and driven by m divisions, FIG.
Shown in. Although FIG. 2 shows the case where m = 4 as an example, the number of divisions is not limited to this in the present invention. m is a natural number of 2 or more and may be smaller than the number of signal lines.

In FIG. 2, reference numeral 4001 denotes a signal line driving circuit, which has one more video signal line V1 than the division number m.
A video signal is supplied to the signal line driver circuit 4001 through Vm and Vm ′ (V1 to V4 and V4 ′ in FIG. 1).

The pixel portion 4003 is provided with signal lines S1, S2, ... Corresponding to each pixel. In FIG. 1, S1 to S1
Although 12 signal lines of 2 are shown, the number of signal lines differs depending on the panel standard. Switches SW1 to SW1
2, SW4 'and SW8' control the connection between each signal line and each video signal line.

Adjacent m (four in FIG. 1) signal lines are connected to different video signal lines via switches SW1 to SW12, SW4 ', and SW8'. Particularly in the present invention, the signal line adjacent to the signal line to which a signal is next input is connected to the two video signals via the respective switches.

Specifically, in FIG. 10, the signal lines S1, S5,
S9 is connected to the video signal line V1 via the switches SW1, SW5 and SW9, and signal lines S2, S6 and S10 are connected to the switch S.
To the video signal line V2 via W2, SW6 and SW10,
Signal lines S3, S7, S11 are switches SW3, SW7,
The signal lines S4 and S are connected to the video signal line V3 via SW11.
8, S12 are connected to the video signal line V4 via the switches SW4, SW8, SW12. Further, the signal lines S4 and S adjacent to the signal line to which a signal is next input are
Reference numeral 8 is connected to the video signal line V4 ′ via separate switches SW4 ′ and SW8 ′.

Each switch SW1 to SW12, S
Turning on / off of W4 ′ and SW8 ′ is performed by the signal line driving circuit 400.
1 depends on the timing signal generated.

Next, the operation of each switch and the timing of inputting a video signal to each signal line will be described. According to the present invention, in synchronization with the timing signal, first m switches (four switches in FIG. 2) are turned on, the video signal is sampled and input to m signal lines, and then the switches are switched to (m + 1). ) (5 in FIG. 2) are turned on, and video signals are sampled and input in order for each signal line (m + 1).

In order to describe the operation of each switch and the timing of inputting a video signal to each signal line in more detail,
Taking the case of FIG. 2 as an example, the video signal lines V1 to V4, V
4 ', the video signal input to 4', the video signal sampled on the signal lines S1 to S12, and the switches SW1 to S
The relationship between the operations of W12, SW4 'and SW8' is shown in FIG.

As shown in FIG. 3, first, the switches SW1 to SW1
When the SW4 is turned on, the video signals D1 to D4 respectively supplied to the video signal lines V1 to V4 are input to the corresponding signal lines S1 to S4.

Next, the switches SW1 to SW4 are turned off, and the switches SW4 'and SW5 to SW8 are turned on instead. At this time, the switch S is connected to the video signal line V4 '.
The video signal D4 having the same image information as that supplied to the video signal line V4 when W1 to SW4 are on is supplied. Therefore, when the switch SW4 ′ is turned on, the video signal D4 supplied to the video signal line V4 ′ is input to the signal line S4 again. Further, when the switches SW5 to SW8 are turned on, the video signal line V5
To video signals D5 to D8 respectively supplied to V8
Are input to the corresponding signal lines S5 to S8.

Next, the switches SW4 ', SW5 to SW8
Turns off, and switches SW8 'and SW9-S instead
W12 turns on. At this time, the video signal D8 having the same image information as that supplied to the video signal line V4 when the switches SW5 to SW8 are on is supplied to the video signal line V8 ′. Therefore, the switch SW
By turning 8'on, the video signal D8 supplied to the video signal line V4 'is input to the signal line S8 again. Further, when the switches SW9 to SW12 are turned on, the video signals D9 to D12 supplied to the video signal lines V1 to V4 respectively correspond to the corresponding signal lines S9 to S1.
Entered in 2.

FIG. 4A shows a timing chart of a video signal input to each signal line in the case of FIG. In addition, in order to make the explanation easy to understand in FIG.
It is assumed that the video signals have the same image information. m (four in FIG. 4A) adjacent signal lines S1
The voltage of Sm (S1 to S4 in FIG. 4A) changes depending on the input of the video signal. Then, after a certain period of time, the voltage of the signal lines S (m + 1) to S2m (S5 to S8 in FIG. 4A) changes according to the input of the video signal. In this specification, the voltage means a potential difference from the ground unless otherwise specified.

In the present invention, the video signal is input again to the signal lines S4 and S8 adjacent to the signal line to which the video signal is input next, at the same time when the video signal is input next. FIG. 4B is an enlarged view of a timing chart of the signal lines S4 and S5, which are adjacent to each other and have different input timings of video signals. Figure 4 (B)
As shown in, the voltage of the signal line S4 changes at the same time as the input of the video signal to S4, and thereafter is kept almost constant. Even if the voltage of the signal line S5 changes due to the input of the video signal, as indicated by a broken line 4010, the signal line S4
The voltage of is almost fixed and fixed.

The same applies to the case of the signal line S9, and even if the voltage of the signal line S9 changes, the voltage of the signal line S9 does not change and is fixed.

As described above, in the present invention, the signal is input again to the wiring adjacent to the wiring to which the signal is next input at the timing when the signal is next input, so that the voltage due to the capacitive coupling is reduced. You can prevent change. Therefore,
It is possible to make it difficult for an observer to visually recognize the division stripes when performing division driving of the semiconductor display device.

In this embodiment, the case where the present invention is used for division driving of a semiconductor display device has been described, but the present invention is not limited to this. The present invention may be a circuit that selects a plurality of wirings for each group of m (m is a natural number of 2 or more) and inputs a signal, and prevents a change in voltage due to capacitive coupling with adjacent wirings. be able to.

[0042]

EXAMPLES Examples of the present invention will be described below.

(Embodiment 1) In this embodiment, a specific configuration of a circuit (referred to as a sampling circuit) for sampling a video signal supplied to a signal line drive circuit in a semiconductor display device of the present invention will be described. .

FIG. 5 shows a circuit diagram of the sampling circuit of this embodiment. The sampling circuit 200 of the present embodiment is supplied with a timing signal that determines sampling timing, in other words, operation timing of each switch. In the present embodiment, the timing signal supplied from the upper circuit of the sampling circuit 200 included in the signal line drive circuit is waveform-shaped by the inverters 201 and 202, and the transmission gate S which is one of the switches.
Input to W1, SW2, .... The transmission gates SW1, SW2, ...
A signal obtained by inverting the polarity of the timing signal by the inverter 201 is also input.

A video signal is connected to the sampling circuit 200. In this embodiment, the case of 4-division driving is illustrated, but the number of divisions of the present invention is not limited to this. In the case of four-division driving, five video signal lines V1 to V4 and V4 ′, which are large in number, are connected.

Transmission gate SW1,
The SW2, ... Can control the supply of the video signals supplied to the video signal lines V1 to V4 to the respective signal lines S1, S2. Also, transmission gate SW
4 ′, SW8 ′, ... Can control the supply of the video signal supplied to the video signal line V4 ′ to the signal lines S4, S8 ,.

Further, the transmission gate S
Wm 'is the transmission gate SW (m + 1)-
The same timing signal as SW (m + 3) is input, and switching is performed at the same timing.

The structure of the transmission gate used in FIG. 5 will be described with reference to FIG. FIG. 6A shows logical symbols of the transmission gate. A timing signal is input to the node S and a timing signal whose polarity is inverted is input to the node Sb. Further, the video signal is input to the node A, and the sampled video signal is output from the node B in synchronization with the timing signal.

FIG. 6B shows an equivalent circuit diagram of the logic symbols shown in FIG. The transmission gate shown in FIG. 6B includes a p-channel TFT and an n-channel T
It has an FT and the source and drain are connected to each other. Then, a timing signal is input to the gate of the n-channel TFT, and a timing signal whose polarity is inverted is input to the gate of the p-channel TFT.

Although the transmission gate is used as the switch in this embodiment, the present invention is not limited to this structure. Any switch element capable of controlling the supply of the video signal to each signal line may be used.

The circuit diagram of the sampling circuit shown in this embodiment is only one embodiment. In the present invention,
It suffices that the signal can be input again to the wiring adjacent to the wiring to which the signal is next input at the timing when the signal is next input.

(Embodiment 2) In this embodiment, a structure of an active matrix type liquid crystal display device which is one of the semiconductor display devices of the present invention will be described.

FIG. 7 shows a block diagram of the liquid crystal display device of the present invention.

Reference numeral 115 is a signal line driving circuit, 116 is a scanning line driving circuit, and 120 is a pixel portion. Although one signal line driver circuit and one scan line driver circuit are provided in this embodiment, the present invention is not limited to this structure. Two or more signal line driving circuits may be provided, or two or more scanning line driving circuits may be provided.

The signal line drive circuit 115 has a shift register circuit 115_1, a level shift circuit 115_2, and a sampling circuit 115_3. It should be noted that the level shift circuit may be used as necessary and does not necessarily have to be used. Further, in this embodiment, the level shift circuit 115
_2 is provided between the shift register circuit 115_1 and the sampling circuit 115_3, but the present invention is not limited to this structure. Shift registration circuit 115_1
The configuration may be such that the level shift circuit 115_2 is incorporated therein.

When the clock signal (CLK) and the start pulse signal (SP) are supplied to the shift register circuit 115_1, the shift register circuit 115_1 generates a timing signal for controlling the timing of sampling the video signal.

The amplitude of the voltage of the generated timing signal is amplified in the level shift circuit 115_2.

The timing signal amplified by the level shift circuit 115_2 is supplied to the sampling circuit 115_3.
Entered in. Then, the video signal input to the sampling circuit 115_3 is sampled in synchronization with the timing signal input to the sampling circuit 115_3 and input to the signal line 117.

In the present invention, a plurality of signal lines are connected to m (m is 2).
(The above natural numbers) The video signals selected and sampled for each group are input, and the next video signal is input to the signal line adjacent to the signal line to which the video signal is input next. Then, the re-sampled video signal is input at the same timing.

In the pixel section 120, the signal line drive circuit 115
A signal line 117 to which a video signal sampled from is input and a scan line 118 to which a selection signal is input from the scan line driver circuit 116 intersect. The signal line 117
A thin film transistor (pixel TFT) 121 of a pixel 119, a liquid crystal cell 122 in which liquid crystal is sandwiched between a counter electrode and a pixel electrode, and a storage capacitor 1 in a region surrounded by a scanning line 118 and a scanning line 118.
And 23 are provided.

The pixel TFT 121 is the scanning line driving circuit 11
It drives by the selection signal inputted into the scanning line 118 from No. 6. The video signals input to the signal lines 117 are
It is selected by the pixel TFT 121 and input to the pixel electrode.

The present invention is not limited to the liquid crystal display device shown in this embodiment. The liquid crystal display device may or may not include a controller, a memory, and the like for converting a video signal of a certain standard into a standard of a drive circuit of the liquid crystal display device.

Further, this embodiment can be implemented by freely combining with the first embodiment.

(Embodiment 3) In this embodiment, the structure of an active matrix light emitting device which is one of the semiconductor display devices of the present invention will be described.

In the active matrix light emitting device, a light emitting element is provided in each pixel. Since the light emitting element emits light by itself, it has high visibility, does not require a backlight required in a liquid crystal display device, is suitable for thinning, and has no limitation in viewing angle. Although a light emitting device using an organic light emitting element (OLED), which is one of the light emitting elements, will be described in the present embodiment, the present invention may be a light emitting apparatus using another light emitting element. .

The OLED is composed of a layer containing a material capable of obtaining luminescence (electroluminescence) generated by applying an electric field (hereinafter referred to as an electroluminescent layer), an anode layer,
And a cathode layer. Electroluminescence includes light emission when returning from a singlet excited state to a ground state (fluorescence) and light emission when returning from a triplet excited state to a ground state (phosphorescence). Either one of the emitted light may be used,
Alternatively, both light emission may be used.

An enlarged view of the pixel portion 301 of the light emitting device of this embodiment is shown in FIG. The signal lines (S1 to Sx), the power supply lines (V1 to Vx), and the scanning lines (G1 to Gy) are the pixel portion 301.
It is provided in.

In the case of this example, the signal lines (S1 to Sx),
1 for the power supply lines (V1 to Vx) and the scanning lines (G1 to Gy)
The area provided with each is a pixel 304. A plurality of pixels 304 are arranged in a matrix in the pixel portion 301.

An enlarged view of the pixel 304 is shown in FIG.
In FIG. 8B, 305 is a switching TFT. The gate electrode of the switching TFT 305 is connected to the scanning line Gj (j = 1 to y). One of the source region and the drain region of the switching TFT 305 is the signal line Si (i = 1 to x), and the other is the driving TF.
T306 gate electrode, storage capacitor 308 of each pixel
Respectively connected to.

The storage capacitor 308 is the switching TFT 3
When 05 is in the non-selected state (OFF state), it is a driving TFT
It is provided to hold the gate voltage of 306 (potential difference between the gate electrode and the source region). Although the storage capacitor 308 is provided in this embodiment, the present invention is not limited to this structure and the storage capacitor 308 may not be provided.

One of the source region and the drain region of the driving TFT 306 is connected to the power supply line Vi (i = 1 to x), and the other is connected to the light emitting element 307. The power supply line Vi is also connected to the storage capacitor 308.

The light emitting element 307 comprises an anode and a cathode and an electroluminescent layer provided between the anode and the cathode. When the anode is connected to the source region or the drain region of the driving TFT 306, the anode serves as a pixel electrode and the cathode serves as a counter electrode. Conversely, when the cathode is connected to the source region or the drain region of the driving TFT 306, the cathode serves as the pixel electrode and the anode serves as the counter electrode.

The counter electrode of the light emitting element 307 and the power supply line Vi
A predetermined voltage is applied to each.

Switching TFT 305, driving TF
T306 is an n-channel TFT or a p-channel TF
Either T or T can be used. However, for driving T
When the source region or the drain region of the FT 306 is connected to the anode of the light emitting element 307, the driving TFT 30
It is desirable that 6 is a p-channel TFT. Also,
When the source region or the drain region of the driving TFT 306 is connected to the cathode of the light emitting element 307, the driving T
It is desirable that the FT 306 is an n-channel TFT.

The switching TFT 305 and the driving TFT 306 may have a multi-gate structure such as a double-gate structure or a triple-gate structure instead of a single-gate structure.

The light emitting device may or may not include a controller, a memory, etc. for converting a video signal of a certain standard according to the standard of the drive circuit of the light emitting device.

Further, this embodiment can be implemented by freely combining with the first embodiment.

(Embodiment 4) As electronic equipment using the present invention, a video camera, a digital camera, a goggle type display (head mount display), a navigation system, a sound reproducing device (car audio, audio component system, etc.), a notebook type personal computer. Computers, game machines, personal digital assistants (mobile computers, mobile phones, hand-held game machines, electronic books, etc.), image reproducing devices equipped with recording media (specifically, Digital Versatile Discs)
(A device equipped with a display capable of reproducing a recording medium such as (DVD) and displaying the image). Specific examples of these electronic devices are shown in FIGS.

FIG. 9A shows a display device, which is a housing 200.
1, support base 2002, display unit 2003, speaker unit 2
004, a video input terminal 2005 and the like. The display device of the present invention is completed by using the semiconductor circuit and the semiconductor display device of the present invention in the display portion 2003 and other signal processing circuits. The display device includes all display devices for displaying information, such as those for personal computers, those for receiving TV broadcasting, and those for displaying advertisements.

FIG. 9B shows a digital still camera including a main body 2101, a display section 2102, an image receiving section 2103,
An operation key 2104, an external connection port 2105, a shutter 2106 and the like are included. The digital still camera of the present invention is completed by using the semiconductor circuit and the semiconductor display device of the present invention in the display portion 2102 and other signal processing circuits.

FIG. 9C shows a laptop personal computer, which has a main body 2201, a casing 2202, and a display section 22.
03, keyboard 2204, external connection port 2205,
A pointing mouse 2206 and the like are included. The notebook personal computer of the present invention is completed by using the semiconductor circuit and the semiconductor display device of the present invention in the display portion 2203 and other signal processing circuits.

FIG. 9D shows a mobile computer, which has a main body 2301, a display portion 2302, and a switch 230.
3, an operation key 2304, an infrared port 2305 and the like. The semiconductor circuit and the semiconductor display device of the present invention are provided in the display unit 2.
The mobile computer of the present invention is completed by using the signal processing circuit 302 and other signal processing circuits.

FIG. 9E shows a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a casing 2402, a display portion A2403, and a display portion B.
2404, a recording medium (DVD or the like) reading unit 2405,
An operation key 2406, a speaker portion 2407, and the like are included. The display unit A2403 mainly displays image information, and the display unit B2403
2404 mainly displays character information. Note that the image reproducing device provided with the recording medium includes a home game machine and the like. The image reproducing device of the present invention is completed by using the semiconductor circuit or the semiconductor display device of the present invention in the display portions A2403, B, 2404 and other signal processing circuits.

FIG. 9F shows a goggle type display (head mount display), which includes a main body 2501, a display section 2502 and an arm section 2503. The goggle type display of the present invention is completed by using the semiconductor circuit and the semiconductor display device of the present invention in the display portion 2502 and other signal processing circuits.

FIG. 9G shows a video camera, which is a main body 2
601, display unit 2602, housing 2603, external connection port 2604, remote control receiving unit 2605, image receiving unit 260
6, a battery 2607, a voice input unit 2608, operation keys 2609, and the like. By using the semiconductor circuit or the semiconductor display device of the present invention for the display portion 2602 or other signal processing circuits, the video camera of the present invention is completed.

Here, FIG. 9H shows a mobile phone which includes a main body 2701, a housing 2702, a display portion 2703, a voice input portion 2704, a voice output portion 2705, operation keys 2706, an external connection port 2707, an antenna 2708, and the like. Including. Note that the display portion 2703 can suppress current consumption of the mobile phone by displaying white characters on a black background. The semiconductor circuit and the semiconductor display device of the present invention can be applied to a display portion 2703.
The mobile phone of the present invention is completed by using it for other signal processing circuits.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to electronic devices in all fields. In addition, this embodiment can be implemented in combination with any of the configurations shown in the first to third embodiments.

[0088]

According to the present invention, when a signal is input to a wiring every m lines, a signal is input again to the wiring B adjacent to the wiring A to which a signal is next input at the same timing as the wiring A. By inputting, the voltage change due to the capacitive coupling between the wiring A and the wiring B is prevented. With the above structure, a change in voltage due to capacitive coupling can be prevented. Therefore, it is possible to make it difficult for an observer to visually recognize the division stripes when the semiconductor display device is divided and driven.

[Brief description of drawings]

FIG. 1 is a diagram showing an order in which a video signal is input to each signal line in the present invention.

FIG. 2 is a diagram showing an arrangement of switches for selecting each signal line.

FIG. 3 is a diagram showing a timing chart of each switch and a signal flow of a signal line and a video signal line.

FIG. 4 is a timing chart of signal lines.

FIG. 5 is a circuit diagram of a sampling circuit according to the present invention.

FIG. 6 is a logical symbol and an equivalent circuit diagram of a transmission gate.

FIG. 7 is a block diagram showing a structure of a liquid crystal display device.

8A and 8B are a pixel circuit diagram and a pixel circuit diagram of a light-emitting device.

FIG. 9 is an electronic device of the invention.

FIG. 10 is a diagram showing an arrangement of switches of a conventional sampling circuit.

FIG. 11 is a diagram showing an order in which a video signal is input to each signal line in the related art.

FIG. 12 is a conventional timing chart of signal lines.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/20 680 G09G 3/20 680G G02F 1/133 505 G02F 1/133 505 550 550 550 G09G 3/36 G09G 3/36 F term (reference) 2H093 NA16 NA22 NC12 NC13 NC16 NC22 NC23 NC28 NC34 NC35 ND15 ND34 ND37 5C006 AA16 AC11 AF43 AF50 AF52 AF59 AF72 BB16 BC13 BC20 BC23 BF03 BF11 BF24 BF26 FA22 FA25 FA25 FA25 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA25 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA25 FA25 FA25 FA15 FA25 FA25 FA15 FA15 FA15 FA15 FA15 FA15 FA15 FA25 FA15 FA25 FA25 FA25 AA10 BB05 DD05 DD08 DD25 EE29 FF11 HH09 JJ02 JJ03 JJ04 JJ06 KK02 KK04 KK07 KK43

Claims (6)

[Claims] 1. A plurality of wirings is m (m is a natural number of 2 or more).
A method of driving a semiconductor device, wherein a signal is selected for each group and input with a signal, wherein a signal is input to m signal lines included in the first group, and then the first adjacent group is connected to the first group. A method for driving a semiconductor device, characterized in that a signal is input again to the m signal lines included in the first group in synchronization with the input of signals to the m signal lines included in the second group. . 2. A method of driving a semiconductor device, wherein a plurality of signal lines are selected for each group of m (m is a natural number of 2 or more) and a video signal is inputted, which is included in the first group. After inputting the video signal to the m signal lines, the first group is again synchronized with the input of the video signal to the m signal lines included in the second group adjacent to the first group. A method of driving a semiconductor display device, wherein a video signal is input to m signal lines included in the above. 3. A plurality of wirings, a means for selecting the plurality of wirings for each group of m (m is a natural number of 2 or more), and a means for inputting a signal to the selected m wirings. In the semiconductor device having, the one wiring adjacent to any one of the m wirings selected at the next timing among the m wirings simultaneously selected is selected at the next timing. A semiconductor device in which a signal is selected again and a signal is input at the same time as the above-described m wirings. 4. A plurality of wirings, first and second switches for selecting the plurality of wirings for each m (m is a natural number of 2 or more) groups, and the selected m wirings. A semiconductor device having means for inputting a signal, wherein among the plurality of wirings, the m wirings selected at the same time correspond to the first switches, and the m switches selected simultaneously. Of the wirings, one wiring adjacent to any one of the m wirings selected at the next timing corresponds to the second switch in addition to the first switch, The second switch corresponds to each of the plurality of wires that are simultaneously selected at the next timing.
A semiconductor device characterized by being synchronized with the switch of. 5. A plurality of signal lines and the plurality of signal lines are m.
(M is a natural number of 2 or more) selecting means for each group, means for inputting a video signal to the selected m signal lines, and pixels corresponding to each of the plurality of signal lines. In the semiconductor display device, one signal line adjacent to any one of the m signal lines selected at the next timing among the m signal lines selected at the same time has the following timing. The video signal is input again by being selected at the same time as the m signal lines selected in step S1, and the video signal input to each of the plurality of signal lines causes the pixel corresponding to each of the plurality of signal lines to A semiconductor display device, wherein a part of an image is displayed. 6. A plurality of signal lines and the plurality of signal lines
(M is a natural number of 2 or more) First and second switches selected for each group, means for inputting a video signal to the selected m signal lines, and each of the plurality of signal lines Of the plurality of signal lines, the plurality of signal lines being simultaneously selected correspond to the first switch, and the plurality of signal lines being simultaneously selected. Among the signal lines, one signal line adjacent to any one of the plurality of signal lines simultaneously selected at the next timing corresponds to the second switch in addition to the first switch. The second switch is synchronized with the first switch that corresponds to each of the plurality of signal lines that are simultaneously selected at the next timing, and the video input to each of the plurality of signal lines. Depending on the signal A part of the image is displayed on the pixel corresponding to each of the plurality of signal lines.