JP2003324265A - Etching method and manufacturing method for printed wiring board using it - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed wiring board of superior circuit formation characteristics with less short-circuit failure between conductor circuits. <P>SOLUTION: When two or more metals of the same kind whose manufacturing methods are different from each other are selectively etched, an etching method using the etchant of reaction rate-controlling characteristics, and a method for manufacturing the printed wiring board using the etching method are provided. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an etching method,
And a method for manufacturing a printed wiring board.

[0002]

2. Description of the Related Art In recent years, there has been an increasing demand for smaller, lighter and faster electronic equipment, and the density of printed wiring boards has been increasing. In the conventional printed wiring board produced by etching copper, there is a limit to the miniaturization of wiring due to the influence of side etching, and there is a limitation to increase the density of the substrate. Therefore, in recent years, a method for manufacturing a printed wiring board by a semi-additive method using electroplating has attracted attention. According to this semi-additive method, as described in Patent Document 1, after forming a hole that becomes IVH with a laser or the like on a resin surface on which a circuit is to be formed, unevenness of several μm is formed on the resin by chemical roughening or plasma treatment, This is a method in which a Pd catalyst is applied, electroless plating of about 1 μm is performed to form a pattern electroplating resist, and a circuit is formed by the pattern electroplating, and then the resist and extra electroless plating are removed.

[Patent Document 1] Japanese Patent Laid-Open No. 11-186716

[0003]

However, when a circuit is formed by the above semi-additive method, in order to provide a Pd catalyst for directly forming an electroless copper plating layer on the resin, Pd is added in the subsequent step. Is difficult to remove. If Pd remains on the resin, problems such as deterioration of insulation reliability and problems such as plating depositing on the resin when Ni / Au plating is performed later occur. Also, to improve adhesion, several μs are required by chemical roughening or plasma treatment.
Although it is necessary to form irregularities of m on the resin, roughening is insufficient and a problem such as peeling of the conductor circuit is likely to occur.

There is also a method of forming a circuit on a resin with copper foil by a semi-additive method. In this case, it suffices to be able to remove the copper foil at the extra portion without melting the conductor circuit, but since the copper foil and the conductor circuit are usually made by electrolytic copper plating, there is no difference in etching rate. There was a problem that the conductor circuit with good liquid content was dissolved first, and it was not possible to form the fine wiring as designed.

In view of the above, it is an object of the present invention to provide a printed wiring board which is less likely to cause the above problems, has less short circuit defects between conductor circuits, and has good circuit formability.

[0006]

In order to solve the above-mentioned problems, the present invention examined a selective etching method for the same kind of metal.

In general, when a metal is manufactured by a different method, it is characterized in that crystals having different crystal sizes and directions are produced as shown in FIG. Although it is difficult to uniquely define the correlation between the production method and the crystal size or the directionality, a slow precipitation rate usually results in a large crystal and a high precipitation rate results in a small crystal. In this way, when the same kind of metals having different crystal sizes and directions are simultaneously etched with the same etching solution, the speed may differ. However, a difference does not necessarily occur, and for example, in the case of forming a conductor circuit of a printed wiring board, there is almost no difference in etching rate due to a difference in crystal structure with iron chloride, copper chloride, etc. which are usually used for melting copper. This is because the reaction of copper with iron chloride or copper chloride is diffusion-controlled.

In view of the above, the first feature of the present invention is to use an etching solution that is rate-determining for reaction when selectively etching two or more same metals produced by different methods.

The term "different manufacturing method" as used herein means a difference in the manufacturing method of the same kind of metal which is the object of the selective etching of the present invention, and includes, for example, a method for reducing a metal, conditions, or metal plating deposition. Refers to differences in methods and conditions.

The term "similar metal" means a metal composed of the same metal atom, and includes alloys having the same composition ratio.

Further, the "reaction rate-determining etching solution" means that the rate of the true elementary reaction between the metal and the solution is not the rate of diffusion of the solution that controls the rate of etching of the metal. Refers to an etchant that governs the rate. For example, when the etching solution is reaction-controlled with respect to the metal, the change in the etching rate is small even if the stirring speed is increased and the liquid flow is strengthened. If the etching rate of two or more metals used in the present invention is different due to the difference in crystal structure, it can be said that the reaction rate is determined in this case as well.

In the first feature of the present invention, it is preferable that the etching rate of the less soluble one of the two or more same metals is 80% or less of the etching rate of the more easily soluble one.

Here, in the present invention, "poorly soluble" and "easily soluble" are relative to each other and do not refer to the properties of the metal itself. For example, when two metals of the same kind are simultaneously etched with the same etching solution, if the etching rate of one metal is higher than the etching rate of the other metal, one metal becomes "easy soluble" and the other one "poorly soluble". It will be.

Further, in the first feature of the present invention, it is preferable that the etching solution contains an acid containing no halogen element and hydrogen peroxide as main components. An acid containing no halogen element is an acid of a compound containing no halogen element such as a fluorine atom or a chlorine atom in its chemical formula, and sulfuric acid is preferable as such an acid. When the main components are sulfuric acid and hydrogen peroxide, they are 5 to 300 g / L and 5 to 200, respectively.
A concentration of g / L is preferred.

Further, in the first feature of the present invention, it is preferable that the temperature of the etching liquid during etching is in the range of 20 to 50 ° C.

Further, in the first feature of the present invention, when the two or more same metals are two or more copper, the rate-determining step of etching with respect to copper is preferably a copper oxidation reaction.

Further, it is preferable that both of the two or more coppers are produced by electrolytic copper plating. When two or more copper are produced by electrolytic copper plating, the sparingly soluble copper is produced using a copper sulfate plating solution, and the easily soluble copper is produced using a copper pyrophosphate plating solution, or
It is preferable that the two or more coppers are both produced using a copper sulfate plating solution, and that the easily soluble copper is produced at a higher current density than the sparingly soluble copper. In the latter case, easily soluble copper is produced with a current density of 5 A / dm ² or more, and
It is more preferable that the refractory copper is produced at a current density of 5 A / dm ² or less.

According to the first feature of the present invention as described above, since it is possible to simultaneously control the respective etching rates of two or more same metals produced by different manufacturing methods, it is possible to selectively etch them. .

Further, according to the present invention, a step of forming an easily soluble metal layer as an electricity supply layer or a part of the electricity supply layer on an inner layer circuit board, a pattern electroplating resist is formed on the easily soluble metal layer, and then electroplating is performed. A step of forming a refractory metal layer which is the same kind of metal with a manufacturing method different from that of an easily soluble metal; and
A second characteristic is a method for manufacturing a printed wiring board, which has at least a step of selectively etching and removing the easily soluble metal layer other than the pattern portion by the above-described etching method.

In the second feature of the present invention, when the easily soluble metal layer is a copper foil and / or an electroless copper plating layer formed on the copper foil, the thickness of the copper foil is 1 to 5 μm. The thickness of the electroless copper plating layer is 0.1 to 1 μm.
It is preferably m or less. The poorly soluble metal layer may be an electrolytic copper plating layer.

Further, the copper foil is produced using a copper pyrophosphate plating solution and the electrolytic copper plating layer is produced using a copper sulfate plating solution, or both the copper foil and the electrolytic copper plating layer are produced. Made using copper sulfate plating solution,
In addition, the current density during electroplating is preferably lower than the current density during copper foil production. In the latter case, the copper foil has a current density of 5 A / d.
More preferably, the current density is m ² or more, and the electrolytic copper plating layer is 5 A / dm ² or less.

Further, in the second aspect of the present invention, a step of forming an IVH (interstitial via hole) for interlayer connection in the inner layer circuit board, or a prepreg between the inner layer circuit board and the easily soluble metal layer. May further have a step of laminating, and further, after removing the electroplating resist, it may have a step of washing the surface of the wiring board with an oxidizing agent, in which case the oxidizing agent is permanganate. It is more preferable to have

According to the second feature of the present invention as described above, the metal other than the pattern portion is quickly removed, and the remarkable reduction of the top width of the conductor circuit is suppressed, and the print having good circuit formability is suppressed. It becomes possible to manufacture a wiring board.

The present invention will be described in detail below.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION As an etching solution which can be used in the present invention, any etching solution can be used so that the rate-determining step of etching with respect to two or more same metals produced by different manufacturing processes becomes a reaction process. For example, in a system in which the metal oxidation reaction is the rate-determining step of etching, the etching rate can be easily controlled by the concentration of the oxidizing agent. In this case, it is preferable to use an etching solution containing an acid containing no halogen element and hydrogen peroxide as main components.
As the acid containing no halogen element, nitric acid, sulfuric acid or the like can be used, but sulfuric acid is preferable because it is inexpensive. Further, when sulfuric acid and hydrogen peroxide are the main components, it is preferable that the respective concentrations are 5 to 300 g / L and 5 to 200 g / L from the viewpoint of etching rate and liquid stability.

Further, the etching liquid used in the present invention contains a solvent and an additive in addition to the above main components, and the solvent is
Water is preferably used in terms of cost, handleability, and safety, and alcohol may be added to water. Further, a stabilizer of hydrogen peroxide or the like may be added as an additive.

Further, the temperature of the etching liquid during etching is preferably low because the difference in etching rate is caused by the difference in activation energy during dissolution of two or more same metals. However, if the temperature is too low, the workability is remarkably reduced, so that the temperature is preferably in the range of 20 to 50 ° C.

In the present invention, the two or more similar metals to be etched are preferably metals such as copper and gold, which are often used in printed wiring boards, but silver is also used. It can also be applied to zinc, chromium, tin, etc. and is not particularly limited. In addition, as a method for producing the same, if two or more similar metals having different production methods and different crystal sizes and different directivities can be obtained, reduction, plating precipitation, etc. A general method may be used without limitation. For example, when two or more similar metals are both produced by electrolytic copper plating, the electrolytic copper plating produced by copper pyrophosphate plating has a smaller crystal than the electrolytic copper plating produced by copper sulfate plating. It is easy to make a difference in etching rate because it has a characteristic that it is easily dissolved in various etching solutions. Further, when both are electrolytic copper plating produced by copper sulfate plating, the electrolytic copper plating produced at a high current density has a smaller crystal than the electrolytic copper plating produced at a low current density, and thus the etching solution as described above is used. In this case as well, it is easy to obtain a difference in etching rate because of the characteristic that it is easily melted, and preferably 5 A / dm ² of easily soluble copper is used.
The above current densities are such that the refractory copper has a current density of 5 A / dm ² or less.

Further, when two or more metals of the same kind which are manufactured by different methods as described above are simultaneously etched using the above-mentioned etching solution, if there is a difference in etching rate between the respective metals, the present invention is used. It can be said that the selective etching is performed, but in order to clearly recognize the effect of the selective etching, it is preferable that the etching rate with respect to the easy solubility of the hardly soluble metal is 80% or less.

An embodiment of a method of manufacturing a printed wiring board using the above etching method will be described in detail below with reference to FIG.

First, the insulating base material is processed to produce an inner layer circuit board. The conductive circuit is formed on the surface of the insulating substrate by a subtractive method generally performed by etching a copper clad laminate, but is not particularly limited. Further, a through hole such as a through hole is formed in the insulating base material, an inner layer conductor circuit is formed, and an inner layer circuit board is obtained. Although the single-layer double-sided board is shown in FIG. 1A, the inner layer circuit board may be a multi-layered board.

Next, it is necessary to roughen the inner layer copper pattern on the surface of the inner layer circuit board to improve the adhesion to the interlayer resin insulation layer formed on this copper pattern. Specifically, there are a method of forming needle-shaped electroless plating on the inner layer copper pattern, a method of oxidizing (blackening) -reducing the inner layer copper pattern, a method of etching the inner layer copper pattern, and the like.

Next, an interlayer insulating resin with a copper foil is laminated on the inner layer circuit board obtained as described above as shown in FIG. 1 (b). It is preferable that the interlayer insulating resin contains an epoxy resin or a polyimide resin as a main component, but in addition, an acrylic resin, a polyimide resin, a benzocyclobutene resin, a fluororesin, a cyanate resin, PPE, or the like, or a substance containing them. Good. Instead of laminating the interlayer insulating resin with copper foil, the copper foil may be laminated via a prepreg. The thickness of the interlayer resin insulation layer is about 10 to 100 μm, preferably 20 to 60 μm, and the thickness of the copper foil is preferably 1 to 5 μm. The roughened surface of the copper foil may be treated with a dissimilar metal such as a chromate treatment for promoting adhesion. The copper foil used here preferably has a current density of 5
It is preferable that it is made by copper sulfate plating or is made by copper pyrophosphate plating with a current density of A / dm ² or more. Since the copper foil has small crystals and is easily etched, it is advantageous in later circuit formation.

Next, as shown in FIG. 1 (c), IVH is formed on the interlayer resin insulation layer from above the copper foil. A laser is suitable as a method for forming IVH. Lasers that can be used here include CO ₂ and C
There are gas lasers such as O and excimers, and solid-state lasers such as YAG. The CO ₂ laser is suitable for processing IVH having a diameter of 50 μm or more because it can easily obtain a large output. φ5
When processing a fine IVH of 0 μm or less, a YAG laser having a shorter wavelength and good focusing property is suitable.

Next, the resin residue inside the IVH is removed by using an oxidizing agent such as permanganate, chromate or chromic acid.

Next, catalyst nuclei are provided on the copper foil and inside the IVH. Noble metal ions or palladium colloids are used to provide the catalyst nuclei. In particular, it is preferable to use palladium colloid because it is inexpensive.

Next, as shown in FIG. 1D, a thin electroless plating layer is formed on the copper foil to which the catalyst nuclei have been applied and inside the IVH. For this electroless plating, commercially available products containing copper sulfate, formalin, a complexing agent, sodium hydroxide and the like as main components can be used. For example, CUST2000 (manufactured by Hitachi Chemical Co., Ltd., trade name) or CUST201 (Hitachi) Kasei Kogyo Co., Ltd., trade name) and the like, but are not particularly limited. The thickness of the plating may be any thickness as long as the following electrolytic copper plating can be performed, and is preferably 0.
It is 1 to 1 μm.

Next, as shown in FIG. 1 (e), an electroplating resist is formed on the IVH on the electroless plating layer and on the portions other than the conductor circuit. The thickness of the electroplating resist is
It is preferable to make the film thickness as thick as or thicker than the conductor to be plated thereafter. Resins that can be used for the electroplating resist include liquid resist such as PMER P-LA900PM (trade name of Tokyo Ohka Co., Ltd.) and HW-.
425 (Hitachi Chemical Co., Ltd., trade name), RY-30
There are dry films such as 25 (Hitachi Chemical Co., Ltd., trade name).

Next, as shown in FIG. 1F, an electrolytic copper plating layer to be a conductor circuit pattern is formed. For copper electroplating, copper sulfate electroplating or the like which is usually used in printed wiring boards can be used. The thickness of the electrolytic copper plating is sufficient if it can be used as a conductor circuit, and is preferably in the range of 1 to 100 μm, more preferably in the range of 5 to 50 μm. Further, the current density at the time of forming the electrolytic copper plating layer is preferably smaller than the current density at the time of producing the copper foil, and 5 A
/ Dm ² or less is more preferable. If the current density at the time of forming the electrolytic copper plating layer is higher than the current density at the time of forming the copper foil, it is likely to be excessively dissolved in a subsequent etching step, which may hinder the formation of a good circuit.

Next, the electroplating resist is stripped using an alkaline stripping solution, sulfuric acid or a commercially available resist stripping solution.

Next, the surface of the substrate is washed, preferably with an oxidizing agent containing permanganate. Since the copper foil remains at this point, the insulating layer is not damaged by the oxidizing agent. By cleaning the surface of the substrate with an oxidizing agent, it is possible to completely remove organic residues such as resist.

Next, the circuit formation is completed by removing the copper other than the pattern portion by the above-mentioned etching method, that is, by using an etching solution in which the rate-determining step of the etching is the reaction process (FIG. 1 (g)). An etchant containing a halogen element-free acid and hydrogen peroxide as a main component is preferably used, and more preferably sulfuric acid is used as a halogen-element-free acid. In this case, the concentration of the main component of the etching solution is 10 to 300 g / L of sulfuric acid and 10 to 300 g / L.
It is preferable to use 200 g / L of hydrogen peroxide solution.
If the concentration is lower than the above concentration range, the workability is deteriorated because the etching rate is slow, and if the concentration is higher than the above concentration range, the etching rate is fast, and it is difficult to control the etching amount.

Further, in order to obtain the top width and the bottom width of the conductor circuit as designed by removing the copper except the pattern portion, the etching rate of the electrolytic copper plating is 80% or less of the etching rate of the copper foil. Is preferred. Also,
From the viewpoint of workability, it is preferable to control the etching rate of the copper foil so as to be 1 to 15 μm / min. Further, since the difference in etching rate due to the difference in crystal structure depends on the temperature of the etching solution, the temperature of the etching solution at the time of etching removal is preferably 20 to 50 ° C, and more preferably 20 to 40 ° C. preferable. Further, as the etching time, a time for forming a desired conductor circuit width may be appropriately obtained by an experiment, but it is preferably in the range of 10 seconds to 10 minutes for workability, etching uniformity, and the like. .

Further, a gold plating process can be performed on the conductor circuit pattern formed as described above (see FIG. 1).
(H)). As a method for forming the gold plating layer, SA-10
NIP after activating the conductor circuit interface with an activating liquid such as 0 (trade name, manufactured by Hitachi Chemical Co., Ltd.)
A nickel layer of about 1 to 10 μm is formed by an electroless nickel plating solution such as S-100 (trade name, manufactured by Hitachi Chemical Co., Ltd.), and HGS-1 is formed on the upper surface of the nickel layer.
A gold plating base layer having a thickness of about 0.01 to 0.1 μm is formed by a displacement gold plating solution such as 00 (trade name, manufactured by Hitachi Chemical Co., Ltd.), and HGS-2000 is further formed on the top surface thereof.
(Hitachi Kasei Kogyo Co., Ltd., trade name) may be used to form a gold plating finish layer having a thickness of about 0.1 to 1 μm with an electroless gold plating solution. Any method suitable for the gold plating treatment can be used.

Hereinafter, the present invention will be described in more detail with reference to examples. The design values of the conductor circuits of the substrates manufactured in the examples and comparative examples are 30 μm for the top width and 30 for the bottom width.
μm, space width 30 μm, and deviation values from the design values of the top width and the bottom width of the conductor circuit were ± 2 μm or less.

[0046]

EXAMPLES Example 1 As shown in FIG. 1 (a), a glass cloth base material epoxy copper clad laminate having a thickness of 0.2 mm in which a copper foil having a thickness of 18 μm was attached to both surfaces of an insulating base material. Using a certain MCL-E-679 (trade name, manufactured by Hitachi Chemical Co., Ltd.), the copper foil in the unnecessary portion is removed by etching, the through hole 12 is formed, the inner layer conductor circuit 10 is formed, and the inner layer circuit is formed. The substrate 11 was produced.

The inner layer conductor circuit 10 of the inner layer circuit board 11 is treated by spraying using MEC etch BONDCZ-8100 (trade name of MEC Co., Ltd.) under the conditions of a liquid temperature of 35 ° C. and a spray pressure of 0.15 MP. Then, roughen the copper surface to make unevenness with a roughness of about 3 μm, and
Using ETCH BOND CL-8300 (trade name, manufactured by MEC Co., Ltd.), the copper surface was subjected to rust-prevention treatment by immersing the solution at a liquid temperature of 25 ° C. for an immersion time of 20 seconds.

As shown in FIG. 1B, the inner layer circuit board 1
3μ manufactured on both sides of No. 1 with a current density of 10 A / dm ^2.
MCF-7000LX with adhesive applied to copper foil 13
(Hitachi Chemical Co., Ltd., trade name), 170 ℃, 3
The laminate was heated and pressed under a condition of 0 kgf / cm ² for 60 minutes to form an interlayer insulating resin layer 14 having a thickness of 40 μm.

As shown in FIG. 1 (c), a diameter of 80 μm was measured from above the copper foil 13 using a carbon dioxide gas impact laser drilling machine L-500 (trade name, manufactured by Sumitomo Heavy Industries, Ltd.).
The non-penetrating holes of IVH15 were opened, and the smear was removed by immersing it in a mixed aqueous solution of potassium permanganate 65 g / L and sodium hydroxide 40 g / L at a liquid temperature of 70 ° C. for 20 minutes.

Then, HS-20, which is a palladium solution, is used.
2B (Hitachi Chemical Co., Ltd., trade name) 1 at 25 ° C
After soaking for 5 minutes and applying a catalyst, CUST-201
(Hitachi Chemical Co., Ltd., trade name), liquid temperature 2
Electroless copper plating was performed under the conditions of 5 ° C and 30 minutes.
As shown in (d), an electroless copper plating layer 16 having a thickness of 0.3 μm was formed.

As shown in FIG. 1E, a dry film photoresist RY-3025 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the electroless plating layer 16 and electrolytic copper plating is performed. The electroplating resist 17 was formed by exposing it to ultraviolet rays through a photomask which masked the portion to be performed and developing it.

As shown in FIG. 1 (f), a copper sulfate bath was used under the conditions of a liquid temperature of 25 ° C. and a current density of 1.0 A / dm ² .
Electrolytic copper plating was performed to about 20 μm, and the electrolytic copper plating layer 18 was formed so that the circuit conductor width / circuit conductor interval (L / S) = 30/30 μm.

Next, as shown in FIG. 1 (g), after removing the electroplating resist 17 with HTO (trade name, manufactured by Nichigo Morton Co., Ltd.), which is a resist stripping solution, 20 g / L of sulfuric acid as a main component was used. Copper other than the pattern portion was removed by etching using an etching solution having a composition of hydrogen peroxide of 10 g / L. At the time of etching, the substrate was cut into small pieces of 1 dm ² on one side, placed in a 1 L beaker, and etched at 40 ° C. for 5 minutes using a magnetic stirrer.

Finally, Ni / was added to the conductor circuit under the conditions shown in Table 1.
An Au plating layer 19 was formed (FIG. 1 (h)).

[0055]

[Table 1]

Example 2 A substrate was prepared in the same manner as in Example 1 except that electrolytic copper plating was performed at a current density of 3 A / dm ² .

Example 3 A substrate was prepared in the same manner as in Example 1 except that the composition of the main component of the etching liquid was sulfuric acid 20 g / L, hydrogen peroxide 40 g / L, and the etching time was 60 seconds.

Example 4 A substrate was prepared in the same manner as in Example 3 except that electrolytic copper plating was performed at a current density of 3 A / dm ² .

Example 5 A substrate was prepared in the same manner as in Example 1 except that the composition of the main component of the etching solution was 20 g / L of sulfuric acid and 40 g / L of hydrogen peroxide, the etching temperature was 30 ° C., and the etching time was 100 seconds. It was made.

Example 6 A substrate was prepared in the same manner as in Example 5, except that electrolytic copper plating was performed at a current density of 3 A / dm ² .

Example 7 A substrate was prepared in the same manner as in Example 1 except that the composition of the main component of the etching liquid was nitric acid 20 g / L and hydrogen peroxide 10 g / L.

Example 8 A substrate was prepared in the same manner as in Example 1 except that the main components of the etching solution were 200 g / L sulfuric acid and 200 g / L hydrogen peroxide.

Example 9 A substrate was prepared in the same manner as in Example 1 except that a 3 μm copper foil was produced in a copper pyrophosphate bath at a current density of 3 A / dm ² and pattern electroplating was performed at a current density of 3 A / dm ^2. Was produced.

Comparative Example 1 A substrate was prepared in the same manner as in Example 1 except that the composition of the main components of the etching solution was 20 g / L of sulfuric acid and 20 g / L of hydrogen peroxide, the etching temperature was 60 ° C., and the etching time was 100 seconds. It was made.

Comparative Example 2 FeCl ₃ aqueous solution 3 was used for etching copper other than the pattern portion.
A substrate was prepared in the same manner as in Example 1 except that 0 g / L was used.

Comparative Example 3 A CuCl ₂ aqueous solution 4 was used for etching copper other than the pattern portion.
A substrate was prepared in the same manner as in Example 1 except that 0 g / L and 30 g / L hydrochloric acid were used.

Comparative Example 4 For etching copper other than the pattern portion, etching was carried out at 30 ° C. for 30 seconds using an A process liquid containing Tetraammine copper (II) chloride as a main component (trade name, manufactured by Meltex Co., Ltd.). A substrate was prepared in the same manner as in Example 1 except for the above.

Comparative Example 5 As shown in FIG. 2 (a), a glass cloth base material epoxy copper clad laminate having a thickness of 0.2 mm, in which a copper foil having a thickness of 18 μm was attached to both sides of an insulating base material. Using MCL-E-679 (manufactured by Hitachi Chemical Co., Ltd., trade name), the copper foil at unnecessary portions thereof is removed by etching, through holes 22 are formed, and an inner layer conductor circuit 20 is formed to form an inner layer circuit board. 21 was produced.

The inner layer conductor circuit 20 of the inner layer circuit board 21.
The process of MEC etch BOND CZ-810
0 (manufactured by MEC Co., Ltd., trade name) using a liquid temperature of 35 ° C.
Spraying treatment was performed under the condition of a spray pressure of 0.15 MP to roughen the copper surface to make irregularities having a roughness of about 3 μm, and using MEC etch BOND CL-8300 (manufactured by MEC Co., Ltd.), The copper surface was subjected to rust-prevention treatment by immersing it under the conditions of a liquid temperature of 25 ° C. and an immersion time of 20 seconds.

As shown in FIG. 2B, the inner layer circuit board 2
Insulating adhesive BL-9700 (manufactured by Hitachi Chemical Co., Ltd., trade name) is applied on both sides of No. 1 to a thickness of 40 μm,
By heating at 170 ° C. for 60 minutes, the interlayer insulating resin layer 24 was formed.

As shown in FIG. 2 (c), a carbon dioxide impact laser drilling machine L-500 (trade name, manufactured by Sumitomo Heavy Industries, Ltd.) was used to open IVH25, which is a non-through hole having a diameter of 80 μm, and permanganese. Potassium acid 65g / L
And a sodium hydroxide 40g / L mixed aqueous solution, liquid temperature 7
Immersion was carried out at 0 ° C. for 20 minutes to remove smears, and at the same time fine irregularities were formed on the surface.

Next, an ultrasonic cleaning device PUC-0586
(Tokyo Ultrasonic Giken Co., Ltd., trade name), cleaning liquid ion-exchanged water, transmission frequency 25 kHz, output 600 W
The ultrasonic treatment was carried out for 5 minutes under the conditions described above to remove the brittle layer on the substrate surface.

Then, HS-20, which is a palladium solution, is used.
2B (manufactured by Hitachi Chemical Co., Ltd., trade name) was immersed at 25 ° C. for 15 minutes to give a catalyst, and then CUST-201.
(Hitachi Chemical Co., Ltd., trade name), liquid temperature 2
Electroless copper plating was performed under the conditions of 5 ° C and 30 minutes.
As shown in (d), an electroless copper plating layer 26 having a thickness of 0.3 μm was formed.

As shown in FIG. 2E, a dry film photoresist, RY-3025 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the electroless copper plating layer 26, and electrolytic copper plating is performed. The electroplating resist 27 was formed by exposing the film to ultraviolet rays through a photomask that masked the areas where the above steps were performed and developing it.

As shown in FIG. 2 (f), electrolytic copper plating was carried out for about 20 μm using a copper sulfate bath under the conditions of a liquid temperature of 25 ° C. and a current density of 1.0 A / dm ^2. The electrolytic copper plating layer 28 was formed so that the conductor spacing (L / S) was 30/30 μm.

Next, as shown in FIG. 2 (g), a resist stripper HTO (manufactured by Nichigo Morton Co., Ltd.,
After removing the electroplating resist 27 with the product name),
Copper other than the pattern portion was removed by etching using an etching solution having a composition of sulfuric acid 20 g / L and hydrogen peroxide 10 g / L as main components. At the time of etching, the substrate was cut into small pieces of 1 dm ² on one side, placed in a 1 L beaker, heated to 40 ° C., and then etched for 1 minute with a magnetic stirrer.

Finally, as shown in FIG. 2H, Example 1
A substrate was produced by forming the Ni / Au plated layer 29 by the same method as described in (1).

Comparative Example 6 FeCl ₃ aqueous solution 3 was used for etching copper other than the pattern portion.
A substrate was prepared in the same manner as Comparative Example 5 except that 0 g / L was used.

Comparative Example 7 A CuCl ₂ aqueous solution 4 was used for etching copper other than the pattern portion.
A substrate was prepared in the same manner as in Comparative Example 5 except that 0 g / L and hydrochloric acid 30 g / L were used.

Comparative Example 8 For etching copper except for the pattern portion, etching was carried out at 30 ° C. for 30 seconds using an A process liquid containing Tetraammine copper (II) chloride as a main component (manufactured by Meltex Co., Ltd.). A substrate was prepared in the same manner as in Comparative Example 5 except for the above.

Comparative Example 9 A substrate was prepared in the same manner as in Example 1 except that the composition of the main component of the etching liquid was hydrochloric acid 40 g / L and hydrogen peroxide 10 g / L.

Comparative Example 10 A substrate was manufactured in the same manner as in Example 1 except that the composition of the main components of the etching liquid was sulfuric acid 3 g / L and hydrogen peroxide 3 g / L.

Comparative Example 11 A substrate was prepared in the same manner as in Example 1 except that the current density during copper foil preparation was 5 A / dm ² and the current density during electrolytic copper plating was 7 A / dm ² .

Table 2 shows the evaluation results of the conductor top width, conductor bottom width, inter-circuit etching residue and inter-circuit Au plating deposition of the substrates prepared in Examples 1 to 9 and Comparative Examples 1 to 11. Inter-circuit etching residue and inter-circuit Au plating deposition often occur in a shape that draws a skirt from the circuit as shown in FIG. Therefore, the value obtained by dividing the difference between the top and the bottom between the circuits by 2 was taken as the soot length, and if this value was 5 μm or more, there was etching residue between the circuits (the same applies to the method of measuring Au plating deposition between the circuits). The top width and bottom width between the conductor and the circuit are taken from the top of the board with an optical microscope,
20 points are arbitrarily measured based on the image processed data,
It is an average calculated.

Further, circuit conductor width / circuit conductor interval (L /
S) = 20/20 A substrate manufactured under the same conditions as in Example 1 except that the electroplating layer was formed, and L / S
5 and 6 show SEM images of the substrate prepared under the same conditions as in Comparative Example 2 except that the electroplating layer was formed so as to be 20/20.

[0086]

[Table 2]

The substrates manufactured in Examples 1 to 9 were almost as designed (top width 30 μm, bottom width 30 μm, space width 30 μm, deviation value from design value of conductor circuit top width and bottom width; ± 2 μm or less) ) Is finished,
There is almost no difference between the top width and the bottom width, and the deviation of the top and bottom widths of the conductor circuit from the design value is ± 2 μm.
The following were possible and the circuit formability was good. On the other hand, in Comparative Example 1, since the temperature of the etching solution was set high, there was almost no difference in the etching rate between the copper foil and the conductor circuit, and the conductor circuit was etched more than the design value. Since Comparative Examples 2 to 4 and 6 to 9 use the diffusion-controlling etching solution, the conductor top portion having a good liquid contact is excessively dissolved, and the inter-circuit etching remains and the inter-circuit Au plating deposition is likely to occur. I found out. It was found that in Comparative Example 5, Pd removal was likely to be insufficient and inter-circuit Au plating deposition was likely to occur. In Comparative Example 10, since the main component concentration of the etching solution was low, the etching time until the circuit was formed according to the design value was long. In Comparative Example 11, since the current density at the time of copper electroplating was larger than the current density at the time of producing the copper foil, there was almost no difference between the etching rates of the copper other than the pattern part and the conductor top part, and the conductor circuit had a design value. It has been etched above.

Although the present invention has been described with reference to a plurality of embodiments, it should not be understood that this description limits the present invention. From this disclosure, various alternative embodiments, examples, and operation techniques not described here will be apparent to those skilled in the art. Therefore, the technical scope of the present invention is defined only by the matters specifying the invention according to the claims which are appropriate from the above description.

[0089]

As described above, according to the present invention, there are two different manufacturing methods.
One or more metals of the same kind can be selectively etched. Furthermore, by using this in a method for manufacturing a printed wiring board, it is possible to manufacture a printed wiring board with few short circuits between conductor circuits and good circuit formability. You can do it.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a printed wiring board according to the present invention.

FIG. 2 is a cross-sectional view showing a manufacturing process of a printed wiring board of Comparative Example 5.

FIG. 3 is a photograph showing a difference in crystal structure of copper due to a difference in manufacturing method.

FIG. 4 is a cross-sectional view of a circuit showing inter-circuit etching residue or inter-circuit Au plating deposition.

FIG. 5 is an SEM image of a wiring board manufactured under the same conditions as in Example 1 except that L / S = 20/20.

FIG. 6 is an SEM image of a wiring board manufactured under the same conditions as in Comparative example 2 except that L / S = 20/20.

[Explanation of symbols]

10, 20 Inner layer conductor circuit 11, 21 Inner layer circuit board 12,22 through hole 13 Copper foil 14, 24 interlayer insulating resin layer 15, 25 IVH 16, 26 Electroless copper plating layer 17, 27 Electroplating resist 18, 28 Electro copper plating layer 19, 29 Ni / Au plating layer

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H05K 3/26 H05K 3/26 E 3/46 3/46 N (72) Inventor Toyoki Toyoki Shinjuku-ku, Tokyo Nishi-Shinjuku 2-1-1, Hitachi Chemical Co., Ltd. (72) Inventor Shigeharu Ariya 1500 Ogawa Oji, Shimodate-shi, Ibaraki Hitachi Chemical Co., Ltd. Research Institute (72) Inventor Akashi Nakaso Shimodate, Ibaraki Prefecture City Oji 1500 Ogawa Hitachi Chemical Co., Ltd. Research Institute (72) Inventor Toshihiro Endo 1500, Ogawa Shimodate, Ibaraki City Ogawa Hitachi Chemical Co., Ltd. Research Institute F term (reference) 4E351 AA03 BB33 BB35 DD04 EE03 GG20 4K057 DK03 WA11 WA13 WB04 WB15 WC08 WE02 WE03 WE25 WG01 WG02 WG07 WN01 5E339 AB02 AC01 AD03 BC02 BD03 BD08 BD11 BE13 BE17 CE12 CE19 CE20 CF07 5E343 AA07 AA15 AA17 BB1 8 BB23 BB24 BB44 BB67 DD33 DD76 EE52 GG11 5E346 AA15 AA35 CC04 CC09 CC32 CC37 CC38 DD12 DD25 FF07 FF15 GG22 HH32

Claims (24)

[Claims] 1. An etching method, characterized in that an etching solution having a reaction rate-determining property is used when selectively etching two or more same metals produced by different methods. 2. The etching method according to claim 1, wherein the etching rate of the poorly soluble one of the two or more same metals is 80% or less of the etching rate of the easily soluble one. 3. The etching method according to claim 1, wherein the etching solution contains an acid containing no halogen element and hydrogen peroxide as main components. 4. The etching method according to claim 3, wherein the acid containing no halogen element is sulfuric acid. 5. The etching method according to claim 4, wherein the concentration of the sulfuric acid is 5 to 300 g / L and the concentration of the hydrogen peroxide is 5 to 200 g / L. 6. The liquid temperature of the etching liquid during etching is in the range of 20 to 50 ° C.
6. The etching method according to any one of to 5. 7. The etching method according to claim 1, wherein the two or more same metals are two or more copper. 8. The etching method according to claim 7, wherein the rate-determining step of etching the copper is an oxidation reaction of the copper. 9. The etching method according to claim 7, wherein each of the two or more copper is produced by electrolytic copper plating. 10. The sparingly soluble copper of the two or more coppers produced by the electrolytic copper plating is produced by using a copper sulfate plating solution, and the easily soluble copper is produced by a copper pyrophosphate plating solution. The etching method according to claim 9, wherein the etching method is produced by: 11. The two or more coppers produced by the electrolytic copper plating are both produced using a copper sulfate plating solution, and the easily soluble copper is produced at a higher current density than the sparingly soluble copper. The etching method according to claim 9, wherein the etching method is performed. 12. The easily soluble copper is produced at a current density of 5 A / dm ² or more, and the sparingly soluble copper is 5 A / d.
The etching method according to claim 11, wherein the etching method is performed at a current density of m ² or less. 13. A step of forming an easily soluble metal layer as a power supply layer or a part of the power supply layer on an inner layer circuit board, after forming a pattern electroplating resist on the easily soluble metal layer, the easily soluble metal layer is formed by electroplating. A step of forming a refractory metal layer which is a same kind of metal and a manufacturing method different from that of the metal, and the easily soluble metal layer other than the pattern portion,
9. A method for manufacturing a printed wiring board, comprising at least a step of selectively etching and removing by the etching method according to any one of 1. 14. The method for manufacturing a printed wiring board according to claim 13, wherein the easily soluble metal layer is a copper foil and / or an electroless copper plating layer formed on the copper foil. 15. The method of manufacturing a printed wiring board according to claim 14, wherein the copper foil has a thickness of 1 to 5 μm. 16. The electroless copper plating layer has a thickness of 0.1.
The method for manufacturing a printed wiring board according to claim 14, wherein the printed wiring board has a thickness of 1 μm or less. 17. The method for manufacturing a printed wiring board according to claim 13, wherein the hardly soluble metal layer is an electrolytic copper plating layer. 18. The copper foil is produced using a copper pyrophosphate plating solution, and the electrolytic copper plating layer is produced using a copper sulfate plating solution.
A method for manufacturing a printed wiring board according to any one of 1 to 17. 19. The copper foil and the copper electroplating layer are both produced using a copper sulfate plating solution, and the current density during electroplating is lower than the current density during copper foil production. The method for manufacturing a printed wiring board according to any one of claims 14 to 17. 20. The copper foil is produced at a current density of 5 A / dm ² or more, and the electrolytic copper plating layer is 5 A / dm ^2.
The method for producing a printed wiring board according to claim 19, wherein the method is produced at a current density of dm ² or less. 21. The method according to claim 13, further comprising the step of forming an IVH (interstitial via hole) for interlayer connection in the inner layer circuit board.
0. A method for manufacturing a printed wiring board according to 0. 22. The method of manufacturing a printed wiring board according to claim 13, further comprising a step of laminating a prepreg between the inner layer circuit board and the easily soluble metal layer. 23. The method of manufacturing a printed wiring board according to claim 13, further comprising the step of cleaning the surface of the wiring board with an oxidizing agent after removing the electroplating resist. 24. The method of manufacturing a printed wiring board according to claim 23, wherein the oxidizing agent comprises permanganate.