JP2003324068A - Layer structure of group iii-v nitride semiconductor and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a layer structure having a crystal growth layer of a high- quality GaN-based semiconductor and its manufacturing method. <P>SOLUTION: This layer structure A of a group III-V nitride semiconductor has a crystal growth layer 3 of a group III-V nitride semiconductor such as GaN formed on a substrate 1 via a buffer layer 2 comprising Al<SB>x</SB>Ga<SB>1-x</SB>N (0<x<1). This layer structure is manufactured by forming the crystal growth layer comprising the group III-V nitride semiconductor on the buffer layer after depositing the buffer layer comprising Al<SB>x</SB>Ga<SB>1-x</SB>N (0<x<1) on the substrate at a temperature of 600 to 900°C. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a layered structure composed of a III-V group nitride semiconductor such as a GaN-based semiconductor and a method for manufacturing the same, and more specifically, to increase the growth thickness of the nitride semiconductor. However, there are no cracks and the like, the surface is smooth, and further, when operating the manufactured semiconductor device, leakage current to the substrate side is unlikely to occur, and when manufacturing various semiconductor devices The present invention relates to a layered structure useful as a starting material and a method for producing the same.

[0002]

2. Description of the Related Art For example, a GaN single crystal has a melting point of 2
The vapor pressure exceeds 000 ° C and its melting point is 10
Over 0 GPa. Therefore, as with GaAs,
For example, it is extremely difficult to directly produce a single crystal by applying the zone melting method or the like. Therefore,
In order to obtain a GaN single crystal, it is necessary to use a substrate material different from that of GaN and perform crystal growth on it.

However, there is no material that has the same lattice constant as GaN. Therefore, in order to alleviate the lattice mismatch with the substrate material, a method of forming a buffer layer in advance on the surface of the substrate to be used and crystallizing GaN on the buffer layer is generally used. In that case, the substrate is conventionally made of sapphire (Al ₂ O ₃ )
Substrates are widely used. However, sapphire and Ga
The lattice mismatch rate with N is as large as 20% or more.

For this reason, the following two-step growth method is adopted when crystallizing a thick GaN film using a sapphire substrate. The first method is, for example, a metal organic chemical vapor deposition method (MOCVD method), first using trimethylaluminum (TMA) and ammonia (NH ₃ ) with hydrogen as a carrier gas at a growth temperature of 800 ° C. to form a sapphire substrate. An AlN layer having a thickness of about 50 nm is once formed as a buffer layer on the upper surface, and then the growth temperature is raised to 1100 ° C.
G) and ammonia (NH ₃ ) are used to grow thick GaN crystals on the buffer layer (see Non-Patent Document 1).

The second method is the MOCVD method in which the TM
G and NH ₃ are used, hydrogen is used as carrier gas, and temperature is 50
This is a method in which an amorphous GaN layer having a thickness of about 10 to 20 nm is formed as a buffer layer at 0 to 600 ° C., and then the growth temperature is raised to 1000 ° C. to grow thick GaN crystals. Further, the following method using the gas source molecular beam epitaxial method (GSMBE method) is also practiced.

That is, a growth temperature of 5 is formed on a sapphire substrate or a Si substrate by using metallic Ga and nitrogen that is turned into plasma.
This is a method in which a thin buffer layer made of GaN is formed at 00 to 550 ° C., and then the growth temperature is raised to 800 ° C. to grow a thick film of GaN crystal on the buffer layer. By the way, in the above-mentioned conventional method, the buffer layer is made of AlN or GaN. Cracks may occur in the GaN layer.

In addition, using a Si substrate as the substrate, AlN
Or, when the film forming operation of the buffer layer made of GaN is performed,
The buffer layer is not formed in a uniform film shape, but is formed in an island pattern. Therefore, on top of this, a thicker Ga
When N is grown, fine unevenness may occur on the surface of the formed thick GaN layer due to the influence of the island pattern of the lower buffer layer.

In any of these cases, such a layered structure is not preferable as a starting material for various devices because the quality of the thick GaN layer on the buffer layer is deteriorated. Further, the layer structure manufactured in this way is then assembled into a field effect transistor (FET), for example, by disposing a gate electrode, a source electrode, a drain electrode and the like on the GaN layer. During the operation, when the substrate is a Si substrate, a leak current may flow to the substrate side in the order of mA.

The reason for this is that a semiconductor Si substrate having a resistivity higher than that of an intrinsic Si semiconductor cannot be manufactured, so that a semiconductor Si substrate having a sufficiently high resistance cannot be obtained, and a depletion layer causes a depletion layer even in a pinch-off state. This is because the blocked current flows through the substrate (see Non-Patent Document 1).

[0010]

[Non-Patent Document 1] H. Amano, N. Sawaki, I. Akasaki, a
nd Y. Toyoda, Appl. Phys. Lett. 48 (1986) 353

[0011]

DISCLOSURE OF THE INVENTION The present invention solves the above-mentioned problems in the conventional layered structure in which the buffer layer is made of AlN or GaN, and the thick crystal growth layer formed on the buffer layer is free from cracks. It is designed so that it does not occur, fine irregularities do not occur on the surface of the formed thick film crystal growth layer, and furthermore, leakage current to the substrate side does not easily occur during operation of the manufactured semiconductor device. An object of the present invention is to provide a novel layered structure and a manufacturing method thereof.

[0012]

In order to achieve the above object, the present invention comprises a substrate and Al _x Ga _{1 -x} N (0 <x <1) formed on the substrate. II. A buffer layer and a III-V nitride semiconductor crystal growth layer formed on the buffer layer.
A layered structure of a group IV nitride semiconductor (hereinafter referred to as a layered structure A) is provided.

In the present invention, the substrate and the lower layer formed on the substrate are made of Al _x Ga _{1 -x} N (0 <x <
1) and the upper layer portion is Al _y Ga _1-y N (0.5 <y ≦
1, a buffer layer including at least one unit buffer layer having a two-layer structure of x <y) and a III-V group nitride semiconductor crystal growth layer formed on the buffer layer. A layered structure of a III-V group nitride semiconductor (hereinafter referred to as a layered structure B) is provided.

Further, in the present invention, a temperature of 600 to 900 ° C. is set on the substrate by the epitaxial crystal growth method.
Then, a buffer layer made of Al _x Ga _1-x N (0 <x <1) is formed, and then a crystal growth layer made of a III-V group nitride semiconductor is formed on the buffer layer. A method for producing a layered structure A (hereinafter referred to as production method A) is provided.

Further, in the present invention, a temperature of 600 to 900 ° C. is set on the substrate by the epitaxial crystal growth method.
And a lower layer portion consisting of Al _x Ga _1-x N (0 <x <1) and A
_{l y Ga 1-y N (} 0.5 <y ≦ 1, x <y) after the sequential units buffer layer of the formed two layers structure and a top portion comprising a formed, at least one layer, the buffer layer There is provided a method for manufacturing a layered structure B, which comprises forming a crystal growth layer made of a III-V group nitride semiconductor on an upper layer portion.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION One example of a layer structure A of the present invention is shown in FIG.
Shown in. In this layer structure A, a thick crystal growth layer 3 is formed on a substrate 1 via a buffer layer 2, and the semiconductor material used for forming these layers is a GaN-based semiconductor. The fact that it is a III-V group nitride semiconductor is the same as the case of the conventional layered structure described above.

However, in the case of this layer structure A,
The buffer layer 2 is most characterized in that it is formed of Al _x Ga _{1 -x} N (0 <x <1) instead of AlN or GaN as in the prior art. The layer structure A is manufactured by the manufacturing method A. Specifically, on the substrate 1, M
It is manufactured by sequentially forming a buffer layer (AlGaN layer) 2 and a crystal growth layer 3 by applying an epitaxial crystal growth method such as an OCVD method or a GSMBE method.

At this time, the growth temperature at the time of forming the buffer layer 2 is set to 600 to 900 ° C. It is preferably set to 650 to 900 ° C. In the case of this manufacturing method A, since the growth temperature at the time of forming the buffer layer 2 made of AlGaN is set high, the thermal migration of each raw material used for forming the AlGaN is promoted on the surface of the substrate 1. become. Therefore, the reaction between the raw materials easily proceeds on the entire surface of the substrate 1, and as a result,
The island-like growth that was likely to occur when forming the buffer layer of AlN or GaN does not occur, and uniform film formation proceeds on the entire surface of the substrate. Therefore, the surface smoothness of the crystal growth layer formed on this buffer layer is improved.

Since the growth temperature is high, the deposited Al
The crystal quality of the GaN layer 2 is also improved. The buffer layer 2
The growth temperature adopted during the film formation is appropriately set in relation to the composition of AlGaN. For example, Al with a low Al composition
_x Ga _1-x N (0 <x ≦ 0.5, more preferably 0 <x
When forming a buffer layer of ≦ 0.2), the growth temperature is preferably set to 650 to 850 ° C. This is because the uniformity of the buffer layer 2 can be realized.

However, when the growth temperature exceeds 900 ° C., the buffer layer 2 becomes difficult to grow, and even if it grows, the buffer layer has an island pattern and becomes non-uniform. Therefore, the maximum growth temperature is set to 900 ° C. Also, AlGaN
In the case of uniformly forming the buffer layer of N, the N source (N
Prior to the introduction of H ₃ ), an Al source or a Ga source is introduced in advance to deposit metal Al or a metal Ga on the surface of the substrate 1 in a thickness of several atomic layers, and then an N source is introduced to form the substrate. An AlGaN layer may be formed on top of.

In the case of the layer structure of the present invention, the substrate is
It may be a sapphire substrate as in the past, but Si
Diamond structure type such as substrate, GaA
Even if a zincblende type substrate such as an s substrate or a GaP substrate is used, a thick GaN-based crystal growth layer without cracks can be formed. Also, prior to the formation of the buffer layer, N
It is preferable to introduce a source (generally NH ₃ ) to perform a nitriding treatment on the surface of the substrate, and then form a buffer layer on the nitriding surface, because the uniformity of the buffer layer is improved. Especially, in the case of a Si substrate, the surface of
00 ℃ carried out in NH ₃ while exposing approximately 5 minutes NH ₃ nitriding at a suitable since then buffer layer deposited on is extremely uniform.

The buffer layer 2 may be doped with p-type impurities. By doing so, the buffer layer 2 has a high resistance, and for example, when the FET is assembled in the layer structure A and the FET is operated, the buffer layer functions as a high resistance layer, so that the leakage current to the substrate side is reduced. This is because the generation is suppressed. As such p-type impurities, for example, one kind or two kinds or more of Mg, Zn, C, etc. can be mentioned, and the doping concentration thereof is determined in relation to the target resistance value, but in general, 1 x 10 ¹⁷ to 1 x
It may be set to about 10 ²¹ cm ^-3 .

The III-V group nitride semiconductor formed on the buffer layer 2 is, for example, Ga.
N, InN, InGaN, InAlGaN, AlGa
N, GaNAs, GaNP, InGaNAsP, InA
One or two or more selected from the group of lGaNAsP can be mentioned. Next, the layer structure B will be described.

The layer structure B has the same structure as the layer structure A except that the buffer layer has a structure in which one or more unit buffer layers as described later are laminated. An example of the case where the buffer layer is formed of one unit buffer layer 2'is shown in FIG.

This unit buffer layer 2'includes the lower layer portion 2
It has a two-layer structure consisting of a'and upper layer portion 2b ',
Both are made of AlGaN, but the upper layer 2b '
When comparing the mixing ratio of AlN in AlGaN of the lower layer portion 2a ′, the AlN ratio of the upper layer portion 2b ′ is larger than that of the lower layer portion 2a ′, and the crystal composition is AlN rich.

Specifically, as in the case of the layer structure A, the composition of the lower layer portion 2a 'is Al _x Ga _{1 -x} N (0 <x <1).
Is. Then, the composition of the upper portion _{2b ', Al y Ga 1-} y
When represented by N, the y value satisfies the relationship of 0.5 <y ≦ 1.0 and the relationship of x <y. Therefore, in the case of this unit buffer layer 2 ', the upper layer side thereof is AlN-rich, so that the resistance is high as a whole. Moreover, the surface is smooth.

For example, assuming that the total thickness of the unit buffer layer 2'is 50 nm, if the thickness of the upper layer portion 2b 'is set to about 10 to 20 nm, the unit buffer layer 2'will be a high resistance layer. It is possible to suppress the generation of leak current to the substrate 1 side by functioning as. The layer structure B is manufactured by the manufacturing method B. Specifically, the entire lower surface of the substrate 1 is covered with the lower layer 2 having a predetermined thickness.
The unit buffer layer 2'is formed by sequentially depositing a'and the upper layer portion 2b '. The growth temperature at this time is set to 600 to 900 ° C. during formation of both the lower layer portion and the upper layer portion for the same reason as in the case of the manufacturing method A. When forming a plurality of unit buffer layers, the lower layer portion and the upper layer portion may be alternately formed as many times as necessary.

Then, another III-V group nitride semiconductor film is formed on the formed buffer layer to form the crystal growth layer 3. Also in the case of the layer structure B, the upper layer portion 2b ′ and the lower layer portion 2a ′ may be doped with p-type impurities at the time of forming the unit buffer layer 2 ′ to have a high resistance. Further, the surface of the substrate 1 may be subjected to the above-mentioned nitriding treatment to smooth the surface of the unit buffer layer 2 '.

The buffer layer in the layer structure B is
The unit buffer layer may be composed of only one layer, or a plurality of unit buffer layers (for example, 3 to 5 layers) may be laminated.

[0030]

Example 1 Using a MOCVD apparatus, S chemically etched with hydrofluoric acid was used.
Using the i substrate, the layer structure A was manufactured as follows.
First, the Si substrate is set in the MOCVD apparatus and 1 × 1
After vacuuming to a vacuum degree of 0 ^-6 Torr or less, the vacuum degree was lowered to 100 Torr and the substrate was heated to 800 ° C.
When the substrate is rotated at 900 rpm and the substrate temperature becomes stable, TMG 58 nmol / min, TMA 20 nmol / min, N
Introduced on the substrate surface for 4 minutes at a flow rate of H ₃ 12 L / min to form Al
A buffer layer of _0.3 Ga _0.7 N having a thickness of about 50 nm was formed.

Then, the temperature of the Si substrate is raised to 1030 ° C.
Warm up, TMG 58n mol / min, NH ₃12 L / min to 15
It was introduced for a minute to form a GaN layer having a thickness of 500 nm. Just
To remove the substrate from the device and visually inspect the surface of the GaN layer.
I guessed. It had a mirror surface with metallic luster. crack
Was not observed at all, confirming that it was a good quality crystal
We were able to.

Example 2 When forming the buffer layer in Example 1, TMG, TM
In addition to A and NH ₃ , cyclopentanedienylmagnesium was simultaneously introduced at a flow rate of 5 nmol / min to obtain a p-thickness of 50 nm.
After forming a buffer layer of Al _0.3 Ga _0.7 N, the supply of cyclopetanedienyl magnesium was stopped, the temperature of the Si substrate was raised to 1030 ° C., and TMG 58 nmol / min, NH ₃
12 L / min, and n-type dopant SiH ₄ 2n mol
/ Min for 15 minutes, carrier concentration 2 × 10 ¹⁷ cm
^-3 , an n-type GaN layer having a thickness of 500 nm was formed. This G
No crack was observed in the aN layer at all, and the surface was a mirror surface with metallic luster.

Then, a gate electrode, a source electrode, and a drain electrode are assembled to this layered structure to form a GaN-based ME.
I made an SFET. The gate electrode is Pt / Au,
The source electrode and the drain electrode were formed by vapor deposition of Al / Ti / Au, respectively. The gate length was 2 μm and the gate width was set to 20 cm. This MESFET has a withstand voltage of 6
The operating current was 00 V and the operating current was 10 A, and the leak current was 1 μA or less. The MESFET continued to operate even at a temperature of 400 ° C.

Example 3 S chemically etched with hydrofluoric acid using an MOCVD apparatus
Using the i substrate, the layer structure B was manufactured as follows.
First, the Si substrate is set in the MOCVD apparatus and 1 × 1
After vacuuming to a vacuum degree of 0 ^-6 Torr or less, the vacuum degree was lowered to 160 Torr and the temperature of the substrate was raised to 800 ° C.
When the substrate was rotated at 800 rpm and the substrate temperature became stable, TMG 58 nmol / min, TMA 20 nmol / min, N
Introduce a flow rate of 12 L / min of H _{3 to the} substrate surface for 5 minutes
A lower layer portion made of _0.2 Ga _0.8 N and having a thickness of about 40 nm was formed. Subsequently, TMG 30n mol / min, TMA 70n mol
/ Min, NH ₃ 12 L / min and the flow rate was changed to introduce into the surface of the lower layer for 2 minutes to form an upper layer of Al _0.8 Ga _0.2 N having a thickness of 10 nm to form a unit buffer layer.

Then, the temperature of the Si substrate is raised to 1050 ° C.
Warm, TMG 50 nmol / min, NH ₃12 L / min to 15
The unit buffer layer is placed on the unit buffer layer for
Punt SiH_FourIntroduce 2n mol / min for 15 minutes and
Carrier concentration 2 × 10⁷cm^-3And n-type GaN with a thickness of 50 nm
Layers were formed. Remove the substrate from the device
The surface was visually observed. The mirror surface had a metallic luster. Well
No crack was observed in the GaN layer.

Thereafter, a GaN-based MESFET was manufactured using this layer structure B, and the characteristics of the MESFET were investigated. The breakdown voltage was 600 V, the operating current exceeded 10 A, and the leak current was 1 μA or less. Further, when the high temperature operation was examined, the operation continued even at a temperature of 400 ° C.

Example 4 A layered structure A was manufactured under the same conditions as in Example 1 except that a sapphire substrate was used as the substrate instead of the Si substrate. This layer structure has the same structure as in Example 1,
The surface was mirror-like, no cracks were observed, and the crystallinity was high quality.

[0038]

As is apparent from the above description, according to the present invention, it is possible to form a high-quality thick GaN-based crystal growth layer. This is the effect obtained by setting the buffer layer formed on the semiconductor substrate to AlGaN and setting the temperature for forming the film to a high temperature of 600 to 900 ° C. Further, according to the present invention, it is possible to increase the resistance of the buffer layer and suppress the generation of leak current.

Therefore, if the layered structure of the present invention is used, for example, a GaN-based FE that operates with high breakdown voltage and low on-resistance.
It is possible to provide materials for devices such as T, and its industrial value is extremely large.

[Brief description of drawings]

FIG. 1 is a sectional view showing an example A of a layered structure of the present invention.

FIG. 2 is a sectional view showing an example B of the layer structure of the present invention.

[Explanation of symbols]

1 substrate 2 buffer layers 2'unit buffer layer 2a 'lower layer 2b 'Upper layer 3 Crystal growth layer

Claims (10)

[Claims] 1. A substrate and Al formed on the substrate
III-V having a buffer layer made of _x Ga _1-x N (0 <x <1) and a III-V group nitride semiconductor crystal growth layer formed on the buffer layer. Group nitride semiconductor layered structure. 2. A substrate, and a lower layer portion formed on the substrate, Al _x Ga _1-x N (0 <x <1), and an upper layer portion Al _y Ga _1-y N (0.5. 2 consisting of <y ≦ 1, x <y)
A buffer layer including at least one unit buffer layer having a layered structure, and a III-V group nitride semiconductor crystal growth layer formed on the buffer layer.
III-V group nitride semiconductor layered structure. 3. The substrate is a Si substrate, and the III-
Group V nitride semiconductors include GaN, InN, InGaN, I
nAlGaN, AlGaN, GaNAs, GaNP, I
The layered structure of the III-V group nitride semiconductor according to claim 1, which is at least one selected from the group consisting of nGaNAsP and InAlGaNAsP. 4. The layered structure of a III-V group nitride semiconductor according to claim 1, wherein the surface of the substrate is nitrided. 5. The III-V according to claim 1, wherein the buffer layer has a high resistance by being doped with p-type impurities.
Group nitride semiconductor layered structure. 6. An Al _x Ga _{1 -x} N (0) film is formed on a substrate at a temperature of 600 to 900 ° C. by an epitaxial crystal growth method.
A layer of III-V group nitride semiconductor, characterized in that after forming a buffer layer of <x <1), a crystal growth layer made of III-V group nitride semiconductor is formed on the buffer layer. Structure manufacturing method. 7. An Al _x Ga _{1 -x} N (0) film is formed on a substrate at a temperature of 600 to 900 ° C. by an epitaxial crystal growth method.
<X <1) lower layer and Al _y Ga _1-y N (0.5 <
An upper layer portion consisting of y ≦ 1 and x <y) is sequentially formed to form at least one unit buffer layer having a two-layer structure, and a III-V group nitride semiconductor is formed on the upper layer portion of the buffer layer. II characterized by forming a crystal growth layer consisting of
A method for manufacturing a layered structure of an IV nitride semiconductor. 8. The layer structure of a III-V group nitride semiconductor according to claim 6, wherein a plurality of atomic layers made of metal Al or metal Ga are formed on the substrate prior to forming the buffer layer. Body manufacturing method. 9. The III-V according to claim 6, wherein the surface of the substrate is subjected to a nitriding treatment prior to the formation of the buffer layer.
Method for manufacturing layered structure of group nitride semiconductor. 10. The method for manufacturing a layered structure of a III-V group nitride semiconductor according to claim 6, wherein a p-type impurity is doped when the buffer layer is formed.