JP4329984B2 - III-V Group Nitride Semiconductor Layer Structure and Method for Producing the Same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a layer structure made of a group III-V nitride semiconductor such as a GaN-based semiconductor and a method for manufacturing the same, and more specifically, even if the growth thickness of the nitride semiconductor is increased, there are cracks and the like. Is not generated, and the surface is smooth. Further, when the manufactured semiconductor device is operated, a leakage current to the substrate side hardly occurs, and this layer is useful as a starting material when manufacturing various semiconductor devices. The present invention relates to a structure and a manufacturing method thereof.
[0002]
[Prior art]
For example, a single crystal of GaN has a melting point exceeding 2000 ° C. and a vapor pressure at the melting point exceeding 100 GPa. Therefore, as in the case of GaAs, it is extremely difficult to directly manufacture a single crystal by applying, for example, a zone melting method. Therefore, in order to obtain a single crystal of GaN, it is necessary to use a different kind of substrate material from GaN and carry out crystal growth thereon.
[0003]
However, there is no material whose lattice constant matches that of GaN. Therefore, in order to alleviate the lattice mismatch with the substrate material, a method in which a buffer layer is formed in advance on the surface of the substrate to be used and GaN is crystal-grown on the buffer layer is generally performed. In that case, a sapphire (Al ₂ O ₃ ) substrate has been widely used as the substrate. However, the lattice mismatch rate between sapphire and GaN is as large as 20% or more.
[0004]
For this reason, the following two-step growth method is employed when a thick GaN crystal is grown using a sapphire substrate. The first method is, for example, by metal organic vapor phase epitaxy (MOCVD), using trimethylaluminum (TMA) and ammonia (NH ₃ ), hydrogen as a carrier gas, a growth temperature of 800 ° C., and a sapphire substrate. An AlN layer having a thickness of about 50 nm is formed as a buffer layer on the top, and then the growth temperature is raised to 1100 ° C., and trimethylgallium (TMG) and ammonia (NH ₃ ) are used to form the buffer layer on the buffer layer. This is a method of growing GaN thickly (see Non-Patent Document 1).
[0005]
The second method uses TMG and NH ₃ by MOCVD, hydrogen as a carrier gas, an amorphous GaN layer having a thickness of about 10 to 20 nm at a temperature of 500 to 600 ° C. as a buffer layer, and then a growth temperature. Is a method of growing a thick GaN crystal by raising the temperature to 1000 ° C. Moreover, the following method using the gas source molecular beam epitaxial method (GSMBE method) is also implemented.
[0006]
That is, a thin buffer layer made of GaN is formed on a sapphire substrate or Si substrate at a growth temperature of 500 to 550 ° C. using metal Ga and plasma nitrogen, and then the growth temperature is increased to 800 ° C. In this method, a thick GaN crystal is grown on the buffer layer. By the way, in the conventional method described above, the buffer layer is formed of AlN or GaN. In this case, when a GaN layer having a thickness of 1 μm or more is grown on the buffer layer, Cracks may occur in the GaN layer.
[0007]
Further, when a buffer layer made of AlN or GaN is formed using a Si substrate as a substrate, the buffer layer is not formed into a uniform film but is formed in an island pattern. Therefore, when a thicker GaN layer is grown on this, fine irregularities are generated on the surface of the formed thick GaN layer due to the influence of the island pattern of the lower buffer layer. May come.
[0008]
In any case, such a layer structure is not preferable as a starting material for various devices because the quality of the thick GaN layer on the buffer layer is deteriorated. In addition, the layer structure manufactured in this manner is then assembled into, for example, a field effect transistor (FET) by arranging a gate electrode, a source electrode, a drain electrode, and the like on the GaN layer. During the operation, if the substrate is a Si substrate, a leakage current may flow in the order of mA on the substrate side.
[0009]
The reason is that a semiconductor Si substrate having a resistivity equal to or higher than that of an intrinsic Si semiconductor cannot be manufactured, so that a sufficiently high-resistance semiconductor Si substrate cannot be obtained, and even in a pinch-off state, the depletion layer has prevented it. This is because current flows through the substrate (see Non-Patent Document 1).
[0010]
[Non-Patent Document 1]
H. Amano, N. Sawaki, I. Akasaki, and Y. Toyoda, Appl. Phys. Lett. 48 (1986) 353
[0011]
[Problems to be solved by the invention]
The present invention solves the above-mentioned problems in the conventional layer structure in which the buffer layer is made of AlN or GaN, and no crack is generated in the thick crystal growth layer formed on the buffer layer, and the formed thick film A novel layer structure that is designed such that no fine irregularities are generated on the surface of the crystal growth layer of the semiconductor device, and that a leakage current to the substrate side is less likely to occur during operation of the manufactured semiconductor device, and a method for manufacturing the same The purpose is to provide.
[0012]
[Means for Solving the Problems]
In order to achieve the above-described object, in the present invention, a Si substrate and the Si substrate are formed, the lower layer portion is made of Al _x Ga _1-x N (0 <x <1), and the upper layer portion is A buffer layer including at least one unit buffer layer having a two-layer structure made of Al _y Ga _1-y N (0.5 <y ≦ 1, x <y), and III-V formed on the buffer layer A group III-V nitride semiconductor layer structure (hereinafter referred to as a layer structure B) is provided, which has a group nitride semiconductor crystal growth layer.
[0013]
In the present invention, a lower layer portion made of Al _x Ga _1-x N (0 <x <1) and Al _y Ga ₁₋ are formed on a Si substrate at a temperature of 600 to 900 ° C. by an epitaxial crystal growth method. _After sequentially forming at least one unit buffer layer having a two-layer structure by sequentially forming _y N (0.5 <y ≦ 1, x <y), an upper layer portion is formed on the upper layer portion of the buffer layer. There is provided a method for producing a layered structure B, wherein a crystal growth layer made of a III-V nitride semiconductor is formed.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
An example of the layer structure A of the present invention is shown in FIG. In this layer structure A, a thick crystal growth layer 3 is formed on a substrate 1 via a buffer layer 2, and a semiconductor material used for forming these layers is a GaN-based semiconductor. The fact that it is a group III-V nitride semiconductor is the same as the case of the conventional layer structure described above.
[0015]
However, in the case of this layer structure A, the buffer layer 2 is the largest in the place where it is formed of Al _x Ga _1-x N (0 <x <1), not AlN or GaN as in the past. There are features. This layer structure A is manufactured by the manufacturing method A. Specifically, the buffer layer (AlGaN layer) 2 and the crystal growth layer 3 are sequentially formed on the substrate 1 by applying an epitaxial crystal growth method such as MOCVD method or GSMBE method.
[0016]
At this time, the growth temperature during the formation of the buffer layer 2 is set to 600 to 900 ° C. Preferably, it is set to 650 to 900 ° C. In the case of this manufacturing method A, since the growth temperature at the time of film formation of the buffer layer 2 made of AlGaN is set high, thermal migration of each raw material used for film formation of AlGaN is promoted on the surface of the substrate 1. become. For this reason, the reaction between the raw materials tends to proceed on the entire surface of the substrate 1, and as a result, the island-like growth that is likely to occur during the formation of the buffer layer of AlN or GaN does not occur, and uniform formation is achieved on the entire surface of the substrate. The film progresses. Therefore, the surface smoothness of the crystal growth layer formed on this buffer layer is improved.
[0017]
Moreover, since the growth temperature is high, the crystal quality of the deposited AlGaN layer 2 is also improved. Note that the growth temperature employed when forming the buffer layer 2 is appropriately set in relation to the composition of AlGaN. For example, when forming a buffer layer of Al _x Ga _1-x N (0 <x ≦ 0.5, more preferably 0 <x ≦ 0.2) having a low Al composition, the growth temperature is set to 650 to 850. It is preferable to set to ° C. This is because the uniformity of the buffer layer 2 can be realized.
[0018]
However, if the growth temperature exceeds 900 ° C., the buffer layer 2 becomes difficult to grow, and even if it grows, the buffer layer has an island pattern and becomes non-uniform. Therefore, the maximum growth temperature is set to 900 ° C. Further, when the AlGaN buffer layer is formed uniformly, prior to the introduction of the N source (NH ₃ ), an Al source or a Ga source is introduced in advance, and a number of metallic Al or metallic Ga are introduced on the surface of the substrate 1. The thickness of the atomic layer may be deposited, and then an N source may be introduced to form an AlGaN layer on the substrate.
[0019]
In the case of the layer structure of the present invention, the substrate may be a sapphire substrate as in the conventional case, but is of a diamond structure type such as a Si substrate, or zinc flash such as a GaAs substrate or a GaP substrate. Even if an ore type is used, a thick GaN-based crystal growth layer without cracks can be formed. Prior to the formation of the buffer layer, an N source (generally NH ₃ ) is introduced to perform nitriding treatment on the surface of the substrate, and after that, when the buffer layer is formed on the nitriding surface, the buffer layer becomes uniform. This is preferable because the property is improved. In particular, in the case of a Si substrate, it is preferable to perform nitriding treatment with NH ₃ while exposing the surface to NH ₃ at a temperature of 800 ° C. for about 5 minutes because the buffer layer to be formed thereafter becomes very uniform. .
[0020]
Further, the buffer layer 2 may be doped with a p-type impurity. In this way, the buffer layer 2 has a high resistance. For example, when an FET is assembled with the layer structure A and operated, the buffer layer functions as a high resistance layer. This is because generation is suppressed. Examples of such a p-type impurity include one or more of Mg, Zn, C, and the like, and the doping concentration is determined in relation to the target resistance value. What is necessary is just to set to about 1 * 10 < ¹⁷ > -1 * 10 < ²¹ > cm < ^-3 >.
[0021]
The group III-V nitride semiconductor film formed on the buffer layer 2 is, for example, one selected from the group of GaN, InN, InGaN, InAlGaN, AlGaN, GaNAs, GaNP, InGaNAsP, and InAlGaNAsP. Or 2 or more types can be mentioned. Next, the layer structure B will be described.
[0022]
This layer structure B has the same configuration as the layer structure A except that the buffer layer has a structure in which one or more unit buffer layers as described later are stacked. An example in which the buffer layer is formed of one unit buffer layer 2 ′ is shown in FIG.
[0023]
This unit buffer layer 2 ′ has a two-layer structure composed of a lower layer portion 2a ′ and an upper layer portion 2b ′, both of which are made of AlGaN, but the upper layer portion 2b ′ and the lower layer portion 2a ′ are made of AlGaN. When the mixing ratio of AlN is compared, the AlN ratio of the upper layer portion 2b ′ is larger than that of the lower layer portion 2a ′, and the crystal composition is rich in AlN.
[0024]
Specifically, the composition of the lower layer portion 2a ′ is Al _x Ga _1-x N (0 <x <1) as in the case of the layer structure A. When the composition of the upper layer portion 2b ′ is expressed by Al _y Ga _1-y N, the y value satisfies the relationship of 0.5 <y ≦ 1.0 and satisfies the relationship of x <y. Yes. Therefore, in the case of this unit buffer layer 2 ′, the upper layer side is rich in AlN, and therefore has a high resistance as a whole. Moreover, the surface is smooth.
[0025]
For example, if the overall thickness of the unit buffer layer 2 ′ is 50 nm, the unit buffer layer 2 ′ can function as a high resistance layer if the thickness of the upper layer 2b ′ is set to about 10 to 20 nm. Thus, the occurrence of a leakage current toward the substrate 1 side can be suppressed. This layer structure B is manufactured by the manufacturing method B. Specifically, a unit buffer layer 2 ′ is formed by sequentially forming a lower layer portion 2a ′ and an upper layer portion 2b ′ having a predetermined thickness so as to cover the entire surface of the substrate 1. The growth temperature at this time is set to 600 to 900 ° C. during the formation of both the lower layer portion and the upper layer portion for the same reason as in the manufacturing method A. In the case where a plurality of unit buffer layers are formed, the film forming operation of the lower layer portion and the upper layer portion may be performed alternately as many times as necessary.
[0026]
Then, another III-V nitride semiconductor is formed on the formed buffer layer to form the crystal growth layer 3. Also in the case of this layer structure B, p-type impurity doping may be performed on the upper layer portion 2b ′ and the lower layer portion 2a ′ during the formation of the unit buffer layer 2 ′ to increase the resistance. Further, the surface of the unit buffer layer 2 ′ can be smoothed by performing the nitriding treatment on the surface of the substrate 1.
[0027]
In addition, although the buffer layer in the layer structure B may be composed of only one unit buffer layer, the unit buffer layer may be composed by laminating a plurality of layers (for example, 3 to 5 layers).
[0028]
【Example】
Example 1 A layer structure A was manufactured using a MOCVD apparatus and a Si substrate chemically etched with hydrofluoric acid as follows. First, the Si substrate was set in an MOCVD apparatus and evacuated to a vacuum level of 1 × 10 ⁻⁶ Torr or less, and then the vacuum level was lowered to 100 Torr and the substrate was heated to 800 ° C. When the substrate is rotated at 900 rpm and the substrate temperature is stabilized, it is introduced into the substrate surface for 4 minutes at a flow rate of TMG 58 nmol / min, TMA 20 nmol / min, NH ₃ 12 L / min, and a thickness of about 50 nm made of Al _0.3 Ga _0.7 N. The buffer layer was formed.
[0029]
Next, the temperature of the Si substrate was raised to 1030 ° C., and TMG 58 nmol / min and NH ₃ 12 L / min were introduced for 15 minutes to form a GaN layer having a thickness of 500 nm. Next, the substrate was taken out from the apparatus, and the surface of the GaN layer was visually observed. The mirror surface had a metallic luster. No cracks were observed and it was confirmed that the crystals were of good quality.
[0030]
During deposition of the buffer layer in Example 2 Example 1, TMG, TMA, simultaneously introduced to thickness 50nm cyclo Petain dienyl magnesium outside of NH ₃ at a flow rate of _{5n mol / min p-Al 0.3} Ga 0.7 N After the buffer layer was formed, the supply of cyclopentanedienylmagnesium was stopped, the temperature of the Si substrate was raised to 1030 ° C., TMG 58 nmol / min, NH ₃ 12 L / min, and n-type dopant SiH ₄ 2 nmol / Min was introduced for 15 minutes to form an n-type GaN layer having a carrier concentration of 2 × 10 ¹⁷ cm ⁻³ and a thickness of 500 nm. No cracks were observed in this GaN layer, and the surface was a metallic luster mirror.
[0031]
Next, a gate electrode, a source electrode, and a drain electrode were assembled to this layer structure to manufacture a GaN-based MESFET. The gate electrode was formed by vapor deposition of Pt / Au, and the source electrode and the drain electrode were formed by vapor deposition of Al / Ti / Au. The gate length was 2 μm and the gate width was set to 20 cm. The characteristics of this MESFET were a withstand voltage of 600 V, an operating current of 10 A, and a leakage current of 1 μA or less. The MESFET continued to operate even at a temperature of 400 ° C.
[0032]
Example 3 A layer structure B was manufactured as follows using a Si substrate chemically etched with hydrofluoric acid using an MOCVD apparatus. First, the Si substrate was set in an MOCVD apparatus and evacuated to a vacuum degree of 1 × 10 ⁻⁶ Torr or less, and then the vacuum degree was lowered to 160 Torr and the substrate was heated to 800 ° C. When the substrate was rotated at 800 rpm and the substrate temperature was stabilized, the flow rate of TMG 58 nmol / min, TMA 20 nmol / min, NH ₃ 12 L / min was introduced into the substrate surface for 5 minutes, and the thickness 40 nm of Al _0.2 Ga _0.8 N was formed. A lower layer portion of a degree was formed. Subsequently, the flow rate was switched to TMG 30 nmol / min, TMA 70 nmol / min, NH ₃ 12 L / min and introduced into the surface of the lower layer for 2 minutes to form an upper layer portion of 10 nm thick composed of Al _0.8 Ga _0.2 N. A unit buffer layer was formed.
[0033]
Next, the temperature of the Si substrate was raised to 1050 ° C., TMG 50 nmol / min, NH ₃ 12 L / min were introduced for 15 minutes, and the n-type dopant SiH ₄ 2 nmol / min was 15 on the unit buffer layer. Then, an n-type GaN layer having a carrier concentration of 2 × 10 ⁷ cm ⁻³ and a thickness of 50 nm was formed. The substrate was taken out from the apparatus, and the surface of the GaN layer was visually observed. The mirror surface had a metallic luster. In addition, no cracks were observed in the GaN layer.
[0034]
Thereafter, a GaN-based MESFET was manufactured using this layer structure B, and the characteristics of the MESFET were examined. The breakdown voltage was 600 V, the operating current exceeded 10 A, and the leakage current was 1 μA or less. Further, when the high temperature operation was examined, it continued to operate even at a temperature of 400 ° C.
[0035]
Example 4
Layer structure A was manufactured under the same conditions as in Example 1 except that a sapphire substrate was used instead of the Si substrate. As in Example 1, this layer structure had a mirror surface, no cracks were observed, and the crystallinity was high quality.
[0036]
【The invention's effect】
As is clear from the above description, according to the present invention, a high-quality and thick GaN-based crystal growth layer can be formed. This is because a buffer layer formed on a Si substrate , which is a semiconductor substrate , has a lower layer portion made of Al _x Ga _1-x N (0 <x <1) and an upper layer portion made of Al _y Ga _1-y N ( The structure includes at least one unit buffer layer having a two-layer structure of 0.5 <y ≦ 1, x <y) , and the temperature when forming the unit buffer layer is set to a high temperature of 600 to 900 ° C. This is an obtained effect. Further, according to the present invention, it is possible to suppress the occurrence of leakage current by making the buffer layer have a high resistance.
[0037]
Therefore, if the layer structure of the present invention is used, a material for a device such as a GaN-based FET that operates with a high breakdown voltage and a low on-resistance can be provided, and its industrial value is extremely large.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an example A of a layered structure of the present invention.
FIG. 2 is a cross-sectional view showing an example B of the layer structure of the present invention.
[Explanation of symbols]
1 Substrate (Si substrate)
2 Buffer layer 2 ′ Unit buffer layer 2a ′ Lower layer 2b ′ Upper layer 3 Crystal growth layer

Claims (8)

A Si substrate;
Formed on the Si substrate, the lower layer portion is made of Al _x Ga _1-x N (0 <x <1), and the upper layer portion is Al _y Ga _1-y N (0.5 <y ≦ 1, x < a buffer layer including at least one unit buffer layer having a two-layer structure consisting of y);
A III-V group nitride semiconductor layer structure comprising a group III-V nitride semiconductor crystal growth layer formed on the buffer layer. The III-V nitride semiconductors, GaN, InN, InGaN, InAlGaN , AlGaN, GaNAs, GaNP, InGaNAsP, at least one layer of group III-V nitride semiconductor according to claim 1 which is selected from the group consisting of InAlGaNAsP Structure. The layer structure of a group III-V nitride semiconductor according to claim 1 , wherein the surface of the Si substrate is nitrided. The III-V group nitride semiconductor layer structure according to claim 1, wherein the buffer layer is doped with a p-type impurity to increase resistance. By epitaxial crystal growth, a lower layer portion made of Al _x Ga _1-x N (0 <x <1) and Al _y Ga _1-y N (0.5 <0.5) are formed on a Si substrate at a temperature of 600 to 900 ° C. After sequentially forming an upper layer portion composed of y ≦ 1, x <y) to form at least one unit buffer layer having a two-layer structure,
A method for producing a layered structure of a group III-V nitride semiconductor, comprising forming a crystal growth layer made of a group III-V nitride semiconductor on an upper layer portion of the buffer layer. 6. The method for producing a layered structure of a group III-V nitride semiconductor according to claim 5 , wherein a plurality of atomic layers made of metal Al or metal Ga are formed on the Si substrate prior to forming the buffer layer. 6. The method for producing a layered structure of a group III-V nitride semiconductor according to claim 5 , wherein nitriding treatment is performed on the surface of the Si substrate prior to forming the buffer layer. 6. The method for producing a layered structure of a group III-V nitride semiconductor according to claim 5 , wherein a p-type impurity is doped when the buffer layer is formed.

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