JP2003295841A - Semiconductor integrated circuit for liquid crystal display - Google Patents

Abstract

(57) [Summary] [Problem] To prevent disturbance of a display screen. SOLUTION: A detection circuit (57) for detecting that supply of a power supply voltage has been stopped, and detecting the electric charge accumulated in a capacitance for stabilizing the liquid crystal drive voltage by the detection circuit. A charge discharging circuit (590) for discharging based on the result, detecting that supply of the power supply voltage is stopped, and discharging the charge accumulated in the capacitance by the charge discharging circuit; Even if undesired data is output from the driver immediately after the supply of the high-potential-side power supply voltage is stopped, display on the liquid crystal panel is not performed to prevent the display screen from being disturbed by undesired display data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal driving technique, and more particularly to a technique effectively applied to a liquid crystal driver that drives a liquid crystal by using multivalued voltages.

[0002]

2. Description of the Related Art A liquid crystal display device as an example of a display device includes a liquid crystal panel (LCD) and a semiconductor integrated circuit for driving and controlling the liquid crystal panel. This semiconductor integrated circuit is a power supply circuit for supplying a voltage used for driving a liquid crystal panel, a liquid crystal driver for driving a liquid crystal panel based on the output voltage, and controls operations of the liquid crystal driver and the power supply circuit. Includes a control circuit for

The voltage for driving the liquid crystal panel (referred to as "liquid crystal driving voltage") is required to have a voltage level higher than the power supply voltage supplied from the outside of the semiconductor integrated circuit. Such a liquid crystal drive voltage is generated by a power supply circuit built in the semiconductor integrated circuit. Therefore, in the liquid crystal display device, an image can be displayed only by supplying a common single voltage to the control section and the power supply circuit.

A power supply circuit for generating a liquid crystal drive voltage is a charge pump type booster circuit including a switch circuit formed of MOS transistors and a capacitive element arranged outside a semiconductor integrated circuit. It is configured by combining with an operational amplifier. The voltage input to this charge pump type booster circuit is the power supply voltage VCC of the system or a voltage that stabilizes it.

As an example of a document describing the liquid crystal driver, there is JP-A-2001-134237.

[0006]

When the inventors of the present invention examined a semiconductor integrated circuit for liquid crystal display, a multi-valued voltage generated in a power supply circuit for driving liquid crystal was output from a segment driver and a common driver to a liquid crystal panel. Then, an image can be displayed by applying a voltage to the liquid crystal element of the liquid crystal panel. A semiconductor integrated circuit for liquid crystal display has a control circuit which operates with a power supply voltage VCC supplied from the outside in order to control a segment driver and a common driver. The voltage supplied from the outside is a liquid crystal display. When the device is installed in a mobile terminal such as a mobile phone, it is supplied from a rechargeable battery. Therefore, if the terminal voltage of the device drops to a predetermined level due to the decrease in the amount of accumulated charge in the battery, the control circuit Will not work. However, even though the control circuit has stopped operating in this way, the voltage generated in the power supply circuit is held for a predetermined time due to the charge accumulated in the stabilizing capacitor element in the liquid crystal display device, and therefore is input. Data can be displayed as an image. Therefore, when the terminal voltage of the battery is reduced to a predetermined level due to the decrease in the amount of charge stored in the battery, an undesired voltage is supplied as undesired display data to the liquid crystal panel due to the non-operation of the control circuit. Will be done. For this reason, in the liquid crystal display device, when the power supply voltage is stopped, the display screen is displayed until the charge accumulated in the stabilizing capacitance element in the liquid crystal display device is discharged to some extent and the display becomes impossible. Disturbed.

An object of the present invention is to provide a technique for preventing the display screen from being disturbed by undesired display data due to the stop of the supply of the power supply voltage.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0009]

The outline of the representative one of the inventions disclosed in the present application will be briefly described as follows.

That is, a liquid crystal display including a liquid crystal drive voltage generating circuit for generating a liquid crystal drive voltage based on a power supply voltage externally taken in and a driver for taking in the liquid crystal drive voltage and driving a liquid crystal panel. When the semiconductor integrated circuit for use is configured, the detection circuit for detecting that the supply of the power supply voltage is stopped and the charge stored in the electrostatic capacitance for stabilizing the liquid crystal drive voltage are And a charge discharging circuit for discharging based on the detection result of the detection circuit.

According to the above means, the detection circuit detects that the supply of the power supply voltage is stopped, and the charge emission circuit is stored in the electrostatic capacitance for stabilizing the liquid crystal drive voltage. The stored electric charges are discharged based on the detection result of the detection circuit, so that display on the liquid crystal panel is prevented. This prevents the display screen from being disturbed by undesired display data due to the supply of the power supply voltage being stopped.

The detection circuit uses a capacitance element charged by the power supply voltage and a logic circuit for determining the logic level of the power supply voltage according to a predetermined logic threshold value using the terminal voltage of the capacitance element as a power supply for operation. It can be configured to include and.

The detection circuit determines the logic level of the high-potential-side power supply voltage according to a predetermined logic threshold value by using the capacitance element charged by the power supply voltage and the terminal voltage of the capacitance element as a power supply for operation. And a extracting circuit for extracting the accumulated charge on the input terminal side of the logic circuit according to the state transition of the output logic of the logic circuit.

The detection circuit can be configured to include a logic circuit for determining the logic level of the power supply voltage according to a predetermined logic threshold value by using the liquid crystal drive voltage as an operation power supply.

The charge discharging circuit may be a transistor that is turned on by the output signal of the logic circuit to set the output node of the liquid crystal drive voltage generating circuit to the ground level.

[0016]

FIG. 5 shows a configuration example of a mobile phone system including a semiconductor integrated circuit for liquid crystal display according to the present invention.

In the mobile phone system shown in FIG. 5, a telephone body 504 has a microphone (microphone) 501 for voice input, a speaker 502 for voice output, an antenna 503 for transmitting and receiving radio waves, and various information displays. Is mounted with a liquid crystal panel 505.

The telephone body 504 has a voice interface for interfacing with the outside through the microphone 501 and the speaker 502 and a high frequency interface 5 for interfacing with the outside through the antenna 503.
10, a baseband unit 508 for performing communication control unique to a mobile phone, a memory 507 read / written in communication control by the baseband unit 508, and the liquid crystal panel 511 based on the communication processing result of the baseband unit 508. And a liquid crystal display semiconductor integrated circuit 511 for displaying information.

The liquid crystal display semiconductor integrated circuit 511 has
Although not particularly limited, a liquid crystal drive voltage generation circuit 513 for generating a liquid crystal drive voltage based on a power supply voltage taken from the outside, a driver 512 for taking the liquid crystal drive voltage and driving the liquid crystal panel 505, and the base band. A control circuit 517 for controlling information display on the liquid crystal panel 511 based on display data from the unit 508 is included.

The control circuit 517 is not particularly limited, but a latch circuit 516 for latching the display data from the baseband section 508, and a latch for latching the display data output from the latch circuit 516. A circuit 515 and a display RAM (random access memory) 514 for storing the display data output from the latch circuit 515 are included.

A rechargeable battery 506 that can be repeatedly used by charging is provided, and the power supply voltage is supplied from the rechargeable battery 506 to each part.

The baseband unit 508 is a DSP (digital signal processor) for signal processing,
It includes an ASIC (Application Specific Integrated Circuit) that has been developed in accordance with customer requirements, a microcomputer for arithmetic processing according to a program, and the like.

FIG. 2 shows a liquid crystal panel 505 and a driver 5.
The relationship with 12 is shown.

The liquid crystal panel 505 is formed by intersecting a plurality of common lines and a plurality of segment lines and arranging liquid crystal display elements at the intersections. The driver 512 is a COM for taking in the liquid crystal drive voltage and driving the common line.
(Common) driver 512-1, and SEG for driving the plurality of segment lines by taking in the liquid crystal drive voltage
(Segment) driver 512-2.

FIG. 3 shows an example of a liquid crystal drive signal supplied from the driver 512 to the liquid crystal panel 505.

The high-potential-side power supply voltage VCC based on the ground GND level is supplied from the rechargeable battery 506. The liquid crystal drive voltages V1 to V5 are voltages generated by the liquid crystal drive voltage generation circuit 513 and have different voltage levels. Such liquid crystal driving voltages V1 to V5 are C
It is supplied to the OM driver 512-1 and the SEG driver 512-2, the COM signal is output from the COM driver 512-1, and the SEG driver 512-2 outputs the SEG signal.
The signal is output.

FIG. 4 shows the liquid crystal drive voltage generation circuit 513.
A configuration example of is shown.

The high-potential-side power supply voltage Vcc or a voltage obtained by stabilizing it is transmitted to the voltage input terminal Vci. A charge pump type booster circuit 522 is provided, and the charge pump type booster circuit 522 generates a voltage VLOUT higher than the input voltage (VCC) level from the terminal Vci by charging / discharging the capacitors 551 to 556. This voltage V
LOUT is stabilized by the capacitor 523. The voltage VLOUT is supplied to the differential amplifiers 541 to 545.
Is set to the operating voltage VLPS.

A liquid crystal drive voltage regulator 521 for stabilizing the input voltage Vreg is provided, and the output voltage of the liquid crystal drive voltage regulator 521 is a variable resistor VR.
And the fixed resistors 551 to 555 are connected in series to the resistor circuit. The voltage at the resistor series connection node in this resistor circuit is the corresponding operational amplifier 541-54.
5 is transmitted to the non-inverting input terminal (+). The operational amplifier 54 is adjusted by adjusting the resistance value of the variable resistor VR.
The voltage level transmitted to the non-inverting input terminals (+) 1 to 545 can be adjusted. Operational amplifiers 541-5
45 output terminals correspond to operational amplifiers 541 to 545.
Output voltage V by being coupled to the inverting input terminal (-) of
Feedback of 1 to V5 is performed. The output terminals of the operational amplifiers 541 to 545 have output voltages V1 to V5.
The capacitive elements 531 to 535 for stabilizing the above are coupled.

Further, a liquid crystal drive voltage discharge circuit 580 for discharging the charges accumulated in the electrostatic capacitance elements 531 to 535 for stabilizing the liquid crystal drive voltage.
Is provided.

FIG. 1 shows a configuration example of the liquid crystal drive voltage discharge circuit 580.

As shown in FIG. 1, the liquid crystal drive voltage discharge circuit 580 is based on a voltage detection circuit 570 for detecting that the supply of the power supply voltage is stopped, and a detection result of the voltage detection circuit 570. And a charge discharging circuit 590 for discharging the charges accumulated in the capacitance elements 561 to 565 based on the detection result of the voltage detecting circuit 570.

The voltage detection circuit 570 has an inverter 600 in which a p-channel type MOS transistor 572 and an n-channel type MOS transistor 573 are connected in series.
Is provided. p-channel type MOS transistor 527
The source electrode of the rechargeable battery 5 is connected via the resistor 571.
The high-potential-side power supply voltage VCC from 06 is supplied. The source electrode of the p-channel MOS transistor 527 is coupled to the ground GND via the capacitor 574. The capacitor 574 is charged via the resistor 571. The high-potential-side power supply voltage VC from the rechargeable battery 506 is applied to the gate electrodes of the p-channel MOS transistor 572 and the n-channel MOS transistor 573.
C is supplied. Further, when the high potential side power supply voltage VCC is lowered to a predetermined level, the high potential side power supply voltage VC
A voltage extracting circuit 580 for reducing C at a high speed is provided. The voltage extracting circuit 580 has a resistor 581 coupled to the gate electrodes of the p-channel MOS transistor 572 and the n-channel MOS transistor 573.
And an n-channel MOS transistor 582 coupled to the ground GND are connected in series. The output voltage of inverter 600 is transmitted to the gate electrode of n-channel MOS transistor 582.

The charge discharging circuit 590 is composed of the capacitive element 53.
1 to 535, n channel type MOS transistors 561 to 565 are provided. The drain electrodes of the n-channel MOS transistors 561 to 565 are
Each of them is coupled to the corresponding capacitance element 531 to 535. The source electrodes of the n-channel type MOS transistors 561 to 565 are coupled to the ground GND.

In the above structure, the rechargeable battery 50
If the terminal voltage of 6 is equal to or higher than a predetermined voltage level, the output terminal of the inverter 600 is set to the low level, and the n-channel MOS transistors 561 to 565 are turned off.

On the other hand, when the terminal voltage of the rechargeable battery 506 is lowered and becomes lower than the logic threshold value of the inverter 600, the output terminal of the inverter 600 becomes high level. As a result, an n-channel MOS
The transistors 561 to 565 are turned on, and the capacitor 53
The accumulated charges of 1 to 535 are rapidly released to the ground GND.

When the output terminal of the inverter 600 goes high, the n-channel MOS transistor 582 is turned on, which causes the rechargeable battery 506.
Stored charges are discharged through the resistor 581. As a result, the transition of the output terminal of the inverter 600 from low level to high level can be performed at high speed.

According to the above example, the following operational effects can be obtained.

(1) When the terminal voltage of the rechargeable battery 506 is lowered and becomes lower than the logic threshold value of the inverter 600, the output terminal of the inverter 600 becomes high level, whereby the n-channel type The MOS transistors 561 to 565 are turned on, and the capacitance elements 531 to 53
The accumulated charge of 5 is rapidly released to the ground GND. As a result, the liquid crystal drive voltages V1 to V5 supplied to the COM driver 521-1 and the SEG driver 512-2 are rapidly reduced. As a result, the COM driver 512-1 is provided immediately after the supply of the high-potential-side power supply voltage VCC is stopped.
Even if undesired data is output from the or SEG driver 512-2, the display on the liquid crystal panel 505 is not performed. This prevents the display screen from being disturbed by the undesired display data.

(2) The voltage detection circuit 570 has a capacitance element 574 charged by the power supply voltage VCC.
And an inverter 600 for determining the logic level of the power supply voltage VCC according to a predetermined logic threshold value by using the terminal voltage of the capacitance element 574 as a power supply for operation. Since the terminal voltage of the electrostatic capacitance element 574 is used as the operating power supply of the inverter 600, the inverter 600 maintains the operating state even if the high-potential-side power supply voltage VCC is lowered. VC
The decrease in C can be accurately detected.

(3) Since the extraction circuit 580 is provided, the accumulated charge on the input terminal side of the inverter 600 is extracted, so that the power supply voltage drop detection by the inverter 600 can be performed at high speed.

FIG. 6 shows another configuration example of the voltage detection circuit 570.

The voltage detection circuit 570 shown in FIG.
Channel type MOS transistors 701, 702, 704
And n-channel type MOS transistors 703, 705,
It includes a resistor 706 and inverters 707 and 708.
The MOS transistors 701, 702, 703 are connected in series, and the MOS transistors 704, 705 are connected in series. The output voltage VL of the charge pump type booster circuit 522 is connected to the source electrodes of the MOS transistors 701 and 704.
OUT is supplied. MOS transistors 704, 70
The serial connection node of 5 is coupled to the gate electrode of MOS transistor 701. MOS transistors 702, 70
3 is connected in series with the MOS transistors 704, 70.
5 gate electrodes. The series connection node of the MOS transistors 702 and 703 is coupled to the output terminal of the charge pump type booster circuit 522 via the resistor 706. Furthermore, MOS transistors 702, 7
The logic of the serial connection node of 03 is inverters 707, 7
N channel MOS transistors 561 through 56
565 is transmitted. MOS transistors 702, 70
The high-potential-side power supply voltage VCC is supplied to the gate electrode of No. 3.

In the above structure, the rechargeable battery 50
If the terminal voltage VCC of 6 is above a predetermined voltage level, M
Since the OS transistor 703 is turned on and the MOS transistors 701 and 702 are turned off, the node 90
1 is low level. This allows the inverter 708
Since the output terminal of is set to low level, n-channel type M
The OS transistors 561 to 565 are turned off.

On the other hand, the terminal voltage of the rechargeable battery 506 is lowered and the MOS transistors 702 and 703 are reduced.
When it becomes lower than the logic threshold value of the logic circuit constituted by, the MOS transistor 703 is turned off, and thus the output voltage VLO of the charge pump type booster circuit 522.
Since the node 901 is set to the high level by the UT,
The output terminal of the inverter 708 becomes high level. Thereby, the n-channel type MOS transistors 561 to 56
5 is turned on, and the charges accumulated in the capacitors 531 to 535 are rapidly released to the ground GND.

When the terminal voltage of the rechargeable battery 506 is lowered in this way, the n-channel type MOS transistors 561 to 565 are turned on and the capacitance elements 531 to 535 are turned on.
Since the accumulated charge of is rapidly released to the ground GND,
It is possible to obtain the same operational effect as in the case of the above example.

FIG. 7 shows another configuration example of the voltage detection circuit 570.

The voltage detection circuit 570 shown in FIG.
Channel type MOS transistors 801, 802, 80
4, n-channel type MOS transistors 803, 805,
It includes a resistor 807 and an inverter 806. MO
The S transistors 801, 802, 803 are connected in series. The MOS transistors 804 and 805 are connected in series. The output voltage VLO of the charge pump type booster circuit 522 is connected to the source electrodes of the MOS transistors 801 and 804.
UT is supplied. MOS transistors 803 and 805
Source electrode is coupled to ground GND. The high potential side power supply voltage VCC is supplied to the gate electrodes of the MOS transistors 802 and 803. MOS transistor 802
The serial connection node of 803 is a MOS transistor 804,
Coupled to the gate electrode of 805. The series connection node of MOS transistors 804 and 805 is coupled to the gate electrode of MOS transistor 801. The series connection node of the MOS transistors 804 and 805 is coupled to the inverter 806 and also to the ground GND via the resistor 807.

In the above structure, the rechargeable battery 50
If the terminal voltage VCC of 6 is above a predetermined voltage level, M
When the OS transistor 803 is turned on and the MOS transistors 801 and 802 are turned off, the node 90
2 is high level. This allows the inverter 806
Since the output terminal of is set to low level, n-channel type M
The OS transistors 561 to 565 are turned off.

On the other hand, the terminal voltage VCC of the rechargeable battery 506 is lowered and the MOS transistors 802,
When the voltage becomes lower than the logic threshold value of the logic circuit formed by 803, the MOS transistor 803 is turned off and the node 902 is set to low level, so that the output terminal of the inverter 806 becomes high level. Thereby,
The n-channel MOS transistors 561 to 565 are turned on, and the charges accumulated in the capacitors 531 to 535 are connected to the ground G.
Rapidly released to ND.

When the terminal voltage of the rechargeable battery 506 is lowered in this way, the n-channel type MOS transistors 561 to 565 are turned on and the capacitance elements 531 to 535 are turned on.
Since the accumulated charge of is rapidly released to the ground GND,
It is possible to obtain the same operational effect as in the case of the above example.

Although the invention made by the present inventor has been specifically described above, it is needless to say that the present invention is not limited thereto and can be variously modified without departing from the gist thereof.

For example, the resistor in the above example can be formed by using polysilicon, a diffusion layer, a well region, a MOS transistor or the like. The capacitance element may be provided inside or outside the semiconductor chip.

In the above description, the case where the invention made by the present inventor is mainly applied to the semiconductor integrated circuit included in the mobile phone system which is the field of application of the background has been described, but the present invention is not limited thereto. However, the present invention can be applied to semiconductor integrated circuits mounted in various electronic devices.

The present invention can be applied on the condition that at least a driver for driving the liquid crystal panel is included.

[0056]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, when the detection circuit detects that the supply of the power supply voltage is stopped, the electric charge accumulated in the electrostatic capacitance for stabilizing the liquid crystal drive voltage is discharged by the charge discharging circuit. As a result, even if undesired data is output from the driver immediately after the supply of the high-potential-side power supply voltage is stopped, display is not performed on the liquid crystal panel, and the display screen is disturbed by the undesired display data. Is prevented.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration example of a main part of a semiconductor integrated circuit for liquid crystal display according to the present invention.

FIG. 2 is a circuit diagram of a configuration example of a main part in a mobile phone system including a semiconductor integrated circuit for liquid crystal display according to the present invention.

FIG. 3 is a waveform diagram of signals for driving a liquid crystal panel by the semiconductor integrated circuit for liquid crystal display.

FIG. 4 is a circuit diagram showing a configuration example of a liquid crystal drive voltage generating circuit in a semiconductor integrated circuit for liquid crystal display according to the present invention.

FIG. 5 is a block diagram of an overall configuration example of a mobile phone system including the liquid crystal display semiconductor integrated circuit.

FIG. 6 is a circuit diagram of another configuration example of the main part of the semiconductor integrated circuit for liquid crystal display.

FIG. 7 is a circuit diagram showing another configuration example of a main part of the liquid crystal display semiconductor integrated circuit.

[Explanation of symbols]

511 Semiconductor integrated circuit for liquid crystal display 512 driver 512-1 COM driver 512-2 SEG driver 513 LCD drive voltage generation circuit 517 control circuit 531-535 Capacitance element 570 Power supply voltage detection circuit 580 LCD drive voltage discharge circuit 590 Charge emission circuit

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor, Nei Nagata             Hitachi Device, 3681 Hayano, Mobara-shi, Chiba             Engineering Co., Ltd. (72) Inventor Kazuo Daimon             5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Stock             Ceremony Company within Hitachi Semiconductor Group F-term (reference) 2H093 NA06 NC07 NC58 ND60                 5C006 AA16 AC02 AC28 AF53 AF64                       AF67 AF68 BB12 BF04 BF14                       BF16 BF25 BF26 BF27 BF34                       BF36 BF37 BF38 BF43 BF44                       BF45 BF46 BF49 EB05 FA25                       FA31 FA33 FA56                 5C080 AA10 BB05 DD05 DD06 DD09                       DD12 DD25 EE17 EE29 FF03                       FF12 JJ02 JJ03 JJ04 KK07

Claims (5)

[Claims] 1. A liquid crystal display including a liquid crystal drive voltage generation circuit for generating a liquid crystal drive voltage based on a power supply voltage taken from the outside, and a driver for taking in the liquid crystal drive voltage and driving a liquid crystal panel. A semiconductor integrated circuit, comprising: a detection circuit for detecting that the supply of the power supply voltage has been stopped; and a charge accumulated in an electrostatic capacitance for stabilizing the liquid crystal drive voltage of the detection circuit. A semiconductor integrated circuit for a liquid crystal display, comprising: a charge discharging circuit for discharging based on a detection result. 2. The detection circuit for determining the logic level of the power supply voltage according to a predetermined logic threshold value by using a capacitance element charged by the power supply voltage and a terminal voltage of the capacitance element as a power supply for operation. A semiconductor integrated circuit for liquid crystal display according to claim 1, comprising a logic circuit. 3. The detection circuit determines a logical level of the high-potential-side power supply voltage according to a predetermined logical threshold value, using a capacitive element charged by the power source voltage and a terminal voltage of the capacitive element as an operating power source. 2. The semiconductor integrated circuit for a liquid crystal display according to claim 1, further comprising: a logic circuit for performing the operation, and an extraction circuit for extracting the accumulated charge on the input terminal side of the logic circuit according to the state transition of the output logic of the logic circuit. . 4. The logic circuit according to claim 1, wherein the detection circuit includes a logic circuit for determining a logic level of the power supply voltage according to a predetermined logic threshold value by using a liquid crystal drive voltage as an operation power supply. Semiconductor integrated circuit for liquid crystal display. 5. The charge discharging circuit is a transistor which is turned on by an output signal of the logic circuit to set an output node of the liquid crystal drive voltage generating circuit to a ground level. A semiconductor integrated circuit for liquid crystal display as described above.