JP2003283502A - Information communication device and information communication method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To complete command response processing with respect to much more commands within a fixed time when a number of commands are received in a short period of time. <P>SOLUTION: Based upon a processing passage status up to the moment with respect to commands held on a Target side for received command dealing processing, the command to be processed and contents of processing are determined. When a response can not be transmitted since there is no empty area in a transmitting buffer, the transmitting buffer is reserved for the response which can not be transmitted this time. Thus, in a timing when the transmitting buffer is turned into empty state later, the response is surely stored in the transmitting buffer to be transmitted out. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information communication device which can be connected to another device via a data bus of a predetermined communication format so as to be capable of mutual communication, and an information communication method in this information communication device. is there.

[0002]

2. Description of the Related Art Recently, as a digital data interface, IEEE (The Institute of Electrical and Elec
ectoronics Engineers) 1394 data interface is known. The IEEE 1394 data interface has a higher data transfer rate than, for example, SCSI, and as is well known, Isochron is guaranteed to periodically transmit and receive a required data size.
Nous communication is enabled. Therefore, IEEE13
The 94 data interface is advantageous for transferring stream data such as AV (Audio / Video) in real time.

Against this background of technology, electronic devices such as various digital AV devices and personal computer devices are connected to each other via a data bus conforming to a data interface standard such as IEEE 1394 so that the devices can be connected to each other. AV that can send and receive AV data
Systems have been proposed.

As the above-mentioned AV system, for example, it is conceivable to construct a so-called component system by connecting, for example, various AV source output devices to the amplifier device as a main component via a data bus.

Further, in such an AV system, the IE
According to the standard of EE1394 data interface,
By transmitting and receiving commands between a plurality of devices, it is possible for one device to control the operation of another device. In other words, it is possible to perform so-called remote control,
This also makes it possible to enhance the functions of the AV system.

[0006]

By the way, for example, IE
In the EE1394 data interface, the command transmission / reception process is completed by the procedure of transmitting a command from the device as the controller to the device as the target and receiving the final response transmitted from the target in response to the command. It is defined as what to do. This is called a "transaction".

At present, for example, IEEE1394
CP that executes the processing corresponding to the data interface
U (Central Processing Unit) is mostly a single task environment. Since it is premised on such a CPU environment, in Target,
The received command response processing until the final response is transmitted in response to the received command is activated in the order of the received command. As is well known, as a rule of the IEEE 1394 data interface, the INTERIM response is received within a specified time (for example, within 100 msec) after receiving a command.
If a temporary response (temporary response) of se is transmitted, there is no limit to the time until the final response is transmitted thereafter. Therefore, as the received command response process on the Target side, INTERIM responds
When e is transmitted, the final response is transmitted for the first time when the state becomes possible after this.

Therefore, if the Target continuously receives commands within a short period of time, the received command response process in response to the command received later will be significantly delayed. As a result, for example, a state may occur in which the INTERIM response cannot be transmitted within the above-described specified time.

[0009] Further, when the device to be the Target itself also functions as the Controller and has the function of transmitting the control command, the transmission buffer for transmitting the control command and the transmission for transmitting the response. In general, the same buffer is used for the buffers. Therefore, when the controller for transmitting the control command is activated, it is necessary to wait for the transmission of the response until the transmission buffer becomes empty. Due to such factors, the received command response process is also delayed.

In this way, if the reception command response processing is delayed, the control corresponding to the reception of the response is performed.
The operation on the er side is also delayed. Or Cont
The roller side will process this as a command transmission error. Such a state causes inconveniences, for example, that the linking operation as a system becomes very slow, or the linking operation does not operate normally as intended by the user. In other words, even in the case where the command is continuously received within a short time as described above, or when the configuration in which the transmission buffer is shared by the command and the response to be transmitted is adopted, it is appropriate. It is required that the processing in response to these received commands be completed within the time limit.

[0011]

In view of the above problems, the present invention is configured as an information communication device as follows. That is, a communication means capable of mutual communication with another information communication device via a data bus having a predetermined communication format, a received command for holding a command received by this communication means, and executing a corresponding process for the held command. Correspondence processing means, processing status detection means for periodically detecting the progress status of the corresponding processing up to the present stage for each command held by this received command correspondence processing means, and the detection result of this processing status detection means On the basis of the above, as a correspondence process to be executed by the received command correspondence processing means, a correspondence processing determination means for determining a command to be a correspondence processing target and a correspondence processing content for the command as the correspondence processing target I decided to prepare.

The information communication method is configured as follows. That is, a communication procedure for mutual communication with another information communication device via a data bus in a predetermined communication format, a command received by this communication procedure is held, and a corresponding process for the held command is executed. The command response processing procedure, the processing status detection procedure for periodically detecting the progress status of the response processing up to the present stage for each command held by the received command response processing procedure, and the detection of the processing status detection procedure. Based on the result, as a response process to be executed by the received command response process procedure, a response process determination procedure for determining the command to be the response process and the content of the response process for the command to be the response process target. I decided to configure it to run.

According to each of the above-mentioned configurations, the received commands are held, and the command corresponding process such as the response process to the held commands is executed. Then, the progress of the corresponding processing up to now for the held command is periodically judged, and based on the judgment result obtained periodically, the command to be processed and the corresponding processing contents Will be decided. As a result, even if there are multiple commands that have been received and retained, it is appropriate to execute what kind of correspondence process is appropriate for which command among these multiple commands. It can be set according to the progress situation.

Further, the information communication device is configured as follows. That is, as communication processing capable of mutual communication with another information communication device via a data bus having a predetermined communication format and corresponding processing for a command received by this communication means, at least information communication of the command transmission source by the communication means is performed. It comprises a reception command handling processing means for generating a response to be transmitted to the device, and a transmission buffer means for temporarily storing information to be transmitted by the communication means via the data bus. Then, when the response generated by the reception command handling processing means is to be transmitted by the communication means, the transmission cannot be performed because there is no free area for storing the response in the transmission buffer means. In the above, a response transmission control means for executing a reservation for guaranteeing that a response that cannot be transmitted is stored in an empty area generated thereafter is provided for the transmission buffer means.

Further, the information communication method is configured as follows. In other words, at least the information communication of the command transmission source by the communication processing is the communication procedure that enables mutual communication with other information communication devices via the data bus in the predetermined communication format and the corresponding processing for the command received by this communication procedure. And a processing procedure corresponding to a received command for generating a response to be transmitted to the device. Then, when trying to send the response generated by the received command handling process by the communication procedure, it becomes impossible to send because there is no free space in the send buffer in which the information to be sent is temporarily stored. In this case, the response transmission control procedure for making a reservation for guaranteeing that the response that cannot be transmitted is stored is configured to be executed in the empty area that occurs thereafter.

For example, when an attempt is made to send a response as a process corresponding to a received command, there is a case where the send buffer for storing send information has no free space and cannot be sent. Depending on each of the above configurations, if the transmission buffer is occupied by other information as described above and the response cannot be stored, the empty area of the transmission buffer obtained after this is used for the response that could not be transmitted. In order to secure (reserve) in order to do so. As a result, the state in which the transmission buffer is full does not continue and the transmission of the response is not significantly delayed.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. The description will be given in the following order. 1. AV system 1-1 Overall configuration 1-2 STR (front panel) 1-3 STR compatible disk drive (front panel) 1-4 STR (internal) 1-5 STR compatible disk drive (internal) 2. Data communication of this embodiment by IEEE1394 2-1 Overview 2-2 Stack model 2-3 Signal transmission form 2-4 Bus connection between devices 2-5 Packet 2-6 Transaction rule 2-7 Addressing 2-8 CIP ( Common Isochronous Packet) 2-9 Connection management 2-10 Command and response in FCP 2-11 AV / C command packet 3. Transaction (command and response type) 4. 4. Configuration for receiving command handling processing (conventional) 5. Configuration for Receiving Command Handling Process (Embodiment) 5-1. Block configuration 5-2. Processing operation 5-3. Example of operation timing of received command processing

1. AV System 1-1 Overall Configuration FIG. 1 shows a configuration example of an electronic device system including an electronic device according to an embodiment of the present invention. This electronic device system is constructed by connecting a plurality of AV devices and the like so that they can communicate with each other via a data bus of an IEEE 1394 interface.

In FIG. 1, an STR (Stereo Tuner Receiver) 60 and an S are provided as the devices constituting the AV system.
TR compatible disk drive 30, same manufacturer device 10
0, the maker's equipment 110 of another company is shown.

The STR 60 functions as the center of the AV system shown in FIG. 1, and mainly has a tuner function, an external source input selection function, and an amplifier function.
For example, as shown in the figure, speakers SP (FL), SP (FR), SP (S) corresponding to 5-channel stereo sound are provided.
L), SP (SR) and SP (C) can be connected. The speaker SP (FL) is a front left channel speaker, the speaker SP (FR) is a front right channel speaker, the speaker SP (SL) is a surround left channel speaker, the speaker SP (SR) is a surround right channel speaker, and a speaker SP (C).
Is a center channel speaker. Other speaker configurations are possible, such as adding a subwoofer speaker to form a so-called 5.1-channel speaker system.

Although detailed structure will be described later, in the STR 60, a broadcast signal received by an internal tuner section, an analog audio signal input, a digital audio signal input, and a plurality of externally input signals via the IEEE 1394 bus 116 are provided. The audio source is selected, and finally, this can be output as sound from the speaker SP.

The figure also shows a remote controller RM for operating the STR 60. The STR 60 receives an operation command signal transmitted in response to an operation performed on the remote controller RM, and executes a required operation according to the content of the operation command signal. Although only the remote controller RM corresponding to the STR 60 is shown in this figure, in reality, other devices may be operated by the remote controller RM.

The STR compatible disk drive 30 is shown here as a model capable of realizing various highly convenient system functions by connecting with the STR 60. STR compatible disk drive 30
Are manufactured by the same manufacturer as the STR 60, for example.

The STR compatible disc drive 30 is, for example, a CD (Compact Disc), an SACD (Super Audio CD),
It has a function as a disc player compatible with each of DVDs (Digital Versatile Discs), and reproduces the loaded discs. Then, the audio data obtained by reproducing from the disc can be transmitted and output via the IEEE1394 bus 116. As is well known, audio data reproduced from a CD has a sampling frequency of 44.
This is linear PCM data of 1 KHz, 16-bit quantization. Further, when a DVD is played back, not only audio data but also video data may be played back. Therefore, the STR compatible disk drive 30 also has a video decoding function. Although not shown in FIG. 1, for example, CR
By connecting a display device such as T, liquid crystal, or the like to the STR-compatible disk drive 30, it is possible to display and output the image reproduced from the DVD. SACD is a 1-bit digital audio signal system (DS) using ΣΔ modulation.
D: Direct Stream Digital). This DSD signal has a sampling frequency fs of CD.
It is digital audio data of 1-bit quantization at a sampling frequency as high as 64 times (fs = 44.1 KHz), and enables signal reproduction beyond the audible frequency band. To support such SACD, S
The TR compatible disk drive 30 has a decoding function compatible with DSD signals.

Such a STR compatible disk drive 3
Since 0 is connected to the STR 60 by the IEEE 1394 bus 116, reproduction output of CD, DVD, and SACD can be executed by the speaker system connected to the STR 60.

The same maker device 100 has STR 60, S
Being the same manufacturer as the TR compatible disc drive 30,
It is a digital AV device having a communication function compatible with the IEEE 1394 interface. Although there is no particular reference to the actual use of the same manufacturer device 100 here, for example, a CD player, an MD recorder / player, a digital V
It may be TR or the like. As compared with the STR-compatible disk drive 30 and the STR-compatible MD device 1 and the like, the same-manufacturer device 100 is not configured so as to have a system component function centered on the STR 60 in particular. different. However, commands that are valid only within the manufacturer (Vend
ER 60, STR compatible disk drive 30, S
It is possible to operate together with the TR-compatible MD device 1 so as to have a specific function defined by the manufacturer. Further, for example, if the STR 60 is manually operated so as to select and receive and input the data as the audio source transmitted from the device 100 of the same manufacturer, this can be monitored or recorded as voice. Is possible.

Another manufacturer's device 110 is also IEEE13
Although it is some kind of digital AV equipment having a communication function compatible with the 94 interface, the manufacturer is different from the STR 60 and STR compatible disk drive 30. The device 110 made by another manufacturer may actually be a CD player, an MD recorder / player, a digital VTR, or the like. However, as a general rule, the other-manufacturer device 110 cannot support the Vender Dependent Command defined by the STR 60 manufacturer.

Although not shown here, for example, each AV device shown in FIG. 1 is provided with a power outlet for inputting electric power from a commercial AC power source. Alternatively, the battery can be housed if the battery can be driven. That is, each device can independently obtain power.

1-2 STR (Front Panel) Next, as an external configuration of the STR 60 and the STR-compatible disk drive 30 that is a component system of the STR 60, which is the main component of the system shown in FIG. The respective front panel parts will be described.

FIG. 2 shows a state of the front panel portion of the STR60 main body. A power key 120 is provided on the lower left side of the front panel. By operating the power key 120, the power of the STR 60 is switched on / off. Note that the power-off state here refers to a so-called standby state in which the standby power source is operating, and is different from a state in which the commercial AC power source (or battery) is cut off, for example. In this respect, the same applies to the STR compatible disk drive 30 described below. Although detailed description is omitted here, the STR 60 also has a sleep mode for putting it in a sleep state.
Power saving is considered. A headphone jack 86 is provided on the left side of the power key 120.

A display portion 87 is arranged in the substantial center of the front panel. As the display unit 87 in this case, an FL tube display unit 87A mainly for displaying characters is used.
Is provided, and here, a display for 14 characters per line is performed. A segment display portion 87B is provided around the segment display portion, and although not shown, predetermined contents are displayed by the segment. A display key 127 is provided on the left side of the display unit 87. The display key 127 is basically for changing the display content on the display unit 75.

A jog dial 125 is provided on the right side of the FL tube display portion 87A, and a tuning mode key 121, a tuner key 122, a function / menu key 123, and an enter key 124 are provided above the jog dial 125. The tuning mode key 121 and the tuner key 122 are
These keys are related to the tuner function of the STR 60 and are used when switching between the reception band and the tuner mode. Also, the function / menu key 1
Reference numeral 23 is a key for performing function selection and menu selection, and the enter key 124 is used when performing a determination operation. Then, the jog dial 125 is used together with the above-mentioned keys under a predetermined operation procedure, whereby the user can actually perform various operations.

As an example, every time the function / menu key 123 is pressed, the FL tube display section 87 is displayed.
The display contents of A change by toggle like FUNCTION → SOUND → SETUP. And, for example, the FL tube display section 87A
When the jog dial 125 is rotated while FUNCTION is displayed, the selection of the source that the STR 60 inputs and outputs as monitor sound can be changed. At this time, on the FL tube display portion 87A,
The input source name currently selected according to the rotating operation of the jog dial 125 is displayed. By this operation, for example, tuner audio, analog input, optical digital input, and each source (device) input via the IEEE 1394 bus can be sequentially selected in a predetermined order. Note that, for example, keys such as the tuning mode key 121, the tuner key 122, the function / menu key 123, and the enter key 124 are provided with decorative LEDs on the back side thereof, and are lit or blinked according to the operating state or the like. It is also supposed to do.

The volume jog 126 is provided as a dial key for adjusting the audio signal level output from the STR 60, that is, the volume output from the speaker SP, for example.

1-3 STR Compatible Disk Drive (Front Panel) FIG. 3 shows the front panel portion of the STR compatible disk drive 30. First, a power key 150 for powering on / off (standby) is also provided on the lower left side of the front panel of the STR compatible disk drive 30.

The STR compatible disk drive 3
0, the front center of the front panel, CD, SACD,
A disc inserting / removing portion 159 for inserting / ejecting a disc as a DVD is provided. For example, a CD that is stored and loaded in the disc loading / unloading unit 159.
In order to eject the disc, etc., the eject key 151 arranged on the right side of the disc insertion / removal portion 159 is operated.

Below the disc insertion / removal section 159, for example, an FL tube display section 47A capable of displaying 14 characters per line.
And a display section 47 including a segment display section 47B. In this case, for the FL tube display unit 47A, for example, information indicating the reproduction status such as the track number and the reproduction time of the track reproduced on the currently loaded CD or the like, or the information such as the information recorded on the disc such as the CD is recorded. Text data etc. are displayed as characters. Further, the segment display section 47B shows a reproduction mode and the like. The display content of the FL tube display unit 47A is switched by the display unit 47.
This can be done by operating the display key 156 arranged on the left side of.

On the right side of the front panel, a CD
Play / Pause key 15
2, stop key 153, cue / fast forward / rewind key 15
4,155 are provided.

A hats key 157 is provided on the left side of the front panel. Hatskey 157 is HAT
An operation key for turning on / off the S function. HATS (Hi
gh quality digital audio transmission system) is a function to prevent deterioration of digital audio signal quality due to the influence of jitter of the transmission clock. For example ST
I from R compatible disk drive 30 to STR 60
When audio data is transmitted through the EEE1394 bus 116, fluctuations in the time axis direction occur in the received audio data on the STR 60 side due to jitter in the transmission clock. Therefore, on the STR 60 side, the received audio data is temporarily stored in the buffer memory based on the transmission clock and is read out based on the crystal system clock to eliminate the fluctuation of the audio data in the time axis direction. . When the HATS function is turned on, signals for flow control are exchanged between the STR compatible disk drive 30 and the STR 60.

Here, as can be seen from the states of the front panel shown in FIGS. 2 and 3, the STR 60 and the STR compatible disk drive 30 have the display portions 75 and 47 for their own, respectively. There is. In other words, for example, S
When a system including TR and STR compatible devices is considered as one audio component system, a display part integrated as this component system is not provided. This is related to the fact that the devices that are connected via, for example, IEEE 1394 are originally independent of each other.

1-4 STR (Internal) Next, the STR 60, STR compatible disk drive 30
Each internal configuration of will be described.

First, the block diagram of FIG. 4 shows an example of the internal structure of the STR 60. In the STR 60, an audio signal transmitted via the IEEE 1394 bus 116 as an audio source, an audio signal of a tuner included in itself, and an optical digital input terminal 67.
It is possible to input four types of external digital audio signals input from the analog input terminal 78 and external analog audio signals input from the analog input terminal 78.

IEEE 1394 interface 61
Are provided for transmitting / receiving data to / from other external devices via the IEEE 1394 bus 116. As a result, the STR 60 is configured to be able to send and receive AV data and various commands to and from the outside. With the IEEE1394 interface 61,
The packet received via the IEEE 1394 bus 116 is demodulated, and the data contained in the demodulated packet is extracted. Then, the extracted data is converted into data of a format suitable for internal data communication and output. For example, assume that audio data is transmitted from another AV device via the IEEE 1394 bus 116. IEEE1
The 394 interface 61 receives the transmitted audio data and demodulates the packet. Then, in the case where the transmission source device is considered as the STR compatible disk drive 30, C
When the reproduction data of D or DVD is received, for example, audio data TD in a digital audio data interface format called IEC60958
Convert to 1 and output. In this case, the audio data T
D1 is supplied to the demodulation processing unit 66. In the demodulation processing unit 66, for example, linear PCM data (PC
It is output to the PCM selector 69 as M1).

The external digital audio signal input from the optical digital input terminal 67 is also IEC609, for example.
The data is in the 58 format, and even when the data is input from the optical digital input terminal 67, it is demodulated by the demodulation processing unit 66 and is converted into linear PCM data (PCM1) by the PC.
It is supplied to the M selector 69.

The reproduction data of the SACD is encrypted and transmitted. In the IEEE 1394 interface 61, the SACD is transmitted via the IEEE 1394 bus 116.
When the playback data of is received, IEEE1394
The interface 61 performs packet demodulation processing, cryptanalysis processing, etc., and outputs a 1-bit quantized DSD signal TD3 by 64 fs, ΣΔ modulation. DSD signal TD3
Is supplied to the decimation filter 65, and the decimation filter 65 causes the linear PCM data (PCM
3) and is supplied to the PCM selector 69.

The PLL 63 generates a clock for packet demodulation processing based on the transmission clock. HATS mentioned above
When the function is off, the DSD signal TD3 based on the clock generated by the PLL 63, the IEC60958 data TD
1 is output. The RAM 62 functions as a transmission / reception data buffer in the IEEE1394 interface 61. The clock oscillator 64 generates a crystal clock.

When the above-mentioned HATS function is turned on, the reproduction data of CD and DVD is IEEE1.
When received by the 394 interface 61, the data is once written in the RAM 62 and then read out based on the crystal system clock from the clock oscillator 64. In particular, the IEEE1394 interface 61 is an IE
It also has a demodulation function for C60958 data. When this HATS is on, the data read from the RAM 62 is demodulated to obtain linear PCM data (PC
It is output as M2) and is supplied to the PCM selector 69. Also, when the HACD function is turned on and the SACD playback data is received by the IEEE 1394 interface 61, the data is temporarily R
After being written in the AM 62, it is read based on the crystal system clock from the clock oscillator 64. in this case,
The read DSD signal TD3 is supplied to the decimation filter 65, is converted into linear PCM data (PCM3) by the decimation filter 65, and is converted into PCM.
It is supplied to the selector 69.

The tuner section 77 is provided in the STR 60, performs radio channel selection, demodulation processing, and the like on the radio waves of the radio broadcast received by the antenna 76, and outputs them to the selector 79 as an analog audio signal, for example. The analog audio signal input via the analog audio signal input terminal 78 is also input to the selector 79.

In the selector 79, either the tuner section 77 or the analog audio signal input terminal 78 is selected as an input source under the control of the system controller 70, and the selected analog audio signal is A / D.
Supply to the converter 68. The A / D converter 68 converts the input analog audio signal into linear PCM data (PCM4) and supplies it to the PCM selector 69.

The PCM selector 69 controls the PCM 1, PCM 2, and PC in response to the control of the system controller 70.
Each linear PCM data shown as M3 and PCM4 is selected. That is, it is a selection for switching the input function. The linear PCM data selected by the PCM selector 69 is supplied to the audio decoder 80. The audio decoder 80 is a DSP (Digital Signal Proces).
The audio data is subjected to various required signal processing and speaker channel separation. Further, the output of the audio decoder 80 is subjected to equalizing processing and other sound field processing in the stream processor. Then, the audio data of, for example, 5 channels which has undergone the required signal processing is D /
The A converter 82 converts the analog audio signal into an analog audio signal, which is amplified by the power amplifier 83. Power amplifier section 8
The audio signal processed in 3 is supplied to the speaker unit SP connected to the speaker connection terminal 84 in the STR 80 and output as audio. In addition, this speaker unit SP
Is the speaker SP (FL), SP (FR), shown in FIG.
Although not shown, speaker connection terminals 84 correspond to SP (SL), SP (SR), and SP (C), and are provided corresponding to each speaker. The output of the power amplifier section 83 is also supplied to the headphone jack 86, which enables headphone output.

When the audio data input to the STR 60 is output to the external device by the IEEE 1394 bus 116, the data output from the audio decoder 80 is supplied to the IEEE 1394 interface 61 via the selector 85. . Alternatively, the output of the demodulation processing unit 66 is passed through the selector 85 to the IE
It is supplied to the EE1394 interface 61. In this case, the data supplied to the IEEE 1394 interface 61 is in the form of being subjected to a modulation process suitable for the format of a digital audio data interface such as IEC60953. IEEE
The E1394 interface 61 uses the RAM 62, for example, on the data thus supplied to perform necessary processing such as packetization, and the IEEE 1394 interface
Convert to a format compatible with the 1394 format. Then, transmission output is performed to the target device via the IEEE 1394 bus 116.

The system controller 70 is, for example, a CP.
It is configured by including a U (Central Processing Unit), ROM, RAM, flash memory, and the like, and executes various operation controls for the entire STR 60. The ROM stores programs for implementing various operations in the STR 60, and the RAM stores the system controller 7
Data and the like necessary for 0 to execute various processes are appropriately held.

A user interface 72 is connected to the system controller 70. The user interface 72 performs control corresponding to user operation and display output to the user. That is, information from the receiving unit 89 and the operating unit 88 is input to the user interface 72. For example, the receiving unit 89 receives a wireless command signal transmitted from the remote controller RM, and the received command signal is supplied to the system controller 70 via the user interface 72. The operation unit 88 is made up of various keys provided on the front panel as shown in FIG. 2, for example, and operation information according to an operation performed on the operation unit 88 is transmitted via the user interface 72 to the system. It is supplied to the controller 70. The system controller 70 executes various control processes so that the required operation in response to the command signal and the operation information input as described above can be obtained. The system controller 70 also displays the command signal and the operation information described above, and the user interface 7 so as to display the required contents according to the current operation status and the like.
Give instructions to 2. The user interface 72 executes display control on the display unit 87 in response to this. The display section 87 includes, for example, the FL tube display section 87A and the segment display section 87B as described above.

The IEEE 1394 controller 71 mainly controls the IEEE 1394 interface 61 and controls the communication operation by the IEEE 1394 bus 116. Also, authentication processing at the time of transmission by the IEEE 1394 system, generation of an encryption key, SRM (System Re
newability Messages: Information related to excluding devices unsuitable for copyright protection) -related processing, initial processing for the NV-RAM 74, format processing, and the like. The flash memory 93 is, for example, the IEEE1394 controller 7
No. 1 operation program is stored. For example, a program for authentication processing between devices is stored. Further, as will be described later, a program for initialization processing for the NV-RAM 74 executed when the power is turned on, and a format processing program for initializing the NV-RAM 74 at the time of factory shipment are also stored. The device ID information (node unique ID, etc.) uniquely assigned to the device is also stored.

Since the NV-RAM (nonvolatile memory) 74 is a storage area capable of retaining data even when the power is turned off, various control constants set, SRM data, and See are set.
d data (information serving as seeds of random numbers for generating an encryption key for encrypting content data), electronic signature data as a license device, and the like are stored. RAM75 is I
Used by the EEE1394 controller 71 in a work area or the like. The DSP 73 performs processing such as authentication and interpretation of a format trigger described later. In addition, NV-RAM7
4, RAM75, flash memory 93 is IEEE13
It may be formed as a storage area inside the chip as the 94 controller 71, or may be a separate chip.

The IEEE 1394 interface 61 also receives data such as commands and responses transmitted from external devices, or transmits commands and responses to external devices. IE
The EE1394 controller 71 also executes necessary processing for the transmission / reception processing of this command and response.

1-5 STR Compatible Disk Drive (Internal) Next, the internal structure of the STR compatible disk drive 30 will be described with reference to the block diagram of FIG. CD, SAC
By inserting the disc 91 such as a D or a DVD from the disc insertion / removal portion 159 of the main body front panel described above,
It is loaded in the reproducible position. The disc 91 loaded in the reproducible position is rotationally driven by the spindle motor 31 at a constant linear velocity (CLV) during the CD reproducing operation. Then, the data recorded in the pit form (embossing pits, phase change pits, dye change pits, etc.) on the disk 91 is read by the optical head 32 and supplied to the RF amplifier 35. In the optical head 32, the objective lens 32a is held by the biaxial mechanism 32b and can be displaced in the tracking and focusing directions. Further, the optical head 32 can be moved in the radial direction of the disk 91 by the sled mechanism 34.

In the RF amplifier 35, in addition to the reproduced RF signal,
A focus error signal and a tracking error signal are generated, and these error signals are supplied to the servo circuit 36. The servo circuit 36 generates various drive signals such as a focus drive signal, a tracking drive signal, and a sled drive signal from the focus error signal and the tracking error signal, and controls the operations of the biaxial mechanism 32b and the sled mechanism 34. That is, the focus servo control and the tracking servo control are executed. The reproduction RF signal binarized by the RF amplifier 35 is also output to the timing generator 40, and the timing generator 40 generates a timing signal based on the waveform timing of the reproduction RF signal. Output to the CLV processor 41. The CLV processor 41 generates a drive signal for controlling the rotation of the spindle motor 31 at a required CLV speed based on the input timing signal, and supplies the drive signal to the spindle motor. As a result, spindle servo control for rotationally driving the disk 91 by CLV is executed. Further, for the servo circuit 36 and the timing generator 40, spindle start / stop, each servo setting, track jump,
The system controller 50 controls so as to perform access and other necessary processing.

The reproduced RF signal is transmitted to the DSD decoder 37, AV
It is supplied to the decoder 38. The system controller 50 controls so that the AV decoder 38 functions when reproducing a CD or a DVD, and the DSD decoder 37 functions when reproducing an SACD. The AV decoder 38 reproduces a binarized reproduction signal (EF) reproduced from the CD.
EFM demodulation, error correction decoding, descrambling, etc. are performed on the M signal). In addition, an EFM is applied to a binarized reproduction signal (EFM + modulation signal) reproduced from a DVD.
+ Demodulation, error correction decoding, descrambling, etc. For example, 16-bit quantization, 44.1KHz
The audio data in the sampling format is decoded and supplied to the IEEE 1394 interface 39. The AV decoder 38 also has a function as a video decoder, and also decodes a video signal when reproducing a DVD. The decoded video signal is supplied from the video output terminal 53 to a video monitor device (not shown) and is output as a video.

The DSD decoder 37 decodes the DSD signal from the binarized reproduced signal reproduced from the SACD. DSD signal is IEEE1394 interface 3
9 is supplied. In some SACDs, the recording surface is a disc having a two-layer structure, one layer of which records DSD format data and the other layer of which records CD format data. CD
When the layer in which the system data is recorded is reproduced, the decoding process is performed in the AV decoder 38.

Further, the AV decoder 38 and the DSD decoder 3
In No. 7, the control data such as subcode can be extracted. Further, for example, the TOC (Tab
le Of Contents) information is also extracted. These sub-code data and TOC are supplied to the system controller 50 and used, for example, for various controls.

The reproduced RF signal binarized by the RF amplifier 35 is also supplied to the PLL circuit 55.
The PLL circuit 55 outputs a clock synchronized with the channel bit of the input EFM signal. This clock is used as a clock for the signal processing circuit system after the DSD decoder 37 and the AV decoder 38, for example.

The audio data decoded and input to the IEEE 1394 interface 39 is IEEE
Converted to data compatible with the 1394 format,
It is transmitted and output to an external device via the IEEE 1394 bus 116. When transmitting and outputting DSD data, the IEEE1394 controller 51
Encryption will be performed with the encryption key instructed by. Although not shown, a digital interface and an optical digital output terminal are provided, and the AV decoder 38 or DS
The audio data output from the D decoder 37 may be output as digital data. Also, D / A
A converter and an analog output terminal may be provided to convert the decoded audio data into an analog audio signal and output the analog audio signal to an external device.

The system controller 50 includes a CPU and R
A microcomputer equipped with AM, ROM, etc.,
It controls the various operations described above. The ROM stores programs and the like for realizing various operations in the STR compatible disk drive 30, and the RAM appropriately holds data and programs and the like required for the system controller 50 to execute various processes. .

When the disc 91 is reproduced, the disc 91
It is necessary to read the management information, that is, the TOC recorded in the above. The system controller 50 determines the number of tracks recorded on the disk 91, the address of each track, etc. according to the management information, and controls the reproduction operation. Therefore, the system controller 50 uses the disk 91
Is read by executing a reproducing operation on the innermost circumference side (lead-in area) of the disc on which the TOC is recorded when the is loaded, and the TOC information is extracted as described above. Then, this TOC is stored in, for example, an internal RAM or the like so that it can be referred to during the reproducing operation for the disc 91 thereafter.

An IEEE 1394 controller 51 and a user interface 52 are connected to the system controller 50 so that they can communicate with each other. The user interface 52 performs control corresponding to user operation and display output to the user. That is, for the user interface 52, the receiving unit 4
5 and the information from the operation unit 48 is input. For example, the receiving unit 45 receives a wireless command signal transmitted from the remote controller RM, and the received command signal is supplied to the system controller 50 via the user interface 52. Operation unit 48
Is composed of various keys provided on the front panel as shown in FIG. 3, for example, and operation information corresponding to an operation performed on the operation unit 48 is transmitted to the system controller 50 via the user interface 52. Supplied. The system controller 50 executes various control processes so that the required operation in response to the command signal and operation information input as described above can be obtained. Further, the system controller 50 gives an instruction to the user interface 52 so that, for example, the above-mentioned command signal and operation information, and the required content according to the current operation status and the like are displayed. The user interface 52 executes display control on the display unit 47 accordingly. For example, the display unit 47 displays various information such as the total playing time of the disc, time information such as progress time during playback and recording, track number, name information such as disc name and track name, operating state, operating mode, and the like. Be done. As described above, the display section 47 includes the FL tube display section 47A and the segment display section 47B, for example.

The IEEE 1394 controller 51 mainly controls the IEEE 1394 interface 61, and controls the communication operation by the IEEE 1394 bus 116. It also performs authentication processing at the time of transmission by the IEEE 1394 system, encryption key generation, SRM-related processing, initial processing for the NV-RAM 43, format processing, and the like. The flash memory 54 is, for example, an IE.
The operation program of the EE1394 controller 51 is stored. For example, a program for authentication processing between devices is stored. Further, as will be described later, a program for initialization processing for the NV-RAM 43 executed when the power is turned on, and a format processing program for initializing the NV-RAM 43 at the time of factory shipment are also stored. The device ID information (node unique ID, etc.) uniquely assigned to the device is also stored.

Since the NV-RAM (nonvolatile memory) 43 is a storage area capable of retaining data even when the power is turned off, various control constants set, SRM data, and See are set.
d data, electronic signature data as a licensed device, and the like are stored. The RAM 44 is used by the IEEE 1394 controller 71 as a work area or the like. The DSP 42 performs authentication, a process of interpreting a format trigger described later, and the like. The NV-RAM 43, the RAM 44, and the flash memory 54 may be formed as a storage area inside the chip as the IEEE 1394 controller 51.
It may be a separate chip.

The IEEE 1394 interface 39 also receives data such as commands and responses sent from external devices, or sends commands and responses to external devices. IE
The EE1394 controller 51 also executes necessary processing for the transmission / reception processing of this command and response.

2. Data Communication 2-1 of the Present Embodiment by IEEE 1394 Outline Hereinafter, data communication according to the IEEE 1394 standard as the present embodiment will be described.

IEEE 1394 is one of the standards for serial data communication. As a data transmission method according to IEEE 1394, Isoch that periodically communicates is used.
There are a ronous communication system and an Asynchronous communication system that communicates asynchronously regardless of this cycle. In general, the Isochronous communication method is used for transmitting / receiving data, and the Asynchronous communication method is used for transmitting / receiving various control commands. And
Transmission and reception can be performed by these two types of communication methods using one cable. Therefore, hereinafter, the description will be made on the premise of the transmission form of the present embodiment based on the above-mentioned IEEE 1394 standard.

2-2 Stack Model FIG. 6 shows an IEEE 1394 stack model to which this embodiment corresponds. In the IEEE 1394 format, the Asynchronous system (40
0) and Isochronous system (500). Here, Asynchronous system (400)
And the Physical layer (301) in the lowest layer as a layer common to the Isochronous system (500)
(Physical layer) is provided, and Link Layer is provided above it.
r (302) (link layer) is provided. Physic
al Layer (301) is a layer for controlling hardware-like signal transmission, and is a Link Layer.
(302) is a layer having a function of converting the IEEE 1394 bus into, for example, an internal bus specified for each device.

Physical Layer (30
1), Link Layer (302), and Transaction Layer (401) described next.
Is Event / Control / Configura
Line of Serials by Serial Bus Ma
Linked with the management 303. Also, AV
Cable / Connector 304 indicates a physical connector and cable for AV data transmission.

A Transaction Layer (401) is provided above the Link Layer (302) in the Asynchronous system (400). Transaction Layer (4
01) is a layer that defines a data transmission protocol as IEEE 1394, and is a basic Asyncron.
As for the OutTransaction, as described later, WriteTransaction, Rea
d Transaction, Lock Transa
The action is defined.

Then, the Transaction Lay
er (401) upper layer FCP (Function Contro
Protocol (402) is defined. FCP (40
2) is the AV / C Command (AV / C Digital Inte
By using the control command defined as rface Command Set) (403), command control for various AV devices can be executed.

In addition, the Transaction Layer
Connection to the upper layer of r (401)
Management Procedures (50
5), using the Plug (IEEE 1394) described later.
Pl for setting the logical device connection relationship in
ug Control Registers (40
4) is specified.

The CI above the Link Layer (302) in the Isochronous system (500) is a CI.
P Header Format (501) is defined, and this CIP Header Format (50) is defined.
SD-DVCR Realt managed by 1)
image Transmission (502), HD-
DVCR Realtime Transmissio
n (503), SDL-DVCR Realtime
Transmission (504), MPEG2-T
S Realtime Transmission (5
05), Audio and Music Realti
A transmission protocol such as me Transmission (506) is defined.

SD-DVCR Realtime Tr
enmission (502), HD-DVCR R
ealtime Transmission (50
3), SDL-DVCR Realtime Tran
The missions (504) are digital V
It is a data transmission protocol compatible with TR (Video Tape Recorder). SD-DVCR Realtime T
The data handled by the transmission (502) is S
D-DVCR recording format (5
08) data sequence (SD
-DVCR data sequence (507))
It is said that Also, HD-DVCR Realtime
The data handled by Transmission (503) is
HD-DVCR recording format
The data sequence (SD-DVCR data sequence (50
9)). SDL-DVCR Realtime
The data handled by the Transmission (504) is SDL-DVCR recording form.
A data sequence (SD-DVCR data sequence (5
11)).

MPEG2-TS Realtime T
The transmission (505) is a transmission protocol compatible with, for example, a tuner compatible with digital satellite broadcasting, and the data handled by this transmission is DVB recordin.
g format (514) or ATV recorder
data sequence (MPEG2-TS data) obtained in accordance with the rule of ding format (515).
sequence (513)).

Also, Audio and Music
Realtime Transmission (50
6) is a transmission protocol that is compatible with all digital audio devices including the MD system of this embodiment, and the data handled by this is Audio and Mus.
ic recording format (517), the data sequence obtained according to the standard (Audio)
and Music data sequence).

2-3 Signal Transmission Mode FIG. 7 shows an example of the structure of a cable actually used as the IEEE 1394 bus. In this figure, the connectors 600A and 600B are connected via a cable 601, and here, the connectors 600A and 600B are connected together.
The case where 6 pins of pin numbers 1 to 6 are used as the 00B pin terminals is shown. Connector 600A, 600
Regarding each pin terminal provided in B, the pin number 1 is the power source (VP), the pin number 2 is the ground (VG), the pin number 3 is TPB1, the pin number 4 is TPB2, and the pin number 5 is T.
PA1 and pin number 5 are TPA2. And
The connection form of each pin between the connectors 600A and 600B is as follows: pin number 1 (VP) -pin number 1 (VP) pin number 2 (VG) -pin number 2 (VG) pin number 3 (TPB1) -pin number 5 ( TPA1) Pin No. 4 (TPB2) -Pin No. 6 (TPA2) Pin No. 5 (TPA1) -Pin No. 3 (TPB1) Pin No. 6 (TPA2) -Pin No. 3 (TPB2). Then, a signal is differentially generated by a set of two twisted wires of pin number 3 (TPB1) -pin number 5 (TPA1) pin number 4 (TPB2) -pin number 6 (TPA2) of the above-mentioned pin connection set. A signal line 601A for mutually transmitting the signal is formed, and a pair of two twisted wires of pin number 5 (TPA1) -pin number 3 (TPB1) pin number 6 (TPA2) -pin number 3 (TPB2) are used to differentially A signal line 601B for mutually transmitting signals is formed.

The above two sets of signal line 601A and signal line 60
The signals transmitted by 1B are the data signal (Data) shown in FIG. 8A and the strobe signal (Strobe) shown in FIG. 8B. The data signal shown in FIG. 8A is output from TPB1 and TPB2 using one of the signal line 601A and the signal line 601B and input to TPA1 and TPA2. The strobe signal shown in FIG. 8B is a signal obtained by performing a predetermined logical operation on the data signal and the transmission clock synchronized with the data signal, and has a frequency lower than the actual transmission clock. Have.
This strobe signal is the signal line 601A or the signal line 60.
Of the 1B, the other signal line not used for data signal transmission is used to output from TPA1 and TPA2.
Input to 1 and 2.

For example, the data signal and the strobe signal shown in FIGS. 8A and 8B are IEEE 1394.
If it is input to a corresponding device, this device performs a predetermined logical operation on the input data signal and strobe signal to generate a transmission clock (Clock) as shown in FIG. 8C. And used for required input data signal processing. In the IEEE 1394 format, by adopting such a hardware-like data transmission form, it is not necessary to transmit a transmission clock having a high-speed cycle between devices by a cable, and reliability of signal transmission is improved. In the above description, the specification of 6-pin has been described, but in the IEEE 1394 format, the power supply (VP) and the ground (VG) are omitted, and the 4-pin including only the signal line 601A and the signal line 601B which are two twisted lines. There is also a specification of. For example, in the MD recorder / player 1 of the present embodiment, in actuality, it is considered that a simpler system can be provided to the user by using the 4-pin specification cable.

2-4 Bus Connection Between Devices FIG. 9 schematically shows an example of the form of connection between devices by the IEEE 1394 bus. In this figure, devices A, B,
Five devices (Node) of C, D and E are IEEE139
It is shown that they are interconnected by four buses (that is, cables). IEEE 1394
In the interface, I like devices A, B, C
The so-called "daisy chain connection" in which serial connection is made possible by the EEE1394 bus. In addition, FIG.
In this case, as shown in the connection form between the device A and the devices B, D, and E, so-called “branch connection” in which a certain device and a plurality of devices are connected in parallel is also possible. As a whole system, this branch connection and the above daisy chain connection are used together for a maximum of 63 devices (Node)
Can be connected. However, depending on the daisy chain connection, up to 16 units (16 pops) can be connected. Also, the terminator needed for SCSI is not needed for the IEEE 1394 interface. The IEEE 1394 interface enables mutual communication between the devices connected by the daisy chain connection or the branch connection as described above. That is, in the case of FIG. 9, the device A,
Mutual communication is possible between arbitrary devices among B, C, D, and E.

Further, in a system in which a plurality of devices are connected by the IEEE 1394 bus (hereinafter also referred to as an IEEE 1394 system), the number assigned to each device is No.
The process of setting the deID is actually performed. This process is schematically shown in FIG. Here, FIG.
In the IEEE 1394 system according to the connection form shown in Fig. 3, the cable is connected / disconnected, the power of a certain device in the system is turned on / off, and PHY (Physical Layer Protocol)
If there was a spontaneous generation process in IEEE 139
A bus reset occurs in the four systems. This allows the equipment A, B, C, D, and E to be connected between the IEEE
A process of issuing a bus reset notification to all devices via the 1394 bus is executed.

As a result of this bus reset notification, FIG.
As shown in (b), the parent-child relationship is defined between the adjacent device terminals by performing communication (Child-Notify).
That is, the Tree structure between the devices in the IEEE 1394 system is constructed. Then, the device as the root is defined according to the result of the construction of the Tree structure.
The root is a device in which all terminals are defined as children (Ch; Child), and in the case of FIG. 10B, the device B is defined as the root. Conversely speaking, for example, the terminal of the device A connected to the device B as the route is defined as the parent (P; Parent).

When the Tree structure and route in the IEEE 1394 system are defined as described above, then, as shown in FIG. 10C, each device self-declares Self Node-ID as a declaration. -The ID packet is output. Then, the root sequentially grants to this Node-ID, so that the IE
The address of each device in the EE1394 system, that is, the Node-ID is determined.

In the 2-5 packet IEEE 1394 format, as shown in FIG. 12, the Isochronous cycle (nomi) is used.
The transmission is performed by repeating the cycle of the null cycle). In this case, 1Isochronous cy
cle is 125 μsec, and the band is 100
Equivalent to MHz. In addition, Isochronous c
It is specified that the cycle of cycle may be other than 125 μsec. And this Isochr
Data is packetized and transmitted for each individual cycle.

As shown in this figure, Isochrono
At the beginning of us cycle, 1Isochronou
Cycle Start indicating the start of s cycle
Packet is placed. This Cycle Star
Although not described in detail here, t Packet is an IEEE defined as Cycle Master.
The generation timing is instructed by a specific device in the E1394 system. Cycle Start P
Following acket, IsochronousPac
The ket is preferentially arranged. Isochronous
As shown in the figure, the packet is packetized for each channel and then arranged and transferred in a time-division manner (Isochronous subactions).
Also, Isochronous subactions
Isochron is used as a delimiter for each packet in
A pause period called "ous gap" (for example, 0.05μ)
sec) is provided. In this way, IEEE 1394
In the system, one transmission line is used for Isochron
It is possible to send and receive nous data in multiple channels.

Here, as an example, the compressed audio data compressed by a certain predetermined compression method is isochronous.
When considering transmission by the nous method, this compressed audio data has a transfer rate of 1.4 Mbp at a 1 × speed.
s is 125 μsec, 1 Isoch
At least about 20 bytes of compressed audio data is isochronized in every noon cycle.
If it is transmitted as a "noose packet", time-series continuity (real-time property) will be secured. For example, when a certain device transmits the compressed audio data, detailed description thereof will be omitted here.
IRM (Isochronous Resource Mana) in 394 system
ger), the size of the Isochronous packet is required to ensure real-time transmission of compressed audio data. In the IRM, the current data transmission status is monitored and permission / non-permission is given, and if the permission is given, the compressed audio data can be packetized into an Isochronous Packet and transmitted by the designated channel. This is IEEE13
This is called bandwidth reservation in the 94 interface.

Within the bandwidth of the Isochronous cycle, the Isochronous subacti
Async using the remaining bandwidth that is not used by ons
hornous subactions, ie Asyn
Chronous packet transmission is performed. In FIG. 11, two As of Packet A and Packet B are
An example in which an asynchronous packet is transmitted is shown. Asynchronous Pac
After ket, ack gap (0.05 μsec)
A signal called ACK (Acknowledge) accompanies the rest period. ACK is sent to As as described below.
In the process of asynchronous transaction, in order to notify the transmitting side (Controller) that there has been reception of some Asynchronous data, the receiving side (Target)
This is the signal output from t). Also, Asynchr
Before and after a data transmission unit consisting of an ou
A rest period called a "action gap" is provided.

2-6 Transaction Rule In the process transition diagram of FIG. 12 (a), Asyncrono
A basic communication rule (transaction rule) in the us communication is shown. This transaction rule is defined by the FCP. As shown in FIG. 12A, first, in step S11, the Requester
The (transmission side) transmits a Request to the responder (reception side). In the responder,
When this Request is received (step S12),
First, Acknowledge is returned to the Requester (step S13). On the sending side, Acknow
By receiving the "edge", the reception side recognizes that the request has been received (step S14). After this, the responder responds to the request received in step S12 with the response
nse to the Requester (step S1)
5). In the Requester, the Response is received (step S16), and in response to this, the Response
Acknowledge is transmitted to der (step S17). Acknowledge in responder
By receiving the edge, it is recognized that the Response has been received by the transmission side.

Req transmitted according to FIG. 12 (a).
FIG. 12 shows the west Transaction.
As shown on the left side of (b), Write Requests
t, Read Request, Lock Request
It is roughly classified into three types, st. Write
Request is a command for requesting data write, and Read Request is a command for requesting data read. Lock Request
, Detailed description is omitted here, but swap com
Commands for pare, mask, etc.

The Write Request is an Asynchronous Pac which will be illustrated and described later.
Three types are further defined according to the data size of the command (operand) stored in the ket (AV / C Command Packet). Write Req
ueest (data quadlet) is Async
The command is transmitted only by the header size of the hornous Packet. Write Request
(Data block: data length = 4
byte), Write Request (data
block: data length ≠ 4 bytes)
Is for transmitting a command by adding a data block to the header as an Asynchronous Packet, and the two differ depending on whether the data size of the operand stored in the data block is 4 bytes or more.

Similarly for Read Request,
Stored in Asynchronous Packet o
Read Re according to the data size of "perand"
quest (data quadlet), Read
Request (datablock: data le
ngth = 4 bytes), Read Request
(Data block: data length ≠ 4
3) are defined.

In addition, the Response Transac
12ion is shown on the right side of FIG. For the three types of Write Requests described above, Write Response or No Re
sponse is defined. In addition, Read Request
Rea for est (data quadlet)
d Response (data quadlet) is defined, and Read Request (data blo
ck: data length = 4 bytes) or R
ead Request (data block: da
Rea for (ta length ≠ 4 bytes)
d Response (datablock) is defined.

For Lock Request, L
ock Response is defined.

2-7 Addressing FIG. 13 shows the addressing structure of the IEEE 1394 bus. As shown in FIG. 13A, IEEE
In the 1394 format, 64 bits are prepared as a bus address register (address space). The upper 10-bit area of this register is IEEE1394
A bus ID for identifying the bus is shown. As shown in FIG. 13B, bus # 0 to # 1022 are set as the bus ID.
It is possible to set a total of 1023 bus IDs. bus
# 1023 is defined as a local bus.

In FIG. 13A, the 6-bit area following the bus address is the IEEE indicated by the bus ID.
Node of the device connected for each E1394 bus
Indicates an ID. As shown in FIG. 13C, the Node ID is Nod 63 of Nodes # 0 to # 62.
e ID can be identified. Bus ID and No.
The 16-bit area indicating the de ID is an AV described later.
This is equivalent to the destination ID in the header of / C Command Packet, and the bus ID and Node ID specify the device connected to a certain bus on the IEEE 1394 system.

In FIG. 13A, the 20-bit area following the Node ID is a register space.
And 28 following this register space
The area of the bits is the register address. The maximum value of register space is [F
FF FFh], and the reg shown in FIG.
13E, and the contents of this register are defined as shown in FIG. register
er address specifies the address of the register shown in FIG.

Briefly, in the register of FIG. 13E, for example, the address 512 [00 00 02
Serial Bus-depen starting from 00h]
By referring to dent Registers, Is
The cycle time of the ocronous cycle,
Information on the free channels is obtained. Also, the address 10
Config starting from 24 [00 00 04 00h]
The Guration ROM contains a Node Unique
Required information regarding Node such as e ID and subunit ID is stored. These Node Uni
The que ID and the subunit ID are necessary for establishing the connection relationship when the device is actually connected to the IEEE 1394 bus.

The Node Unique ID is device information that is unique to each device and is represented by 8 bytes. Even if the devices are of the same model, the same N
It is assumed that there is no other device having an ode Unique ID.

Further, as the subunit ID, Vend indicating the manufacturer name of the device as the Node is displayed.
er Name (module_vender_ID) and Model Name (model_) that indicates the model name of the device as the Node.
It is formed with information such as ID).

The Node Unique ID is unique for each device and is device identification information expressed by 8 bytes. Even if the devices are of the same model, there is no device having the same Node Unique ID. To be done. The Vender Name is information indicating the manufacturer name of the Node, and the Mode
l Name is information indicating the model of the Node. Therefore, these Vender Name and Mod
There will be devices that have a common el Name. Therefore, by referring to the contents of the Configuration ROM, the Node attached to the model
Unique ID can be identified, and s
The manufacturer of the Node, the model, and the like can be identified from the contents of the subunit ID. The Node Unique ID is indispensable, whereas the Vender Name and Model Name are required.
Is an option, and is not necessarily set for the device.

2-8 CIP (Common Isochronos Packe)
t) FIG. 14 shows the structure of a CIP (Common Isochronos Packet). That is, the Isochron shown in FIG.
It is a data structure of an ous Packet. The first 32 bits (1 quadlet) of the CIP is a 1394 packet header. In the 1394 packet header, a 16-bit area in order from the higher order is data_Len.
gth, a subsequent 2-bit area is tag, a subsequent 6-bit area is channel, a subsequent 4-bit area is tcode, and a subsequent 4-bit area is sy. The area of 1 quadlet following the 1394 packet header is head.
er_CRC is stored.

2 quadl following header_CRC
The area of et becomes the CIP header. The upper 2 bits of the upper quadlet of the CIP header are respectively "0".
"0" is stored, and the subsequent 6-bit area indicates the SID (transmission node number). The 8-bit area following the SID is D
It is BS (data block size) and indicates the size of the data block (unit data amount of packetization). Next, areas of FN (2 bits) and QPC (3 bits) are set, FN indicates the number of divisions when packetizing, and QPC adds qu added for division.
The number of adlets is shown. The flag of the header of the source packet is shown in SPH (1 bit), and the value of the counter for detecting packet loss is stored in DBC.

“0” 0 ”is stored in each of the upper 2 bits of the lower quadlet of the CIP header. Following this, areas of FMT (6 bits) and FDF (24 bits) are provided. The FMT shows a signal format (transmission format), and the value shown here makes it possible to identify the data type (data format) stored in the CIP. Specifically, MPEG
It is possible to identify stream data, audio stream data, digital video camera (DV) stream data, and the like. The data format indicated by this FMT is, for example, the CIP Header shown in FIG.
SD-DVCR managed by Format (401)
Realtime Transmission (50
2), HD-DVCR Realtime Trans
mission (503), SDL-DVCR Rea
ltime Transmission (504), M
PEG2-TS Realtime Transmis
sion (505), Audio and Music
Realtime Transmission (50
6) and other transmission protocols. The FDF is a format-dependent field, and is an area indicating a further subdivided classification of the data format classified by the FMT. If the data is audio data, for example, is it linear audio data, MID
It is possible to identify whether the data is I data.

Here, for example, when the FMT indicates MPEG, the FDF stores synchronization control information called TSF (time shift flag).
In addition, DVCR (digital video camera) by FMT
, The FDF is defined as shown at the bottom of FIG. Here, from the top, 5
0/60 (1 bit) defines the number of fields per second, and STYPE (5 bits) indicates whether the video format is SD or HD.
T indicates a time stamp for frame synchronization.

Following the CIP header, FMT, F
The data indicated by DF is stored by a sequence of n data blocks. Then, data_CRC is arranged at the end following the data block.

2-9 Connection Management "Plug" in the IEEE1394 format
According to the logical connection concept called IEEE 1394
The connection relationship between the devices connected by the bus is specified. FIG. 15 shows an example of the connection relationship defined by the plugs. In this case, the VTR1, VTR2, set top box (ST
B: Digital satellite broadcasting tuner), monitor device (Mon)
itor) and a digital still camera (Camer)
The system configuration to which a) is connected is shown.

Here, as the connection form by the IEEE 1394 plug, a point-to-point-c is used.
connection and broadcastcast conn
There are two forms, section. point
The to point-connection is a connection mode in which the relationship between the transmitting device and the receiving device is specified, and data transmission is performed between the transmitting device and the receiving device using a specific channel. On the other hand, broadc
In the ast connection, the transmitting device transmits without specifying the receiving device and the used channel. On the receiver side, reception is performed without particularly identifying the transmitting device, and if necessary, required processing according to the content of the transmitted data is performed. In the case of FIG. 15, point to point-connec
The STB is set to transmit and the VTR1 is set to receive data by using channel # 1, and the digital still camera is set to transmit and VTR2 is set to receive channel # 2. Are set to be used for data transmission. Also, from a digital still camera, b
A state in which the data is also set to be transmitted by the loadcast connection is shown. Here, the broadcast connection is shown.
The case where the monitor device receives the data transmitted by the command and performs the required response processing is shown.

The above-mentioned connection form (plug) has a PCR (Plug Cont) provided in the address space of each device.
orol Register). FIG. 16A shows
oPCR [n] (plug control register for output)
16B shows the structure of iPCR [n] (input plug control register).
Both oPCR [n] and iPCR [n] have a size of 32 bits. In the oPCR of FIG. 16A, for example, when “1” is stored for the on-line of the upper 1 bit, the plug is Isochr.
It is shown that it is possible to send once data online, followed by broadcastcast connecti
When “1” is stored in on counter (1 bit), it indicates that the transmission is by broadcast connection. Continue to point to
point connection counter
In (6 bits), p that is set for the plug
The number of point to point connections is indicated. Then, it is indicated that the transmission is performed by the channel indicated by the channel number in the area of the 6th bit from the 11th most significant bit. In addition, FIG.
Also in the iPCR of (b), for example, the upper 1 bit o
If "1" is stored for the n-line, it indicates that the plug is online capable of receiving Isochronous data, and the subsequent broadcasts
tconnection counter (1 bit)
If '1' is stored in, the broadcastcast co
It is indicated that the transmission is based on the connection. Continued point to point connection
n counter (6 bits) is a point to point co that is set for the plug.
The number of connections is shown, and it is shown that transmission is performed by the channel indicated by the channel number in the 6-bit area from the 11th most significant bit.

Then, the broadcastcast c in the oPCR of FIG. 16 (a) and the iPCR of FIG. 16 (b).
The connection counter has a broad
In case of transmission / reception by cast connection, broadcast cast connec
Stores the number of nodes that are running a section. In addition, the point-to-point connect in the oPCR of FIG. 16 (a) and the iPCR of FIG. 16 (b).
The ion counter has a point to po
In the case of transmission / reception by int connection, the number of nodes that have a point to point is indicated.

2-10 Command and Response in FCP Data transmission by Asynchronous communication is as follows.
It will be defined by the FCP (402) shown in FIG. Therefore, here, a transaction defined by the FCP will be described.

As the FCP, Asyncronou
Write Transac specified in s communication
section (see FIG. 12) is used. Therefore, the transmission of the AUX data in the present embodiment also uses the FCP to execute the Write in the Asynchronous communication.
It is performed by using Transaction. The device that supports FCP is Command
/ Response register, and then Command / Response as described with reference to FIG.
A transaction is realized by writing Message to the register.

In the process transition diagram of FIG. 17, first, CO
As a process for MMAND transmission, as shown in step S21, the Controller is Transa
Generate a request for action and write
The process of transmitting a Request Packet to the Target is executed. In Target, as Step S22, this Write Request Pa
Command / Response by receiving ccket
Data is written to the e register. At this time, the Target sends an Acknowledge to the Controller to control the Controller.
At r, this Acknowledge is received (S23).
→ S24). The series of processing up to this point is COMMAND
The process corresponds to the transmission of.

Then, in response to COMMAND, R
As a process for ESPONSE, Target sends a Write Request Packet (S25). The Controller receives this and writes data to the Command / Response register (S26). Also, Cont
In the Roller, Write Request Pa
Ack for Target in response to receipt of Ccket
Now known is transmitted (S27). In Target, by receiving this Acknowledge, Wr
ite Request Packet is Contro
Know that it has been received by the ller (S28). That is, CO from Controller to Target
The MMAND transmission process and the RESPONSE transmission process from the Target to the Controller in response to this are performed by the FCP data transmission (Transacti).
on) is the basis.

2-11 AV / C Command Packet As described with reference to FIG. 6, Asynchronous
In communication, the FCP is adapted to communicate with various AV devices using AV / C commands. Writ in Asynchronous communication
The three types of transactions, e, Read, and Lock, are defined as described in FIG. 12, and in reality, Write Req corresponding to each transaction is specified.
uest / Response Packet, Read
Request / Response Packet,
Lock Request / Response Pac
ket is used. The FCP uses the Write Transaction as described above. Therefore, FIG. 18 shows Write Requests.
t Packet (Asynchronous Packet (Write Reques
t for Data Block)) format. In the present embodiment, this Write Request Pack
That is, et is used as an AV / C command packet.

This Write Request Pac
upper 5 quadlet in the ket (first to fifth qu
addlet) is a packet header. The first quadlet of the packet header
The upper 16-bit area in is the destination
The n_ID indicates the NodeID of the data transfer destination (destination). The subsequent 6-bit area is tl (transact label) and indicates a packet number. The next 2 bits are rt (retry c
ode), indicating that the packet is the first transmitted packet or a retransmitted packet. In the subsequent 4-bit area, tcode (transaction code) indicates a command code. Then, the subsequent 4-bit area is pri (pri
ority) and indicates the priority of the packet.

The upper 16-bit area in the second quadlet is the source_ID, which indicates the Node_ID of the data transfer source. Also, the second quadl
The lower 16 bits in et and the entire 3rd quadlet have a total of 48 bits in the destination_offse.
t, and the COMMAND register (FCP_COMM
AND register) and the address of the RESPONSE register (FCP_RESPONSE register) are shown. Above destination_
ID and destination_offset are I
It corresponds to a 64-bit address space defined in the EEE1394 format.

The upper 16-bit area of the fourth quadlet is used as data_length, and will be described later in data.
The data size of afield (area surrounded by a thick line in FIG. 18) is shown. The subsequent lower 16-bit area is an extended_tcode area,
This is an area used when extending tcode.

The 32-bit area as the fifth quadlet is header_CRC, and is a packet.
A CRC calculation value for checking the header is stored.

6q following Packet header
A data block is arranged from the uadlet, and datafi is assigned to the head in this data block.
eld is formed. In the upper 4 bits of the sixth quadlet, which is the first datafield, the CTS (C
ommand and Transaction Set) is described. this is,
It indicates the ID of the command set of the Write Request Packet. For example, if the value of this CTS is set to [0000] as shown in the figure, d
The contents described in the atafield are defined as AV / C commands. That is, this Wr
The item Request Packet indicates that the packet is an AV / C command packet. Therefore, in this embodiment, since the FCP uses the AV / C command, [0000] is described in this CTS.

The 4-bit area following CTS is ctyp
e (Command type; function classification of command) or response indicating the processing result (response) according to the command
Is described.

FIG. 19 shows the above ctype and respo.
The definition content of nse is shown. ctype (Comman
As d), [0000] to [0111] can be used, and [0000] is CONTROL,
[0001] is STATUS, [0010] is INQU
IRY, [0011] is defined as NOTIFY,
[0100] to [0111] are currently undefined (res
It is said to be erved). CONTROL is a command to control the function from the outside, STATUS is a command to adjust the state from the outside, INQUIRY is a command to inquire whether the control command is supported or not, and NOTIFY is a request to notify the change of the state to the outside. Command. Also, the response
[1000] to [1111] are used as the above, and [1000] is NOT IMPLEMENT
TED, [1001] is ACCEPTED, [101
0] is REJECTED, [1011] is INTRAN
SITION, [1100] is IMPLEMENTED
/ STABLE, [1101] is CHANGED, [1
110] is reserved, and [1111] is INTE.
Each is defined as RIM. These res
The pose is properly used according to the type of command. For example, r corresponding to the CONTROL command
As an answer, NOTIMPLEMENTE
D, ACCEPTED, REJECTED, or IN
One of the four TERMs is the responder
It is used properly according to the situation of the side.

In FIG. 18, ctype / respo
In the area of 5 bits following nse, subunit-t
The ype is stored. Is a subunit-type
Indicates what the subunit of the COMMMAND destination or the RESPONSE transmission source is (device). In the IEEE1394 format, the device itself is called a unit, and the type of functional device unit provided in the unit (device) is called a subunit. For example, taking a general VTR as an example, the unit as the VTR is a tuner that receives terrestrial waves and satellite broadcasts.
Two subs with videocassette recorder / player
It has a unit. The subunit-type is defined as shown in FIG. 20 (a), for example.
That is, [00000] is Monitor and [0000]
1] to [00010] are reserved and [0001
1] is a Disc recorder / player,
[00100] is VCR, [00101] is Tune
r, [00111] is Camera, [01000]
[11110] is reserved, [11111]
Is used when there is no subunit
It is defined as it.

In FIG. 18, the above subunit-t
In the 3 bits following the ype, the same type of subunit
When a plurality of sub units exist, an id (Node_ID) for identifying each sub unit is stored.

The opcode is stored in the 8-bit area following the id (Node_ID), and the operand is stored in the subsequent 8-bit area. opcod
“E” is an operation code, and information (parameter) required by opcode is stored in “operand”. These opco
de is defined for each subunit, and subunit
Each has a table of a list of unique opcodes. For example, if subunit is VCR, opc
As the ode, for example, as shown in FIG. 20B, various commands such as PLAY (playback) and RECORD (recording) are defined. opera
nd is defined for each opcode.

As the datafield in FIG. 18, 32 bits of the sixth quadlet are indispensable. However, if necessary, an operand can be added following this (Additional opeed).
rands). Following datafield, dat
a_CRC is arranged. If necessary, dat
It is possible to place padding in front of a_CRC.

3. Transaction (command and response type) The transaction rule of IEEE 1394 has been described with reference to FIGS. 12 and 17. Here, a transaction from the point of view of the response of a certain command will be described with reference to FIGS. 21 and 22. FIG. 21 shows the Controller and the Target according to the basic transaction rules.
Processing with t is shown. As shown here, Con
On the controller side, T is set by the processing of step S41.
It is assumed that some AV / C command is transmitted to the target, and the Target side receives the AV / C command by the processing in step S42. Depending on the transaction rule of IEEE 1394, the process to be executed in response to the command received by the device as the Target (hereinafter, also referred to as “received command corresponding process”) is, for example, from the time when the command is received on the Target side. The internal processing (internal response processing) responding to the received command is executed within a period of 100 ms, and RESPONSE of a type according to the execution result is returned. The types of RESPONSE (also referred to as response code) to be returned here are
Among RESPONSE shown in FIG. 21, INTER
Any response other than IM and CHANGED
secode is also acceptable. Note that here, for example, NOT IMPLEMENTED, ACCE
IN, including PTED, REJECTED, etc.
Responses other than TERM and CHANGED
For code, the final response (fina
I will call it "lresponse".

Here, after the controller has transmitted the command in step S41, the controller
It is in a state of waiting for reception of RESPONSE to be transmitted from rget. Then, as shown as step S43 in FIG.
If SPONSE is transmitted, this is transmitted in step S4.
By the processing of 4, the Controller receives the data. On the Controller side, the above step S
Since the final response is received by 44, the command transmission / reception transaction started from step S41 is regarded as completed. Then, for example, the Controller can shift to a required process to be executed next such as the next command transmission process.

However, for example, on the Target side,
In the case where a command is received while in the busy state where a certain process is being executed, the internal response process cannot be executed within the above 100 ms, and therefore 100 m
The final response may not be returned within s. In such a case, the received command handling process is defined as the transaction process shown in FIG.

In FIG. 22, the controller first transmits the AV / C command by the process of step S51, and thereafter waits for the reception of RESPONSE. Then, on the Target side, the command is received by the process of step S52. Here, as the Target, the above step S5 is performed.
100 ms from the time when the command is received by the processing of 2
Within this period, it is assumed that the internal response process cannot be completed and therefore the final response cannot be transmitted. In such a case, the Target will receive the INTERIM response within 100 ms after receiving the command, as shown as the processing in step S53.
It is made to transmit e. This INTERIM re
In the case where it takes 100 ms or more to return the final response as described above, the sponse replaces the final response with the Contro.
It is specified as what should be transmitted to the ller. And in Target, this INTERIM r
After transmitting the response, step S52
When it becomes ready to start the internal processing in response to the command received by, this is executed. Then, when this internal response processing is completed, the response corresponding to the internal processing result is performed by the processing as step S55.
RESPONSE with an nse code. Where Target is INTERIM
There is no limitation on the period from the transmission of the response to the transmission of the final response.

On the other hand, in the Controller, as shown in the step S54 of the figure, for example, the Target
INTERIM responds sent from t
When e is received, the system waits for the final response to be transmitted. During this period, in principle, Co
The controller does not execute the processing for the next transaction. Then, after a certain period of time has passed, if it is assumed that the Target has transmitted the final response as described in the processing of step S55, the controller receives the final response by the processing of step S56. To be Upon receipt of this final response, one transaction process started from step S51 is completed.

4. Configuration for Received Command Correspondence Processing (Conventional) Here, prior to the description of the received command response processing according to the present embodiment, for comparison, a configuration for the conventional received command response processing will be described. This will be described with reference to No. 23.

In FIG. 23, Control
er and Target are shown connected by an IEEE 1394 bus 116. It is assumed that the Controller and Target shown in this figure are in a state where a connection is established. In addition to the blocks provided as hardware, the blocks shown as forming the Target in this figure
It also represents the functions implemented by software. For confirmation, the AV system according to the present embodiment uses an AV / C command under the FCP regulations. Therefore, in the following, a command is simply referred to as an AV / C command.

The command (A from the controller)
V / C command) is Asynchronous Pa
It is sent as a ccket. Therefore, Target
On the side, the command transmitted from the controller is received by the Async reception block 1. The Async reception block 1 is, for example, Phys.
ical Layer (301), Link Layer
r (302), Transaction Layer
(401) and a block composed of hardware and software for realizing the function as the FCP (402).

The command received by the Async reception block 1 is held in the Async reception buffer 2 and then read into the reception AV / C command distribution block 3 at a predetermined timing.

Reception AV / C command distribution block 3
Executes a process for allocating the read command to a plurality of predetermined buffer areas forming the AV / C reception buffer 4. The AV / C reception buffer 4 in this case is composed of the first buffer 4-1, the second buffer 4-2, and the third buffer 4-2.
Buffer 4-3, Fourth Buffer 4-4, Fifth Buffer 4
Five buffer areas of -5 are provided. These first
~ One command is to be held in each of the fifth buffers (4-1 to 4-5). Therefore, in this case, it is possible to hold up to five commands at the same time.

Further, for example, with respect to the received command, there may be an error in the information content, or the processing itself may not be possible. A command that cannot be processed by itself is, for example, a command (Vender Depend) specially specified by a maker (Vender) that is not supported by the target device.
ent Command). Then, in the case of a command that cannot be properly processed as described above, the reception AV / C command distribution block 3 generates a response indicating an error as shown in the figure, and the Async transmission buffer 10 To transmit. As a result, an error response will be returned to the controller side.

Reception AV / C command processing block group 5
Is actually configured as software. And
In this case, functionally, the first processing block 5-1, the second processing block 5-2, the third processing block 5-3, and the fourth processing block 5-2.
The processing block 5-4 and the fifth processing block 5-5 are provided. These first to fifth processing blocks (5-1 to 5-5) correspond to the buffers (4-1 to 4-5) of the AV / C reception buffer 4, respectively. Then, each processing block executes the received command handling process according to the command held in the corresponding buffer. That is, the contents of the command held in the corresponding buffer are referred to, and the internal response process according to the contents of this command is executed. Further, assuming that each of the first to fifth processing blocks (5-1 to 5-5) has executed its own internal response processing, it also has processing for generating and transmitting a response according to the processing result. Run. 1st-5th
The responses generated by the processing blocks (5-1 to 5-5) are transferred to the AV / C transmission buffer 8.

By the way, the reception AV / C command processing block group 5 is a function realized by software, and therefore is actually executed by the CPU provided in the device as the Target. As the CPU corresponding to the configuration shown in FIG. 23, the operation as the reception AV / C command processing group 5 is performed by a single task instead of multitask. Therefore, for example, even if commands are stored in a plurality of buffers in the AV / C reception buffer 4, the processing blocks in the reception AV / C command processing block group 5 simultaneously execute the reception command handling processing. I don't do that. The processing blocks in the reception AV / C command processing block group 5 execute the reception command corresponding processing in the order stored in the buffer in the AV / C reception buffer 4.

Specifically, for example, at a certain time point, AV
It is assumed that commands are simultaneously held in the first buffer 4-1 and the second buffer 4-2 of the / C reception buffer 4.
In addition, the command held in the first buffer 4-1 is received first, so that the first buffer 4-1 is more likely to receive the command than the second buffer 4-2 at the time when the command holding is started. Suppose it was too early. Reception AV in this case
On the side of the / C command processing block group 5, first, the first processing block 5-1 corresponding to the first buffer 4-1 executes the received command corresponding processing. Then, after the reception command handling process by the first processing block 5-1 is completed, the reception command handling process by the second processing block corresponding to the second buffer 4-2 is first executed.

In this case, Target is AV /
By having the C controller 7,
It can also function as a ler. The AV / C controller 7 is composed of software and has a controller function for generating and transmitting a command as needed. Here, the first transmission block 7-1,
3 of the second transmission block 7-2 and the third transmission block 7-3
One transmission block is provided. A function for generating and sending a command is given to each of these transmission blocks.

The AV / C transmission buffer 8 receives the reception AC / V command processing block group 5 as described above.
Not only the response transferred from the AV / C
The command transferred from the controller 7 is also stored. That is, as a device corresponding to the IEEE 1394 data interface, Control
When both the ler and Target functions are provided, one buffer is used for both the command transmission buffer and the response transmission buffer.

Therefore, the response from the reception AV / C command processing block group 5 side and the command from the AV / C controller 7 side are transferred to the AV / C transmission buffer 8. Then, if the buffer is empty, the AV / C transmission buffer 8 stores the command or response transferred at that time. In addition,
Here, the number of commands / responses stored in the AV / C transmission buffer 8 is one. The command / response stored in the AV / C transmission buffer 8 is to be cleared at the timing when the transmission output is considered to be completed.

The command / response stored in the AV / C transmission buffer 8 is read by the AV / C transmission processing block 9. In the AV / C transmission processing block 9, the read command / response is processed by, for example, packetization processing, or the like.
Converted to the format of ronus Packet, Asyn
c Transfer to the transmission buffer 10.

The command / response stored in the Async transmission buffer 10 is the same as the Async transmission block 11
By this, reading is performed at the required timing. Asy
In the nc transmission block 11, the Asynchronous Pas as the read command / response are sent.
send the ccket onto the IEEE 1394 bus 116.
Then, this transmitted Asynchronous P
The packet will be received by a required device connected on the IEEE 1394 bus. This transmitted Asynchronous Packet is Cont
If the response is a response to the command sent from the controller, the controller will receive this Asynchronous Packet as a response.

By the way, the conventional configuration shown in FIG. 23 as the processing for receiving commands on the Target side has the following problems. Each processing block in the AV / C reception command processing block 5 (5-1 to 5-
As described above, in 5), as described above, it is not possible to execute the reception command corresponding processing at the same time, so the processing should be executed in the order held in the buffer in the AV / C reception buffer 4 (corresponding to the reception order). Was said. Therefore, if commands are continuously received within a period of a short time, the received command handling process for commands received at a later timing may be significantly delayed. This point will be described with reference to FIG.

Here, as shown in FIG. 24, five commands (Command) 1, 2, 3, 4, and 5 are sequentially transmitted to the Target from the Controller side within a certain short time. Suppose it has been sent. Tar
On the get side, the reception command corresponding processing (internal response processing) is executed in the order of reception. However, as can be understood from the description according to FIG. 22, for example, Target
When the t side is busy, for example, it may take a considerable time to send the final response. Then, in this case, it is assumed that the internal response processes 1, 2, 3, 4, and 5 corresponding to the commands 1, 2, 3, 4, and 5 are sequentially executed at the timings shown in the figure. .

Here, the internal response process 1 corresponding to the command 1 is started when the command 1 is received, but as shown in the figure, it is assumed that the internal response process 1 is completed at the timing when the command 2 has already been received. . Then, the internal response process 2 corresponding to the command 2 is started to be executed at a timing that is delayed to some extent from the time of receiving the command 2. Also, the internal response processing 3 corresponding to the next command 3
Also, since it is executed after the internal response process 2 is completed, it is executed at a timing delayed from the actual reception timing of the command 3. In other words, a situation occurs in which the start timing of the internal response process corresponding to the command shifts later than when the command is received. Such a situation becomes more remarkable as the reception order becomes later. And in the case of FIG. 24,
From the time the last command 5 is received, this command 5
1 time to start the internal response processing 5 corresponding to
A state in which it has exceeded 00 ms or more is shown. This means that for command 5, as the received command response processing, the INTE
It means that the RIM response cannot be transmitted either.

In the conventional structure shown in FIG. 23, there is another factor that delays the received command handling process. That is, as shown in FIG. 23, IEEE
1394 devices are Controller and Target
If it has both functions of t, one AV / C
The transmission buffer 8 is commonly used for command transmission and response transmission. Data writing to the AV / C transmission buffer 8 is performed in the order in which they are transferred, regardless of the command or response. Further, writing is possible only when the AV / C transmission buffer 8 is empty. That is, when the command or response is being transmitted, the AV / C transmission buffer 8 is occupied by the data of the command or the response, so that even if new command or response data is transferred at this time, the AV / C is transferred. It cannot be written to the transmission buffer 8. In such a case, the data is transferred again at a certain later timing, and if the data is empty at this point, the AV
The / C transmission buffer 8 can be written.

Therefore, for example, when a certain processing block in the reception AV / C command processing block group 5 transfers a response to the AV / C transmission buffer 8, if, for example, the command is already held, this It is necessary to wait until the AV / C transmission buffer 8 becomes empty after the command transmission is completed. In this way, AV
Even if the / C transmission buffer 8 is shared by the transmission of the command / response, the transmission of the response will be delayed. That is, the end of the received command handling process will be delayed.

In the present embodiment, the IEEE 1394 data interface is applied to the AV system. However, if the processing of receiving commands on the Target side is delayed, the system cooperation operation is delayed or an error occurs. Will be lost. Such a problem is not preferable from the viewpoint of providing a user with a comfortable feeling of use, and is required to be improved. That is, for example, it is required that the command processing for reception is completed as much as possible within a certain time limit within an allowable range in consideration of the system cooperation operation.

5. Configuration for Receiving Command Handling Process (Embodiment) 5-1. Block Configuration Therefore, in the present embodiment, the above-described problem is solved by configuring the received command handling process as described below. FIG. 25 shows a block configuration for a received command handling process according to this embodiment. In this figure, the same parts as those in FIG. 23 are designated by the same reference numerals, and the description of the parts having the same functions will be omitted as appropriate. Also in FIG. 25, the Controller and the Target are IEEE.
It is assumed that they are connected by the E1394 bus 116 and that the connection is established. Also in FIG. 25, as in the case of FIG. 23 described above, the blocks shown as forming the Target represent not only the blocks provided as hardware but also the functions realized by software.

From Controller to Asynchr
The command (AV / C command) transmitted as an "onous Packet" is the Async reception block 1
Received by. The command received by the Async reception block 1 is held in the Async reception buffer 2 and then read into the reception AV / C command distribution block 3 at a predetermined timing.

Reception AV / C command distribution block 3
Executes a process for allocating the read command to the first buffers 4-1 to 4-5, which is a buffer area forming the AV / C reception buffer 4. Also in this case, the AV / C reception buffer 4 has the first buffer 4-1 and
It has five buffer areas: a second buffer 4-2, a third buffer 4-3, a fourth buffer 4-4 and a fifth buffer 4-5. In addition, these first to fifth buffers (4-1 to 4-1)
4-5) holds one command each.
Therefore, even in this Target, a maximum of 5 commands can be held simultaneously.

Also in this case, if the received command has an error in the information content, or if the Vender Dependent Comma
If it cannot be processed by itself such as nd, it is transmitted to the Async transmission buffer and an error response is transmitted to the Controller side.

In addition, a count block 13 is provided in this embodiment. When the received command is held in the buffer (4-1 to 4-5), this count block continuously counts from the time when the holding is started until the buffer is cleared. Composed. In the case of the present embodiment, the elapsed time is indicated by this count value. That is, in the present embodiment,
Each of the first to fifth buffers (4-1 to 4-5) is managed so that information on the elapsed time (hereinafter, referred to as “buffering elapsed time”) holding the command is always obtained. . In addition, the first to fifth buffers (4-1 to
Each of 4-5) is cleared at a timing when it is considered that the reception command handling process held in the buffer is completed, for example, by transmitting a final response as described later.

Reception AV / C command processing block group 5
Is actually configured as software, and in this case, the first processing block 5-1 and the second processing block 5-
2, third processing block 5-3, fourth processing block 5-
Four processing blocks, a fifth processing block 5-5 and a fifth processing block 5-5 are provided. These first to fifth processing blocks (5-1 to 5
-5) is a buffer of the AV / C reception buffer 4 (4-
For the commands held in 1 to 4-5), the received command corresponding process for any one required command is executed.

The first to fifth processing blocks (5-1)
The processings corresponding to the received commands individually executed by (5-5) are as follows. First to fifth processing blocks (5-
1-5-5), scheduling block 1
2, the command to be processed is passed. Therefore, in the processing block, the content of the command passed is referred to, and the internal response processing according to the content of this command is executed. And if the internal response process is executed,
Processing for generating and transmitting a response according to the processing result is also executed. The responses generated in the first to fifth processing blocks (5-1 to 5-5) are transferred to the AV / C transmission buffer 8 as shown.

By the way, the first to fifth parts shown in FIG.
The processing blocks (5-1 to 5-5) are AV / C, respectively.
The structure corresponding to the buffers (4-1 to 4-5) of the reception buffer 4 is adopted. That is, the first to fifth processing blocks (5-1 to 5-5) should execute the processing for the commands held in the buffers (4-1 to 4-5) of the AV / C reception buffer 4, respectively. It has been associated as a kimono. The same applies to this point also in the present embodiment.

Also in the present embodiment, the received AV / C command processing block group 5 uses the CP according to the software.
This is a function realized by the execution of U. Also, in this embodiment, in the Target device,
The CPU that executes the received command handling process has a configuration in which it is executed by a single task instead of multitasking.

Therefore, also in the present embodiment, for example, when commands are stored in a plurality of buffers in the AV / C reception buffer 4, the processing blocks in the reception AV / C command processing block group 5 are The received command handling process is not executed at the same time, but the received command handling process is sequentially executed for each command. However, in the present embodiment, the order of commands to be processed by the received command handling process is determined by the scheduling block 12 as described later.
The command stored in the / C receive buffer 4 is determined based on the status of the progress of processing so far.

[0165] Also, as Target in this case,
The AV / C controller 7 is provided. This makes Con
The function as a troller is given. The AV / C controller 7 is composed of software, generates a command when necessary, and executes the IEEE 13
Required equipment existing on the 94 bus 116 (Target)
to t). Here, three transmission blocks of a first transmission block 7-1, a second transmission block 7-2, and a third transmission block 7-3 are provided as functional blocks for generating and transmitting a command.

The AV / C transmission buffer 8 also functions as a buffer for storing AV / C commands to be transmitted. Also in the case of the present embodiment, a buffer for transmitting a response transferred from the reception AV / C command processing block group 5 side and a buffer for transmitting a command transferred from the AV / C controller 7 side. And, share the function as a buffer for both. Also in this case, one command / response is stored in the AV / C transmission buffer 8. Further, the command / response stored in the AV / C transmission buffer 8 is IE
It is supposed to be cleared at the timing when the transmission to the EE1394 bus 116 is considered to be completed.

The AV / C transmission processing block 9 reads the command / response stored in the AV / C transmission buffer 8 at a required timing, for example, Asynch.
Converted to the format of ronus Packet, Asyn
c Transfer to the transmission buffer 10. In the Async transmission block 11, the command / response stored in the Async transmission buffer 10 is, for example, Isoch.
The reading is performed at a required timing so as to be synchronized with the roous cycle. Then, Asyncro as the command / response that was read
noose packet to IEEE 1394 bus 116
Send to the top. In this case, Asy that sent
If nchronous Packet is a response, Asynchronous as this response
Packet will be received on the Controller side.

In this embodiment, a scheduling block 12 is provided as shown in the figure. Also in this embodiment, the commands stored in the buffers (4-1 to 4-5) of the AV / C reception buffer 4 are the processing blocks (5-1 to 5) of the reception AV / C command processing block group 5. The received command handling process (command response process) is executed by -5) and is held until the final process such as transmitting a final response is completed. In the scheduling block 12, as described above, the buffer (4- (4)
1 to 4-5), the status of processing progress up to the present time is determined for the commands stored in the commands 1 to 4-5), and according to the determination result, among the commands stored in the AV / C reception buffer 4, A command to be processed is selected and determined by the reception AV / C command processing block group 5. Further, the current processing content of the command selected and determined is also determined. One of the processing progress situations to be determined is the buffering elapsed time, that is, the duration time stored in the buffer of the AV / C reception buffer 4. The other is INTERIM response.
It will be determined whether or not e has been transmitted. It should be noted that this point will be described in more detail in the following description of the processing operation of the scheduling block 12, together with the method of selecting and determining the command to be processed and the processing content.

5-2. Processing operation Next, the Target having the configuration shown in FIG.
A practical example of the received command handling process according to the present embodiment, which is executed by the above, will be described with reference to the flowcharts of FIGS. 26 to 34.

First, FIG. 26 shows main received command handling processing. The processing shown in this figure is repeatedly continued at predetermined timings. As described above, when the received command is held in any one of the AV / C reception buffers 12, the buffering elapsed time holding the command in that buffer is counted by the count block 13. Has become. In this routine, first, among the commands held in the buffer of the AV / C reception buffer 12 by the processing of step S101, is there a command for which the buffering elapsed time is not counted by the count block 13? It is determined whether or not. For this purpose, for example, the count block 13 checks in which of the first to fifth buffers (4-1 to 4-5) of the AV / C reception buffer 4 the command is stored. The buffer of the command counted by the count block 13 itself is currently counted by the count block 13 itself among the first to fifth buffers (4-1 to 4-5) of the AV / C reception buffer 4. It is checked which buffer is performing. Then, the two check results are compared. As a result, when there is a command held in the AV / C reception buffer 12 and not counted by the count block 12, which buffer holds the command. Can be recognized.

For example, if the buffering elapsed time has already been counted for all the commands held in the AV / C reception buffer 12, a negative result is immediately obtained in step S101 and step S10 is executed.
It will proceed to the process of 3.

On the other hand, if it is determined in step S101 that there is a command for which the elapsed buffering time is not counted, then step S1
Go to 02. In step S102, the count block 13 starts counting the buffering elapsed time for the command and returns to step S101 again. That is, the processes of steps S101 to S102 are repeatedly executed if there is a command for which the elapsed buffering time is not counted. Finally, a state in which all commands currently held in the AV / C reception buffer 12 are being counted is obtained, and a negative result is obtained in step S101. You can move on.

In step S103, the scheduling block 12 executes scheduling for command corresponding processing. This scheduling process will be described in detail with reference to FIG.
Scheduling here generally means the following processing. In other words, if there are a plurality of commands held in the AV / C reception buffer 12, which of these commands is to be processed by the reception AV / C command processing block 5 for the reception command handling process? Select and decide. Further, it also determines what kind of content the received command corresponding process is to be executed for the command selected and determined as the processing target.

At the next step S104, for example, the AV / C transmission processing block 9 checks the current buffering status of the AV / C transmission buffer 8. Then, if the command or response is stored here, A is set as the processing of the next step S105.
The command / response held in the V / C transmission buffer 8 is read and transferred to the Async transmission buffer 10. Then, the Assync transmission block is 11 and As is
The command / response transferred to the sync transmission buffer 10 is sent to the IEEE 1394 bus 116.
If the process of step S105 is completed, for example, the routine shown in this figure is once exited, and the process is restarted from step S101 at a predetermined timing.

On the other hand, if the command / response is not held in the AV / C transmission buffer 8 and it is in the empty state, and a negative result is obtained in step S104, the process shown in FIG. Even in this case, the process is started from step S101 at a predetermined timing in this case as well.

FIG. 27 shows the step S shown in FIG.
A routine as a scheduling process as 103 is shown. In the scheduling process shown in this figure, first in step S201, the currently received AV /
From among the commands held in the C buffer 4, the command determination process for determining the command for which the received command handling process should be performed this time is executed. This command determination processing will be described later in detail with reference to FIG.
This is performed based on the transmission status of the INTERIM response for each command held in the / C buffer 4 and the buffering elapsed time counted by the count block 13.

As a result of the determination in step S201, for example, when the command is 1 in the AV / C reception buffer 4.
It also includes the result that there is no command to be processed, for example because one is not held. Therefore, step S202
In step 1, it is determined whether or not the command to be processed exists based on the determination result of step S201. If a negative result is obtained because there is no command to be processed, the process shown in this figure is left as it is, and the process proceeds to step S104 of FIG. 26 described above. On the other hand, if the command to be processed is determined in step S201 and a positive result is obtained in step S202, the process proceeds to step S203 and subsequent steps.

In step S203, the processing module corresponding to the command to be processed is determined. In other words, referring to the contents of the command to be processed, based on the current processing operation status on the Target side,
The internal response process corresponding to the command is determined. That is, the operation as the target device in response to the command is determined. Then, according to the operation, the reception AV
The processing blocks in the / C command processing block group 5 determine the response to be transmitted. Specifically, for example, it is assumed that the reception command to be processed is an instruction to reproduce the medium. Then, as the processing of step S203, in response to the fact that the content of the command is reproduction, for example, media is reproduced as the operation of the device, and a response (final response) for notifying that the medium is reproduced is transmitted. What to do is determined as a processing module (processing to be executed). However, if the disc cannot be played back because a medium is not loaded, a processing module that does not play back and sends a response according to this is determined. Further, when the final response cannot be transmitted due to, for example, performing another operation or process, the processing module for transmitting the INTERIM response is determined.

In the next step S204, the buffering elapsed time counted by the count block 13 for the command to be processed is checked.
Then, in the next step S205, according to the checked buffering elapsed time, the process A (step S206), the process B (step S207), the process C (step S208), the process D (step S209), the process E ( It is made to determine which of the steps S210) should be performed. It should be noted that what kind of processing these processings A to E are will be described with reference to FIGS. 31 to 34, but here, it becomes a criterion for deciding the processing to be executed from the processings A to E. The elapsed buffering time will be described with reference to FIG.

The command reception timing shown in FIG. 28 is the time when the received command is stored in the buffer of the AV / C reception buffer 4 and the counting block 13 starts counting the buffering elapsed time. Then, here, the buffering elapsed time counted by the count block 13 is divided into five periods, that is, first to fifth periods. The first period is from the time when the command is received (when the count starts)
sec) to a predetermined time point, which is slightly before. The specified time of 100 msec here means that the time shown in FIG.
As described with reference to FIG. 1 and FIG. 22, it means the time defined by the IEEE 1394 data interface standard that the Target that has received the command should return some response. In the second period,
It is the period from the end of the first period until just before reaching the specified time.

In the third period, from the time when the specified time is reached,
It is a period until a predetermined time point, which is slightly before the time point of the final timeout. The time length as the final timeout here is set for the IEEE 1394 compliant device according to the present embodiment, and is not particularly defined by the IEEE 1394 data interface standard. For example, in the present embodiment, Control
The device that functions as the er sends, for example, when a response is not obtained after the command is sent within a predetermined period (a length longer than the specified time is set) set in advance. The transaction is to be ended depending on the processing result with the error.

The controller is IEEE139.
According to the regulations of 4 data interface, when a command is transmitted, it is not possible to shift to the next transaction (transmission of command) until the transaction is completed. So, for example, Co
If the specification is such that the controller side waits indefinitely until the final response is received, Target
If the transmission of the final response from t is significantly delayed, the next transaction will be significantly delayed. Therefore, as described above, if a response is not obtained within a certain period of time, the transaction can be forcibly ended, and the required processing to be executed next can be performed. . Then, as the above-mentioned final timeout, this Control
It may be set in correspondence with a fixed time set by the er until transaction forced termination.

In the fourth period, from the end of the third period,
It is the period until just before the final timeout. Further, the fifth period is a period after the time point when the final timeout is reached.

Then, as can be seen by referring again to FIG. 27, in step S205, if the buffering elapsed time for the command to be processed is within the first period, the process A is executed as the process of step S206. Run.
If the elapsed buffering time is within the second period, the process B is executed as the process of step S207. If it is within the third period, process C (step S208), if it is within the fourth period, process D (step S209), and if it is within the fifth period, process E (step S210). Run.

FIG. 29 shows step S201 in FIG.
The command determination process, which is the process of FIG. In the routine shown in this figure, the variable n is first set to n = 0 by the process of step S301. This variable n indicates the number of the buffer ID assigned to each buffer in the AV / C reception buffer 4. In the case of the AV / C receiving buffer 4 shown in FIG. 25, for example, buffer ID = 0, 1, 2, 3, 4 for the first buffer 4-1 to the fifth buffer 4-5. Will be given.

The processing from the next steps S302 to S310 is processing for checking the storage status of the command in the AV / C reception buffer 4 and the return status of the INTERIM response for each command. First,
In step S302, it is determined whether or not the command is stored in the reception buffer with the buffer ID = n. For example, when this process is executed immediately after step S301, since the buffer ID = n = 0, the command is stored in the first buffer 4-1 given the buffer ID = 0. It will be determined whether or not.

If a negative result is obtained in step S302, the process proceeds to step S309 described later. On the other hand, if a positive result is obtained, the process proceeds to step S303.

Steps S303 to S308 are
This is a process for determining the processing status up to now of the command (hereinafter, also referred to as the current command) stored in the buffer (current buffer ID = n buffer) determined in step S302. .
As will be understood from the following description, the processing status in the present embodiment is the return status of the INTERIM response,
It is based on the buffering elapsed time in the AV / C reception buffer 4.

Then, in step S303, first, the return status of the INTERIM response is determined.
That is, the current command has already been
It is determined whether or not the INTERIM response is returned to r. Here, if a positive result is obtained, the process proceeds to step S304. In step S304, the current command is the longest among the commands stored in the AV / C reception buffer 4 and recognized as having returned the INTERIM response in the course of repeating the processing of steps S302 to S310. It is determined whether or not the buffering elapsed time is reached.

If the current command is the oldest command that has been returned with the INTERIM response stored in the AV / C reception buffer 4, a positive result is obtained in step S305. In this case, the process proceeds to step S305, the current buffer ID (= n) is set as the result A, and step S30
Proceed to 9. If a negative result is obtained in step S305, the process directly proceeds to step S309.

On the other hand, if a negative result is obtained in step S303 because the current command has not yet returned the INTERIM response, step S303 is performed.
Proceed to the process of 307. In step S307, the current command has the longest buffering out of all the commands recognized to be stored in the AV / C reception buffer 4 in the process of repeating the processes of steps S302 to S310. It is determined whether or not the time has elapsed. When a positive result is obtained in step S307, the current buffer ID (= n) is set as the result A in step S308, and the process proceeds to step S309. On the other hand, when a negative result is obtained in step S307, the process directly proceeds to step S309.

In step S309, the variable n is incremented by 1, and the process proceeds to step S310.
In step S310, it is determined whether or not the current variable n is greater than or equal to the maximum value. With the configuration of FIG. 25, the first buffer 4 in the AV / C reception buffer 4
-1 to the fifth buffer 4-5, buffer ID respectively
= 0 to 4 are given, so step S310
In, the maximum value serving as a comparison standard is 4.

The case where a negative result is obtained in step S309 is the case where there is still a buffer to be checked. Therefore, in this case, step S310
At n, the variable n is incremented to n = n + 1 and the process returns to step S302.

If the processes of steps S302 to S310 are repeated a number of times corresponding to the number of buffers in the AV / C reception buffer 4, a positive result is obtained in step S309 and the process proceeds to step S311.

At step S311, the current AV /
Among the commands stored in the buffer of the C reception buffer 4, it is determined whether or not there is a command that has not yet returned the INTERIM response. If a positive result is obtained as the determination result, step S
In step 312, the result B obtained by the processing of the last step S308 is output, and the command to be processed this time is determined based on this. That is, the command stored in the buffer having the buffer ID currently set as the result B is determined as the processing target. On the other hand, when a negative result is obtained in step S311, in step S313, the last step S3.
The result A obtained by the processing of 05 is output. That is, that is, the command stored in the buffer having the buffer ID currently set as the result A is determined as the processing target.

That is, as the processing shown in FIG. 29, when the INTERIM response is returned for all the commands, of these commands, the command with the longest buffering elapsed time is
The command to be processed is determined. Also,
If there is a command that has not returned the INTERIM response, the command processing that has not returned the INTERIM response is given priority for processing. If there are a plurality of commands that have not returned the INTERIM response, the command with the longest buffering elapsed time among these commands is determined as the processing target command.
Depending on the above processing, regarding the result A and the result B,
The buffer ID may not be set. Then, in step S312 or S313, if the result B or the result B for which the buffer ID is not set is to be output, it means that there is no command to be processed. In this case, step S2 shown in FIG.
In 02, a negative result is obtained.

Subsequently, the process A (S206) and the process B (S20) in the scheduling process shown in FIG.
7), the process C (S208), the process D (S209), and the process E (S210) will be described. The processing shown in these figures is executed by the scheduling block 12 of FIG.

FIG. 30 shows the process A. Process A
Is processing when the buffering elapsed time is within the first period as shown in FIG. The fact that the buffering elapsed time is within the first period means that there is still a time margin before the specified time. Therefore, in this case, first, in step S401, it is determined whether or not the INTERIM response has not been returned for the command to be processed. And INTERI
If an affirmative result is obtained because the M response has already been returned, the processing is ended as it is. That is, in this case, in the early period of the first period, the IN
This means that the TERM response has been returned. After that, since it is sufficient to perform the internal handling process and send the final response by the time of the final timeout, there is a considerable time margin. Therefore, the process is ended without executing any particular process.

On the other hand, when an affirmative result is obtained that the INTERIM response has not been returned, the process proceeds to step S402. In step S402,
It is determined whether or not the AV / C transmission buffer 8 is currently empty. Here, the AV / C transmission buffer 8
However, if the command is already stored and a negative result is obtained because it is not empty, in this case, the process ends without executing any particular process. On the other hand, if the AV / C transmission buffer 8 is empty, the process in step S403 causes the processing block in the reception AV / C command processing block group 5 corresponding to the command to be processed to execute the command response process ( Internal response processing) is executed. Along with this, a response according to the internal response process is transferred from the processing block that has executed the command response process to the AV / C transmission buffer 8 and finally I
Control via EEE 1394 bus 116
It will be transmitted to the r side.

FIG. 31 shows the process B. Process B
28 is the process when the buffering elapsed time is within the second period according to FIG. The fact that the buffering elapsed time is within the second period means that there is not much time before the specified time is reached.

In the processing shown in this figure, first, in step S501, I
It is determined whether the NTERIM response has not been returned. Then, when a negative result is obtained because the INTERIM response has been returned, the processing is ended as it is. The reason for this is the same as when the negative result is obtained in step S401 in FIG.

On the other hand, if a positive result is obtained in step S501, the process proceeds to step S502. In step S502, it is determined whether the AV / C transmission buffer 8 is empty. Then, if an affirmative result is obtained as the empty state, the process proceeds to step S503 to execute the command response process.

In this case, if a negative result is obtained in step S502 because the AV / C transmission buffer 8 is not empty, the AV / C transmission buffer 8 is stored in the AV / C transmission buffer 8 as shown in the processing of step S504. On the other hand, make a reservation. Here, the reservation for the AV / C transmission buffer 8 means the following. That is, currently A
When the transmission of the command stored in the V / C transmission buffer 8 is completed and the AV / C transmission buffer 8 becomes empty, the transmission command is continuously transferred from the AV / C controller 7 side. Even so, the AV / C transmission buffer 8 does not accept this command. Instead, when the response process for the received command currently being processed by this process B is executed, the response generated by this internal response process is stored in the AV / C transmission buffer 8. It is something to do.

As described with reference to FIG. 25, AV / C
A command is transferred from the controller 7 at a timing unrelated to the internal response process on the side of the received AV / C command processing block group 5. Therefore, for example, if the conventional configuration is used, the AV / C controller 7
If the command transferred from is stored in the AV / C transmission buffer 8, the response transmission will be delayed accordingly. Therefore, step S50 of the present embodiment
If the AV / C transmission buffer 8 is reserved for the response transmission as described in 4, the AV / C transmission will be performed when the next response is transmitted.
Storing in the transmission buffer 8 is surely guaranteed. That is, it becomes possible to prevent the response transmission timing from being further transmitted.

Further, in the case of the process A shown in FIG. 30,
If the AV / C transmission buffer 8 is not empty, the process ends without making a reservation. On the contrary,
In the process B, the AV / C transmission buffer 8 is reserved in step S504. This point is different from the process A. In the process A, the reason why the buffer is not reserved is that there is still a margin until the specified time in the first period. On the other hand, in the process B, there is no time to reach the specified time. Therefore, if the AV / C transmission buffer 8 is reserved, it is guaranteed that a response will be transmitted to the AV / C transmission buffer 8 next time. For example, some response can be surely transmitted within a specified time. It is possible.

FIG. 32 shows the process C. Process C
28 is the processing when the buffering elapsed time is within the third period according to FIG. Being within the third period is a state in which there is a time margin until the final time-out after the lapse of the specified time.

In the process C, the determination process is only to determine whether or not the AV / C transmission buffer 8 is empty in step S601, and returns the INTERIM response as in the processes A and B. / No determination processing is performed for unreturned items. In this case, the command to be processed is still stored in the AV / C reception buffer 4 after the specified time has elapsed.
This means that the INTERIM response is returned within the specified time for this command to be processed. Therefore, here, it is assumed that the processing depending on whether the INTERIM response is returned or not returned is not classified. Then, in step S601, if a positive result that the AV / C transmission buffer 8 is empty is obtained, the command response process is executed by the process of step S602, and if a negative result is obtained, The process is terminated as it is.

FIG. 33 shows the process D. Process D
28, the processing is performed when the buffering elapsed time is within the fourth period, as shown in FIG. Being within the fourth period means that there is no time to reach the final timeout. In this case as well, for the same reason as that of the process C shown in FIG. 32, the determination process for returning / not returning the INTERIM response is not executed, and the determination process is performed by the AV / C transmission buffer 8 according to step S701. It is determined whether or not it is in an empty state. Then, in step S701, AV /
If an affirmative result is obtained assuming that the C transmission buffer 8 is empty, the process proceeds to step S702 to execute the command response process. When a negative result is obtained in step S701, the process proceeds to step S703 to make a reservation for the AV / C transmission buffer 8.

Here, in the process C shown in FIG. 32, the reservation is not made, whereas in the process D shown in FIG. 33, the reservation is made in the processes A and B. The reason is the same as the reservation processing. That is, the process C is executed when the buffering elapsed time is within the third period, and there is still time before the final timeout. On the other hand, in the process D, the buffering elapsed time is within the fourth period, and there is no time before the final timeout.
Therefore, by making a reservation in the AV / C transmission buffer 8 in step S703, it is guaranteed that the response in response to the command currently being processed is transmitted at the timing before the final timeout.

FIG. 34 shows the process E. Process E
28 is the process when the final timeout is exceeded, as shown in FIG. In this case, for example, it is considered that the controller has already forcibly terminated the transaction without waiting for the reception of the response. Therefore, at this stage, even if the internal response process and the response are transmitted, the Controller side does not accept the response, which is wasteful. Therefore, as the processing E, in step S801, the current command is first cleared from the buffer of the AV / C reception buffer 4. Then, in the next step S802, the corresponding command response process is initialized.

5-3. Example of Operation Timing of Received Command Corresponding Processing FIG.
A specific example of the received command handling process will be described. In this case, for convenience of explanation, it is assumed that the AV / C reception buffer 4 stores three buffers, that is, a first buffer 4-1 to a third buffer 4-3.

In this figure, first, at time t1, command 1 is received and stored in the first buffer 4-1 in the AV / C reception buffer 4. here,
It is assumed that counting of the buffering elapsed time has started from this time point t1. Then, first, the first cycle is started. This cycle corresponds to a period in which the process as the received command corresponding process shown in FIG. 26 is executed once. When the first cycle is reached, first, at the timing of time t2, A
Checking each buffer within the V / C receive buffer 4 is performed. This corresponds to the processing of steps S301 to S310 in the command determination processing of FIG. 29, for example.

As a check result at this time t2, it is recognized that only the command 1 is held in the AV / C reception buffer 4. Therefore, as the result of the command determination processing corresponding to FIG. 29, the first buffer 4-1
Will output the result B that is set. That is,
This means that the determination process is performed assuming that command 1 should be processed. Further, it is assumed that the buffering elapsed time is within the first period when the command determination process is executed in this first cycle. According to the result of such situation determination, the scheduling block 12 activates the process A for the first processing block 5-1 in the reception AV / C command processing block group 5 at the timing shown as time t3, for example. . Then, the first processing block 5-1 executes the processing A at the timing of the time point t4. Here, as the process A, the required internal response process is executed, and then the INTERIM response is returned.

In the first period, time t
Command 2 is received at the timing of 5. This command 2 is stored in the second buffer 4-2 in the AV / C reception buffer 4, and the buffering elapsed time starts counting from this time t5. Then, similarly, within the first period, a time point t6 later than the time point t5.
In, command 3 is also received. This command 3
Is stored in the third buffer 4-3 at this time t6, and counting of the buffering elapsed time is started.

When the next second cycle is reached, the buffers in the AV / C reception buffer 4 are checked again at time t7. As a result, at time t7, the commands 1, 2, 3 are stored in the AV / C reception buffer 4.
It is recognized that the following three commands are held.
And at this point, INTER for command 1
The IM response is sent back, but the remaining commands 2 and 3
No INTERIM response was returned. Further, regarding commands 2 and 3 that have not returned the INTERIM response, the previously received command 2 has a longer buffering elapsed time. Therefore, in this case, as the command determination processing of FIG. 29, the determination that the command 2 should be processed is output as the result A. Then, at this time, it is assumed that the buffering elapsed time of the command 2 is within the second period. As a result, the scheduling process may be performed at time t, for example.
At the timing shown in FIG. 8, the process B is started for the second processing block 5-2. Then, the second processing block 5-2 performs IN as the processing B at time t9.
Sending a TERM response. As the case where the process B is executed, when the AV / C transmission buffer 8 is actually storing the command for transmission, as described with reference to FIG. In the process (1), the AV / C transmission buffer 8 is reserved so that the response can be transmitted without fail.

In the next third period, the reception buffer check is performed at time t10. Even at this point, the commands 1, 2, 3 are stored in the AV / C reception buffer 4.
3 received commands are stored. However, INT for the two commands 1 and 2
The ERIM response has already been returned, and the INTERIM response has not been returned for command 3. Therefore, in this case, as the command determination processing shown in FIG. 29, the determination that the command 3 for which the INTERIM response has not been returned should be processed is output as the result A. Further, at this time, the buffering elapsed time of the command 3 has already passed the specified time and is within the third period. According to this result,
As the scheduling process, the process C is activated in the third processing block 5-3 at the timing of time t11. Then, the third processing block 5-3 is at time t12.
In step C, the final response is transmitted after the required internal response process is executed. At this time point t12, the final response in response to the command 3 is transmitted, so that the response process for the command 3 ends. At this time, the third processing block 5
The response process of the command 3 set to -3 is initialized. Also, the command 3 held in the third buffer 4-3 is cleared.

In the fourth cycle, the reception buffer check is performed at time t13. In this case, since the command 3 has been cleared at the previous time t12, the AV / C reception buffer 4 holds two commands, command 1 and command 2. For these commands 1 and 2, the transmission of the INTERIM response has been completed. Further, the buffering elapsed time of command 1 is longer than that of command 2.

Therefore, as the command determination processing in this case, the result that the command 1 should be processed is obtained. In addition, at this time, the elapsed buffering time of the command 1 is within the fourth period. Therefore, as the scheduling process in this case, the first processing block 5-
The process D is activated for 1. Then, at time t15, the first processing block 5-1 executes the required internal response processing as the processing D, and then transmits the final response. As a result, the command 1 stored in the first buffer 4-1 is cleared and the first processing block 5-1 is also initialized. As a case where the process D is executed, in the case where the AV / C transmission buffer 8 is actually storing a command for transmission, the AV / C transmission buffer 8 operates as described with reference to FIG. C
The transmission buffer 8 is reserved.

In the fourth cycle, time t1
Command 4 has been received at the timing shown as 6. This command 4 is stored in the third buffer 4-3 of the AV / C reception buffer 4 which is already empty, and counting of the buffering elapsed time is started from this time t14.

In the next fifth period, the reception buffer check is performed at time t17. At this time, the first buffer 4-1 is in an empty state, and the command 2 and the command 4 are stored in the second buffer 4-2 and the third buffer 4-3, respectively. Also,
At this point, command 2 returns an INTERIM response, but command 3 does not return an INTERIM response. Therefore, in the command determination process, the result that the command 4 of which INTERIM response has not been returned should be processed is obtained.
Further, it is assumed that the buffering elapsed time of the command 4 at this point is within the second period. Therefore, here, at the timing of time t18, the third processing block 5-
Process B is started up for 3. In this case, as the third processing block 5-3, after executing the internal response processing, the final response is transmitted at the timing shown at time t19. Command 4 is cleared from the third buffer and the third processing block 5-3 is also initialized.

After that, in the process in which the main received command handling process is repeated a certain number of times, the state in which the command 2 is still being processed and being held in the buffer 4-2 continues, and as a result, the time t20. In, it is assumed that command 2 has reached the point of the final timeout. In this case, for example, the operation of the n-th cycle executed after the command 2 has reached the final timeout is as follows. First, by performing the reception buffer check at time t21, it is recognized that the command 2 is held only in the buffer 4-2. Then, the buffering elapsed time of this command 2 has passed the final timeout and is within the fifth period. Therefore, as the scheduling process, the process E is started for the process block 5-2. Accordingly, the processing block 5-2, for example, first
Command 2 is cleared from the buffer 4-2 at the timing of time t22. That is, the command is discarded even if the command processing is not completed. Then, at the timing of the subsequent time point t23, the processing module set in the processing block 5-2 is initialized and terminated.

By the way, the received command handling processing described so far is based on the controller and Tar under the IEEE 1394 data interface standard.
It is based on the relationship with get. And
For example, in the AV system according to the present embodiment shown in FIG. 1, the role relationship between the Controller and the Target corresponding to the above-described reception command handling process is that the devices that have a connection (plug) established. , Which dynamically changes according to the operating conditions at that time. For example, assuming that a connection has been established between the STR 60 and the STR compatible disk driver 30, if the STR 60 side sends a command such as a reproduction instruction to the STR compatible disk driver 30, Is Control
and the STR compatible disk driver 30 becomes Ta
rget. On the contrary, in the case where a command is transmitted from the STR compatible disk driver 30 to the STR 60, the STR compatible disk driver 30
Becomes Controller and STR60 is Targ
It becomes et.

Further, in the embodiment, the AV system as shown in FIG. 1 is taken as an example, but the present invention is as follows.
It is also applicable to other systems. Furthermore, the present invention is not limited to the IEEE 1394 interface, but can be effectively applied to a data interface standard which is defined as one transaction being completed by transmitting and receiving a command and a response.

[0224]

As described above, according to the present invention, the command to be processed and the command to be processed based on the processing progress status so far of the command which is supposed to be held on the Target side for the received command handling process. The processing contents are determined. As a result, for example, commands that are considered to have a delay before the specified time for response transmission are processed with priority, and appropriate for response transmission (command response processing) depending on the processing progress status up to the present time. It is possible to perform various processing.

Further, according to the present invention, when the response cannot be transmitted because there is no free space in the transmission buffer when the response is to be transmitted, the response is not transmitted this time. I try to reserve a buffer. As a result, even if the response cannot be transmitted once, the response can be surely stored in the transmission buffer and transmitted and output at the timing when the transmission buffer becomes empty thereafter. This is because, for example, the device that functions as a Target and is sending a response is
It also functions as an ler, and is particularly useful in the case of transmitting not only a response but also a command. That is, in the case where command transmission is repeated, there is a possibility that the transmission buffer is continuously used for command transmission, and an empty area for response transmission cannot be obtained. In this case, the response transmission will be significantly delayed. Therefore, if the transmission buffer is reserved as in the present invention, it is ensured that the response transmission is surely performed when the transmission of a certain command is completed and an empty area is made. It won't be late.

As described above, according to the present invention, even if a relatively large number of commands are received within a short time, for example, as many commands as possible can be executed within a certain fixed time. It is possible to appropriately end the response process. As a result, it becomes possible to execute a system cooperation operation between devices connected by a data interface, for example, at a higher speed and with higher reliability than in the past.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a configuration example of an AV system according to an embodiment of the present invention.

FIG. 2 is a front view of a front panel of the STR.

FIG. 3 is a front view of a front panel of an STR compatible disk drive.

FIG. 4 is a block diagram showing an internal configuration example of an STR.

FIG. 5 is a block diagram showing an internal configuration example of an STR compatible disk drive.

FIG. 6 is an explanatory diagram showing a stack model of IEEE 1394 corresponding to the present embodiment.

FIG. 7 is an explanatory diagram showing a cable structure used in IEEE1394.

FIG. 8 is an explanatory diagram showing a signal transmission form in IEEE1394.

FIG. 9 is an explanatory diagram for explaining bus connection regulations in IEEE1394.

FIG. 10: Node on the IEEE 1394 system
It is explanatory drawing which shows the concept of ID setting procedure.

FIG. 11 is an explanatory diagram showing an outline of Packet transmission in IEEE1394.

FIG. 12 is a process transition diagram showing a basic communication rule (transaction rule) in Asynchronous communication.

FIG. 13 is an explanatory diagram showing an addressing structure of an IEEE 1394 bus.

FIG. 14 is a structural diagram of CIP.

FIG. 15 is an explanatory diagram showing an example of a connection relationship defined by a plug.

FIG. 16 is an explanatory diagram showing a plug control register.

FIG. 17 is a process transition diagram showing Write Transaction defined in Asynchronous communication.

FIG. 18: Asynchronous Packet
It is a structural diagram of (AV / C command packet).

FIG. 19 is an explanatory diagram showing the definition contents of ctype / response in the Asynchronous Packet.

FIG. 20 is an explanatory diagram showing an example of definition contents of subunit_type and opcode in the Asynchronous Packet.

FIG. 21 is a processing transition diagram showing normal transaction processing.

FIG. 22 is a processing transition diagram showing transaction processing when a final response cannot be transmitted within a specified time.

[Fig. 23] Fig. 23 is a block diagram illustrating a configuration example of a Target for a conventional received command handling process.

FIG. 24 is a process transition diagram showing an example of a case where the transmission of a response is delayed on the Target side.

[Fig. 25] Fig. 25 is a block diagram illustrating a configuration example of a Target for a received command handling process according to the present embodiment.

FIG. 26 is a flowchart showing main processing as received command handling processing.

FIG. 27 is a flowchart showing a scheduling process according to the present embodiment.

FIG. 28 is an explanatory diagram showing the division of the buffering elapsed time which is a condition for determining the process to be executed in the scheduling process.

FIG. 29 is a flowchart showing command determination processing according to the present embodiment.

FIG. 30 is a flowchart showing a process A executed in the scheduling process.

FIG. 31 is a flowchart showing a process B executed in the scheduling process.

FIG. 32 is a flowchart showing a process C executed in the scheduling process.

FIG. 33 is a flowchart showing a process D executed in the scheduling process.

FIG. 34 is a flowchart showing a process E executed in the scheduling process.

FIG. 35 is a timing chart showing a specific example of a received command handling process according to the scheduling process of the present embodiment.

[Explanation of symbols]

30 STR compatible disk drive 43 NV-RA
M, 50, 70 system controller, 54 flash memory, 51, 71 IEEE 1394 controller, 60 STR, 39, 61 IEEE 1394 interface, 43, 74 NV-RAM, 44, 75
RAM, 42, 73 DSP, 116 IEEE139
4 buses

Claims (8)

[Claims] 1. A communication unit capable of mutual communication with another information communication device via a data bus having a predetermined communication format, a command received by the communication unit is held, and a corresponding process for the held command is executed. A received command handling processing means, a processing status detecting means for periodically detecting the progress status of the corresponding processing up to the present stage for each command held by the received command handling processing means, and the processing status detecting means As a response process to be executed by the received command response processing means, a response process for determining a command to be the response process and the content of the response process for the command to be the response process based on the detection result of An information communication device comprising: a determination unit. 2. The processing status detecting means is adapted to detect, as the progress status of the handling processing, a holding elapsed time for each command held by the received command handling processing means, The process determining means is configured to determine a command to be the target of the corresponding process and the content of the corresponding process based on the detected holding elapsed time. Information communication device described. 3. The processing status detecting means, for each command, shows the progress status of the corresponding processing.
The presence / absence of a provisional response issued when the final response cannot be transmitted within a prescribed time period is detected. The information communication device according to claim 1, wherein the information communication device is configured to determine a command to be the target of the corresponding process and a content of the corresponding process. 4. A communication procedure for mutual communication with another information communication device via a data bus in a predetermined communication format, a command received by the communication procedure is held, and a corresponding process for the held command is performed. The received command handling processing procedure to be executed, the processing status detecting procedure for periodically detecting the progress status of the handling processing up to the present stage for each command held by the received command handling processing procedure, and the processing status detection Based on the detection result of the procedure, as a response processing to be executed by the received command response processing procedure, a command to be a response processing target and a content of the response processing for the command to be a response processing target are determined. An information communication method characterized by executing a processing decision procedure. 5. The processing status detection procedure is adapted to detect a holding elapsed time for each command held by the received command handling processing procedure as the progress status of the handling processing. The process determination procedure is configured to determine a command to be a target of the corresponding process and a content of the corresponding process based on the detected holding elapsed time. Information communication method described. 6. The processing status detecting procedure is, for each command, as a progress status of the corresponding processing,
The presence / absence of the provisional response issued when the final response cannot be transmitted within the prescribed time is detected, and the corresponding processing determination procedure is based on the detection result regarding the presence / absence of the provisional response. The information communication method according to claim 4, wherein the command to be subjected to the corresponding process and the content of the corresponding process are configured to be determined. 7. A communication means capable of mutual communication with another information communication device via a data bus having a predetermined communication format, and at least a command transmitted by the communication means as a corresponding process for a command received by the communication means. Reception command handling processing means for generating a response to be transmitted to the original information communication device, transmission buffer means for temporarily storing information to be transmitted via the data bus by the communication means, and reception command handling When the response generated by the processing means is to be transmitted by the communication means and the transmission is impossible due to the absence of an empty area for storing the response in the transmission buffer means, The response that cannot be sent is stored in the empty area that occurs after this. An information communication device, comprising: a response transmission control unit that executes a reservation for guaranteeing that the transmission is performed to a transmission buffer unit. 8. A communication procedure capable of mutual communication with another information communication device via a data bus having a predetermined communication format, and at least a command transmission by the communication processing as a corresponding processing for a command received by the communication procedure. When an attempt is made to send the response generated by the received command handling processing and the response generated by the received command handling processing to the original information communication apparatus by the communication procedure, the information to be sent is When transmission is disabled because there is no free space in the send buffer that is temporarily stored, it is guaranteed that the response that is disabled will be stored in the free space that follows. Information transmission method characterized by executing a response transmission control procedure for making a reservation for