JP2001008116A - Communication method and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To evade the generation of timeout when many packets are continuously transmitted to a specific electronic equipment in a system or the like. SOLUTION: A receiving packet processing part 40 in an electronic equipment such as an MD deck receives a signal 201 including a packet or the like from an I/F part 30. A receiving packet processing part 40 has a receiving buffer 41 and copies a received packet or the like in the buffer 41. Data other than an AV/C command out of the copied data are supplied to a packet transmitting processing part 44. The processing part 44 prepares a response on the basis of the supplied data and outputs the prepared response to an I/F part 31. On the other hand, the AV/C command is not processed by AV/C processing, and only when an AV/C buffer 43 is free, the AV/C command is copied in the buffer 43. Then processing corresponding to the copied AV/C command is executed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication method in a system in which electronic devices are connected by a digital communication bus, and to operate in connection with transmission and reception of a command response via the digital communication bus in such a system. Related to electronic devices made in Japan.

[0002]

2. Description of the Related Art In recent years, as an interface for multimedia data transfer, the IEEE (The Institute of Ele) has realized high-speed data transfer and real-time transfer.
ctronical and Electrical Engineers) 1394, Hi
gh PerformanceSerial Bus has been standardized. In a system in which electronic devices are connected via an IEEE 1394 serial bus, transmission and reception of commands and responses are performed according to the FCP (Fun
ction Control Protocol) This is performed by sending a write request to a command register and a response register and receiving a write response.

[0003] AV / CD of AV / C Command Tranzsaction Set
digital Interface Command Set General Specification
(Hereinafter referred to as AV / C), after receiving a write response from the electronic device,
If the time elapsed before the reception of the V / C response is longer than a predetermined time (timeout time) defined in advance, it is determined that a timeout has occurred. This timeout period is specified as 100 msec.

[0004] However, depending on conditions such as the contents of the AV / C command, it may be determined in advance that the AV / C response cannot be transmitted at such a timing as to be received within the timeout period. In such a case, the electronic device returns interim indicating that the final AV / C response will be transmitted later. When this interim is received, the timeout is not defined thereafter, so that the final AV / C response should be transmitted after completing the processing according to the AV / C command. In this way, it is possible to avoid a situation where it is determined that a timeout has occurred due to the processing of the AV / C command taking a certain amount of time or more.

[0005]

However, int
Unless the erim itself is transmitted at a timing such that it is received within the timeout period, there is a problem that it is not possible to avoid a situation in which the electronic device is normally connected and is determined to be a timeout.

For example, a large number of normal 1394 request packets and response packets, and many AV / C commands and responses are continuously transmitted to a specific electronic device in the system, particularly an electronic device using a built-in microcomputer having a low power. For example, when transmitted, a situation arises in which the process of transmitting an interim cannot be performed within the timeout period.

More specifically, for example, when two AV / C commands are continuously received, the second AV / C command is executed during the period in which the processing corresponding to the first AV / C command is being performed.
The process corresponding to the C command is not performed including the process of transmitting interim. For this reason, the first AV /
If the processing corresponding to the C command requires a certain amount of time or more, the second AV / C command is executed at a timing such that it is received within the timeout period.
terim cannot be transmitted.

Accordingly, an object of the present invention is to provide a communication method and an electronic device capable of avoiding occurrence of a timeout when a large number of packets are continuously transmitted to a specific electronic device in a system. To provide.

[0009]

According to a first aspect of the present invention, in a communication method in a system in which electronic devices are connected by a digital communication bus, transmission and reception of a command and a response are performed as writing to a command register and a response register. If it is determined that the response corresponding to the received command cannot be output within the specified timeout period, the command register corresponding to the received command indicates that the received command was not accepted as a processing target. This is a communication method characterized by performing writing indicating the following.

According to a second aspect of the present invention, in an electronic device which operates in connection with transmission and reception of a command and a response via a digital communication bus, a response corresponding to the received command is transmitted within a specified timeout period. An electronic apparatus characterized in that when it is determined that output cannot be performed, writing is performed to a command register corresponding to the received command, indicating that the received command has not been accepted as a processing target.

According to a third aspect of the present invention, in a communication method in a system in which electronic devices are connected by an IEEE 1394 serial bus, a new AV / C command is received during a period in which a process corresponding to the AV / C command is being performed. In this case, a new AV /
If the response corresponding to the C command cannot be output, the IEEE1
This communication method is characterized in that writing is performed as a write response corresponding to a write request of the 394 transaction layer, indicating that a new command has not been accepted as a processing target.

According to a fourth aspect of the present invention, there is provided an electronic apparatus which operates in connection with transmission and reception of commands and responses via an IEEE 1394 serial bus.
When a new AV / C command is received during a period in which a process corresponding to the V / C command is being performed, a response corresponding to the new AV / C command cannot be output within a specified timeout period. If so, FCP
An electronic apparatus characterized by writing as a write response corresponding to an IEEE 1394 transaction layer write request to a command register, indicating that a new command has not been accepted as a processing target.

According to a fifth aspect of the present invention, in a communication method in a system in which electronic devices are connected by a digital communication bus, a packet reception processing step of performing packet reception processing and a packet to be processed by the packet reception processing step are stored. A first buffering step for performing AV / C command processing, an AV / C command processing step for performing AV / C command processing, and a second buffering step for storing AV / C commands to be processed by the AV / C command processing unit. AV by packet reception processing step
If the AV / C command packet is read and the AV / C command is not stored in the second buffer, the read AV / C command packet is stored in the second buffer, and the AV / C command processing step is performed. , At least one electronic device in the system is controlled.

According to a sixth aspect of the present invention, in an electronic apparatus which operates in connection with transmission and reception of a command and a response via a digital communication bus, a packet reception processing unit for performing a packet reception process and a packet reception processing unit A first buffer for storing packets to be processed, an AV / C command processing unit for performing AV / C command processing, and a second buffer for storing AV / C commands to be processed by the AV / C command processing unit A buffer, and when the packet reception processing unit reads the AV / C command packet, and when the AV / C command is not stored in the second buffer, the read AV / C command packet is stored in the second buffer. The electronic device is characterized in that the electronic device is stored in a buffer of the AV / C command processing unit.

According to the above invention, if it is determined that a response corresponding to a command received within a specified timeout period cannot be output, the command is not accepted as a processing target. be able to.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an example of a system in which electronic devices are connected by an IEEE 1394 serial bus. For a digital satellite receiver (STB: set-top box) 10, an MD deck 12 and a DV (Digital
Video) The decks 13 are connected by an IEEE 1394 serial bus, and data is exchanged between them. The digital satellite receiver 10 receives and demodulates digital satellite broadcasts. The MD deck 12 records / reproduces audio data and the like using a magneto-optical disk or optical disk called a mini disk (MD). The DV deck 13 is a digital video tape recorder / player adopting the DV standard.

Information stored in each device can be mutually read and written between electronic devices connected by an IEEE 1394 serial bus using a descriptor defined by AV / C. It is. For more information on AV / C, see http: //www.1394TA.or
g.

Therefore, in the system as shown in FIG. 1, the process of recording the satellite broadcast data demodulated by the digital satellite receiver 10 to the MD deck 12 or the DV deck 13 to record the data on the MD or digital video tape. , A digital satellite receiver 10 receives data recorded on an MD or digital video tape, and drives a monitor 11 based on the received data to output image information related to the data recorded on the MD or digital video tape. Processing and the like become possible.

The digital satellite receiver 10 is provided with a control panel, through which a user can input a command relating to the operation of the MD 12 and the DVHS 13. MD1
FIG. 2 shows an example of a control panel according to an operation command for the second control panel. The control panel has a display unit 20 and an operation unit 21. The display unit 20 displays the MD U-T
A title recorded in an OC (User-Table Of Content), a capacity of a recordable area, for example, an operation mode at that time such as reproduction, and the like are displayed.

Although the monitor 11 can be used as the display unit 20, another monitor may be used. Also,
The operation unit 21 includes various operation buttons and the like for a user to perform an input operation, and a display including, for example, an LED (light emitting diode) or the like indicating whether or not an MD cassette is inserted into the MD deck 12. A light 211, a time display panel 212 for displaying a reproduction time during reproduction, and the like are provided. The form of the control panel as described above is an example, and the present invention is not limited to this.

Next, transmission and reception of data according to the IEEE1394 standard will be described. The IEEE 1394 interface data transfer includes asynchronous (Asynchronous) transfer for request and acknowledgment requests and reception confirmation, and isochronous (isochronous) transfer in which data is always sent from a certain node once every 125 μs. In the IEEE 1394 interface, data is transferred in packet units. In the IEEE1394 interface, the minimum data unit handled is one quadlet.
(quadlet) (= 4 bytes = 32 bits).

In a system in which electronic devices are connected via an IEEE 1394 serial bus, transmission and reception of commands and responses are performed by transmitting a write request to a FCP command register and a response register specified by IEC61883, and receiving a write response. FIG. 3 shows an example of the mapping of the command register and the response register in the initial unit space in the serial bus addressing space. Such transmission and reception are completed as a pair of transaction processes for the IEEE 1394 transaction layer.

FIG. 4 shows an example of a temporal transition of write request transmission and write response reception (an example of a unified transaction), and FIG. 5 shows another example (an example of a split transaction). 4 and 5, the processing in the digital satellite receiver 10 is shown on a straight line P, and the processing in the MD deck 12 is shown on a straight line Q. In each of the straight lines P and Q, the direction in which time passes is downward. The digital satellite receiver 10 transmits a write request as an AV / C command. On the MD deck 12 side, the write request is received by the FCP command register.

The processing corresponding to the write request is MD
After the operation is performed on the deck 12, the MD deck 12 transmits a command approval and a write response. In the case of a unified transaction, the command acknowledgment and the write response are transmitted and received as the same link layer sub-action, and in the case of a split transaction,
Command acknowledgment and write response are transmitted and received as separate link layer sub-actions.

Thereafter, the MD deck 12 transmits a write request as an AV / C response. The digital satellite receiver 10 receives the write request using the FCP response register. Then, an approval for the write request is transmitted.

In AV / C, a timeout is defined. The timeout will be described with reference to FIG. 6, the processing in the digital satellite receiver 10 is shown on a straight line P, and the processing in the MD deck 12 is shown on a straight line Q. In each of the straight lines P and Q, the direction in which time passes is downward. As described above with reference to FIGS. 4 and 5, the digital satellite receiver 10 transmits the write request 100 as an AV / C command, and
After the processing corresponding to 0 is performed on the MD deck 12, M
The D deck 12 transmits a write response 101. M
Thereafter, the D deck 12 transmits a write request 102 as an AV / C response. Write response 101
When the elapsed time T from the time when the digital satellite receiver 10 receives the write request 102 to the time when the digital satellite receiver 10 receives the write request 102 exceeds 100 msec, it is determined that a timeout is determined. .

However, depending on conditions such as the content of the AV / C command, a situation arises in which it is determined in advance that the AV / C response cannot be transmitted at a timing such that it is received within the timeout period. Such a situation will be described below. The information displayed on the control panel as described above with reference to FIG. 2 indicates that the number of titles recorded on the MD increases by performing a new recording.
During playback, the display of the playback time changes or M
When the D cassette is ejected, the indicator light 211
It changes over time, such as when the display changes.
For this reason, the state of each electronic device needs to be provided to the digital satellite receiver 10 at a constant cycle. When music information decoded by the digital satellite receiver 10 is recorded on the MD from a satellite broadcast, various packets relating to connection processing for streaming a music stream, copyright-related processing, and the like are transmitted through the IEEE 1394 serial bus. Sent and received via

As described above, the digital satellite receiver 10
There is a possibility that various command packets and status packets are transmitted to the D deck 12. Further, in the system shown in FIG. 1, when the DV deck 13 also has a function of controlling other electronic devices, the MD deck 12 includes a plurality of electronic devices (the digital satellite receiver in FIG. 1). 10 and DV deck 1
There is a possibility to receive various packets from 3).

In order to facilitate understanding of the present invention, a general process conventionally performed in the MD deck 12 will be described with reference to FIG. The packets are denoted as P1, P2, P3, and P4 in the order in which they are received. The MD deck 12 performs a packet reception process (hereinafter, Pa
), Voice processing (hereinafter, referred to as Au), A
One-loop processing including V / C processing (hereinafter, referred to as AV / C) and TOC processing (hereinafter, referred to as TOC) is repeatedly performed on each packet. The storage contents of the reception buffer for temporarily storing received packets are shown in squares.

The first packet P1 is received,
After being held once, it is set as the target of Pa in the first one loop process. Next, after the second packet P2 is received and temporarily stored, it is set as a target of Pa in the second one-loop processing. Further, the third and fourth packets P3
P4} are sequentially received, and once held, the subsequent 1
Processed in a loop. In this case, the time D1 from the reception of P1 to the start of the processing for P1
The time D2 from the reception of P2 to the start of the processing on P2 is longer than that of D2. Thereafter, it is considered that the time from the reception of P3 and P4} to the start of the process takes longer.

Therefore, in case that an AV / C command is transmitted to the MD deck 12 or the like, a final response cannot be returned until processing corresponding to the AV / C command is completed. The configuration relating to the processing is as shown by reference numeral 39 in FIG. The reception packet processing unit 40 receives a signal 201 including a packet or the like from the I / F unit 30. The received packet or the like is copied to the reception buffer 41. Receive buffer 4
1, the data other than the AV / C command is transferred from the reception buffer 41 to the packet transmission processing unit 4.
4 is supplied.

The packet transmission processing unit 44 creates a response based on the supplied data, and outputs the created response to the I / F unit 31. On the other hand, the AV / C command is copied to the AV / C buffer 43 only when the AV / C buffer 43 is empty, that is, when the processing corresponding to another AV / C command is not performed. Then, processing corresponding to the copied AV / C command is performed by the AV / C command processing unit 42.

At this time, if a new AV / C command is received during a period in which processing corresponding to the AV / C command is being performed and copied to the AV / C buffer 43,
Processing corresponding to the new AV / C command is performed.
After the processing is completed, a time of 100 msec or more defined as the timeout time may elapse before the response is output. In particular, depending on conditions such as the type of a new AV / C command, for example, TOC
Such a situation often occurs when processing takes time.

In order to avoid being processed as a timeout in such a case, the present invention employs A
If a new AV / C command is received during the period in which the processing corresponding to the V / C command is being performed, the new AV / C command is not copied to the AV / C buffer 43, and a 1394 write request is issued. Resp_conflict_error is output as a 1394 write response corresponding to.

More specifically, the AV / C command processing section 42 reads a newly received packet, and if the packet to be read is an AV / C command, the AV / C buffer 43 is empty. That is, A
It is checked whether the V / C command has not been copied. If it is determined that the AV / C buffer 43 is empty, the newly received packet is copied to the AV / C buffer 43. Then, a process corresponding to the copied AV / C command is performed. On the other hand, when it is determined that there is no free space in the AV / C buffer 43, resp_conflict_error is output based on the determination that the AV / C processing corresponding to the previously received packet is being performed. .

Such processing will be described with reference to FIG. In FIG. 10, notations similar to those in FIG. 7 are used, but the dotted squares indicate the storage contents of the AV / C buffer 43. The first packet P1 is stored in the reception packet buffer 41 shown by a solid square, and the packet reception process in the first one loop processing period is performed. In this packet receiving process, it is determined whether or not to store the packet P1 in the AV / C buffer 43. At this time, AV /
Since the C processing is not performed and the AV / C buffer 43 has a free space, the packet P1 is stored in the AV / C buffer 43, and the AV / C processing related to the packet P1 is started. Then, during the third one-loop processing period, the AV / C processing related to the packet P1 ends, and resp_coomplete indicating the completion of the processing is output as a write response as indicated by the solid arrow.

Next, the second packet P2 is stored in the reception packet buffer 41 indicated by a solid square, and the packet reception processing in the second one-loop processing period is performed. In this packet receiving process, it is determined whether or not to store the packet P2 in the AV / C buffer 43.
At this time, since the AV / C processing relating to the packet P1 is being performed, and there is no free space in the AV / C buffer 43, the packet P2 is not stored in the AV / C buffer 43, and the processing is completed as indicated by the dotted arrow. Indicating resp_conflict_err
or is output as a write response.

Further, the third packet P3 is stored in the reception packet buffer 41 indicated by a solid square, and the packet reception processing in the third one-loop processing period is performed. In this packet receiving process, the packet P3
Is stored in the AV / C buffer 43. At this time, the AV / C processing relating to the packet P1 is being performed, and since there is no free space in the AV / C buffer 43, the packet P3 is not stored in the AV / C buffer 43, and the processing is completed as indicated by the dotted arrow. Resp_conflict_
error is output as a write response.

Next, the fourth packet P4 is stored in the reception packet buffer 41 indicated by a solid square, and the packet reception processing in the fourth one-loop processing period is performed. In this packet receiving process, it is determined whether or not the packet P4 is stored in the AV / C buffer 43.
At this time, since the AV / C processing relating to the packet P1 has been completed, the AV / C processing has not been performed, and since there is free space in the AV / C buffer 43, the packet P4 is
AV / C stored in buffer 43 and related to packet P4
Processing is started. Then, in the fifth one loop processing period, the AV / C processing related to the packet P1 ends, and resp_complete indicating the processing completion is output as a write response as indicated by a solid arrow.

Therefore, in one embodiment of the present invention, the AV
The table shown in FIG. 9 can be used as the table of the / C response code. Here, resp_
Code 4 is assigned to conflict_error.

By outputting resp_conflict_error as a response, an AV / C command received by the MD deck 12 during a period in which AV / C processing is being performed is accepted as an object of AV / C processing, that is, AV / C processing is performed.
For example, the digital satellite receiver 10 indicates that no processing is performed without being stored in the C buffer. As a result, a new AV / C command is received during a period in which the MD deck 12 is performing AV / C processing, and a time period of 100 msec or more is required until the processing corresponding to the newly received AV / C command is completed. Can be prevented from being determined as time-out after elapse. Therefore, it is possible to comply with the AV / C time rule regarding timeout.

Thereafter, after the AV / C processing is completed, M
The AV / C command newly supplied to the D deck 12 is A
The data is stored in the V / C buffer 43 and the processing described above with reference to FIG. 7 is performed.

FIG. 11 shows an example of a flowchart showing the procedure of processing according to an embodiment of the present invention. In step S1, a packet is read from the data transmitted to the MD deck 12. In step S2, it is determined whether or not an AV / C command is included in the packet read in step S1. If it is determined that there is an AV / C command, the process proceeds to step S3; otherwise, the process proceeds to step S4. In step S4,
For example, a response content is created by referring to a table as shown in FIG. 9, and the process proceeds to step S8.

On the other hand, in step S3, it is determined whether or not the AV / C buffer 43 is empty, that is, whether or not an AV / C command is stored in the AV / C buffer 43. If it is determined that the AV / C buffer 43 is empty, the process proceeds to step S6; otherwise, the process proceeds to step S5. In step S6, AV / C
The AV / C command is copied to the buffer 43, and the flow shifts to step S7. In step S7, the AV / C command corresponding to the AV / C command copied in step S6
It performs command processing and AV / C response creation. Then, control goes to a step S8.

In step S5, the above-described resp_conflict_error is created as an error response indicating that the command is not accepted as an object of the AV / C command processing. Then, control goes to a step S8. In step S8, it is determined whether the transmission buffer 45 is empty.
If it is determined that the transmission buffer 45 is empty, the process proceeds to step S9, otherwise, step S8 is performed again.

That is, step S8 is a step of delaying the writing of the command processing result and the response created in step S4, step S5, or step S7 until the transmission buffer 45 becomes empty. In step S9, writing to the transmission buffer 45 is performed.
Move to step S10. In step S10, a packet such as a response written in the transmission buffer 45 is transmitted.

The present invention is not limited to the above-described embodiment of the present invention, and various modifications and applications are possible without departing from the gist of the present invention.

[0048]

According to the present invention, when it is determined that a response corresponding to a received command cannot be output within a specified timeout period, the received command is not accepted as a processing target. can do.

Therefore, in response to the received command,
If all processes including the process of outputting “intermin” as a response are not completed within the timeout period, the received command will not be accepted.

Therefore, for example, when a large number of commands are received by a specific electronic device in the system, the processing of a command received subsequently is terminated due to the time required to process a certain command. It is possible to avoid that the time until the time exceeds the timeout time and the determination is made as the timeout.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an example of a system to which the present invention can be applied.

FIG. 2 is a schematic diagram for explaining control on an MD.

FIG. 3 is a schematic diagram illustrating an example of mapping of a command register and a response register.

FIG. 4 is a schematic diagram illustrating an example of a temporal transition of a write request transmission and a write response reception (an example of a unified transaction).

FIG. 5 is a schematic diagram illustrating another example (an example of a split transaction) of a temporal transition of write request transmission and write response reception.

FIG. 6 is a schematic diagram illustrating a timeout.

FIG. 7 is a schematic diagram for explaining a general AV / C process performed conventionally.

FIG. 8 is a block diagram illustrating an example of a partial configuration of an embodiment of the present invention.

FIG. 9 is a schematic diagram illustrating an example of an AV / C response code table according to an embodiment of the present invention.

FIG. 10 is a schematic diagram illustrating an AV / C process according to an embodiment of the present invention.

FIG. 11 is a flowchart illustrating a process according to an embodiment of the present invention.

[Explanation of symbols]

12 MD deck, 40 received packet processing unit, 41 reception buffer, 42 AV / C command processing unit, 43 AV / C buffer

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Kei Inoue 6-7-35 Kita Shinagawa, Shinagawa-ku, Tokyo Sony Corporation F-term (reference) 5C025 AA30 BA30 CA02 CA16 CA19 DA04 DA08 5K032 AA05 CD01 DB18 DB20 DB22

Claims (6)

[Claims] In a communication method in a system in which electronic devices are connected by a digital communication bus, transmission and reception of a command and a response are performed as writing to a command register and a response register, and a response corresponding to the received command is defined. When it is determined that the command cannot be output within the timeout period, the command register corresponding to the received command is written to indicate that the received command has not been accepted as a processing target. Communication method to be used. 2. An electronic device which operates in connection with transmission and reception of a command and a response via a digital communication bus, cannot output a response corresponding to the received command within a specified timeout period. If it is determined that the received command has not been received as a processing target, the electronic device performs writing in a command register corresponding to the received command. 3. A communication method in a system in which electronic devices are connected by an IEEE 1394 serial bus, the method being defined when a new AV / C command is received while a process corresponding to the AV / C command is being performed. Within the time-out period, the new AV / C
If it is not possible to output a response corresponding to the command, an IEEE13
94. A communication method comprising writing as a write response corresponding to a write request of a transaction layer 94, indicating that the new command has not been accepted as a processing target. 4. An electronic device that operates in connection with transmission and reception of commands and responses via an IEEE 1394 serial bus, wherein a new AV / C command is transmitted during a period in which processing corresponding to the AV / C command is being performed. If the new AV / C is received within the specified timeout time
If it is not possible to output a response corresponding to the command, an IEEE13
94. An electronic apparatus which performs writing as a write response corresponding to a write request of a 94 transaction layer, indicating that the new command has not been accepted as a processing target. 5. A communication method in a system in which electronic devices are connected by a digital communication bus, wherein: a packet reception processing step of performing a packet reception processing; and a first storing a packet to be processed by the packet reception processing step. A buffering step, an AV / C command processing step for performing AV / C command processing, and an A to be processed by the AV / C command processing unit.
A second buffering step of storing a V / C command; and a step of reading an AV / C command packet by the packet receiving processing step; and a step of storing an AV / C command in the second buffer. Storing the read AV / C command packet in the second buffer, and controlling at least one electronic device in the system to perform the AV / C command processing step. Communication method. 6. An electronic device adapted to operate in connection with transmission and reception of commands and responses via a digital communication bus, a packet reception processing unit for performing packet reception processing, and a packet reception processing unit to be processed by the packet reception processing unit. A first buffer for storing packets, an AV / C command processing unit for performing AV / C command processing, and an A to be processed by the AV / C command processing unit.
A second buffer for storing a V / C command, wherein when the packet reception processing unit reads an AV / C command packet, when the AV / C command is not stored in the second buffer, Wherein the read AV / C command packet is stored in the second buffer, and is processed by the AV / C command processing unit.