JP2003273162A - Manufacturing method for mounting body - Google Patents
Manufacturing method for mounting bodyInfo
- Publication number
- JP2003273162A JP2003273162A JP2002069604A JP2002069604A JP2003273162A JP 2003273162 A JP2003273162 A JP 2003273162A JP 2002069604 A JP2002069604 A JP 2002069604A JP 2002069604 A JP2002069604 A JP 2002069604A JP 2003273162 A JP2003273162 A JP 2003273162A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- circuit board
- wiring pattern
- mounting body
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は実装体の製造方法に
関し、更に詳しくは、半導体装置に形成された突起電極
と樹脂回路基板上に形成された配線パターンとを位置合
わせして、絶縁性接着剤層を介して前記半導体装置を加
熱加圧して前記突起電極と前記配線パターンとの間に拡
散接合層を形成した実装体の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a mounting body, and more specifically, it aligns a protruding electrode formed on a semiconductor device with a wiring pattern formed on a resin circuit board to perform insulating bonding. The present invention relates to a method of manufacturing a mounting body in which a diffusion bonding layer is formed between the protruding electrode and the wiring pattern by heating and pressing the semiconductor device via an agent layer.
【０００２】[0002]
【従来の技術】樹脂回路基板上に半導体装置を異方性導
電接着剤で接続させて形成された実装体の製造方法が実
用化されている。この従来の技術における半導体装置の
接続方法を図５の工程断面図と図６の実装後の状態示す
断面図を用いて説明する。2. Description of the Related Art A method of manufacturing a package formed by connecting a semiconductor device on a resin circuit board with an anisotropic conductive adhesive has been put into practical use. A method for connecting semiconductor devices in this conventional technique will be described with reference to process sectional views of FIG. 5 and sectional views showing a state after mounting of FIG.
【０００３】従来の技術における実装体は、図６に示す
様に、半導体装置１１の突起電極１２と樹脂回路基板１
３の配線パターン１６とをその配線パターン１６上に形
成した錫メッキ１７と、異方性導電接着剤２２を構成す
る絶縁性接着剤樹脂２０に混入した導電粒子２３を介し
て接続を行う構造になっているのが特徴である。なお、
符号１４は、樹脂回路基板１３のベース基板を示し、符
号１５は、前記配線パターン１６と前記ベース基板とを
貼りあわせるための接着剤である。As shown in FIG. 6, the mounting body in the prior art has a bump electrode 12 of a semiconductor device 11 and a resin circuit board 1.
The wiring pattern 16 of No. 3 is connected to the tin plating 17 formed on the wiring pattern 16 and the conductive particles 23 mixed in the insulating adhesive resin 20 forming the anisotropic conductive adhesive 22. It is characterized by becoming. In addition,
Reference numeral 14 indicates a base substrate of the resin circuit board 13, and reference numeral 15 is an adhesive for bonding the wiring pattern 16 and the base substrate together.
【０００４】その製造方法は、まず図５（ａ）に示すよ
うに、樹脂回路基板１３の半導体装置１１を搭載する部
分に異方性導電接着剤２２を転写する。ここで用いる異
方性導電接着剤２２は、エポキシ系接着剤に導電性を持
たせるために直径５〜１０μｍの銀やハンダなどの金属
粒子またはプラスチック樹脂粒子の表面に金（Ａｕ）メ
ッキを施した導電粒子２３を混入した材料である。In the manufacturing method, first, as shown in FIG. 5A, the anisotropic conductive adhesive 22 is transferred to the portion of the resin circuit board 13 on which the semiconductor device 11 is mounted. The anisotropic conductive adhesive 22 used here is plated with gold (Au) on the surface of metal particles such as silver or solder having a diameter of 5 to 10 μm or plastic resin particles in order to make the epoxy adhesive conductive. It is a material mixed with the conductive particles 23.
【０００５】次に、図５（ｂ）に示すように、対向する
樹脂回路基板１３の配線パターン１６と半導体装置１１
を位置合わせし、樹脂回路基板１３に搭載する。樹脂回
路基板１３上に形成される配線パターン１６の材料は、
銅または金などが一般的である。Next, as shown in FIG. 5B, the wiring pattern 16 of the resin circuit board 13 and the semiconductor device 11 facing each other.
Are aligned and mounted on the resin circuit board 13. The material of the wiring pattern 16 formed on the resin circuit board 13 is
Copper or gold is common.
【０００６】次に、図５（ｃ）に示すように、加熱加圧
ヘッド１８を用いて半導体装置１１を樹脂回路基板１３
に熱圧着し、異方性導電接着剤２２の接着剤樹脂成分を
硬化させる。Next, as shown in FIG. 5C, the semiconductor device 11 is mounted on the resin circuit board 13 by using the heating and pressing head 18.
Then, the adhesive resin component of the anisotropic conductive adhesive 22 is cured by thermocompression bonding.
【０００７】その接着剤樹脂成分が硬化すれば、図５
（ｄ）に示すように、半導体装置１１は樹脂回路基板１
３上に固着されるとともに、半導体装置１１の突起電極
１２と配線パターン１６間の導通も確保される。When the adhesive resin component is hardened, as shown in FIG.
As shown in (d), the semiconductor device 11 has a resin circuit board 1
While being fixed on the wiring 3, the electrical connection between the bump electrode 12 of the semiconductor device 11 and the wiring pattern 16 is secured.
【０００８】[0008]
【発明が解決しようとする課題】従来技術では、半導体
装置１１の突起電極１２の間隔を狭くして、隣接端子間
の間隔が狭くなると導電粒子２３が端子間で連なってシ
ョートし易くなる問題がある。よって、従来の方法は狭
い端子間隔の実装体の形成方法には適応できない。In the prior art, when the distance between the protruding electrodes 12 of the semiconductor device 11 is narrowed and the distance between the adjacent terminals is narrowed, the conductive particles 23 are continuously connected between the terminals and a short circuit easily occurs. is there. Therefore, the conventional method cannot be applied to a method of forming a mounting body having a narrow terminal interval.
【０００９】また、従来技術では、電気的接続は半導体
装置１１の突起電極１２と樹脂回路基板１３の配線パタ
ーン１６を異方性導電接着剤２２中に混入した導電粒子
２３により行っているので、突起電極１２と導電粒子２
３、その導電粒子と配線パターン１６との間に接触抵抗
が残ってしまう。また電流が流れる経路も導電粒子２３
表面の金属層を介して行っているため、大きな電流を流
せない。この様に従来技術では接続抵抗を低くできない
という問題がある。Further, in the prior art, the electrical connection is made by the conductive particles 23 in which the bump electrodes 12 of the semiconductor device 11 and the wiring pattern 16 of the resin circuit board 13 are mixed in the anisotropic conductive adhesive 22. Projection electrode 12 and conductive particle 2
3. Contact resistance remains between the conductive particles and the wiring pattern 16. The path through which the current flows is also the conductive particles 23.
Since it is done through the metal layer on the surface, a large current cannot flow. As described above, the conventional technique has a problem that the connection resistance cannot be lowered.
【００１０】本発明の目的は上記課題を解決するため
に、樹脂回路基板の配線パターンの表面材料と、半導体
装置の端子部分に形成した突起電極の表面材料との間で
拡散接合層を形成して両端子を部分的に接続させること
で、隣接端子間に導電材料が存在せず狭い端子間隔でも
ショートし難く、さらに低抵抗な接続をことができる実
装体の製造方法を提供することである。In order to solve the above problems, an object of the present invention is to form a diffusion bonding layer between the surface material of the wiring pattern of the resin circuit board and the surface material of the protruding electrode formed on the terminal portion of the semiconductor device. To provide a method for manufacturing a mounting body in which a conductive material does not exist between adjacent terminals, short-circuiting does not easily occur even in a narrow terminal space, and connection with low resistance can be performed by partially connecting both terminals with each other. .
【００１１】[0011]
【課題を解決するための手段】本発明は、上記目的を達
成するために、基本的には下記に記載されたような技術
を採用するものである。In order to achieve the above object, the present invention basically employs the technique as described below.
【００１２】すなわち、本発明において上記課題を解決
するための第１の手段は、半導体装置の能動素子面に形
成された突起電極と、樹脂回路基板上に形成された配線
パターンとを接続した実装体の製造方法において、前記
樹脂回路基板の耐熱温度より低い温度で拡散接合ができ
る二つの金属の組合わせの一方の金属で少なくとも表面
が覆われた突起電極形成と、前記組合わせの他方の金属
で少なくとも表面が覆われた配線パターンとを当接させ
て、前記拡散接合を可能とする温度で加熱加圧力を付与
しながら前記突起電極の表面材料と前記配線パターンの
表面材料の当接面に拡散接合層を形成する実装体形成工
程を有する方法を採用したことである。That is, the first means for solving the above-mentioned problems in the present invention is mounting in which the protruding electrodes formed on the active element surface of the semiconductor device and the wiring pattern formed on the resin circuit board are connected. In the method for manufacturing a body, a protruding electrode formation at least the surface of which is covered with one metal of a combination of two metals capable of diffusion bonding at a temperature lower than the heat resistant temperature of the resin circuit board, and the other metal of the combination. And contact the wiring pattern at least the surface of which is applied to the contact surface of the surface material of the protruding electrode and the surface material of the wiring pattern while applying a heating pressure at a temperature that enables the diffusion bonding. That is, a method including a mounting body forming step of forming a diffusion bonding layer is adopted.
【００１３】また、第２の手段は、前記突起電極と前記
配線パターンを接合する領域に形成される絶縁性接着剤
層形成工程を行った後に前記実装体形成工程を行う方法
を採用したことであり、第３の手段は、前記絶縁性接着
剤層に熱硬化性樹脂を用い、前記実装体形成工程におけ
る拡散接合層の形成と同時に、その熱硬化性樹脂を硬化
させる方法を採用したことであり、第４の手段は、前記
絶縁性接着剤層工程は、シート状の熱硬化性樹脂を前記
樹脂回路基板上に転写して形成する方法を採用したこと
であり、第５の手段は、前記配線パターンと前記突起電
極の一方の部材が金を主成分とする材料であり、他方の
部材が錫を主成分とする材料としたことであり、第６の
手段は、第５の手段における前記拡散接合を可能とする
加熱温度を２８０から３００度としたことである。The second means adopts a method of performing the mounting body forming step after performing the insulating adhesive layer forming step formed in the region where the protruding electrode and the wiring pattern are joined. The third means is that a thermosetting resin is used for the insulating adhesive layer, and the thermosetting resin is cured simultaneously with the formation of the diffusion bonding layer in the mounting body forming step. The fourth means is that the insulating adhesive layer step adopts a method of forming a sheet-shaped thermosetting resin by transferring it onto the resin circuit board, and the fifth means is that One of the wiring pattern and the protruding electrode is a material containing gold as a main component, and the other member is a material containing tin as a main component. The sixth means is the same as the fifth means. The heating temperature that enables the diffusion bonding is 280 Is that in which the controller 300 degrees.
【００１４】（作用）本発明では、樹脂回路基板の材料
の耐熱温度より低い拡散接合を可能とする二つの金属の
組合わせの一方の金属で少なくとも表面に被覆された突
起電極と、前記組合わせの他方の金属で少なくとも表面
が覆われた配線パターンを熱圧着して、その当接面にだ
け選択的に拡散接合層を形成して接続する方法を採用し
た。この構成を採用することで、従来構成で頻発してい
た導電粒子によるショート欠陥が発生しない、端子間隔
の狭い実装が可能になる。(Function) In the present invention, the projection electrode coated at least on the surface with one metal of the combination of the two metals that enables diffusion bonding lower than the heat resistant temperature of the material of the resin circuit board, and the combination described above. In this method, a wiring pattern at least the surface of which is covered with the other metal is thermocompression bonded, and a diffusion bonding layer is selectively formed only on the contact surface to connect the wiring pattern. By adopting this configuration, it is possible to perform mounting with a narrow terminal interval, which does not cause short-circuit defects due to conductive particles that frequently occur in conventional configurations.
【００１５】また、両端子に配した材料の拡散接合層に
より、前記半導体装置と回路樹脂基板の２つの部材が一
体の部材となるため、従来構成と比べて低抵抗の接合を
可能とする。Further, since the two members of the semiconductor device and the circuit resin substrate are made into an integral member by the diffusion bonding layer of the material arranged on both terminals, it is possible to perform the bonding with lower resistance as compared with the conventional structure.
【００１６】さらに、実装体形成工程の前に、前記樹脂
回路基板上に絶縁性接着剤樹脂として熱硬化性樹脂を予
め所定の位置に配置しておくことで、半導体装置と配線
パターンの拡散接合の形成と同時に、拡散接合層形成時
に加える熱により、接続端子部のモールドと両部材の固
着のために配する熱硬化性樹脂を熱硬化させることがで
きる。この方法を採用することで、単純な工程で実装体
を形成することができる。Further, before the mounting body forming step, a thermosetting resin as an insulating adhesive resin is previously arranged at a predetermined position on the resin circuit board, so that the semiconductor device and the wiring pattern are diffusion-bonded. Simultaneously with the formation of the above, the thermosetting resin provided for fixing the mold of the connection terminal portion and both members can be thermoset by the heat applied when forming the diffusion bonding layer. By adopting this method, the mounting body can be formed by a simple process.
【００１７】ここで例えば、突起電極の表面材料を金と
し、配線パターンの表面材料を錫とした場合について考
える。金の融点は約１０６４℃ある。それに対して錫の
融点は２３０℃付近である。この両部材を当接させて２
８０℃程度に加熱すると、溶解した錫が金の組成内に入
り込んで一部の金原子が錫と合金化した拡散接合層をそ
の当接面にのみ形成することができる。このことによ
り、端子間隔の狭い実装体を形成することができるので
ある。Here, for example, consider a case where the surface material of the bump electrode is gold and the surface material of the wiring pattern is tin. The melting point of gold is about 1064 ° C. On the other hand, the melting point of tin is around 230 ° C. Abutting these two members together 2
When heated to about 80 ° C., the dissolved tin enters the composition of gold and a diffusion bonding layer in which some gold atoms are alloyed with tin can be formed only on the contact surface. This makes it possible to form a mounting body having a narrow terminal interval.
【００１８】なお、前述の構成例だけでなく、前記突起
電極の表面材料を錫、配線パターンに金を用いて実装体
を形成することも可能である。In addition to the above-mentioned configuration example, it is also possible to form the mounting body by using tin as the surface material of the protruding electrode and gold as the wiring pattern.
【００１９】この様に、本発明の方法を用いれば、従来
技術よりも微細な端子間で接続でき、低抵抗接続の実装
体構造を得ることができる。As described above, when the method of the present invention is used, finer terminals can be connected than in the prior art, and a low resistance connection mounting structure can be obtained.
【００２０】[0020]
【発明の実施の形態】以下図面を用いて本発明の実施形
態における半導体装置の実装方法を説明する。図１は本
発明の半導体装置の断面図、図２は樹脂回路基板の断面
図、図３は実装工程を示した工程断面図、図４は実装後
の断面図である。以下図１、図２、図３、図４を用いて
説明する。なお、本発明で適用する、樹脂回路基板の材
料の耐熱温度より低い拡散接合を可能とする金属の組合
わせを金と錫とし、突起電極の表面材料を金、配線パタ
ーンの表面材料を錫とした場合を以下に説明するが、こ
の材料は、拡散接合を可能とする金属であれば良く、例
えば金、錫、銀、アンチモン、インジウム、亜鉛等の材
料の組合わせ、またはその合金からなる材料を使用用途
に応じて任意に選択し、本発明の手順により実装体を形
成することができる。DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device mounting method according to an embodiment of the present invention will be described below with reference to the drawings. 1 is a cross-sectional view of a semiconductor device of the present invention, FIG. 2 is a cross-sectional view of a resin circuit board, FIG. 3 is a process cross-sectional view showing a mounting process, and FIG. 4 is a cross-sectional view after mounting. This will be described below with reference to FIGS. 1, 2, 3, and 4. In the present invention, the combination of metals that enables diffusion bonding lower than the heat resistant temperature of the material of the resin circuit board is gold and tin, the surface material of the bump electrode is gold, and the surface material of the wiring pattern is tin. This case will be described below, but this material may be any metal that enables diffusion bonding, for example, a combination of materials such as gold, tin, silver, antimony, indium and zinc, or a material made of an alloy thereof. Can be arbitrarily selected according to the intended use, and a mounting body can be formed by the procedure of the present invention.
【００２１】図１に本発明に用いる半導体装置１１の端
子部分の構造を示す。半導体装置１１の端子部分のパッ
ド上に金の突起電極１２を形成した構造とした。突起電
極１２の高さは５から２０μｍでメッキ法や真空蒸着
法、またはスパッタリング法とフォトリソグラフィー
法、エッチング法等を組合わせて形成できる。FIG. 1 shows the structure of the terminal portion of the semiconductor device 11 used in the present invention. The structure is such that the gold protruding electrodes 12 are formed on the pads of the terminal portion of the semiconductor device 11. The height of the protruding electrode 12 is 5 to 20 μm, and it can be formed by a combination of a plating method, a vacuum deposition method, a sputtering method, a photolithography method, an etching method, and the like.
【００２２】また図２に本発明で用いる樹脂回路基板１
３の構造を示す。一般的な樹脂回路基板に用いられてい
るガラスエポキシ樹脂もしくはポリイミド樹脂をベース
基板１４とし、厚さが５〜２０μｍで銅や金の膜をベー
ス基板に接着剤１５にて貼りあわせた配線パターン１６
を形成し、さらに配線パターン１６の表面に無電解メッ
キ法にて厚さ０．０１〜０．５μｍの錫メッキ１７を施
した構造とした。Further, FIG. 2 shows a resin circuit board 1 used in the present invention.
The structure of 3 is shown. A wiring pattern 16 in which a glass epoxy resin or a polyimide resin used in a general resin circuit board is used as a base substrate 14 and a copper or gold film having a thickness of 5 to 20 μm is attached to the base substrate with an adhesive 15.
And a tin plating 17 having a thickness of 0.01 to 0.5 μm is formed on the surface of the wiring pattern 16 by an electroless plating method.
【００２３】なお、前記配線パターン１６は、真空蒸着
またはスパッタ法などでベース基板１４上に直接堆積さ
せ、エッチング法でパターンニングし直接ベース基板１
４に配線パターン１６を形成しても構わない。The wiring pattern 16 is directly deposited on the base substrate 14 by a vacuum deposition method or a sputtering method and patterned by an etching method to directly form the base substrate 1.
The wiring pattern 16 may be formed on the wiring 4.
【００２４】実装工程は、まず図３（ａ）に示すよう
に、後の工程で半導体装置１１を実装する部分にシート
状の熱硬化性樹脂である絶縁性接着剤樹脂２０を図２に
おける樹脂回路基板１３上に転写した。なおこの絶縁性
接着剤樹脂２０は、実装する半導体装置１１と同じ大き
さ、または外形より２ｍｍ程度大きい範囲の樹脂を用い
た。その転写方法は、ヒーターで８０℃から１００℃に
加熱した加熱ヘッドで絶縁性接着剤樹脂２０を熱圧着し
て行った。また、ここでシート状の絶縁性接着剤樹脂２
０ではなく、ペースト状の樹脂を用いても構わない。In the mounting step, as shown in FIG. 3A, first, the insulating adhesive resin 20 which is a sheet-like thermosetting resin is attached to the resin in FIG. It was transferred onto the circuit board 13. As the insulating adhesive resin 20, a resin having the same size as the semiconductor device 11 to be mounted or a range larger than the outer shape by about 2 mm was used. The transfer method was performed by thermocompression bonding the insulating adhesive resin 20 with a heating head heated from 80 ° C. to 100 ° C. with a heater. In addition, here, the sheet-shaped insulating adhesive resin 2
Instead of 0, a paste resin may be used.
【００２５】前記絶縁性接着剤樹脂２０の厚さは、実装
する半導体装置１１に形成する突起電極１２の高さと樹
脂回路基板１３上に形成する配線パターン１６の高さで
決定する。たとえば、半導体装置１１の突起電極１２の
高さを２０μmとし、樹脂回路基板１３上の配線パター
ン１６の高さを１８μmとすると、その高さの合計が３
８μmとなるので、絶縁性接着剤樹脂２０の厚さを３８
μm以上の厚さに設定する必要がある。絶縁性接着剤樹
脂２０は印刷法や転写法などで膜状に形成するが、形成
の精度を考慮して１０μm程度厚く形成することが好ま
しい。従ってここでは５０μmの厚さで絶縁性接着剤樹
脂２０を形成した。The thickness of the insulating adhesive resin 20 is determined by the height of the bump electrodes 12 formed on the mounted semiconductor device 11 and the height of the wiring pattern 16 formed on the resin circuit board 13. For example, if the height of the bump electrode 12 of the semiconductor device 11 is 20 μm and the height of the wiring pattern 16 on the resin circuit board 13 is 18 μm, the total height is 3 μm.
Since the thickness is 8 μm, the thickness of the insulating adhesive resin 20 should be 38
It is necessary to set the thickness to at least μm. The insulating adhesive resin 20 is formed in a film shape by a printing method, a transfer method, or the like, but it is preferable to form the insulating adhesive resin 20 with a thickness of about 10 μm in consideration of the formation accuracy. Therefore, the insulating adhesive resin 20 is formed here with a thickness of 50 μm.
【００２６】前記絶縁性接着剤樹脂２０は、絶縁性の樹
脂であればよく熱硬化性樹脂、熱可塑性樹脂、紫外線硬
化性樹脂のいずれでも良い。たとえば、エポキシ樹脂、
フェノール樹脂、ポリアミド樹脂、フッ素樹脂、シリコ
ーン樹脂、アクリル樹脂等の樹脂を用いることができ
る。本実施例では、実装体形成段階での熱処理を一括し
て行うことができ、工程の短縮化に最も貢献できるエポ
キシ系熱硬化性樹脂を用いた。The insulating adhesive resin 20 may be an insulating resin, and may be a thermosetting resin, a thermoplastic resin, or an ultraviolet curable resin. For example, epoxy resin,
Resins such as phenol resin, polyamide resin, fluororesin, silicone resin and acrylic resin can be used. In this embodiment, the epoxy thermosetting resin that can collectively perform the heat treatment at the mounting body formation stage and contributes most to the shortening of the process is used.
【００２７】その後、図３（ｂ）に示すように樹脂回路
基板１３上の配線パターン１６と半導体装置１１に形成
された突起電極１２とを位置合わせし、半導体装置１１
を樹脂回路基板１３に搭載した。After that, as shown in FIG. 3B, the wiring pattern 16 on the resin circuit board 13 and the protruding electrode 12 formed on the semiconductor device 11 are aligned with each other, and the semiconductor device 11
Was mounted on the resin circuit board 13.
【００２８】次に図３（ｃ）に示すように、加熱加圧ヘ
ッド１８を用いて半導体装置１１を樹脂回路基板１３に
熱圧着した。ここで用いる加熱加圧ヘッド１８は、ヒー
ター１９と図示しない熱電対を備え、ヒーター１９で加
熱し熱電対で温度制御できる構成になっている。このと
き熱圧着時に半導体装置１１の突起電極１２と当接した
樹脂回路基板１３の配線パターン１６上の錫メッキ１７
の部分が局所的に溶融し、突起電極１２の金と配線パタ
ーン１６上の錫の当接面にだけ拡散接合層を形成するこ
とができる。また、前記加熱加圧ヘッド１８の熱により
絶縁性接着剤樹脂２０も同時に硬化し、半導体装置１１
を樹脂回路基板１３に固着させる。Next, as shown in FIG. 3C, the semiconductor device 11 was thermocompression bonded to the resin circuit board 13 using the heating and pressing head 18. The heating / pressurizing head 18 used here is provided with a heater 19 and a thermocouple (not shown), and is configured to be heated by the heater 19 and temperature control by the thermocouple. At this time, tin plating 17 on the wiring pattern 16 of the resin circuit board 13 that was in contact with the protruding electrodes 12 of the semiconductor device 11 during thermocompression bonding
The portion is melted locally, and the diffusion bonding layer can be formed only on the contact surface between the gold of the protruding electrode 12 and the tin on the wiring pattern 16. In addition, the insulating adhesive resin 20 is simultaneously cured by the heat of the heating / pressurizing head 18, and the semiconductor device 11
Is fixed to the resin circuit board 13.
【００２９】ここで熱圧着時に加える温度は、少なくと
も錫が溶融し拡散接合する温度以上に加熱する必要があ
る。例えば金と錫は２８０℃付近で拡散接合層を形成す
るので、加熱温度は２８０℃から３００℃程度で、圧力
は半導体装置１１の突起電極１２のサイズに対して、１
０〜１０００ｋｇ／ｃｍ2の範囲で行う。圧着時間は５
秒から1分程度で十分である。The temperature applied during thermocompression bonding should be at least higher than the temperature at which tin is melted and diffusion bonded. For example, since gold and tin form a diffusion bonding layer at around 280 ° C., the heating temperature is about 280 ° C. to 300 ° C., and the pressure is 1 to the size of the bump electrode 12 of the semiconductor device 11.
It is performed in the range of 0 to 1000 kg / cm 2 . Crimping time is 5
Seconds to 1 minute is sufficient.
【００３０】金と錫による拡散接合と絶縁性接着剤樹脂
２０の硬化が終了すれば、図３（ｄ）に示すように、半
導体装置１１は樹脂回路基板１３上に固着され、半導体
装置１１の突起電極１２と配線パターン１６上に配設し
た錫メッキ１７間で拡散接合層を形成した状態を保持で
きる。When the diffusion bonding of gold and tin and the curing of the insulating adhesive resin 20 are completed, the semiconductor device 11 is fixed on the resin circuit board 13 as shown in FIG. It is possible to maintain the state in which the diffusion bonding layer is formed between the bump electrode 12 and the tin plating 17 provided on the wiring pattern 16.
【００３１】図４に半導体装置１１と樹脂回路基板１３
からなる実装体形成後の構造断面図を示す。熱圧着時の
熱で拡散接合した金と錫は、絶縁性接着剤樹脂２０で周
りが囲われているので、半導体装置１１の突起電極１２
と樹脂回路基板１３の配線パターン１６間でのみ拡散接
合させることができ、拡散接合した金属が周辺に溶け広
がることはない。したがって、隣接端子間でショートす
ることはない。FIG. 4 shows the semiconductor device 11 and the resin circuit board 13.
FIG. 3 is a structural cross-sectional view after the mounting body including is formed. Since the gold and tin that are diffusion-bonded by heat during thermocompression bonding are surrounded by the insulating adhesive resin 20, the bump electrodes 12 of the semiconductor device 11 are surrounded.
And the wiring pattern 16 of the resin circuit board 13 can be diffusion-bonded only, and the diffusion-bonded metal does not melt and spread to the periphery. Therefore, there is no short circuit between adjacent terminals.
【００３２】また熱圧着後には、半導体装置１１の突起
電極１２と樹脂回路基板１３の配線パターン１６の接続
界面には、金−錫の拡散接合層２１が形成され、突起電
極１２と配線パターン１６はこの拡散接合層を通して一
体化した構造になる。After thermocompression bonding, a gold-tin diffusion bonding layer 21 is formed at the connection interface between the bump electrode 12 of the semiconductor device 11 and the wiring pattern 16 of the resin circuit board 13, and the bump electrode 12 and the wiring pattern 16 are formed. Has an integrated structure through this diffusion bonding layer.
【００３３】なお、本発明の上記工程においては、シー
ト状の絶縁性接着剤樹脂２０を配した後に半導体装置１
１を熱圧着にて実装体を形成した場合を説明したが、樹
脂回路基板１３と半導体装置１１を実装後にディスペン
ス法にて樹脂をその隙間に充填しても構わない。また、
前記突起電極１２の表面材料と、前記配線パターン１６
の表面材料を入れ替えて本発明の実装体を形成しても構
わない。In the above steps of the present invention, the semiconductor device 1 is provided after the sheet-shaped insulating adhesive resin 20 is arranged.
Although the case where the mounting body 1 is formed by thermocompression bonding has been described, the gap may be filled with resin by the dispensing method after mounting the resin circuit board 13 and the semiconductor device 11. Also,
Surface material of the bump electrode 12 and the wiring pattern 16
The surface material may be replaced with each other to form the mounting body of the present invention.
【００３４】[0034]
【発明の効果】以上の説明より明らかなように、本発明
の実装体の製造方法を適用して、半導体装置の突起電極
と、樹脂回路基板の配線パターンの当接面だけに、選択
的に拡散接合層を形成して各端子間を確実に接続したの
で、半導体装置と樹脂回路基板を一体で形成でき、低抗
値接続の安定した実装が可能となる。As is apparent from the above description, by applying the method for manufacturing a mounting body of the present invention, only the protruding electrodes of the semiconductor device and the contact surface of the wiring pattern of the resin circuit board are selectively exposed. Since the diffusion bonding layer is formed to reliably connect the terminals, the semiconductor device and the resin circuit board can be integrally formed, and stable mounting with low resistance connection is possible.
【００３５】また、各端子間には導電材料が存在しない
ため、端子間隔を小さくしても隣接端子間でショートす
ることがなく、高密度な端子間隔での実装が可能にな
る。Further, since there is no conductive material between the terminals, short-circuiting does not occur between adjacent terminals even if the terminal spacing is made small, and mounting with a high density of terminal spacing becomes possible.
【００３６】さらに実装段階での加熱圧着と同時に絶縁
性接着剤樹脂を硬化させることができるので、実装工程
が少なく安定した接続の高密度実装を可能とする。Furthermore, since the insulating adhesive resin can be hardened at the same time as the thermocompression bonding in the mounting stage, it is possible to realize a high-density mounting with a stable connection and a small number of mounting steps.
【図１】本発明の実装体の製造方法に適用する半導体装
置の構造断面図である。FIG. 1 is a structural cross-sectional view of a semiconductor device applied to a method for manufacturing a mounting body of the present invention.
【図２】本発明の実装体の製造方法に適用する樹脂回路
基板の構造断面図である。FIG. 2 is a structural cross-sectional view of a resin circuit board applied to the mounting body manufacturing method of the invention.
【図３】本発明の実装体の製造方法を説明するための工
程断面図である。3A to 3D are process cross-sectional views for explaining a method for manufacturing a mounting body of the present invention.
【図４】本発明の実装体の製造方法により形成された実
装部の構成を説明するための構造断面図である。FIG. 4 is a structural cross-sectional view for explaining the configuration of a mounting portion formed by the mounting body manufacturing method of the present invention.
【図５】従来技術における実装体の製造方法を説明する
ための工程断面図である。5A to 5C are process cross-sectional views for explaining a method for manufacturing a mounting body in the related art.
【図６】従来技術の実装体における実装部部分を拡大し
て示した構造断面図である。FIG. 6 is a structural cross-sectional view showing, in an enlarged manner, a mounting portion portion in a mounting body of a conventional technique.
１１ 半導体装置 １２ 突起電極 １３ 樹脂回路基板 １４ ベース基板 １５ 接着剤 １６ 配線パターン １７ 錫メッキ １８ 加熱加圧ヘッド １９ ヒーター ２０ 絶縁性接着剤樹脂 ２１ 拡散接合層 ２２ 異方性導電接着剤 ２３ 導電粒子 11 Semiconductor device 12 protruding electrode 13 Resin circuit board 14 Base substrate 15 Adhesive 16 wiring patterns 17 Tin plating 18 Heat and pressure head 19 heater 20 Insulating adhesive resin 21 Diffusion bonding layer 22 Anisotropic conductive adhesive 23 Conductive particles
Claims (6)
起電極と、樹脂回路基板上に形成された配線パターンと
を接続した実装体の製造方法において、前記樹脂回路基
板の耐熱温度より低い温度で拡散接合ができる二つの金
属の組合わせの一方の金属で少なくとも表面が覆われた
突起電極形成と、前記組合わせの他方の金属で少なくと
も表面が覆われた配線パターンとを当接させて、前記拡
散接合を可能とする温度で加熱加圧力を付与しながら前
記突起電極の表面材料と前記配線パターンの表面材料の
当接面に拡散接合層を形成する実装体形成工程を有する
ことを特徴とする実装体の製造方法。1. A method of manufacturing a mounting body, in which a protruding electrode formed on an active element surface of a semiconductor device and a wiring pattern formed on a resin circuit board are connected to each other, a temperature lower than a heat resistant temperature of the resin circuit board. By contacting the projection electrode formation of which at least the surface is covered with one metal of the combination of the two metals capable of diffusion bonding with the wiring pattern of which at least the surface is covered with the other metal of the combination, A mounting body forming step of forming a diffusion bonding layer on a contact surface between the surface material of the bump electrode and the surface material of the wiring pattern while applying a heating pressure at a temperature that enables the diffusion bonding. Method of manufacturing a mounted body.
する領域に形成される絶縁性接着剤層形成工程を行った
後に前記実装体形成工程を行うことを特徴とする請求項
１に記載の実装体の製造方法。2. The mounting according to claim 1, wherein the mounting body forming step is performed after performing an insulating adhesive layer forming step formed in a region where the protruding electrode and the wiring pattern are joined. Body manufacturing method.
い、前記実装体形成工程における拡散接合層の形成と同
時に、その熱硬化性樹脂を硬化させることを特徴とする
請求項２に記載の実装体の製造方法。3. The thermosetting resin is used for the insulating adhesive layer, and the thermosetting resin is cured simultaneously with the formation of the diffusion bonding layer in the mounting body forming step. A method for manufacturing the described mounted body.
熱硬化性樹脂を前記樹脂回路基板上に転写して形成する
ことを特徴とする請求項２または３に記載の実装体の製
造方法。4. The mounting body manufacturing method according to claim 2, wherein the insulating adhesive layer step is formed by transferring a sheet-shaped thermosetting resin onto the resin circuit board. Method.
の部材が金を主成分とする材料であり、他方の部材が錫
を主成分とする材料であることを特徴とする請求項１か
ら４のいずれか一に記載の実装体の製造方法。5. The one member of the wiring pattern and the protruding electrode is a material containing gold as a main component, and the other member is a material containing tin as a main component. A method for manufacturing a mounting body according to any one of 1.
から３００度としたことを特徴とする請求項５に記載の
実装体の製造方法。6. The temperature that enables the diffusion bonding is 280.
6. The method for manufacturing a mounting body according to claim 5, wherein the mounting body is set to 300 degrees.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002069604A JP2003273162A (en) | 2002-03-14 | 2002-03-14 | Manufacturing method for mounting body |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002069604A JP2003273162A (en) | 2002-03-14 | 2002-03-14 | Manufacturing method for mounting body |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003273162A true JP2003273162A (en) | 2003-09-26 |
Family
ID=29200396
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002069604A Pending JP2003273162A (en) | 2002-03-14 | 2002-03-14 | Manufacturing method for mounting body |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003273162A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7420282B2 (en) | 2004-10-18 | 2008-09-02 | Sharp Kabushiki Kaisha | Connection structure for connecting semiconductor element and wiring board, and semiconductor device |
| JP2011108748A (en) * | 2009-11-13 | 2011-06-02 | Citizen Electronics Co Ltd | Led light emitting device and method of manufacturing led light emitting device |
-
2002
- 2002-03-14 JP JP2002069604A patent/JP2003273162A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7420282B2 (en) | 2004-10-18 | 2008-09-02 | Sharp Kabushiki Kaisha | Connection structure for connecting semiconductor element and wiring board, and semiconductor device |
| JP2011108748A (en) * | 2009-11-13 | 2011-06-02 | Citizen Electronics Co Ltd | Led light emitting device and method of manufacturing led light emitting device |
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