JP2003249730A - Multiple-pattern wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that the loss of a high frequency signal becomes very large since a conduction pattern resonates when a ground wiring layer is positioned in a part facing the conduction pattern in a wiring board region with the miniaturization of a wiring board. <P>SOLUTION: A plurality of wiring board regions divided by division grooves are vertically and laterally arranged and formed on a mother board. The ground wiring layers 7 and signal wiring are given to the wiring board regions. A plurality of wiring patterns 5 formed between the adjacent wiring board regions by crossing the division grooves 6 and conduction patterns 5 formed between the adjacent wiring patterns 2 by exceeding the division line 6 are disposed. The ground wiring layers 7 are not arranged in parts facing the conduction patterns 5 in the wiring board regions. Since the conduction pattern 5 does not resonate with respect to the high frequency signal with the ground wiring layer 7, the transmission loss of the high frequency signal transmitted through the wiring patterns for signal can be reduced to a minimum. <P>COPYRIGHT: (C)2003,JPO

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-cavity wiring board for dividing and manufacturing a large number of wiring boards from one mother board. 2. Description of the Related Art FIG. 5 is an exploded perspective view of a conventional wiring board on which a semiconductor element operated by a high-frequency signal is mounted, which is used for a leadless chip carrier (LCC) type package. As shown in the figure, this LCC type wiring board generally has a ceramic insulating material such as alumina (Al ₂ O ₃ ) ceramic or aluminum nitride (AlN) ceramic having a mounting portion on which a semiconductor element 14 is mounted. It is composed of a substrate 11 in which a plurality of layers are laminated. The first ceramic insulating layer 11 of the substrate 11
a, A groove is provided on the side surface of the second ceramic insulating layer 11b, and a conductive portion made of an electrolytic plating layer or the like is provided on the inner surface of the groove. Then, an external mounting board (not shown) and a wiring pattern 12 formed inside the wiring board and formed with a signal (S) line and a ground (G) line are formed by electrode pads (external connection terminals) 11e. It is electrically connected. The electrode pad 11e is formed of a conductive portion formed on the inner surface of the groove. The third ceramic insulating layer 11 of the base 11
On the side surface of c, the joint area with the lid 13 is increased so that the lid 13
In order to strengthen the bonding of the
Ceramic insulating layer 11a, second ceramic insulating layer 11b
Such a groove is not formed, and the third ceramic insulating layer 11c has a function as a so-called seal ring. Since such a wiring board is very small, a single ceramic green sheet serving as a mother board is provided with a dividing groove 16, and a plurality of these are laminated and sintered to obtain a ceramic, which is then subjected to electrolytic plating. After that, it is preferable to manufacture the substrate by so-called multi-cavity in which individual wiring boards are formed by dividing the substrate by the dividing grooves 16. The production by multi-cavity production is much easier than the lamination and sintering of the divided individual ceramic green sheets, and the cost can be reduced. For this reason, the base 11 is formed of a first ceramic insulating layer 11 shown in the respective partial enlarged plan views of FIGS.
a, the ceramic green sheets for the second ceramic insulating layer 11b and the third ceramic insulating layer 11c are laminated, sintered to form ceramics, then subjected to electrolytic plating, and then divided by the dividing grooves 16 to obtain a wiring board. It is manufactured as a base 11 for use. As shown in a partially enlarged plan view of FIG. 6, a through hole 11e 'is provided on the ceramic green sheet serving as the first ceramic insulating layer 11a.
A dividing groove 16 is provided so as to traverse the substantially central portion of the substrate, and a conductive paste to be the ground wiring layer 17 is applied by printing. As shown in a partially enlarged plan view of FIG. 7 and a partially enlarged plan view of FIG. 9, a ceramic green sheet serving as the second ceramic insulating layer 11b has a dividing groove 16 and a through hole at the center. An opening 11b 'is formed, and a substantially central portion is formed so as to straddle the dividing groove 16, and a through hole 11e' constituting an electrode pad 11e when divided into individual wiring boards is provided. Furthermore, this through hole 11
The wiring pattern 12 is formed so as to be connected to both sides of the dividing groove 16 of e '. In order to electrolytic-plate the inner peripheral surface of the through holes 11e 'and the wiring pattern 12, conductive patterns 15 are formed between the through holes 11e' so as to cross the dividing grooves 16 in a zigzag manner. As shown in a partially enlarged plan view of FIG. 9, a ceramic green sheet serving as the third ceramic insulating layer 11c has a central through hole 11 shown in FIGS.
The through hole 11c 'provided slightly larger than b'
Formed with 16. [0010] Such an electrode pad 11e, wiring pattern
12, the conduction pattern 15 and the ground wiring layer 17 are made of metal powder metalization such as tungsten or copper.
It is formed by printing and applying a metal paste composed of a tungsten powder, an organic solvent, and a binder in a predetermined pattern on the surface (including the groove surface) of each ceramic green sheet serving as the substrate 11. The electrolytic plating on the inner peripheral surface of the through-hole 11e 'of the first ceramic insulating layer 11a is performed when the first ceramic insulating layer 11a and the second ceramic insulating layer 11b are laminated. This is performed by making the holes 11e 'contact and conducting. Thus, the conductive pattern for electrolytic plating
15 can electrically connect all the through holes 11 e ′ and the wiring patterns 12 at the time of electrolytic plating, and furthermore, when divided into individual wiring boards by the dividing grooves 16, the conductive patterns 15 Is cut, so each wiring pattern
12 will not be electrically shorted. In such a base 11, the semiconductor element 14 is bonded with a low melting point brazing material such as gold (Au) -germanium (Ge) or a resin adhesive, and the electrodes of the semiconductor element 14 are bonded to the wiring pattern 12. They are electrically connected via wires (not shown). Further, an iron (Fe) -nickel (Ni) -cobalt (Co) alloy,
A cover 13 made of a metal material such as an iron (Fe) -nickel (Ni) alloy, or a ceramic such as alumina ceramics or aluminum nitride ceramics is welded by seam welding or the like, gold (Au) -tin (Sn) solder, or the like. Are bonded by bonding with a low melting point brazing material. Thus, a semiconductor device as a product in which the semiconductor element 14 is housed is obtained. Such a semiconductor device has its electrode pad
11e to tin (Sn) -lead (Pb) on external mounting substrate
The semiconductor element 14 is electrically connected by low melting point solder such as solder, and operates the semiconductor element 14 by transmitting and receiving a high frequency signal to and from the mounting board. However, with the recent miniaturization of the wiring board, there is a case where the ground wiring layer 17 is located at a position facing the conductive pattern 15 in the inner layer of the wiring board area. In many cases, in this case, since the conduction pattern 15 resonates with the ground wiring layer 17, when the operating frequency of the semiconductor element 14 is increased to a GHz band,
There is a problem that the loss due to the bypass transmission of the high-frequency signal from the exposed portion of the cut end of the conduction pattern 15 becomes extremely large. SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to improve the transmission characteristics of a high frequency signal transmitted through a signal line of a wiring pattern by using a high frequency signal of a semiconductor element. It is an object of the present invention to provide a wiring board capable of improving the operability of the wiring board. According to the present invention, there is provided a multi-cavity wiring board according to the present invention, wherein a plurality of substantially quadrangular rectangular sections divided by dividing grooves are formed on a main surface of a mother board formed by laminating a plurality of insulating layers made of ceramic. In a multi-cavity wiring board having a wiring board region arranged vertically and horizontally and having a ground wiring layer and a signal wiring on a main surface and an inner layer of the wiring board region, the wiring board region crosses the dividing groove between the adjacent wiring board regions. A plurality of wiring patterns formed on the main surface or the inner layer, and a conduction pattern formed on the main surface or the inner layer beyond the dividing line between the adjacent wiring patterns. In a region facing the conductive pattern in the region,
It is characterized in that the ground wiring layer is not provided. According to the present invention, since the ground wiring layer is not provided in a portion of the wiring board region facing the conductive pattern, the conductive pattern does not resonate with the ground wiring layer. The transmission loss of a high-frequency signal propagating through a signal wiring pattern to which the conductive pattern is connected can be minimized, and the transmission characteristics of the high-frequency signal can be made smooth. Operability can be improved. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A multi-cavity wiring board according to the present invention will be described in detail below. FIG. 1 is an exploded perspective view showing an example of an embodiment of an individual wiring board manufactured by dividing the multi-cavity wiring board of the present invention, and FIGS. 2 to 4 show respective ceramic green sheets before lamination. It is a partial enlarged plan view. In these figures, 1 is a base and 2 is a wiring pattern. A wiring board is formed by the base 1 and the wiring pattern 2, and the semiconductor device 4 is formed by hermetically sealing the semiconductor element 4 with the lid 3 and the like. Such an individual wiring board is formed by multi-cavity wiring in which a wiring board area which becomes a wiring board after being divided into one mother board formed by laminating a plurality of insulating layers made of ceramics is divided by a dividing groove and arranged vertically and horizontally. It is manufactured by dividing a substrate along a dividing line. The base 1 has a concave portion on the upper surface, and has a groove on the outer side surface, which is provided with an electrode pad 1e by electrolytic plating on the inner peripheral surface, and is made of various ceramics such as alumina ceramics and aluminum nitride ceramics. Are formed by laminating a plurality of insulating layers. Further, a ground wiring layer 7 is provided on the bottom surface of the concave portion of the base 1. As shown in FIG. 2, the ground wiring layer 7 has a conductive pattern 5 shown in FIG.
It is important that it is not provided at a portion facing the above. The reason is that, when the ground wiring layer 7 is provided at a portion facing the conductive pattern 5 in the wiring board area, the conductive pattern 5 resonates with the ground wiring layer 7 against a high-frequency signal. Therefore, when the operating frequency of the semiconductor element 4 is increased to the GHz band, the loss due to the bypass transmission of the signal from the exposed portion of the cut end of the conduction pattern 5 becomes very large, and the transmission characteristic of the high-frequency signal deteriorates. This is because they will. If the base 1 is made of, for example, alumina ceramics, it is manufactured as follows. First, aluminum oxide (Al ₂ O ₃ ) and silicon oxide (SiO
₂ ) An organic binder, a solvent and the like are added to and mixed with raw material powders such as magnesium oxide (MgO) and calcium oxide (CaO) to prepare a paste. The paste is used as a first ceramic insulating layer 1a, a second ceramic insulating layer 1b, and a third ceramic insulating layer 1c by using a doctor blade method, a calender roll method, or the like. A ceramic green sheet is produced. In these ceramic green sheets, if necessary, the through holes 1e 'and the through holes 1 serving as recesses for accommodating the semiconductor elements 4 provided at the center of each wiring board region are provided.
A punching process for forming b ′ and 1c ′ is performed, and thereafter, molybdenum (Mo) -manganese (Mn) or tungsten Print and apply a metal paste such as (W). Then, these are laminated and about 1600
It is produced by sintering at a temperature of ° C. In each ceramic green sheet, it is not necessary to form the through-hole 1e '. In this case, when this wiring board is formed as a package for accommodating a semiconductor element, the first and second stacked layers are not formed. , Third ceramic insulating layer 1
An electrode pad 1e made of a metallized wiring layer or the like connected to the wiring pattern 2 may be formed on the side surfaces of a, 1b, and 1c. One main surface of the first ceramic green sheet which becomes the first ceramic insulating layer 1a of the base 1 is divided by a dividing groove 6 as shown in a partially enlarged plan view of FIG. A substantially rectangular wiring board region such as a rectangle is vertically and horizontally arranged. In this wiring board region, a conductive paste to be the ground wiring layer 7 is printed, but in the present invention, the conductive paste to be the ground wiring layer 7 is not printed on a portion facing the conductive pattern 5. . As a result, it is possible to manufacture a multi-cavity wiring board in which the ground wiring layer 7 is not provided at a portion facing the conductive pattern 5 in the wiring board region as described above. Further, a through hole 1e 'is formed on the line of the dividing groove 6.
Is provided. That is, the dividing groove 6 is provided so as to cross the substantially central portion of the through hole 1e '. This through-hole 1e 'is used to form a large number of wiring boards having the same configuration.
Each wiring board region is formed at a similar location on the dividing groove 6. On one main surface of the second ceramic green sheet to be the second ceramic insulating layer 1b of the base 1,
As shown in the partially enlarged plan view of FIG. 3, a through hole 1b 'for surrounding the semiconductor element 4 is formed at the center, which is divided by the dividing groove 6 corresponding to the dividing groove 6 on the first ceramic green sheet. In addition, a frame-shaped wiring board region having a quadrangular outer shape is arranged vertically and horizontally. In each wiring board area, the through hole 1 e ′ of the first ceramic green sheet is formed on the division groove 6.
Is formed. That is, the dividing groove 6 is provided on the second ceramic green sheet so as to cross the substantially central portion of the through hole 1e 'of the second ceramic green sheet. When forming the wiring pattern 2 extending from the through hole 1e 'to the through hole 1b' side of the second ceramic green sheet, the wiring pattern 2 for signal [signal (S)] is grounded in each wiring board region. [Ground (G)] wiring patterns 2 are formed, for example, so as to be alternately arranged. In this case, if there is no through hole 1e ', the wiring pattern 2 is formed across the division groove 6 between the wiring board regions adjacent to each other. Further, between adjacent wiring board regions, a signal wiring pattern 2 and a ground wiring pattern 2 are provided on both sides of the dividing groove 6 with respect to the through hole 1e '. That is,
For one through hole 1e ', a signal wiring pattern 2 is formed on one side and a ground wiring pattern 2 is formed on the other. In order to improve the impedance characteristic, the wiring pattern 2 may be connected to the through hole 1e 'such that, for example, the signal pattern and the ground pattern are alternately formed. . In this case, the high-frequency transmission characteristics of the ground line are not impaired even if a cut end of the wiring pattern 2 remains in the periphery of the through hole 1e '. The signal line is a wiring pattern 2
And a conductor of the through-hole 1e 'connected thereto, and a transmission line of a high-frequency signal. The ground line is a ground potential of the ground pattern formed by the wiring pattern 2 and the conductor of the through-hole 1e' connected thereto. It is a conductive path. The configuration of the wiring pattern 2 itself is as follows.
Although there is no particular distinction between a signal line and a ground line, it is better to form ground lines on both the left and right sides of the signal line to improve the impedance characteristics. As shown in FIG. 4, the main surface of the third ceramic green sheet serving as the third ceramic insulating layer 1c is divided by division grooves 6 corresponding to the division grooves 6 on the second ceramic green sheet. The frame-shaped substrate regions having the through-holes 1c 'formed in the center at the center and having a rectangular shape are arranged vertically and horizontally. As shown in the plan view of FIG. 4, a through hole 1c 'having an opening width slightly larger than that of the through hole 1b' of FIG. 3 is formed. This is because, as shown in FIG. 1, the concave portion of the base body 1 is gradually narrowed downward. The upper surface of the third ceramic insulating layer 1c has a lid 3 for sealing the semiconductor element 4, which is welded by seam welding or a low melting point metal such as gold (Au) -tin (Sn) solder. It functions as a seal member that is firmly joined by bonding with a brazing material, a so-called seal ring. Further, the width of the frame is set to an appropriate size to maintain the bonding strength. The electrolytic plating on the inner peripheral surface of the through-hole 1e 'of the first ceramic insulating layer 1a is performed when the first ceramic insulating layer 1a and the second ceramic insulating layer 1b are laminated. This is performed by making the holes 1e 'contact and conducting. The conductive patterns 5 formed between the wiring patterns 2 beyond the dividing grooves 6 are laminated and sintered, and then subjected to electrolytic plating having excellent corrosion resistance such as nickel (Ni) plating and gold (Au) plating. At the time of application, all the through holes 1e 'and the wiring patterns 2 are electrically connected. In addition, when the wiring pattern is divided into individual wiring boards, the conductive pattern 5 and the through hole 1e 'are cut off at the divided surface, so that each wiring pattern 2 is not electrically short-circuited. Thus, the multi-cavity wiring board of the present invention is provided with the through holes 1 b ′, 1
c ', a groove provided on the outer side surface of the base 1, and formed as a groove formed by dividing the through hole 1e' in the vertical direction and serving as an electrode pad 1e for making an electrical connection to the outside; 2,
A dividing groove 6 traversing a substantially central portion of an upper end opening of a through hole 1e 'provided in each of the third ceramic green sheets; and a through hole 1 provided in the second ceramic green sheet.
e 'is joined on both sides to the dividing groove 6, and the semiconductor element 4
A conductive pattern 5 formed on the second ceramic green sheet beyond the dividing line 6 between the adjacent wiring patterns 2, and a conductive pattern 5 formed on the first ceramic green sheet, It has a structure in which a wiring board region having a ground wiring layer 7 that is not formed in a portion facing the conductive pattern 5 is formed vertically and horizontally. In the case of FIG. 1, each wiring board has a through hole 1
The first to third ceramic green sheets provided with b ′, 1c ′, the through hole 1e ′, the dividing groove 6, the ground wiring layer 7, the wiring pattern 2, and the conductive pattern 5 are laminated. After sintering and electrolytic plating, the first, second, third
Is produced by dividing the respective ceramic green sheets by the corresponding dividing grooves 6 so as to overlap in the vertical direction. Further, the individual wiring boards formed by the multi-cavity wiring board of the present invention are not limited to those having recesses formed on the upper surface of the base 1 as shown in FIG. A cap-shaped lid may be joined to the portion. As described above, a plurality of ceramic green sheets are laminated, sintered, and subjected to electrolytic plating. The mother substrate formed by laminating the ceramic insulating layers 1a, 1b, and 1c is divided by the dividing grooves 6 to form a base. After that, the semiconductor element 4 is placed and fixed via a low melting point brazing material such as gold (Au) -germanium (Ge) or a resin adhesive, and the electrodes of the semiconductor element 4 are bonded to the wiring pattern 2 by bonding wires. Electrical connection via Thereafter, a cover 3 made of a metal material such as an iron (Fe) -nickel (Ni) -cobalt (Co) alloy or an iron-nickel alloy, or a ceramic such as alumina ceramics or aluminum nitride ceramics is provided on the upper surface of the base 1.
It is joined by welding by seam welding or the like or by bonding with a low-melting-point brazing material such as gold (Au) -tin (Sn) solder, and the semiconductor device as a product in which the semiconductor element 4 is housed is obtained. In such a semiconductor device, tin (Sn) -lead (Pb) is mounted on an external mounting substrate via the electrode pad 1e.
The semiconductor element 4 is electrically connected by low melting point solder such as solder, and operates the semiconductor element 4 by transmitting and receiving a high frequency signal to and from the mounting substrate. It should be noted that the present invention is not limited to the above-described embodiment, and that various changes may be made without departing from the scope of the present invention. For example, the present invention can be applied to a wiring board for forming an optical semiconductor element housing package for housing an optical element such as a semiconductor laser (LD) which is a kind of light emitting element operated by a high frequency signal. it can. According to the multi-cavity wiring board of the present invention,
A plurality of substantially rectangular wiring board regions separated by dividing grooves are arranged vertically and horizontally on a main surface of a mother substrate formed by laminating a plurality of insulating layers made of ceramics, and ground wiring is provided on the main surface and the inner layer of the wiring board region. In a multi-cavity wiring board having a layer and a signal wiring, a plurality of wiring patterns formed on the main surface or the inner layer across the division groove between the adjacent wiring board regions, and between the adjacent wiring patterns. And a conductive pattern formed on the main surface or the inner layer beyond the dividing line, and the ground wiring layer is not provided in a portion of the wiring board region facing the conductive pattern. Therefore, since the conductive pattern does not resonate with the ground wiring layer, the high-frequency signal propagating through the signal wiring pattern to which the conductive pattern is connected. The transmission loss was reduced to a minimum can be made smooth transmission characteristics of the high-frequency signal, it can be made excellent operability due to the high frequency signal of the semiconductor element to be mounted.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an exploded perspective view showing an example of an embodiment of an individual wiring board manufactured by dividing a multi-piece wiring board of the present invention. FIG. 2 is a partially enlarged plan view showing a first ceramic green sheet before lamination as a first ceramic insulating layer in the multi-cavity wiring board of the present invention. FIG. 3 is a partially enlarged plan view showing a second ceramic green sheet before lamination as a second ceramic insulating layer in the multi-cavity wiring board of the present invention. FIG. 4 is a partially enlarged plan view showing a third ceramic green sheet before lamination as a third ceramic insulating layer in the multi-cavity wiring board of the present invention. FIG. 5 is an exploded perspective view showing a conventional wiring board. FIG. 6 is a partially enlarged plan view showing a ceramic green sheet before lamination as a first ceramic insulating layer in a conventional multi-cavity wiring board. FIG. 7 is a partially enlarged plan view showing a ceramic green sheet before lamination serving as a second ceramic insulating layer in a conventional multi-cavity wiring board. FIG. 8 is a partially enlarged plan view showing a ceramic green sheet before lamination as a third ceramic insulating layer in a conventional multi-cavity wiring board. FIG. 9 is a partially enlarged plan view of the ceramic green sheet showing the conduction pattern of FIG. 7; DESCRIPTION OF SYMBOLS 1: Base 1a: first ceramic insulating layer 1b: second ceramic insulating layer 1c: third ceramic insulating layer 1d: mounting portion 1e ': through hole 2: wiring pattern 3: lid 4: semiconductor element 5: conduction pattern 6: division groove 7: ground wiring layer

Claims (1)

Claims: 1. A plurality of substantially quadrangular wiring board regions separated by dividing grooves are formed vertically and horizontally on a main surface of a mother board formed by laminating a plurality of insulating layers made of ceramics. In a multi-cavity wiring board having a ground wiring layer and signal wiring on a main surface and an inner layer of a wiring board region, a plurality of wiring boards formed on the main surface or the inner layer across the dividing groove between adjacent wiring board regions. And a conductive pattern formed on the main surface or the inner layer beyond the division groove between the adjacent wiring patterns, and a portion of the wiring substrate region facing the conductive pattern. A multi-piece wiring board, wherein the ground wiring layer is not provided.