JP2003209361A - Manufacturing method for printed board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a printed board of good conductivity for forming a circuit pattern of a high density and turning a conductor layer formed inside a via hole and a through-hole to a sufficient thickness. <P>SOLUTION: The manufacturing method comprises a process of successively forming an inner layer circuit pattern 2 in a prescribed shape and an insulation layer 3 on an insulation substrate 1, a process of forming the via hole 4 at the insulation layer 3 so as to expose the inner layer circuit pattern 2 and the through-hole 5 passing through the insulation layer 3 and the insulation substrate 1, a process of forming a copper layer 6 inside the via hole 4, on the insulation layer 3 and inside the through-hole 5, a process of forming a masking material 7 covering the via hole 4 and the through-hole 5 on the copper layer 6, a process of thinning the copper layer 6 unmasked with the masking material 7 by etching and turning it to a prescribed thickness, and a process of removing the masking material 7 and then grinding the copper layer 6 at a part covered with the masking material 7 to the prescribed thickness. <P>COPYRIGHT: (C)2003,JPO

Description

Description: BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a method for manufacturing a printed circuit board, and more particularly, to a printed circuit board having a high density by reducing a circuit pattern width and an interval between circuit patterns. The present invention relates to a method for manufacturing a printed circuit board suitable for manufacturing. 2. Description of the Related Art Conventionally, printed circuit boards are mainly manufactured by a subtractive method in view of productivity, manufacturing cost, and the like. Hereinafter, the outline will be described. FIG. 3 is a schematic cross-sectional process diagram showing a manufacturing process of a conventional printed circuit board. First, an inner layer circuit pattern 22 having a predetermined shape is formed by performing photolithography on a copper layer that has been pasted on an insulating substrate 21 and an insulating layer 23 is formed thereon (FIG. 3A). . Next, a via hole 24 is formed at a predetermined position of the insulating layer 23 to reach the inner layer circuit pattern 22, and a through hole 25 penetrating the insulating layer 23 and the insulating substrate 21 is formed at a predetermined position (FIG. )). Next, a copper layer 26 having a predetermined thickness is formed on the insulating layer 23, in the through hole 25, and in the via hole 24 by plating (FIG. 3C). Thereafter, the copper layer 26 is subjected to photolithography to form a predetermined outer circuit pattern. The outer circuit pattern is connected to the inner circuit pattern 22 through the via hole 24 and is connected to a circuit pattern (not shown) formed on the lower surface of the insulating substrate 21 through the through hole. As described above, in a printed circuit board on which a multilayer circuit pattern is formed, electrical conduction with the circuit pattern between the layers is formed by a plating layer formed in a through hole penetrating the insulating substrate and a non-penetrating via hole. (Conductor layer). In the subtractive method described above, the thickness of a conductor layer formed in a via hole or a through hole and the thickness of a circuit pattern formed on an insulating layer are separately set. I can't do it. However, in today's printed circuit boards, there is a demand for higher density of mounted circuits, and circuit pattern widths and intervals between circuit patterns (this is called line and space, and is also simply referred to as L / S hereinafter) are increasing. It is getting smaller. In this case, when forming a circuit pattern having a small L / S, in order to secure the dimensional accuracy, it is necessary to ensure that there is no deterioration in accuracy due to side etching in the etching of the conductor layer for forming the circuit pattern. In addition, it is necessary to make the ratio between the conductor layer thickness and L / S equal to or less than a predetermined value. That is, as the L / S becomes smaller, the thickness of the conductor layer needs to be reduced. However, when the thickness of the conductor layer is reduced, the thickness of the conductor layer in the via hole and the through hole is also reduced. Due to the shape of the inside of the via hole and the inside of the through hole, only a smaller amount of copper than the amount of copper deposited on the insulating layer can be deposited during plating. for that reason,
When a thin conductor layer corresponding to a circuit pattern having a small L / S is formed, the thickness of the conductor layer formed in the via hole and the through hole is insufficient, so that the reliability of electrical conduction is sufficiently ensured. There was a problem that I could not do it. Therefore, the present invention solves the above-mentioned problems, and in a method for manufacturing a printed circuit board, it is possible to form a high-density circuit pattern and to sufficiently form a conductor layer formed in a via hole and a through hole. It is an object of the present invention to provide a method of manufacturing a printed circuit board having good electrical conductivity, which can be made thick. As a means for achieving the above object, a method of manufacturing a printed circuit board according to the present invention comprises forming a circuit pattern (inner circuit pattern) 2 having a predetermined shape on an insulating substrate 1. Forming an insulating layer 3 on the insulating substrate 1 so as to cover the circuit pattern (inner circuit pattern) 2;
Forming a via hole 4 in the insulating layer 3 so as to expose the insulating layer 2; forming a through hole 5 through the insulating layer 3 and the insulating substrate 1 in the insulating layer 3 and the insulating substrate 1; A first thickness conductive layer (copper layer) continuous on the insulating layer 3, on the inner wall of the via hole 4, on the circuit pattern (inner circuit pattern) 2 exposed from the via hole 4, and on the inner wall of the through hole 5. Forming a via hole 6 in the via hole 4 and the through hole 5;
Forming a mask material 7 covering the conductor layer (copper layer) 6 in the inside, and etching the conductor layer (copper layer) 6 not masked by the mask material 7 to be thinner than the first thickness. A step of forming a second thickness, and the conductor layer (copper layer) covered with the mask material 7 after removing the mask material 7
Polishing the portion 6 to approximately the second thickness. Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. <Embodiment> FIG. 1 is a schematic sectional process diagram showing a manufacturing process of an embodiment of a method of manufacturing a printed circuit board according to the present invention. First, as shown in FIG.
A predetermined photosensitive resin layer (not shown) is formed on the surface of the insulating substrate 1 on which 8 μm of copper is adhered, and the photosensitive resin layer is formed into a desired shape by photolithography. By etching, an inner layer circuit pattern 2 having a predetermined shape is formed, and an insulating layer 3 is formed thereon. Here, the insulating substrate 1 is not particularly limited as long as it has an insulating property, and a polymer resin such as glass epoxy resin, polycarbonate, polyethylene terephthalate, and polyimide can be used. Also, instead of an insulating substrate pre-coppered,
A conductive layer having a predetermined thickness may be formed on an insulating substrate, and the conductive layer may be formed into an inner layer circuit pattern having a predetermined shape by photolithography. The insulating layer 3 is, for example, 40 μm.
An epoxy resin, a phenol resin, or an acrylic resin having a thickness of m to 100 μm can be used.
These resins contain a predetermined amount of filler or the like. Next, as shown in FIG. 1B, a via hole 4 reaching the inner layer circuit pattern 2 at a predetermined position of the insulating layer 3 and a through hole 5 penetrating the insulating layer 3 and the insulating substrate 1 are formed. Then, the surface of the insulating layer 3 is roughened using a permanganic acid solution in order to secure adhesion of the copper layer 6 to be plated later on the surface of the insulating layer 3. Here, the via hole 4 has a diameter of about 100 μm, for example, and is formed by a carbon dioxide laser, a YAG laser, or the like. The through hole has a diameter of about 300 μm, for example, and is formed by drilling. The through-hole 4 penetrates, for example, a copper layer 6 formed on the insulating layer 3 to be described later and an inner circuit pattern formed on the lower surface of the insulating substrate 1 (not shown) through the insulating substrate. Or electrically connect the copper layer formed on the inner circuit pattern via an insulating layer through an insulating substrate. It is formed at a predetermined position on the insulating layer 3 which is convenient for connection. Next, as shown in FIG. 1C, a copper layer 6 is formed by copper plating on the insulating layer 3, the inner wall surface of the via hole, the inner layer circuit pattern 2 exposed from the via hole 4 and the through hole 5. Form on the inner wall. Here, for the copper plating, first, electroless plating is performed using a Rossel salt bath, and then, electrolytic plating is performed using copper sulfate plating.
For example, a copper layer 6 having a thickness of about 35 μm is formed. Next, as shown in FIG.
Then, a dry film having a thickness of 30 to 40 μm is adhered, and a predetermined pattern of exposure and development with sodium carbonate are performed to cover the copper layer 6 formed on each inner wall surface of the via hole 4 and the through hole 5. (The diameter is larger than the diameter of the via hole 4 and the through hole 5)
The mask material 7 is formed. Using the mask material 7 as a mask, the copper layer 6 other than the via hole 4 and the through hole 5 is etched with a cupric chloride solution to a thickness of about 14.
A μm copper layer 6a is obtained. This thickness has an L / S of 30 μm
It corresponds to. Next, as shown in FIG. 1E, after the mask material 7 is removed, buffing is performed, and the copper layer 6 in the portions of the via hole 4 and the through hole 5 is selectively formed on the copper layer 6a. Thin to thickness. Thus, the copper layer 6a formed on the insulating layer 3 has such a thickness (thinness) that etching for forming a circuit pattern later can be performed with good accuracy. On the other hand, a portion covering the inner wall of the via hole 4 and the inner layer circuit pattern 2 and the copper layer 6 on the inner wall of the through hole 5
Is thick enough (thickened) to achieve highly reliable electrical conduction. Here, buffing will be described. FIG. 2 is a schematic configuration diagram of a polishing apparatus according to the method of manufacturing a printed circuit board of the present invention. As shown in the figure, a polishing apparatus 20 for performing buff polishing generally includes a backup roll 11,
Baffles 12 ', 12 are arranged opposite to 11', and a suitable number of sets of transport rolls 19, 19 'for sending the printed circuit board 10 are arranged.
A pair of pure water introduction pipes 16 and 16 'for supplying pure water 17 and 17' to a polishing section to be polished by 2 'are provided. The backup rolls 11, 11 'are cylindrical, for example, having a diameter of approximately 100 mm, and are made of, for example, urethane rubber having a Shore hardness of 50 to 100. The baffles 12, 12 'are buffed on cylindrical rolls 13, 13' having a diameter of, for example, approximately 100 mm.
The rolls 13 and 13 'are made of, for example, aluminum or bakelite, and the buffs 14 and 14' are, for example, 20 to 30 mm in thickness. It is composed of a nylon nonwoven fabric appropriately impregnated with silicon carbide or alumina of about # 400 to # 1000.
The buffs 14 and 14 'may be constituted by ceramic buffs having a predetermined surface roughness. Bafflor 12,1
The space between the baffles 12, 12 'and the backup rolls 11, 11' is maintained so that an appropriate pressure is applied to the printed circuit board 10 sandwiched between the 2 'and the backup rolls 11, 11'. The printed circuit board 10 is supplied between a pair of transport rolls 19 and 19 ′ which are arranged at predetermined intervals and rotate in the opposite direction to each other (a plurality of sets are arranged in the transfer direction of the printed circuit board 10), for example, from the left side of the drawing. Are transported in the direction of arrow 18 by rotating transport rolls 19, 19 '.
The distance between the backup roll 11 and the baffle 12 ',
The interval between the backup roll 11 'and the baffle 12 is adjusted to a predetermined interval so that buffing can be performed well. At the time of buffing, the baffle 12 rotates clockwise (or may be counterclockwise) and the baffle 12 ′ rotates counterclockwise (or may rotate clockwise) from 1800 to 2000 r.
and at a suitable identical speed in the range of pm. At this time,
Pure water 17, 17 'is applied to the portion of the printed circuit board to be buffed from the pure water introduction pipes 16, 16' for cooling. Instead of the pure waters 17 and 17 ', a solution containing a predetermined concentration of an abrasive may be used. When the buffs 14 and 14 'are made of a non-woven nylon fabric, the rolls 11 and 11' are made of a superhard material, and when the buffs 14 and 14 'are made of ceramic, the backup rolls 11 and 11' are made. 'Has a Shore hardness of 5
A combination using 0 to 100 urethane rubbers is used. In any case, the rolls 13 and 13 'are made of aluminum or bakelite. During the buffing, the backup roll 11 and the baffle 12 'rotate clockwise, and the backup roll 11' and the baffle 12 rotate counterclockwise. The rotation direction of the baffles 12, 12 'can be either clockwise or counterclockwise. At the time of buff polishing, the polishing amount of the copper layer 6a on which a circuit pattern is to be formed is reduced by adjusting the pressing strength of the baffles 12, 12 'against the printed circuit board 10, and the protruding via holes 4 and through holes are formed. By polishing a large amount of the copper layer 6 in the portion of the hole 5, a smooth surface of the copper layer can be obtained. In addition, FIG.
As shown in the above, the copper layer 6 in the via hole 4 and the through hole 5 masked by the mask material 7 is in a state protruding from the copper layer 6a obtained by etching, If there is no inconvenience, it may be used in this state. As described above, the case where the printed circuit board is formed by sequentially forming the inner layer circuit pattern, the insulating layer, the via hole, the through hole, and the outer layer circuit pattern on one surface (upper surface) of the insulating substrate has been described. It is needless to say that a multi-layer printed board may be formed by successively forming a plurality of printed circuit boards, and further repeatedly forming a multilayer printed circuit board. As described above, according to the present invention, the electrical connection through the via hole and the through hole has a low resistance value and high reliability. In the part where the circuit pattern is formed,
A fine pattern can be formed. As described above, according to the method of manufacturing a printed circuit board of the present invention, a step of forming a circuit pattern having a predetermined shape on an insulating substrate, and a step of covering the circuit pattern and Forming a via hole in the insulating layer to expose the circuit pattern, and forming a through hole through the insulating layer and the insulating substrate in the insulating layer and the insulating substrate. Forming a conductive layer having a first thickness on the insulating layer, the inner wall of the via hole, the circuit pattern exposed from the via hole, and the inner wall of the through hole; Forming a mask material covering the conductor layer in the through hole; and etching the conductor layer not masked with the mask material to form the mask material.
A step of making the second thickness smaller than the thickness of 1; and, after removing the mask material, polishing a portion of the conductor layer covered with the mask material to approximately the second thickness. The production of a printed circuit board with good electrical continuity, which makes it possible to form a high-density circuit pattern and to make the thickness of the conductor layer formed in the via hole and the through hole sufficient. There is an effect that a method can be provided.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic sectional process drawing showing a manufacturing process of an embodiment of a method of manufacturing a printed circuit board according to the present invention. FIG. 2 is a schematic configuration diagram of a polishing apparatus according to a method of manufacturing a printed circuit board of the present invention. FIG. 3 is a schematic cross-sectional process diagram showing a manufacturing process of a conventional printed circuit board. [Description of Signs] 1 ... Insulating substrate, 2 ... Inner circuit pattern, 3 ... Insulating layer, 4
... via holes, 5 ... through holes, 6 ... copper layers, 6a ...
Copper layer (after polishing), 7 ... mask material, 10 ... (before polishing)
Printed circuit board, 11, 11 '... backup roll, 1
2,12 '... baffle, 13, 13' ... roll, 1
4, 14 ': buff, 16, 16': pure water introduction pipe, 1
7, 17 '... pure water, 19, 19' ... transport roll, 20 ...
Polishing apparatus, 21: insulating substrate, 22: inner layer circuit pattern,
23 ... insulating layer, 24 ... via hole (non-through hole), 25 ...
Through hole, 26 ... copper layer.

   ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Shigeru Michiwaki             3-12 Moriyacho, Kanagawa-ku, Yokohama-shi, Kanagawa             Local Victor Company of Japan (72) Inventor Shinji Suga             3-12 Moriyacho, Kanagawa-ku, Yokohama-shi, Kanagawa             Local Victor Company of Japan F-term (reference) 5E317 AA24 BB01 BB11 CC31 CC44                       CD01 CD25 CD32 GG11                 5E346 AA05 AA06 AA12 AA15 AA26                       AA32 AA42 AA43 BB01 BB15                       CC08 CC31 DD01 DD22 EE33                       FF04 GG17 GG22 GG28 HH07

Claims (1)

Claims: 1. A step of forming a circuit pattern having a predetermined shape on an insulating substrate; a step of forming an insulating layer on the insulating substrate by covering the circuit pattern; Forming a via hole in the insulating layer to be exposed; forming a through hole through the insulating layer and the insulating substrate in the insulating layer and the insulating substrate; on the insulating layer, an inner wall of the via hole; Forming a continuous conductive layer of a first thickness on the circuit pattern exposed from the via hole and on an inner wall of the through hole; and a mask material covering the conductive layer in the via hole and the through hole. Forming, and etching the conductor layer that is not masked by the mask material to a second thickness smaller than the first thickness; After removal, the method of manufacturing a printed circuit board, characterized in that a step of polishing a portion of the conductive layer covered by the mask material to substantially the second thickness.