JP2003197485A - Chip solid electrolytic capacitor and manufacturing method therefor - Google Patents

Chip solid electrolytic capacitor and manufacturing method therefor

Info

Publication number
JP2003197485A
JP2003197485A JP2001396838A JP2001396838A JP2003197485A JP 2003197485 A JP2003197485 A JP 2003197485A JP 2001396838 A JP2001396838 A JP 2001396838A JP 2001396838 A JP2001396838 A JP 2001396838A JP 2003197485 A JP2003197485 A JP 2003197485A
Authority
JP
Japan
Prior art keywords
lead frame
anode
capacitor element
capacitor
cathode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001396838A
Other languages
Japanese (ja)
Inventor
Yoshihiro Takeda
嘉宏 竹田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Chemi Con Corp
Original Assignee
Nippon Chemi Con Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Chemi Con Corp filed Critical Nippon Chemi Con Corp
Priority to JP2001396838A priority Critical patent/JP2003197485A/en
Publication of JP2003197485A publication Critical patent/JP2003197485A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a chip solid electronic capacitor and its manufacturing method, which are capable of preventing a cathode terminal from coming off at cutting and of restraining the capacitor from deteriorating its ESR characteristics. <P>SOLUTION: A dielectric oxide film, an electrolytic layer, and a cathode layer are successively laminated on the surface of an anode body for the formation of a capacitor element 2 whose outer surface serves as the cathode layer, wherein the anode body is equipped with an anode lead wire 4 and formed of valve action metal. The capacitor elements 2 are mounted on a lead frame 11, equipped with a plurality of repetitive units each provided with an anode terminal 5 connected to the anode lead wire 4 of the capacitor element 2 and a cathode terminal 6 connected to the cathode layer of the capacitor element 2. The capacitor elements 2 mounted on the lead frame 11, the anode terminals 5, and the cathode terminals 6 are coated with a sheathing resin 3 so as to make the terminals 5 and 6 partially exposed. The repetitive units of the lead frame 11, where the capacitor elements 2 covered with the sheathing resin 3 are located inside are cut into the prescribed shapes for the formation of chip solid electrolytic capacitors. Thin-walled parts 30 and 31 are provided to the lead frame 11 so as to surround the mounting part where the capacitor element 2 is mounted. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術の分野】本発明は、各種電子機器に
搭載される高密度表面実装に使用可能なチップ型固体電
解コンデンサの改良に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a chip type solid electrolytic capacitor which can be used for high density surface mounting mounted on various electronic devices.

【0002】[0002]

【従来の技術】これら高密度表面実装に使用可能なチッ
プ型固体電解コンデンサとしては、特開2001−69
78号公報に提案されているように、陽極導出線を有す
るとともに、弁作用金属から成る陽極体の表面に誘電体
酸化皮膜と電解質層とを順次積層してその外周が前記陰
極層とされたコンデンサ素子を、前記コンデンサ素子の
陽極導出線に接続される陽極端子並びに前記陰極層に接
続される陰極端子とを具備する繰返し単位を複数有する
リードフレームに搭載する搭載工程と、該リードフレー
ムに搭載された前記コンデンサ素子と前記陽極端子並び
に陰極端子とを、各極端子の一部が露出するように外装
樹脂にて被覆する被覆工程と、前記外装樹脂にて被覆さ
れた前記コンデンサ素子を内在する前記リードフレーム
の繰返し単位を所定の形状に切断する切断工程よりなる
チップ型固体電解コンデンサの製造方法が知られてい
る。
2. Description of the Related Art A chip-type solid electrolytic capacitor usable for these high-density surface mounting is disclosed in Japanese Patent Laid-Open No. 2001-69.
As proposed in Japanese Patent Publication No. 78, a dielectric oxide film and an electrolyte layer are sequentially laminated on the surface of an anode body made of a valve metal, which has an anode lead wire, and the outer periphery of the anode body serves as the cathode layer. Mounting step of mounting the capacitor element on a lead frame having a plurality of repeating units each having an anode terminal connected to an anode lead wire of the capacitor element and a cathode terminal connected to the cathode layer, and mounting on the lead frame A coating step of coating the capacitor element and the anode terminal and the cathode terminal with an exterior resin so that a part of each electrode terminal is exposed; and the inside of the capacitor element coated with the exterior resin There is known a method for manufacturing a chip type solid electrolytic capacitor including a cutting step of cutting a repeating unit of the lead frame into a predetermined shape.

【0003】[0003]

【発明が解決しようとする課題】これら前記した製造方
法によって得られるチップ型固体電解コンデンサの電極
端子、特に陰極端子は、前記外装樹脂との接触面積が小
さく、外装樹脂と陰極端子との接着強度が弱いものとな
ってしまい、特には、前記前記リードフレームに縦横に
複数のコンデンサ素子を搭載して外装樹脂にて被覆した
後に切断する場合にあっては、前記リードフレームの前
記陰極端子となる部分の切断時において、これら複数配
置されたコンデンサ素子の外周部に位置するチップ型固
体電解コンデンサに切断における振動や機械的ストレス
が集中し易く、これら振動や機械的ストレスにより陰極
端子が脱落してしまう場合があったり、これら脱落しな
いまでも、前記コンデンサ素子の陰極層との電気的接続
特性、例えばESR特性が悪化してしまう等の問題があ
った。
The electrode terminals of the chip type solid electrolytic capacitors obtained by the above-mentioned manufacturing method, especially the cathode terminals, have a small contact area with the exterior resin and the adhesive strength between the exterior resin and the cathode terminals. Becomes weak, and in particular, in the case where a plurality of capacitor elements are mounted vertically and horizontally on the lead frame and is covered with an exterior resin and then cut, it becomes the cathode terminal of the lead frame. At the time of cutting the part, vibration and mechanical stress during cutting are easily concentrated on the chip type solid electrolytic capacitors located on the outer periphery of the plurality of arranged capacitor elements, and the cathode terminal may drop off due to these vibrations and mechanical stress. In some cases, the electrical connection characteristics with the cathode layer of the capacitor element, such as ES Characteristics there was a problem such as a deteriorated.

【0004】よって、本発明は上記した問題点に着目し
てなされたもので、切断によって陰極端子が脱落してし
まったり、前記ESR特性が悪化してしまうことの少な
いチップ型固体電解コンデンサ及びその製造方法を提供
することを目的としている。
Therefore, the present invention has been made by paying attention to the above-mentioned problems, and a chip type solid electrolytic capacitor and a cathode type solid electrolytic capacitor which are less likely to drop the cathode terminal by cutting and deteriorate the ESR characteristic and the same. It is intended to provide a manufacturing method.

【0005】[0005]

【課題を解決するための手段】前記した問題を解決する
ために、本発明のチップ型固体電解コンデンサは、陽極
導出線を有するとともに、弁作用金属から成る陽極体の
表面に誘電体酸化皮膜と電解質層と陰極層とを順次積層
形成して、その外周が前記陰極層とされたコンデンサ素
子を、前記コンデンサ素子の陽極導出線に接続される陽
極端子並びに前記コンデンサ素子の陰極層に接続される
陰極端子とを具備する繰返し単位を複数有するリードフ
レームに搭載し、該リードフレームに搭載された前記コ
ンデンサ素子と前記陽極端子並びに陰極端子とを、各極
端子の一部が露出するように外装樹脂にて被覆するとと
もに、該外装樹脂にて被覆された前記コンデンサ素子を
内在する前記リードフレームの繰返し単位を所定の形状
に切断して得られるチップ型固体電解コンデンサであっ
て、前記リードフレームの前記コンデンサ素子の搭載部
を囲むように該リードフレームに薄肉部を形成したこと
を特徴としている。この特徴によれば、前記薄肉部を前
記コンデンサ素子の搭載部を囲むようにリードフレーム
に設けておくことで、前記リードフレームの外周部等の
切断時において、これら切断における振動や機械的スト
レスが前記チップ型固体電解コンデンサの電極端子、特
に陰極端子に伝達されて印加されることを防止でき、よ
って、切断によって陰極端子が脱落してしまったり、前
記ESR特性が悪化してしまうことを大幅に低減するこ
とができる。
In order to solve the above problems, a chip type solid electrolytic capacitor of the present invention has an anode lead wire and a dielectric oxide film on the surface of an anode body made of valve metal. An electrolytic layer and a cathode layer are sequentially laminated and formed, and a capacitor element whose outer periphery is the cathode layer is connected to an anode terminal connected to an anode lead wire of the capacitor element and a cathode layer of the capacitor element. It is mounted on a lead frame having a plurality of repeating units each including a cathode terminal, and the capacitor element, the anode terminal, and the cathode terminal mounted on the lead frame are covered with an exterior resin so that a part of each pole terminal is exposed. Obtained by cutting the repeating unit of the lead frame in which the capacitor element covered with the exterior resin is formed into a predetermined shape. A chip type solid electrolytic capacitor is characterized by forming the thin portion on the lead frame to surround the mounting portion of the capacitor element of said lead frame. According to this feature, by providing the thin portion on the lead frame so as to surround the mounting portion of the capacitor element, when cutting the outer peripheral portion of the lead frame or the like, vibration or mechanical stress due to these cutting may occur. It is possible to prevent the electrode terminals of the chip-type solid electrolytic capacitor, especially the cathode terminals from being transmitted and applied, so that it is possible to greatly prevent the cathode terminals from dropping due to disconnection and deterioration of the ESR characteristics. It can be reduced.

【0006】本発明のチップ型固体電解コンデンサは、
前記薄肉部が貫通孔であることが好ましい。このように
すれば、薄肉部を貫通孔とすることで、より一層振動や
機械的ストレスが前記電極端子、特に陰極端子に伝達さ
れて印加されることを防止できる。
The chip type solid electrolytic capacitor of the present invention is
It is preferable that the thin portion is a through hole. With this configuration, by forming the thin portion as the through hole, it is possible to prevent further vibration and mechanical stress from being transmitted to and applied to the electrode terminal, particularly the cathode terminal.

【0007】本発明のチップ型固体電解コンデンサの製
造方法は、陽極導出線を有するとともに、弁作用金属か
ら成る陽極体の表面に誘電体酸化皮膜と電解質層と陰極
層とを順次積層形成して、その外周が前記陰極層とされ
たコンデンサ素子を、前記コンデンサ素子の陽極導出線
に接続される陽極端子並びに前記コンデンサ素子の陰極
層に接続される陰極端子とを具備する繰返し単位を複数
有するリードフレームに搭載する搭載工程と、該リード
フレームに搭載された前記コンデンサ素子と前記陽極端
子並びに陰極端子とを、各極端子の一部が露出するよう
に外装樹脂にて被覆する被覆工程と、前記外装樹脂にて
被覆された前記コンデンサ素子を内在する前記リードフ
レームの繰返し単位を所定の形状に切断する切断工程
と、を含むチップ型固体電解コンデンサの製造方法であ
って、前記リードフレームが、前記コンデンサ素子の搭
載部を囲むように薄肉部を形成されていることを特徴と
している。この特徴によれば、前記薄肉部を前記コンデ
ンサ素子の搭載部を囲むようにリードフレームに設けて
おくことで、前記リードフレームの外周部等の切断時に
おいて、これら切断における振動や機械的ストレスが前
記チップ型固体電解コンデンサの電極端子、特に陰極端
子に伝達されて印加されることを防止でき、よって、切
断によって陰極端子が脱落してしまったり、前記ESR
特性が悪化してしまうことを大幅に低減することができ
る。
According to the method of manufacturing a chip type solid electrolytic capacitor of the present invention, a dielectric oxide film, an electrolyte layer and a cathode layer are sequentially laminated on the surface of an anode body having an anode lead wire and made of a valve metal. A lead having a plurality of repeating units including a capacitor element whose outer periphery is the cathode layer, an anode terminal connected to an anode lead wire of the capacitor element, and a cathode terminal connected to the cathode layer of the capacitor element. A mounting step of mounting on a frame; a coating step of coating the capacitor element, the anode terminal and the cathode terminal mounted on the lead frame with an exterior resin so that a part of each pole terminal is exposed; A chip type including a cutting step of cutting the repeating unit of the lead frame in which the capacitor element covered with the exterior resin is embedded into a predetermined shape. A method of manufacturing a body electrolytic capacitor, the lead frame, is characterized in that it is formed a thin portion so as to surround the mounting portion of the capacitor element. According to this feature, by providing the thin portion on the lead frame so as to surround the mounting portion of the capacitor element, when cutting the outer peripheral portion of the lead frame or the like, vibration or mechanical stress due to these cutting may occur. It can be prevented from being transmitted to and applied to the electrode terminal of the chip type solid electrolytic capacitor, in particular, the cathode terminal, so that the cathode terminal may drop off due to cutting, or the ESR
It is possible to significantly reduce the deterioration of the characteristics.

【0008】本発明のチップ型固体電解コンデンサの製
造方法は、前記薄肉部が貫通孔であることが好ましい。
このようにすれば、薄肉部を貫通孔とすることで、より
一層振動や機械的ストレスが前記電極端子、特に陰極端
子に伝達されて印加されることを防止できる。
In the method for manufacturing a chip type solid electrolytic capacitor of the present invention, it is preferable that the thin portion is a through hole.
With this configuration, by forming the thin portion as the through hole, it is possible to prevent further vibration and mechanical stress from being transmitted to and applied to the electrode terminal, particularly the cathode terminal.

【0009】[0009]

【発明の実施の形態】以下、図面に基づいて本発明の実
施形態を説明する。 (実施例)図1は本実施例のチップ型固体電解コンデン
サの構造を示す斜視図であり、図2は、本実施例のチッ
プ型固体電解コンデンサを示す断面図であり、図3は、
本実施例に用いたリードフレームの形状を示す図であ
る。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. (Embodiment) FIG. 1 is a perspective view showing a structure of a chip type solid electrolytic capacitor of the present embodiment, FIG. 2 is a sectional view showing a chip type solid electrolytic capacitor of the present embodiment, and FIG.
It is a figure which shows the shape of the lead frame used for the present Example.

【0010】本実施例のチップ型固体電解コンデンサ1
は、図1に示すように、コンデンサ素子2と、該コンデ
ンサ素子2の1側面から導出された陽極導出線4に対し
て折り曲げられることで当接し、該陽極導出線4の外周
に溶接にて接続される舌部8を備える陽極端子5と、該
陽極端子5と前記コンデンサ素子2を挟んで対向する側
に、該コンデンサ素子2の下方に配置されるとともに、
該コンデンサ素子2の外周部下面と導電性接着剤10に
て電気的並びに機械的に接合された陰極端子6と、これ
ら陽極端子5並びに陰極端子6露出部を除く部分を、前
記コンデンサ素子2を被覆するように覆う外装樹脂3
と、から主に構成されている。
Chip type solid electrolytic capacitor 1 of this embodiment
As shown in FIG. 1, the capacitor element 2 and the anode lead wire 4 led out from one side surface of the capacitor element 2 come into contact with each other by being bent, and are welded to the outer periphery of the anode lead wire 4 by welding. An anode terminal 5 provided with a tongue portion 8 to be connected to the anode terminal 5 is disposed below the capacitor element 2 on the side facing the anode terminal 5 with the capacitor element 2 interposed therebetween.
The capacitor element 2 is connected to the lower surface of the outer peripheral portion of the capacitor element 2 electrically and mechanically with a conductive adhesive 10 and the cathode terminal 6 and a portion except the exposed portions of the anode terminal 5 and the cathode terminal 6. Exterior resin 3 to cover
It is mainly composed of and.

【0011】この本実施例に用いた前記陽極端子5に
は、図3に示すように、前記コンデンサ素子2が搭載さ
れる領域の側方に張り出すようにリボン状に形成された
舌部8が、該舌部8を張り出し部の導出部から折曲げる
ことで前記陽極導出線4に当接できるような長さにて形
成されているとともに、搭載される前記コンデンサ素子
2の下面と陽極端子5の上面とが当接すると、コンデン
サ素子2の表面に形成されている陰極層を介して該陽極
端子5と陰極端子6とが短絡することから、該コンデン
サ素子2の下面との間に絶縁樹脂9が介在するように、
前記上面に絶縁樹脂9が設けられている。
As shown in FIG. 3, the anode terminal 5 used in this embodiment has a tongue portion 8 formed in a ribbon shape so as to project to the side of the region where the capacitor element 2 is mounted. Is formed in such a length that the tongue portion 8 can be brought into contact with the anode lead wire 4 by bending the tongue portion 8 from the lead-out portion of the projecting portion, and the lower surface of the capacitor element 2 and the anode terminal to be mounted. When the upper surface of the capacitor element 5 comes into contact with the upper surface of the capacitor element 2, the anode terminal 5 and the negative electrode terminal 6 are short-circuited via the cathode layer formed on the surface of the capacitor element 2, so that insulation is provided between the lower surface of the capacitor element 2. So that the resin 9 intervenes,
An insulating resin 9 is provided on the upper surface.

【0012】前記コンデンサ素子2としては、従来より
固体電解コンデンサ素子として使用されている素子、例
えばタンタルのような弁金属粉末を成型して焼結するこ
とにより得た焼結体の表面に陽極酸化により誘電体とな
る酸化皮膜を形成して陽極体とし、この陽極体上に二酸
化マンガンなどの固体電解質層と、カーボンや銀ペース
トから成る陰極層とを積層形成することにより得られる
コンデンサ素子等を好適に使用することができる。尚、
前記固体電解質としてポリピロール等の高分子電解質を
用いたもの等も使用することができる。
The capacitor element 2 is an element conventionally used as a solid electrolytic capacitor element, for example, anodized on the surface of a sintered body obtained by molding and sintering valve metal powder such as tantalum. To form a dielectric oxide film as an anode body, and a capacitor element or the like obtained by laminating a solid electrolyte layer such as manganese dioxide and a cathode layer made of carbon or silver paste on the anode body. It can be used preferably. still,
As the solid electrolyte, those using a polymer electrolyte such as polypyrrole can also be used.

【0013】本実施例において前記陽極端子5並びに舌
部8と陰極端子6とは、図3に示すような形状とされ、
1対の陽極端子5と陰極端子6とから成る繰返し単位が
複数配列されて複数のコンデンサ素子2を搭載可能とさ
れたリードフレーム11により形成されており、本実施
例においては、これらコンデンサ素子2を搭載可能な繰
返し単位が、3×5=15個配置されて封止樹脂3にて
同時に封止される封止領域となる集合単位を形成し、該
集合単位が間隙を設けずに封止樹脂3にて封止されると
ともに、これら集合単位である封止領域がリードフレー
ム11の長手方向に繰返し配置されている。
In this embodiment, the anode terminal 5, the tongue portion 8 and the cathode terminal 6 are shaped as shown in FIG.
A plurality of repeating units each consisting of a pair of anode terminals 5 and cathode terminals 6 are arranged to form a lead frame 11 on which a plurality of capacitor elements 2 can be mounted. In the present embodiment, these capacitor elements 2 are formed. 3 × 5 = 15 repeatable units that can be mounted are arranged to form a collective unit that is a sealing region that is simultaneously sealed by the sealing resin 3, and the collective unit seals without providing a gap. While being sealed with the resin 3, the sealing region, which is a set unit of these, is repeatedly arranged in the longitudinal direction of the lead frame 11.

【0014】また、本実施例のリードフレーム11に
は、図3に示すように、前記集合単位を囲む外周位置
に、切断を行い易くするための切断線34,35の目安
となる切断用ガイド孔32が設けられているとともに、
該切断用ガイド孔32の外周位置には、本発明の特徴と
なる貫通孔30,31とが設けられており、前記リード
フレーム11の切断時、特には図3に示す前記集合単位
の外周部11a,11bの切断時に、これら外周部の切
断における振動や機械的ストレス(応力)が前記集合単
位に内在されるリードフレーム11やコンデンサ素子2
に伝達され難いようになっている。
Further, in the lead frame 11 of this embodiment, as shown in FIG. 3, a cutting guide serving as a guide for cutting lines 34 and 35 for facilitating cutting is provided at an outer peripheral position surrounding the set unit. With the holes 32,
At the outer peripheral position of the cutting guide hole 32, through holes 30 and 31 which are the features of the present invention are provided, and when the lead frame 11 is cut, particularly the outer peripheral portion of the set unit shown in FIG. At the time of cutting 11a and 11b, the lead frame 11 and the capacitor element 2 in which vibration and mechanical stress (stress) due to the cutting of these outer peripheral parts are inherent in the assembly unit
It is difficult to be transmitted to.

【0015】尚、本実施例では、前記したように前記集
合単位を囲むように前記貫通孔30,31を設けている
が、本発明はこれに限定されるものではなく、これら貫
通孔30,31の部分を薄肉の凹部としても良い。
In this embodiment, the through holes 30 and 31 are provided so as to surround the set unit as described above, but the present invention is not limited to this, and the through holes 30 and 31 are not limited thereto. The portion 31 may be a thin recess.

【0016】また、本実施例では前記したように、前記
貫通孔30,31を前記集合単位を囲むように配置して
おり、このようにすることで、前記コンデンサ素子2が
搭載される前記繰返し単位を効率良く囲めるようにして
いるが、本発明はこれに限定されるものではなく、これ
ら貫通孔30,31は、コンデンサ素子2が搭載される
前記繰返し単位を囲むようにすれば良く、これら貫通孔
30,31の配置位置は、前記集合単位における繰返し
単位の配置構成等により適宜に選択すれば良い。
Further, in the present embodiment, as described above, the through holes 30 and 31 are arranged so as to surround the collective unit, and by doing so, the repeated mounting of the capacitor element 2 is performed. Although the unit is efficiently enclosed, the present invention is not limited to this, and these through holes 30 and 31 may be arranged so as to surround the repeating unit in which the capacitor element 2 is mounted. The arrangement positions of the through holes 30 and 31 may be appropriately selected depending on the arrangement and the like of the repeating unit in the set unit.

【0017】以下、本実施例のチップ型固体電解コンデ
ンサ1をその製造工程に沿って説明する。まず、このリ
ードフレーム11の陽極端子5となる部分の上面に、図
4(a)に示すように塗料を塗布、乾燥させて絶縁樹脂
9を形成する。本実施例においては、これら塗料を塗布
の方法として、図示しないインクジェットノズルを用い
てリードフレーム11の該当部位に、絶縁樹脂9の厚み
が十分な絶縁性が得られる厚みとなるように塗料を塗
布、乾燥させて形成をしているが、本発明はこれに限定
されるものではなく、これら絶縁樹脂9の形成方法とし
ては任意の方法を用いることができる。
The chip type solid electrolytic capacitor 1 of this embodiment will be described below along with its manufacturing process. First, as shown in FIG. 4A, a coating material is applied and dried on the upper surface of the portion of the lead frame 11 to be the anode terminal 5, and the insulating resin 9 is formed. In the present embodiment, as a method of applying these paints, an ink jet nozzle (not shown) is used to apply the paint to the relevant portion of the lead frame 11 so that the thickness of the insulating resin 9 is a thickness that provides sufficient insulation. However, the present invention is not limited to this, and any method can be used as a method of forming these insulating resins 9.

【0018】尚、前記インクジェットノズルによる塗
布、乾燥においては、ピンホールのない良好な絶縁樹脂
層を形成できるように、塗布、乾燥を複数回に渡り繰返
し実施するようになっている。
In the application and drying by the ink jet nozzle, the application and the drying are repeated a plurality of times so that a good insulating resin layer without pinholes can be formed.

【0019】また、これら絶縁樹脂9としては、乾燥工
程の効率化とともに、樹脂の固形分の高さから容易に比
較的厚みの大きな塗膜を得られることから、本実施例で
は紫外線硬化樹脂を使用しているが、本発明はこれに限
定されるものではない。
Further, as the insulating resin 9, a UV-curable resin is used in this embodiment because a coating film having a relatively large thickness can be easily obtained from the height of the solid content of the resin as well as the efficiency of the drying process. Although used, the invention is not so limited.

【0020】これら絶縁樹脂9の形成後に、図4(b)
に示すように、陰極端子6となる部分の上面に、導電性
接着材10を塗布形成し、該塗布後に図4(c)に示す
ようにコンデンサ素子2を搭載する。
After the insulating resin 9 is formed, as shown in FIG.
As shown in FIG. 4, the conductive adhesive 10 is applied and formed on the upper surface of the portion to be the cathode terminal 6, and after the application, the capacitor element 2 is mounted as shown in FIG. 4C.

【0021】これら導電性接着材10としては、接続す
る前記コンデンサ素子2の下面が前述のようにカーボン
や銀ペーストから成る陰極層が露出していることから、
これら陰極層との接着性等の観点から、通常においてI
C等のマウントに使用される銀系の導電性接着材10が
好適に使用されるが、本発明はこれに限定されるもので
はなく、これら導電性接着材10に代えて半田ペースト
等を塗布しておき、コンデンサ素子2の搭載後において
該半田ペーストを溶融させてコンデンサ素子2を固定、
搭載するようにしても良い。
In these conductive adhesives 10, since the cathode layer made of carbon or silver paste is exposed on the lower surface of the capacitor element 2 to be connected, as described above,
From the viewpoint of adhesion to these cathode layers, etc.
The silver-based conductive adhesive 10 used for mounting C or the like is preferably used, but the present invention is not limited to this, and a solder paste or the like is applied instead of the conductive adhesive 10. Then, after mounting the capacitor element 2, the solder paste is melted to fix the capacitor element 2,
It may be mounted.

【0022】これらコンデンサ素子2の搭載後におい
て、前記導電性接着材10の乾燥或いは硬化を行ってコ
ンデンサ素子2を固定し、該固定の後に図4(d)に示
すように、前記陽極端子5より導出形成されている舌部
8をコンデンサ素子2の搭載側へ折り曲げて、前記陽極
導出線4と当接させるとともに、陽極導出線4と舌部8
とを溶接にて接続して陽極導出線4を前記陽極端子5に
電気的に接続する。
After mounting these capacitor elements 2, the conductive adhesive 10 is dried or cured to fix the capacitor elements 2, and after the fixing, as shown in FIG. The tongue portion 8 formed by leading out is bent toward the mounting side of the capacitor element 2 and brought into contact with the anode lead wire 4, and the anode lead wire 4 and the tongue portion 8 are formed.
And are connected by welding to electrically connect the anode lead wire 4 to the anode terminal 5.

【0023】次いで、図4(e)に示すように、前記コ
ンデンサ素子2を搭載したリードフレーム11を、該リ
ードフレーム11のコンデンサ素子2の非搭載面を下面
として平坦板であるフェライト板19上に配置し、前記
下面とフェライト板19の上面とが当接するようにした
後、前記リードフレーム11のコンデンサ素子2の搭載
側より全体に外装樹脂3となる封止樹脂を、前記コンデ
ンサ素子2全体が該外装樹脂3に覆われるような所定厚
みとなるように流し込むとともに、該リードフレーム1
1の外部雰囲気を真空とすることで、内部の微細な領域
まで外装樹脂3が充填されるようにした後、該外装樹脂
3を硬化させる。
Next, as shown in FIG. 4E, the lead frame 11 on which the capacitor element 2 is mounted is placed on a ferrite plate 19 which is a flat plate with the non-mounting surface of the capacitor element 2 of the lead frame 11 as the lower surface. And the lower surface and the upper surface of the ferrite plate 19 are brought into contact with each other, and a sealing resin serving as an exterior resin 3 is entirely provided from the mounting side of the lead frame 11 on which the capacitor element 2 is mounted. Is poured into the lead frame 1 so as to have a predetermined thickness so as to be covered with the exterior resin 3.
The exterior atmosphere of No. 1 is made to be a vacuum, so that the exterior resin 3 is filled up to a fine region inside, and then the exterior resin 3 is cured.

【0024】このように、外部雰囲気を真空とすること
は、内部の微細な領域まで外装樹脂3を迅速に充填でき
るようになることから好ましいが、本発明はこれに限定
されるものではない。
As described above, it is preferable to make the external atmosphere vacuum, because the exterior resin 3 can be quickly filled even in a fine region inside, but the present invention is not limited to this.

【0025】これら外装樹脂3としては、従来のトラン
スファーモールド成型に使用されるモールド樹脂である
エポキシアクリレート等のエポキシ系樹脂を好適に使用
することができるとともに、基板実装時の半田耐熱に耐
えられる耐熱性を有し、適宜な加熱状態或いは常温にお
いて液体状態を得ることができる樹脂であれば好適に使
用することができる。
As the exterior resin 3, an epoxy resin such as epoxy acrylate, which is a molding resin used in the conventional transfer molding, can be preferably used, and at the same time, a heat resistance that can withstand solder heat during mounting on a board. Any resin having properties and capable of obtaining a liquid state at an appropriate heating state or room temperature can be suitably used.

【0026】また、本実施例では、前記のように、コン
デンサ素子2が搭載されたリードフレーム11を、磁性
体であり、耐熱性の高いフェライト板19上に載置して
外装樹脂3となる封止樹脂を流し込むようにしており、
このようにすることは、これら平坦板であるフェライト
板19により、封止樹脂の前記リードフレーム11の下
面への流出量を規制でき、外装樹脂のはみ出し部3’の
大きさを低減できることから好ましいが、本実施例はこ
れに限定されるものではなく、これらフェライト板19
に代えて耐熱性フィルムを貼着して外装樹脂3を形成し
たり、或いは金型内部にリードフレーム11を配置して
外装樹脂3を形成するようにしても良い。
Further, in the present embodiment, as described above, the lead frame 11 on which the capacitor element 2 is mounted is placed on the ferrite plate 19 which is a magnetic material and has high heat resistance to form the exterior resin 3. I am pouring the sealing resin,
This is preferable because the flat ferrite plate 19 can regulate the outflow amount of the sealing resin to the lower surface of the lead frame 11 and reduce the size of the protruding portion 3 ′ of the exterior resin. However, the present embodiment is not limited to this, and these ferrite plates 19
Instead of this, a heat resistant film may be attached to form the exterior resin 3, or the lead frame 11 may be arranged inside the mold to form the exterior resin 3.

【0027】尚、これらフェライト板19の上面に外装
樹脂3との接着を阻害する離型剤等を塗布すること等は
任意とされる。
It should be noted that it is optional to apply a release agent or the like to the upper surface of these ferrite plates 19 which inhibits adhesion with the exterior resin 3.

【0028】前記外装樹脂3が適宜な硬化状態となった
後において、図5(f)に示すように、封止樹脂された
リードフレーム11を前記フェライト板19より剥がし
た後に、前記外装樹脂のはみ出し部3’とリードフレー
ム11とを、該リードフレーム11の下面より弾性研磨
体を用いて研削する。尚、本実施例では該弾性研磨体と
して弾性研磨体の側面外周を前記リードフレーム11の
下面に当接させて研磨しているが、本発明はこれに限定
されるものではなく、これら弾性研磨体として円盤状の
ものを使用し、該盤面を前記リードフレーム11の下面
に当接させて研磨するようにしても良い。
After the exterior resin 3 has been appropriately cured, as shown in FIG. 5 (f), the lead frame 11 with the sealing resin is peeled off from the ferrite plate 19, and then the exterior resin 3 is removed. The protruding portion 3 ′ and the lead frame 11 are ground from the lower surface of the lead frame 11 using an elastic polishing body. In this embodiment, as the elastic polishing body, the outer periphery of the side surface of the elastic polishing body is brought into contact with the lower surface of the lead frame 11 for polishing, but the present invention is not limited to this. A disk-shaped body may be used, and the disk surface may be brought into contact with the lower surface of the lead frame 11 and polished.

【0029】このように、前記外装樹脂のはみ出し部
3’のみならず、リードフレーム11の下面全体を薄肉
に研削するようにすることは、樹脂封止される以前のリ
ードフレーム11として高強度で反り難く、取り扱い性
に優れた厚肉のリードフレームを使用できるようにな
り、作業性を向上できるとともに、得られるコンデンサ
中に占めるリードフレーム11の体積比率を、リードフ
レーム11の下面全体を薄肉に研削しないものに比較し
て低減できるとともに、より大きな(高さのある)コン
デンサ素子2を搭載することが可能となることから、該
コンデンサに占めるコンデンサ素子2の体積比率をより
高いものとできることから好ましいが、本実施例はこれ
に限定されるものではない。
As described above, not only the protruding portion 3'of the exterior resin but also the entire lower surface of the lead frame 11 is thinly ground so that the lead frame 11 before resin sealing has high strength. It becomes possible to use a thick lead frame which is hard to warp and has excellent handleability, which can improve workability, and the volume ratio of the lead frame 11 in the obtained capacitor can be reduced by making the entire lower surface of the lead frame 11 thin. The volume ratio of the capacitor element 2 occupying in the capacitor can be made higher since it can be reduced as compared with the case where it is not ground and a larger (higher) capacitor element 2 can be mounted. Although preferred, this embodiment is not so limited.

【0030】これら研削の後、前記リードフレーム11
の所定位置を図5(g)に示すようにリードフレーム1
1の角部が曲部をなるようにR加工を実施することで、
図2に示す陽極端子5並びに陰極端子6の半田収容部
7、7’を形成する。
After these grindings, the lead frame 11
As shown in FIG. 5G, the predetermined position of the lead frame 1
By performing R processing so that the corner of 1 becomes a curved part,
The solder accommodating portions 7 and 7'of the anode terminal 5 and the cathode terminal 6 shown in FIG. 2 are formed.

【0031】このようにして半田収容部7、7’を形成
することは、得られたチップ型固体電解コンデンサ1を
基板実装する際に、半田との接触面積を十分に取れるよ
うになるり良好な実装強度が得られるばかりか、チップ
型固体電解コンデンサ1の外周に露出する半田フィレッ
トの領域を大幅に少ないものとすることができ、実装効
率を向上できるようになることから好ましいが、本発明
はこれに限定されるものではない。
By forming the solder accommodating portions 7 and 7'in this manner, it is possible to sufficiently obtain a contact area with solder when mounting the obtained chip type solid electrolytic capacitor 1 on a substrate. However, it is preferable that the area of the solder fillet exposed on the outer periphery of the chip-type solid electrolytic capacitor 1 can be significantly reduced and the mounting efficiency can be improved. Is not limited to this.

【0032】これらR加工の実施後において、図5
(h)に示すように、リードフレーム11の露出部に半
田メッキ14等の半田との塗れ性を向上できる金属のメ
ッキ加工を実施した後、チップ型固体電解コンデンサ1
の上面に相当する該リードフレーム11の露出面とは反
対面に、図5(i)に示すように、ダイシングテープ1
5を貼着して、図5(J)に示すように、前記凹部13
側より切断溝16を形成して所定形状のチップ型固体電
解コンデンサ1が得られる。
After carrying out the R processing, as shown in FIG.
As shown in (h), after the exposed portion of the lead frame 11 is plated with a metal such as solder plating 14 that can improve the wettability with solder, the chip-type solid electrolytic capacitor 1
On the surface opposite to the exposed surface of the lead frame 11 corresponding to the upper surface of the dicing tape 1 as shown in FIG.
5 is attached, and as shown in FIG.
By forming the cutting groove 16 from the side, the chip type solid electrolytic capacitor 1 having a predetermined shape is obtained.

【0033】以上、本発明を図面に基づいて説明してき
たが、本発明はこれら前記実施例に限定されるものでは
なく、本発明の主旨を逸脱しない範囲での変更や追加が
あっても、本発明に含まれることは言うまでもない。
The present invention has been described above with reference to the drawings. However, the present invention is not limited to these embodiments, and even if there are changes and additions without departing from the scope of the present invention, Needless to say, it is included in the present invention.

【0034】例えば、前記実施例では、集合単位内に1
5個のコンデンサ素子2を内蔵するようにしているが、
本発明はこれに限定されるものではなく、これら集合単
位内に4個、6個や9個のコンデンサ素子2を内蔵する
ようにしても良く、これら素子数は集合単位の形状や大
きさにより適宜に選定すれば良い。
For example, in the above embodiment, 1 is set in the set unit.
Although it is designed to incorporate five capacitor elements 2,
The present invention is not limited to this, and it is also possible to incorporate 4, 6, or 9 capacitor elements 2 in these set units, and the number of these elements depends on the shape and size of the set unit. It may be selected appropriately.

【0035】また、前記実施例では、舌部8を用いて前
記陽極導出線4と陽極端子5とを接続しているが、本発
明はこれに限定されるものではなく、これら陽極端子5
を前記陽極導出線4の下端に当接可能な断面視L字状の
形状としたり、該陽極端子5と陽極導出線4との間に枕
状の接続部材を配置して接続するようにしても良く、こ
れら陽極導出線4と陽極端子5との接続方法は適宜に選
択すれば良い。
In the above embodiment, the tongue portion 8 is used to connect the anode lead wire 4 and the anode terminal 5, but the present invention is not limited to this, and the anode terminal 5 is not limited to this.
Is formed into an L-shape in cross-section so that it can be brought into contact with the lower end of the anode lead wire 4, or a pillow-shaped connecting member is arranged between the anode terminal 5 and the anode lead wire 4 for connection. The connection method between the anode lead wire 4 and the anode terminal 5 may be appropriately selected.

【0036】[0036]

【発明の効果】本発明は次の効果を奏する。 (a)請求項1の発明によれば、前記薄肉部を前記コン
デンサ素子の搭載部を囲むようにリードフレームに設け
ておくことで、前記リードフレームの外周部等の切断時
において、これら切断における振動や機械的ストレスが
前記チップ型固体電解コンデンサの電極端子、特に陰極
端子に伝達されて印加されることを防止でき、よって、
切断によって陰極端子が脱落してしまったり、前記ES
R特性が悪化してしまうことを大幅に低減することがで
きる。
The present invention has the following effects. (A) According to the invention of claim 1, by providing the thin portion on the lead frame so as to surround the mounting portion of the capacitor element, when cutting the outer peripheral portion of the lead frame, etc. It is possible to prevent vibration and mechanical stress from being transmitted to and applied to the electrode terminals of the chip-type solid electrolytic capacitor, particularly the cathode terminals.
If the cathode terminal is dropped due to cutting,
It is possible to significantly reduce the deterioration of the R characteristic.

【0037】(b)請求項2の発明によれば、薄肉部を
貫通孔とすることで、より一層振動や機械的ストレスが
前記電極端子、特に陰極端子に伝達されて印加されるこ
とを防止できる。
(B) According to the second aspect of the present invention, by forming the thin portion as the through hole, it is possible to prevent further vibration and mechanical stress from being transmitted and applied to the electrode terminal, particularly the cathode terminal. it can.

【0038】(c)請求項3の発明によれば、前記薄肉
部を前記コンデンサ素子の搭載部を囲むようにリードフ
レームに設けておくことで、前記リードフレームの外周
部等の切断時において、これら切断における振動や機械
的ストレスが前記チップ型固体電解コンデンサの電極端
子、特に陰極端子に伝達されて印加されることを防止で
き、よって、切断によって陰極端子が脱落してしまった
り、前記ESR特性が悪化してしまうことを大幅に低減
することができる。
(C) According to the invention of claim 3, by providing the thin portion on the lead frame so as to surround the mounting portion of the capacitor element, when cutting the outer peripheral portion of the lead frame or the like, It is possible to prevent vibration and mechanical stress due to these cuttings from being transmitted to and applied to the electrode terminals of the chip-type solid electrolytic capacitor, particularly the cathode terminals, so that the cutting may cause the cathode terminals to fall off or the ESR characteristics. Can be significantly reduced.

【0039】(d)請求項4の発明によれば、薄肉部を
貫通孔とすることで、より一層振動や機械的ストレスが
前記電極端子、特に陰極端子に伝達されて印加されるこ
とを防止できる。
(D) According to the invention of claim 4, by forming the thin portion as the through hole, it is possible to prevent further vibration and mechanical stress from being transmitted to and applied to the electrode terminal, particularly the cathode terminal. it can.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例におけるチップ型固体電解コン
デンサの構造を示す斜視図である。
FIG. 1 is a perspective view showing a structure of a chip type solid electrolytic capacitor in an example of the present invention.

【図2】本発明の実施例におけるチップ型固体電解コン
デンサを示す断面図である。
FIG. 2 is a cross-sectional view showing a chip type solid electrolytic capacitor in an example of the present invention.

【図3】本発明の本実施例にて用いたリードフレームの
形状を示す図である。
FIG. 3 is a diagram showing a shape of a lead frame used in this embodiment of the present invention.

【図4】本発明のチップ型固体電解コンデンサの製造工
程を示す図である。
FIG. 4 is a diagram showing a manufacturing process of the chip-type solid electrolytic capacitor of the present invention.

【図5】本発明のチップ型固体電解コンデンサの製造工
程を示す図である。
FIG. 5 is a diagram showing a manufacturing process of the chip type solid electrolytic capacitor of the present invention.

【符号の説明】[Explanation of symbols]

1 チップ型固体電解コンデンサ 2 コンデンサ素子 3 外装樹脂 3’ 外装樹脂(はみ出し部) 4 陽極導出線 5 陽極端子 6 陰極端子 7 半田収容部(陽極) 7’ 半田収容部(陰極) 8 舌部 9 絶縁樹脂 10 導電性接着剤 11 リードフレーム 12 弾性研磨体 13 凹部 14 半田メッキ 15 ダイシングテープ 16 切断溝 19 フェライト板(平坦板) 30 貫通孔 31 貫通孔 32 切断用ガイド孔 34 切断線 35 切断線 1 chip type solid electrolytic capacitor 2 Capacitor element 3 Exterior resin 3'Exterior resin (protruding part) 4 Anode lead wire 5 Anode terminal 6 cathode terminal 7 Solder storage part (anode) 7'Solder housing (cathode) 8 tongue 9 Insulating resin 10 Conductive adhesive 11 lead frame 12 Elastic polishing body 13 recess 14 Solder plating 15 dicing tape 16 cutting groove 19 Ferrite plate (flat plate) 30 through holes 31 through hole 32 Cutting guide hole 34 cutting line 35 cutting line

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 陽極導出線を有するとともに、弁作用金
属から成る陽極体の表面に誘電体酸化皮膜と電解質層と
陰極層とを順次積層形成して、その外周が前記陰極層と
されたコンデンサ素子を、前記コンデンサ素子の陽極導
出線に接続される陽極端子並びに前記コンデンサ素子の
陰極層に接続される陰極端子とを具備する繰返し単位を
複数有するリードフレームに搭載し、該リードフレーム
に搭載された前記コンデンサ素子と前記陽極端子並びに
陰極端子とを、各極端子の一部が露出するように外装樹
脂にて被覆するとともに、該外装樹脂にて被覆された前
記コンデンサ素子を内在する前記リードフレームの繰返
し単位を所定の形状に切断して得られるチップ型固体電
解コンデンサであって、前記リードフレームの前記コン
デンサ素子の搭載部を囲むように該リードフレームに薄
肉部を形成したことを特徴とするチップ型固体電解コン
デンサ。
1. A capacitor having an anode lead wire and a dielectric oxide film, an electrolyte layer, and a cathode layer, which are sequentially laminated on the surface of an anode body made of a valve metal, the outer periphery of which serves as the cathode layer. The element is mounted on a lead frame having a plurality of repeating units each having an anode terminal connected to the anode lead wire of the capacitor element and a cathode terminal connected to the cathode layer of the capacitor element, and mounted on the lead frame. The capacitor element, the anode terminal, and the cathode terminal are coated with an exterior resin so that a part of each electrode terminal is exposed, and the lead frame in which the capacitor element coated with the exterior resin is contained. Is a chip-type solid electrolytic capacitor obtained by cutting a repeating unit of the above into a predetermined shape, and a mounting portion of the capacitor element of the lead frame. A chip-type solid electrolytic capacitor, characterized in that a thin portion is formed on the lead frame so as to surround the.
【請求項2】 前記薄肉部が貫通孔である請求項1に記
載のチップ型固体電解コンデンサ。
2. The chip type solid electrolytic capacitor according to claim 1, wherein the thin portion is a through hole.
【請求項3】 陽極導出線を有するとともに、弁作用金
属から成る陽極体の表面に誘電体酸化皮膜と電解質層と
陰極層とを順次積層形成して、その外周が前記陰極層と
されたコンデンサ素子を、前記コンデンサ素子の陽極導
出線に接続される陽極端子並びに前記コンデンサ素子の
陰極層に接続される陰極端子とを具備する繰返し単位を
複数有するリードフレームに搭載する搭載工程と、該リ
ードフレームに搭載された前記コンデンサ素子と前記陽
極端子並びに陰極端子とを、各極端子の一部が露出する
ように外装樹脂にて被覆する被覆工程と、前記外装樹脂
にて被覆された前記コンデンサ素子を内在する前記リー
ドフレームの繰返し単位を所定の形状に切断する切断工
程と、を含むチップ型固体電解コンデンサの製造方法で
あって、前記リードフレームが、前記コンデンサ素子の
搭載部を囲むように薄肉部を形成されていることを特徴
とするチップ型固体電解コンデンサの製造方法。
3. A capacitor having an anode lead wire and a dielectric oxide film, an electrolyte layer, and a cathode layer which are sequentially laminated on the surface of an anode body made of a valve metal, and the outer periphery of which is the cathode layer. A mounting step of mounting an element on a lead frame having a plurality of repeating units each including an anode terminal connected to an anode lead wire of the capacitor element and a cathode terminal connected to a cathode layer of the capacitor element, and the lead frame. A coating step of coating the capacitor element and the anode terminal and the cathode terminal mounted on a casing with an exterior resin so that a part of each electrode terminal is exposed; and the capacitor element coated with the exterior resin. A method for manufacturing a chip-type solid electrolytic capacitor, comprising: a cutting step of cutting an internal repeating unit of the lead frame into a predetermined shape. A method for manufacturing a chip type solid electrolytic capacitor, wherein a thin portion is formed in the frame so as to surround a mounting portion of the capacitor element.
【請求項4】 前記薄肉部が貫通孔である請求項3に記
載のチップ型固体電解コンデンサの製造方法。
4. The method for manufacturing a chip type solid electrolytic capacitor according to claim 3, wherein the thin portion is a through hole.
JP2001396838A 2001-12-27 2001-12-27 Chip solid electrolytic capacitor and manufacturing method therefor Pending JP2003197485A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006041047A1 (en) * 2004-10-15 2006-04-20 Matsushita Electric Industrial Co., Ltd. Solid-electrolyte capacitor, manufacturing method thereof, and digital signal processing substrate using the solid-electrolyte capacitor
WO2006123597A1 (en) * 2005-05-18 2006-11-23 Matsushita Electric Industrial Co., Ltd. Digital signal processor
JP2006352059A (en) * 2005-05-18 2006-12-28 Matsushita Electric Ind Co Ltd Digital signal processing board
JP2007123309A (en) * 2005-10-25 2007-05-17 Matsushita Electric Ind Co Ltd Digital signal processing substrate
WO2014038316A1 (en) * 2012-09-05 2014-03-13 昭和電工株式会社 Solid electrolytic capacitor manufacturing method

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JPH04134852A (en) * 1990-09-27 1992-05-08 Dainippon Printing Co Ltd Lead frame
JPH04284616A (en) * 1991-03-13 1992-10-09 Nippon Chemicon Corp Manufacture of solid electrolytic capacitor
JP2001052961A (en) * 1999-06-01 2001-02-23 Rohm Co Ltd Structure of packaged solid electrolytic capacitor and manufacture thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04134852A (en) * 1990-09-27 1992-05-08 Dainippon Printing Co Ltd Lead frame
JPH04284616A (en) * 1991-03-13 1992-10-09 Nippon Chemicon Corp Manufacture of solid electrolytic capacitor
JP2001052961A (en) * 1999-06-01 2001-02-23 Rohm Co Ltd Structure of packaged solid electrolytic capacitor and manufacture thereof

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006041047A1 (en) * 2004-10-15 2006-04-20 Matsushita Electric Industrial Co., Ltd. Solid-electrolyte capacitor, manufacturing method thereof, and digital signal processing substrate using the solid-electrolyte capacitor
US7365961B2 (en) 2004-10-15 2008-04-29 Matsushita Electric Industrial Co., Ltd. Solid-electrolyte capacitor, manufacturing method thereof, and digital signal processing substrate using the solid-electrolyte capacitor
WO2006123597A1 (en) * 2005-05-18 2006-11-23 Matsushita Electric Industrial Co., Ltd. Digital signal processor
JP2006352059A (en) * 2005-05-18 2006-12-28 Matsushita Electric Ind Co Ltd Digital signal processing board
EP1883085A1 (en) * 2005-05-18 2008-01-30 Matsushita Electric Industrial Co., Ltd. Digital signal processor
KR100919337B1 (en) * 2005-05-18 2009-09-25 파나소닉 주식회사 Digital signal processor
EP1883085A4 (en) * 2005-05-18 2010-05-12 Panasonic Corp Digital signal processor
US7787234B2 (en) 2005-05-18 2010-08-31 Panasonic Corporation Digital signal processor
JP2007123309A (en) * 2005-10-25 2007-05-17 Matsushita Electric Ind Co Ltd Digital signal processing substrate
WO2014038316A1 (en) * 2012-09-05 2014-03-13 昭和電工株式会社 Solid electrolytic capacitor manufacturing method
JPWO2014038316A1 (en) * 2012-09-05 2016-08-08 昭和電工株式会社 Manufacturing method of solid electrolytic capacitor
US9431179B2 (en) 2012-09-05 2016-08-30 Showa Denko K.K. Solid electrolytic capacitor manufacturing method

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