JP2003194882A5 - - Google Patents
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- Publication number
- JP2003194882A5 JP2003194882A5 JP2002312482A JP2002312482A JP2003194882A5 JP 2003194882 A5 JP2003194882 A5 JP 2003194882A5 JP 2002312482 A JP2002312482 A JP 2002312482A JP 2002312482 A JP2002312482 A JP 2002312482A JP 2003194882 A5 JP2003194882 A5 JP 2003194882A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/035,654 | 2001-11-01 | ||
| US10/035,654 US6662134B2 (en) | 2001-11-01 | 2001-11-01 | Method and apparatus for enabling extests to be performed in AC-coupled systems |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003194882A JP2003194882A (ja) | 2003-07-09 |
| JP2003194882A5 true JP2003194882A5 (enExample) | 2005-10-27 |
Family
ID=21883980
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002312482A Pending JP2003194882A (ja) | 2001-11-01 | 2002-10-28 | Ａｃ結合システムにおいてｅｘｔｅｓｔを実施可能にするための装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6662134B2 (enExample) |
| JP (1) | JP2003194882A (enExample) |
| DE (1) | DE10241389A1 (enExample) |
| SG (1) | SG107102A1 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6763486B2 (en) * | 2001-05-09 | 2004-07-13 | Agilent Technologies, Inc. | Method and apparatus of boundary scan testing for AC-coupled differential data paths |
| US6813737B1 (en) * | 2001-10-31 | 2004-11-02 | Cisco Technology, Inc. | Short circuited capacitor detection in AC coupled links using boundary scan test methodology |
| US7089463B1 (en) * | 2002-02-20 | 2006-08-08 | Cisco Technology Inc. | Test buffer design and interface mechanism for differential receiver AC/DC boundary scan test |
| US7877652B1 (en) * | 2003-03-31 | 2011-01-25 | Qualcomm Incorporated | Detection circuit and method for AC coupled circuitry |
| US7222278B2 (en) * | 2003-09-17 | 2007-05-22 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Programmable hysteresis for boundary-scan testing |
| US7149943B2 (en) * | 2004-01-12 | 2006-12-12 | Lucent Technologies Inc. | System for flexible embedded Boundary Scan testing |
| KR100838808B1 (ko) | 2006-11-14 | 2008-06-17 | 주식회사 준마엔지니어링 | 제이테그를 이용한 테스트 시스템 및 그 제어방법 |
| CN103426288A (zh) * | 2012-05-15 | 2013-12-04 | 苏州工业园区新宏博通讯科技有限公司 | 多功能交流电能采集终端 |
| CN103424636A (zh) * | 2012-05-15 | 2013-12-04 | 苏州工业园区新宏博通讯科技有限公司 | 多功能交直流电能采集终端 |
| CN112285446B (zh) * | 2019-07-12 | 2024-05-31 | 瑞昱半导体股份有限公司 | 执行多种测试的测试系统、传送装置与接收装置 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3372052B2 (ja) * | 1991-06-06 | 2003-01-27 | テキサス インスツルメンツ インコーポレイテツド | 境界走査集積回路 |
| US5497378A (en) * | 1993-11-02 | 1996-03-05 | International Business Machines Corporation | System and method for testing a circuit network having elements testable by different boundary scan standards |
| US6000051A (en) * | 1997-10-10 | 1999-12-07 | Logic Vision, Inc. | Method and apparatus for high-speed interconnect testing |
| US6601189B1 (en) * | 1999-10-01 | 2003-07-29 | Stmicroelectronics Limited | System and method for communicating with an integrated circuit |
| US6594802B1 (en) * | 2000-03-23 | 2003-07-15 | Intellitech Corporation | Method and apparatus for providing optimized access to circuits for debug, programming, and test |
-
2001
- 2001-11-01 US US10/035,654 patent/US6662134B2/en not_active Expired - Fee Related
-
2002
- 2002-05-22 SG SG200203079A patent/SG107102A1/en unknown
- 2002-09-06 DE DE10241389A patent/DE10241389A1/de not_active Withdrawn
- 2002-10-28 JP JP2002312482A patent/JP2003194882A/ja active Pending