JP2003188219A - Inspection method for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device-inspecting method for comparing inspection data in detail in the different inspection temperatures of normal- temperature wafer inspection and high-temperature product shipment inspection, and for supplying a stable yield. <P>SOLUTION: The semiconductor device-inspecting method includes a normal- temperature wafer inspection process S200 for allowing a semiconductor device, having a memory for storing inspection data to be subjected to normal- temperature wafer inspection, a normal-temperature inspection data-write process S201 for storing obtained normal-temperature inspection data into the memory of the semiconductor device, a normal-temperature inspection data-read process S202 for reading the normal-temperature inspection data, a high-temperature product shipment inspection process S400 for allowing the semiconductor device to be subjected to high-temperature product shipment inspection, and a temperature-dependent characteristics inspection process S500 for inspecting the temperature dependence characteristics in a semiconductor product according to the normal-temperature inspection data and the high-temperature inspection data that are measured by the high-temperature product shipment inspection process. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device inspection method, and in particular, a nonvolatile memory in a semiconductor device is used to permanently store inspection data at a plurality of inspection temperatures to obtain detailed temperature dependence characteristics. The present invention relates to a semiconductor device inspection method for facilitating the quality judgment, or the failure analysis after the inspection and after the product is shipped.

[0002]

2. Description of the Related Art Generally, in the shipping inspection of a semiconductor device, after the wafer is inspected at room temperature, the product is assembled and the product shipping inspection is performed at a high temperature. In the quality judgment of the temperature-dependent characteristic inspection, the characteristic change amount Δα at the inspection temperature difference ΔT is predicted from the trial evaluation data, and the inspection margin is selected in consideration of the process variation.

FIG. 5 shows a product shipment flow of a semiconductor device such as an LSI. Diffusion process S100 on silicon wafer
First, the semiconductor device formed by using a normal temperature wafer inspection device such as an LSI tester or a prober in a wafer state.
The normal temperature wafer inspection S200 is performed. Room temperature wafer inspection S20
In 0, the inspection items such as DC characteristic test, AC characteristic test and function test are good chips /
Sort into defective chips. Next, only good chips are assembled in the package sealing step S300. The semiconductor device assembled in the package sealing step S300 is subjected to a high temperature product shipment inspection S4 using a high temperature product shipment inspection device such as an LSI tester or a handler different from the room temperature wafer inspection device.
00 is performed. In the high-temperature product shipment inspection S400, a high-quality inspection temperature obtained by adding an inspection margin temperature to the operation-guaranteed temperature is used, and the inspection items such as the DC characteristic test, the AC characteristic test, and the function test are non-defective devices /
Select defective devices. Ship non-defective devices as products S
600.

Regarding the method of determining the quality of the temperature dependent characteristic inspection, a VCO temperature dependent characteristic inspection of a PLL (Phase Locked Loop) using a voltage controlled oscillator (VCO) mounted on the semiconductor device shown in FIG. The pass / fail judgment method will be described with reference to the ring oscillator type VCO configuration of FIG. 7 and the temperature-dependent characteristics of the VCO room temperature and high temperature of FIG.

For example, 43 Mbps of a magnetic recording medium or the like
The PLL operation for generating the 84 MHz sampling clock in synchronization with the reproduction signal when the reproduction signal is double-sampled will be described. First, the A / D converter (A / D Co
The input reproduction signal is sampled by nverter (hereinafter ADC) 2. Next, in the center frequency detection 3, a center frequency of 84 MHz for synchronizing the reproduced signal sampled
The center frequency phase error with respect to is detected. The detected center frequency phase error is detected by the D / A converter (D / A Conv
It is converted to a center frequency phase error voltage by 2 MHz sampling from the DAC 4). In addition, the frequency error detection 5 is ± 10 with respect to the center frequency 84 MHz.
Detect the phase error of the% frequency error. The detected phase error of the frequency error is converted by the DAC 6 into a phase error voltage of ± 10% frequency error with respect to the center frequency of 84 MHz by sampling at 50 MHz.

Next, the output voltages of the DAC 4 and the DAC 6 are combined and passed through a Low Pass Filter (hereinafter referred to as LPF) 7, and VCO 1
And a 84 MHz sampling clock synchronized with the reproduction signal is generated. When the synchronized 84 MHz sampling clock is generated, the center frequency detection 3
The center frequency phase error detected in (4) is held as it is, and only the frequency error of ± 10% with respect to the center frequency 84 MHz detected in frequency error detection 5 changes.

± 10 with respect to the center frequency of 84 MHz
Assuming that the output voltage dynamic range of the DAC 6 that outputs a frequency error voltage of ± 0.4 V is ± 0.4 V, for example, as shown in FIG.
When the 84 MHz center frequency error is held at point A, it is only necessary to obtain a clock frequency of 84 MHz ± 10% within the range of ± 0.4 V with respect to the voltage value of 1.70 V at point A even with high temperature characteristics. Further, when the 84 MHz center frequency error is held at the point D of the temperature dependence characteristic 14 of the VCO high temperature of the VCO 1, a clock of 84 MHz ± 10% within a range of ± 0.4 V with respect to the voltage value of the point D of 1.52 V. It suffices if the frequency can be obtained even at high temperature characteristics. The point B is the clock frequency point of 84 MHz + 10% of the VCO room temperature of the VCO 1, and the VCO input voltage is 1.75V.
Point C is a clock frequency point of 84 MHz-10% of the VCO room temperature of VCO 1, and the VCO input voltage is 1.64V. E point is 84MHz + 10 of VCO1 high temperature of VCO
VCO input voltage is 1.67V at the% clock frequency point
Is. F point is 84 MHz-
At the clock frequency point of 10%, the VCO input voltage is 1.3
It is 4V.

In the method for determining the quality of the VCO temperature dependent characteristic inspection, first, in the room temperature wafer inspection, the following three items are inspected.

(1) When the VCO output frequency is 84 MHz, the VCO input voltage is within the range of 1.5V to 1.7V.

(2) The VCO output frequency is 84 MHz + 10% or more when the VCO input voltage is +0.4 V with respect to the VCO input voltage when the VCO output frequency is 84 MHz.

(3) The VCO output frequency is 84 MHz-10% or less when the VCO input voltage is -0.4 V with respect to the VCO input voltage when the VCO output frequency is 84 MHz.

Next, in the high temperature product shipment inspection, the following two items are inspected.

(4) Room temperature wafer inspection 1.7V-
When the VCO input voltage is 0.4V or 1.3V, VC
O output frequency is 84MHz-10% or less.

(5) Room temperature wafer inspection + 1.5V
When the VCO input voltage is 0.4V or 1.9V, VC
O output frequency is 84MHz + 10% or more.

Based on the room temperature wafer inspection standard, the inspection standard for the high temperature product shipment inspection is determined based on the VCO1 evaluation data.

CM having an advantage of low power consumption
When the VCO is realized by the OS process, in most cases, a ring oscillator configuration in which delay elements such as inverters are connected in a ring shape is adopted. However, the ring oscillator type VCO
As shown in FIG. 7, a constant current circuit 8 that determines the current of the inverter and a circuit 9 that converts the input voltage of the VCO 1 into a current.
The first polarity transistor 11, the first polarity transistor 11 in the ring oscillator 10, and the SW voltage determined by the respective performance ratios of the second polarity transistor 12 are power supply voltage, temperature, and process variation. Susceptible to.

[0017]

However, in the conventional shipping inspection method for a semiconductor device, the guaranteed portion of the product is divided into a portion that depends on the operating environment such as power supply voltage and temperature, and a lot variation portion due to process variation. When considered separately, the process variation was large due to the process miniaturization, and the lot variation amount occupying the product guarantee range was larger than the operating environment dependent variation amount of each product. VCO
In the temperature dependent characteristic inspection, the inspection item of the room temperature wafer inspection (1) When the VCO output frequency is 84 MHz, the VCO input voltage does not fall within the range of 1.5V to 1.7V, which causes a decrease in the room temperature wafer inspection yield. It was Further, the inspection standard of the inspection item (1) of the above-mentioned room temperature wafer inspection is loosened.
When the voltage is set to 4V to 1.8V, the decrease in the room temperature wafer inspection yield can be prevented, but it causes the decrease in the high temperature product shipment inspection yield. Inspection items (4) and (5) for high-temperature product shipment inspection
The inspection standard of is as follows.

(4) Room temperature wafer inspection: For 1.8V-
When VCO input voltage of 0.4V or 1.4V, VC
O output frequency is 84MHz-10% or less.

(5) Room temperature wafer inspection: 1.4V +
When the VCO input voltage is 0.4V or 1.8V, VC
O output frequency is 84MHz + 10% or more.

If the normal temperature wafer inspection non-defective chip whose VCO input voltage is 1.4 V when the VCO output frequency is 84 MHz in the normal temperature wafer inspection,
VC at 1.4V VCO input voltage of inspection item (4)
Since the O output frequency does not fall below 84 MHz-10%, it is determined to be defective. However, the product ability at high temperature is -0.4V, ie 1.0V, compared to 1.4V for room temperature wafer inspection.
VCO input voltage, VCO output frequency is 84MHz-
It should be 10% or less. That is, there is no problem in the characteristics of the product which is determined as defective. Power supply voltage dependent change in LSI design,
A situation has arisen where temperature-dependent changes can be absorbed but lot variations cannot. Although some inspection margins are set for each inspection standard, if lot variation is large, even devices within the temperature-dependent guaranteed range are defectively determined, which causes a decrease in yield. Furthermore, regarding the inspection items that are guaranteed between the normal temperature wafer inspection and the high temperature product shipment inspection, such as temperature dependent characteristics, "Wafer inspection equipment and product shipment inspection equipment are different."
Due to physical problems such as "difficult to transfer inspection data",
The detailed inspection data comparison at different temperatures could not be performed, and the temperature dependent characteristic inspection of the same device could not be performed.

Further, in the conventional room temperature wafer inspection, only good chips / defective chips are discriminated, and when trying to analyze low yield lots, it is necessary to prepare a defect reproduction environment and collect data again. It was Further, in the conventional high-temperature product shipment inspection, only non-defective / defective devices are discriminated, and when trying to analyze low yield lots, it is necessary to prepare a defect reproduction environment and collect data again. Furthermore, if a defect occurs after the product is shipped, the characteristic tendency of each lot at the time of shipment is managed.
Since there is no quality data at the time of shipment of each LSI, it is difficult to analyze the defect.

Therefore, the first aspect of the present invention is to provide a semiconductor device inspection method for supplying a stable yield by performing detailed inspection data comparison between different inspection temperatures of a normal temperature wafer inspection of a semiconductor device and a high temperature product shipment inspection. The purpose of. A second object is to facilitate analysis of low-yield lots and the like in room temperature wafer inspection. A third object is to facilitate analysis of low-yield lots in high-temperature product shipment inspection. A fourth object of the present invention is to facilitate the analysis of a defect that has occurred after the product is shipped.

[0023]

A method of inspecting a semiconductor device according to claim 1, wherein a semiconductor device provided with a memory for storing inspection data is inspected at room temperature by a room temperature wafer inspection step and a room temperature wafer inspection step. The normal temperature inspection data writing process of storing the normal temperature inspection data stored in the memory of the semiconductor device, the normal temperature inspection data reading process of reading the normal temperature inspection data stored in the memory of the semiconductor device in the normal temperature inspection data writing process, and the normal temperature inspection data reading process Depends on the temperature of the semiconductor product by the high temperature product shipment inspection process that performs the high temperature product shipment inspection of the semiconductor device that has read the room temperature inspection data, and the room temperature inspection data read in the normal temperature inspection data read process and the high temperature inspection data measured in the high temperature product shipment inspection process It includes a temperature-dependent characteristic inspection step for inspecting characteristics.

According to the semiconductor device inspection method of the first aspect, the temperature-dependent characteristic inspection for each device can be performed with high accuracy by reading the room-temperature inspection data stored in the memory and comparing it with the high-temperature product shipment inspection data. It is possible to prevent a decrease in yield due to process variations.

According to a second aspect of the present invention, there is provided a method for inspecting a semiconductor device, comprising a room temperature wafer inspection step of inspecting a semiconductor device having a memory for storing inspection data, and a room temperature inspection data measured in the room temperature wafer inspection step. From the room temperature inspection data writing process of storing in the device memory, the room temperature inspection data reading process of reading the room temperature inspection data stored in the semiconductor device memory in the room temperature inspection data writing process, and the room temperature inspection data read in the room temperature inspection data reading process This includes an analysis step of analyzing a room temperature inspection failure.

According to the semiconductor device inspection method of the second aspect, by using the room temperature inspection data stored in the memory, information can be collected under the room temperature wafer inspection environment in the defective chip analysis in the room temperature wafer inspection. This facilitates analysis.

According to a third aspect of the present invention, there is provided a semiconductor device inspection method comprising a semiconductor device provided with a memory for storing inspection data, a high temperature product shipment inspection process for inspecting the semiconductor device at high temperature product shipment, and a high temperature product shipment inspection process. High temperature inspection data writing step of storing the measured high temperature inspection data in the memory of the semiconductor device, high temperature inspection data reading step of reading the high temperature inspection data stored in the memory of the semiconductor device in the high temperature inspection data writing step, and high temperature inspection data reading step It includes an analysis step of analyzing a high-temperature inspection failure from the high-temperature inspection data read out in step 1.

According to the semiconductor device inspection method of the third aspect, by using the high temperature inspection data stored in the memory, the information under the high temperature product shipment inspection environment can be obtained in the defective device analysis in the high temperature product shipment inspection. It can be collected and analyzed easily.

According to a fourth aspect of the present invention, there is provided a method for inspecting a semiconductor device, wherein a room temperature wafer inspection step of inspecting a semiconductor device provided with a memory for storing inspection data, and a room temperature inspection data measured in the room temperature wafer inspection step. Normal temperature inspection data writing process to store in device memory, high temperature product shipping inspection process to inspect semiconductor device for high temperature product shipment, and high temperature inspection data to store high temperature inspection data measured in high temperature product shipment inspection process in semiconductor device memory High temperature inspection data for reading the high temperature inspection data stored in the memory of the semiconductor device during the writing process and the high temperature inspection data writing process for reading the normal temperature inspection data stored in the memory of the semiconductor device during the writing process and the high temperature inspection data writing process Reading process and room temperature inspection In which from the read high-temperature inspection data at the data and high-temperature inspection data reading step comprises an analysis step of analyzing the product to fail after product shipment.

According to the semiconductor device inspection method of the fourth aspect, by using the room temperature inspection data and the high temperature inspection data stored in the memory, the initial data at the time of shipment is produced even if a defect occurs after the product is shipped. Can be confirmed, which facilitates defect analysis.

[0031]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a semiconductor inspection flow of a semiconductor device such as an LSI provided with a non-volatile memory (for example, a ferromagnetic memory) for storing room temperature inspection data in order to guarantee the temperature-dependent characteristics of the semiconductor device. Indicates. The semiconductor device formed on the silicon wafer or the like in the diffusion step S100 is
First, in a wafer state, a room temperature wafer inspection device such as an LSI tester or a prober is used to perform a room temperature wafer inspection S200. At room temperature wafer inspection S200, DC characteristic test, A
The inspection items such as the C characteristic test and the function test are classified into good chips / defective chips. Next, in the room temperature inspection data writing step S201, the room temperature inspection data measured in the room temperature wafer inspection S200 is stored in the memory of the semiconductor device. Next, only good chips are assembled in the package sealing step S300. Before performing the high temperature product shipment inspection S400 using a high temperature product shipment inspection device such as an LSI tester or a handler different from the room temperature wafer inspection device,
The normal temperature inspection data stored in the memory of the semiconductor device in the normal temperature inspection data reading process S202 is read from the semiconductor device assembled in the package sealing process S300. Next, a high temperature product shipment inspection S400 is performed. In the high-temperature product shipping inspection S400, the inspection items such as the DC characteristic test, the AC characteristic test, and the function test are classified into non-defective devices / defective devices at a high inspection temperature obtained by adding the inspection margin temperature to the operation-guaranteed temperature. To do. The normal temperature inspection data read out in the normal temperature inspection data reading step S202 and the high temperature inspection data measured in the high temperature product shipment inspection step S400 are subjected to a temperature dependent characteristic inspection S500 for guaranteeing the temperature dependent characteristic of the semiconductor device, and a non-defective device is manufactured. Ship (S600).

In the VCO temperature dependent characteristic inspection, the inspection item (1) of the room temperature wafer inspection has a VCO output frequency of 84M.
At Hz, the room temperature wafer inspection items (1) to (3) are performed as they are even if the VCO input voltage is in the range of 1.5V to 1.7V or the VCO input voltage is in the range of 1.4V to 1.8V. As for the high temperature product shipment inspection, when the VCO output frequency of the room temperature inspection data read in the room temperature inspection data reading step S202 is 84 MHz as described in the following two items, the inspections of (4 ') and (5') are performed for the VCO input voltage value. do.

(4 ') When the VCO output frequency is 84 MHz and the VCO input voltage is -0.4 V with respect to the room temperature VCO input voltage value, that is, (room temperature VCO input voltage value -0.4 V), the VCO output frequency is 84 MHz. -10% or less.

(5 ') When the VCO output frequency is +0.4 V with respect to the room temperature VCO input voltage value when the VCO output frequency is 84 MHz, that is, (room temperature VCO input voltage value +0.4 V), the VCO output frequency is 84 MHz + 10. % Or more.

A normal temperature VCO when the VCO output frequency is 84 MHz in a high temperature product shipment inspection that does not use normal temperature inspection data.
When a good chip with an input voltage of 1.4V has a VCO input voltage of 1.4V in the inspection item (4) of the high temperature product shipment inspection, the VCO output frequency does not fall below 84MHz-10%, so it is determined as defective. It However, in the inspection item (4 ') of the high temperature product shipment inspection using the room temperature inspection data, the room temperature VCO input voltage value is -0.4V, that is, the VC of 1.0V.
VCO output frequency at O input voltage is 84MHz-10
Since it was less than%, it was judged as a good product and the yield was improved.

Further, FIG. 2 shows a semiconductor such as an LSI provided with a non-volatile memory (for example, a ferromagnetic memory) for storing room temperature inspection data for failure analysis such as a low yield lot in a room temperature wafer inspection of a semiconductor device. The semiconductor inspection flow of an apparatus is shown. Defect analysis is easily performed by reading out the room temperature inspection data written in the memory after the room temperature wafer inspection for problems such as low yield lots in the room temperature wafer inspection.

The semiconductor device formed on the silicon wafer or the like in the diffusion step S100 is first subjected to the normal temperature wafer inspection S200 using a normal temperature wafer inspection device such as an LSI tester or a prober in a wafer state. Room temperature wafer inspection S200
Then, the inspection items such as the DC characteristic test, the AC characteristic test, and the function test are classified into good chips / defective chips. Next, in the room temperature inspection data writing step S201, the room temperature inspection data measured in the room temperature wafer inspection S200 is stored in the memory of the semiconductor device. However, when a defect such as a low-yield lot in the room temperature wafer inspection occurs for some reason (S700), in the defect analysis S800, from the defective defective chips, from the memory of the semiconductor device in the room temperature inspection data reading step S202. Analyze defects such as low yield lots from the read room temperature inspection data.

Further, FIG. 3 shows an LSI or the like provided with a non-volatile memory (for example, a ferromagnetic memory) for storing high-temperature inspection data for failure analysis such as a low-yield lot in a high-temperature product shipment inspection of a semiconductor device. The semiconductor inspection flow of a semiconductor device is shown. Failure analysis is easily performed by reading out the high temperature inspection data written in the memory after the high temperature product shipment inspection for defects such as low yield lots in the high temperature product shipment inspection.

A semiconductor device formed on a silicon wafer or the like in the diffusion step S100 is first subjected to a normal temperature wafer inspection S200 in a wafer state by using a normal temperature wafer inspection device such as an LSI tester or a prober. Room temperature wafer inspection S200
Then, the inspection items such as the DC characteristic test, the AC characteristic test, and the function test are classified into good chips / defective chips. Next, only good chips are assembled in the package sealing step S300. The semiconductor device assembled in the package sealing step S300 is subjected to a high temperature product shipment inspection S40 using a high temperature product shipment inspection device such as an LSI tester or a handler different from the room temperature wafer inspection device.
Perform 0. In the high temperature product shipping inspection S400, the inspection items such as the DC characteristic test, the AC characteristic test, and the function test are classified into non-defective devices / defective devices at a high inspection temperature obtained by adding the inspection margin temperature to the operation guarantee temperature. To do. Next, in the high temperature inspection data writing step S401, the high temperature inspection data measured in the high temperature product shipment inspection S400 is stored in the memory of the semiconductor device. However, if a defect such as a low-yield lot in the high-temperature product shipment inspection occurs for some reason (S701), a defect analysis S
At 800, a defect analysis such as a low-yield lot is performed from the high-temperature inspection data read from the memory of the semiconductor device in the high-temperature inspection data reading step S402 from a plurality of defective defective devices.

Further, as shown in FIG. 4, after the semiconductor device is shipped,
3 shows a semiconductor inspection flow of a semiconductor device such as an LSI provided with a non-volatile memory (for example, a ferromagnetic memory) for storing room temperature inspection data and high temperature inspection data for analyzing a generated defect. After the product is shipped, the defect analysis can be easily performed by reading the room temperature inspection data written in the memory after the room temperature wafer inspection and the high temperature inspection data written in the memory after the high temperature product shipment inspection after the product is shipped.

The semiconductor device formed on the silicon wafer or the like in the diffusion step S100 is first subjected to the room temperature wafer inspection S200 by using a room temperature wafer inspection device such as an LSI tester or a prober in a wafer state. Room temperature wafer inspection S200
Then, the inspection items such as the DC characteristic test, the AC characteristic test, and the function test are classified into good chips / defective chips. Next, in the room temperature inspection data writing step S201, the room temperature inspection data measured in the room temperature wafer inspection S200 is stored in the memory of the semiconductor device. Next, only good chips are assembled in the package sealing step S300. The semiconductor device assembled in the package sealing step S300 is subjected to a high temperature product shipment inspection S400 using a high temperature product shipment inspection device such as an LSI tester or a handler different from the room temperature wafer inspection device. High temperature product shipment inspection S4
In 00, the inspection items such as the DC characteristic test, the AC characteristic test, and the function test are selected as a non-defective device / defective device at a high inspection temperature obtained by adding an inspection margin temperature to the operation-guaranteed temperature. Next, in the high temperature inspection data writing step S401, the high temperature inspection data measured in the high temperature product shipment inspection S400 is stored in the memory of the semiconductor device. The non-defective device is shipped as a product (S600). After the product is shipped, a problem occurs for some reason (S70
2) In case of failure analysis S800, the normal temperature inspection data reading step S2 is performed from the defective semiconductor device.
The normal temperature inspection data read from the memory of the semiconductor device in 02, the high temperature inspection data read from the memory of the semiconductor device in the high temperature inspection data reading step S402, and the room temperature and high temperature actual data after shipment are compared, and Perform defect analysis.

In the present invention, steps of performing all of the embodiments of FIGS. 1 to 4 or steps of excluding any one embodiment from the steps of performing all or any two of the embodiments. A semiconductor device inspection method may be possible by a combination of processes excluding the form.

[0043]

According to the semiconductor device inspection method of the first aspect, the room temperature inspection data stored in the memory is read out and compared with the high temperature product shipment inspection data to thereby perform the highly accurate temperature dependent characteristic inspection for each device. It is possible to prevent the yield reduction due to the process variation.

According to the semiconductor device inspection method of the second aspect, by using the room temperature inspection data stored in the memory, it is possible to collect information under the room temperature wafer inspection environment in the defective chip analysis in the room temperature wafer inspection. This facilitates analysis.

According to the semiconductor device inspection method of the third aspect, by using the high temperature inspection data stored in the memory, the information under the high temperature product shipping inspection environment is used in the defective device analysis in the high temperature product shipping inspection. It can be collected and analyzed easily.

According to the semiconductor device inspection method of the fourth aspect, by using the room temperature inspection data and the high temperature inspection data stored in the memory, even if a defect occurs after the product is shipped, the initial data at the time of shipping is shipped. Can be confirmed, which facilitates defect analysis.

[Brief description of drawings]

FIG. 1 is a semiconductor inspection flow chart of a semiconductor device provided with a memory for storing room temperature inspection data in order to guarantee temperature dependent characteristics.

FIG. 2 is a semiconductor inspection flow chart of a semiconductor device provided with a memory for storing room temperature inspection data for analyzing defects such as low yield lots in room temperature wafer inspection.

FIG. 3 is a semiconductor inspection flow chart of a semiconductor device provided with a memory for storing high temperature inspection data for failure analysis such as a low yield lot in a high temperature product shipment inspection.

FIG. 4 is a semiconductor inspection flow chart of a semiconductor device provided with a memory for storing room temperature inspection data and high temperature inspection data for failure analysis after a product is shipped.

FIG. 5 is a product shipment flow chart of a semiconductor device such as an LSI.

FIG. 6 is a block diagram of a PLL using a voltage controlled oscillator mounted on a semiconductor device.

FIG. 7 is a circuit diagram of a ring oscillator type VCO configuration.

FIG. 8 is a temperature dependence characteristic diagram of VCO room temperature and high temperature.

[Explanation of symbols]

S100 diffusion process S200 Normal temperature wafer inspection S201 Normal temperature inspection data writing process S202 Room temperature inspection data reading process S300 Package sealing process S400 High temperature product shipment inspection S401 High temperature inspection data writing process S402 High temperature inspection data reading process S500 Temperature dependent characteristic inspection S600 product shipping process S700 Room temperature wafer inspection failure S701 High temperature product shipment inspection failure occurred S702 Problem occurred after product shipment S800 Semiconductor device analysis process 1 Voltage controlled oscillator 2 A / D converter 3 Center frequency detector 42 MHz sampling D / A converter 5 Frequency error detector for center frequency 6 50MHz sampling D / A converter 7 Low Pass Filter 8 Constant current circuit that determines the current of the inverter 9 Circuit that converts input voltage to current 10 Ring oscillator circuit 11 First polarity transistor 12 Second polarity transistor 13 VCO Temperature dependence of room temperature 14 VCO temperature dependence of high temperature

Claims (4)

[Claims] 1. A room temperature wafer inspection process for inspecting a semiconductor device having a memory for storing inspection data at room temperature wafer, and room temperature for storing room temperature inspection data measured in the room temperature wafer inspection process in the memory of the semiconductor device. An inspection data writing step; an ordinary temperature inspection data reading step of reading the ordinary temperature inspection data stored in the memory of the semiconductor device in the ordinary temperature inspection data writing step; and a semiconductor device having the ordinary temperature inspection data read in the ordinary temperature inspection data reading step. High-temperature product shipment inspection process for inspecting high-temperature product shipment, temperature-dependent characteristics for inspecting temperature-dependent characteristics of semiconductor products by normal-temperature inspection data read in the normal-temperature inspection data reading process and high-temperature inspection data measured in the high-temperature product shipment inspection process A semiconductor device inspection method including an inspection step. 2. A room temperature wafer inspection process for inspecting a semiconductor device having a memory for storing inspection data at room temperature, and a room temperature for storing room temperature inspection data measured in the room temperature wafer inspection process in the memory of the semiconductor device. The inspection data writing step, the room temperature inspection data reading step of reading the room temperature inspection data stored in the memory of the semiconductor device in the room temperature inspection data writing step, and the room temperature inspection failure read from the room temperature inspection data read in the room temperature inspection data reading step A semiconductor device inspection method including an analysis step of analyzing. 3. A high-temperature product shipment inspection step of inspecting a semiconductor device provided with a memory for storing inspection data in high-temperature product shipment inspection, and high-temperature inspection data measured in the high-temperature product shipment inspection step in a memory of the semiconductor device. A high temperature inspection data writing step of storing, a high temperature inspection data reading step of reading the high temperature inspection data stored in the memory of the semiconductor device in the high temperature inspection data writing step, and a temperature higher than the high temperature inspection data read in the high temperature inspection data reading step. A semiconductor device inspection method including an analysis step of analyzing an inspection defect. 4. A room temperature wafer inspection process for inspecting a semiconductor device having a memory for storing inspection data at room temperature wafer, and room temperature for storing room temperature inspection data measured in the room temperature wafer inspection process in the memory of the semiconductor device. An inspection data writing step, a high temperature product shipment inspection step of inspecting the semiconductor device for high temperature product shipment, and a high temperature inspection data writing step of storing the high temperature inspection data measured in the high temperature product shipment inspection step in the memory of the semiconductor device, Room temperature inspection data reading step for reading room temperature inspection data stored in the semiconductor device memory in the room temperature inspection data writing step, and high temperature inspection data for reading high temperature inspection data stored in the semiconductor device memory in the high temperature inspection data writing step The read process and the normal temperature test data read process A semiconductor device inspection method comprising: an analysis step of analyzing a product defect after product shipment from temperature inspection data and the high temperature inspection data read in the high temperature inspection data reading step.