JP2003186712A - Image processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To control the transfer of image data stored temporarily in a semiconductor memory to a hard disk so as to make the transfer efficient. <P>SOLUTION: An image transfer DMAC 44 acquires a contiguous free memory space of which the capacity is arbitrary settable when receiving a command for transferring image data stored in an image (semiconductor) memory 42 from a system controller part of a copy machine main body via a memory control part 43 to a HDD 48. If the memory space can not be acquired, a noncontiguous free memory space is acquired. Based on a ratio between the memory capacity of the noncontiguous free memory space and the memory capacity of the HDD 48, the capacity of the contiguous free memory space is set. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital copying machine,
In an image forming apparatus such as a facsimile, a scanner, and a digital multi-function peripheral having a plurality of functions of these, a large memory such as a semiconductor memory and a hard disk drive for storing image data obtained by converting a read image signal into a digital signal or input image data. The present invention relates to a technique for managing and controlling the timings of securing and releasing a storage area and occupying resources in a capacity storage device.

[0002]

2. Description of the Related Art In recent years, with the progress of digitization of copying machines, processing and editing of image data using an image memory has become popular. In order to hold multiple image data,
In order to store the image data as it is in the semiconductor memory, a memory equivalent to the amount of data for the number of stored images is required, and the memory cost becomes huge.Therefore, the image memory is used in combination with the semiconductor memory and the storage memory. As a storage memory, a storage device such as a magnetic storage device which is cheaper and has a larger capacity than a semiconductor memory is used.

When the image data is stored in the storage device, a free area having a designated capacity is secured in the storage device. At that time, in many cases, the attribute information of the storage medium such as the file allocation table (FAT) is read to recognize the free area.

In general, a magnetic storage device has a slower transfer rate of image data from a semiconductor memory to a magnetic storage device than a transfer rate of image data from an image input / output device to a semiconductor memory. Therefore, it has been attempted to compress the image data to reduce the data processing capacity of the magnetic storage device and speed up the transfer.

On the other hand, a memory controller (hereinafter abbreviated as a DMA controller or DMAC) using a DMA (Direct Memory Access) data transfer system is used to execute input / output of recording data (Japanese Patent Laid-Open No. 6-1994). 1
No. 03225). When executing input / output of image data, the DMA controller transfers data to a specific area of the image memory based on memory area management information called a descriptor. It is possible to divide the memory area in which one image is stored into a plurality of descriptors and perform data transfer. For example, by using the image memory in the form of a ring buffer, the memory capacity is smaller than the capacity of the image data. It is also possible to execute input / output of image data. Moreover, in the memory control using the DMA controller, since it is possible to control the progress status (start or end) and execution timing (transfer interruption or restart in the middle of the image memory area) of the data transfer specified by each descriptor, There is an advantage that timing control of data transfer of the semiconductor memory and the mass storage device connected to the DMA controller can be easily performed. Further, by using the descriptor of the DMA controller, it becomes possible to divide the data transfer unit to the magnetic storage device and execute this in a time division manner.

[0006]

However, in the method of performing the operation of recognizing the free area by reading the attribute information of the storage medium such as the file allocation table (FAT), the number of stored data files increases. In reality, it takes a long time to detect a free area. Even if the image data is compressed, there is no difference between the data processing speed from the image input / output device to the semiconductor memory and the data processing speed in the magnetic storage device. Independent control of transfer timing control (including data conversion processing such as compression) is not very useful in increasing the transfer rate. Further, since the time required for data transfer is not shortened even by the time-division processing by the DMA controller, it is the greatest problem to minimize the time required for inputting / outputting image data like a digital copying machine. In this case, performing time division processing is not always the solution. Therefore, rather, the image data is compressed to reduce the data transfer amount, or a magnetic storage device having a high data transfer speed is mounted to shorten the time required to transfer the data to the mass storage device. Is the actual situation. The present invention has been made in view of such circumstances, and temporarily stores image data in the primary storage means, compresses the stored image data, transfers the compressed image data to the secondary storage means, and then stores the secondary storage. In an image processing apparatus that stores continuously or discretely in a plurality of storage areas configured as means, the capacity of the storage areas that are continuously stored is reduced so that the storage area where the image data is discretely stored is reduced. The setting is performed so that the efficiency of transferring the image data stored in the primary storage means to the secondary storage means is improved, and the free space of the storage area where the image data is discretely stored is preferentially used. However, it is to improve the transfer efficiency and the performance of the image processing apparatus.

[0007]

According to a first aspect of the present invention, image data is temporarily stored in a primary storage means, the stored image data is compressed and transferred to a secondary storage means, and the secondary storage is performed. In an image processing device configured to continuously or discretely store in a plurality of storage areas configured by means, position information of the plurality of storage areas is sequentially detected, and a continuous arbitrarily set capacity is detected each time the position information is detected. Means for detecting a free storage area, means for acquiring the storage area when the means detects the free storage area, and discrete free storage areas when the detection means does not detect the free storage area And a means for detecting the capacity of the discrete free storage area acquired by the means, and a means for acquiring the ratio of the capacity of the free storage area detected by the means to the capacity of the storage area of the secondary storage means. With the above ratio An image processing apparatus characterized by resetting the capacity set for the arbitrarily Zui.

According to a second aspect of the present invention, in the image processing apparatus according to the first aspect, the means for detecting the capacity of the discrete free storage area detects the maximum continuous capacity and head position information of the free storage area. Is an image processing device.

According to a third aspect of the present invention, in the image processing apparatus according to the first or second aspect, the means for detecting the capacity of the discrete free storage area is means for storing the head position information and the maximum continuous capacity in a table. An image processing apparatus characterized by being provided.

According to a fourth aspect of the present invention, in the image processing apparatus according to the first aspect, there is provided means for measuring the time for transferring the image data to the storage area of the secondary storage means for each storage area. Image processing apparatus.

According to a fifth aspect of the present invention, in the image processing apparatus according to the first or fourth aspect, the image processing is provided with means for storing the image data transfer time of each storage area of the secondary storage means. It is a device.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. First, a digital copying machine to which the present invention is applied will be described. FIG. 1 is an overall schematic configuration diagram of a digital copying machine. In the figure, a reading unit 20 for reading a document image scans a document placed on a document table 21 with an exposure lamp 22 movable along the document table 21. Exposure is performed, and the reflected light is photoelectrically converted by a CCD (image sensor) 23 through a reflection mirror to form an electric signal according to the intensity of the light. This electric signal is subjected to processing such as shading correction and A / D conversion by an IPU (image processing unit) 24 to be an 8-bit digital signal, and further subjected to image processing such as scaling processing and dither processing. An image signal is sent to the image forming unit 30, the FAX unit 9 and the like together with the image synchronization signal. Scanner control unit 25
In order to execute the above process, the various sensors detect various sensors, control the drive motor, and set various parameters in the IPU 24.

The image signal sent to the image forming section 30 is sent to the writing section 31, and the photosensitive member 33 which is uniformly charged by the charging charger 32 by the laser light modulated by the image data and which is rotated by a constant amount. Expose. Photoconductor 33
An electrostatic latent image is formed on the surface of the electrostatic latent image, and is developed with the toner of the developing device 34 to obtain a visualized toner image. Transfer paper (not shown) previously conveyed by the paper feed roller 15 from the paper feed tray 16 and waiting by the registration roller 14
The transfer charger 35 conveys the toner on the photoconductor 33 electrostatically to the transfer paper by the transfer charger 35, and the transfer charger 35 transfers the transfer paper to the photoconductor 33.
Be more separated. After that, the toner image on the transfer paper is heated and fixed by the fixing device 13, and is discharged to the paper discharge tray 11 by the paper discharge roller 12. The toner image remaining on the photoconductor 33 after the electrostatic transfer is pressed against the photoconductor 33 by the cleaning device 37,
After removal, the photoconductor 33 is destaticized by the destaticizing charger 38. The plotter control unit 39 performs detection of various sensors and control of drive motors and the like in order to execute the above processes.

FIG. 2 is a view of the document table viewed from above,
The main scanning direction and the sub-scanning direction when scanning and exposing a document placed on a 12 × 17-inch document table 21 are shown.

The image synchronization signal output from the IPU 24 of the reading section 20 will be described with reference to FIG.
The frame gate signal (/ FGATE) is a signal representing an image effective range for an image area in the sub-scanning direction, and image data while this signal is at a low level (low active) is valid. Also, the frame gate signal / FGATE is asserted at the falling edge of the line sync signal (/ LSYNC),
Or negated. The line sync signal / LSYNC is asserted for a predetermined number of clocks at the rising edge of the pixel sync signal (PCLK), and after the rising of this signal, image data in the main scanning direction is made valid after a predetermined number of clocks. The image data sent is one for one cycle of PCLK and is divided into 400 DPI equivalent from the arrow portion in FIG. The image data is sent as raster format data, starting from the arrow in FIG. The effective sub-scanning range of image data is usually determined by the transfer paper size.

Next, the system control unit 1 detects the state of input by the operator on the operation unit 7, sets various parameters to the reading unit 20, the storage unit 4, the image forming unit 30, and the FAX unit 9 and gives a process execution instruction. Etc. by communication. Further, the state of the entire system is displayed on the operation unit 7. The instruction to the system control unit 1 is made by key input to the operation unit 7.

The FAX section 7 receives the image data sent from the system control section 1 in accordance with an instruction from the system control section 1 and sends it to the G3 or G4 FAX.
Binary compression is performed based on the data transfer regulations of and is transferred to the telephone line. Further, the data transferred to the FAX unit 9 from the telephone line is reconstructed into binary image data, which is sent to the writing unit 31 of the image forming unit 30 and visualized.

Further, the selector unit 5 changes the state of the selector according to an instruction from the system control unit 1 to read the source of image data for forming an image, the reading unit 20, the storage unit 4,
Select from any of the FAX units 9.

Further, the storage unit 4 stores the image data of the original, which is normally input from the IPU 24, and is used for copying applications such as repeat copying and rotary copying. Alternatively, it is also used as a buffer memory for temporarily storing the binary image data from the FAX unit 9. These data storage instructions are given by the system control unit 1.

FIG. 4 is a block diagram showing the internal structure of the storage unit 4. Hereinafter, the function will be described for each constituent block. <Image input / output DMAC 41> Consists of a CPU and logic, communicates with a memory control unit 43 described later to receive a command, sets an operation according to the command, and informs the state of the image input / output DMAC. Send as status information. When an image input command is received, the input image data is packed as memory data in units of 8 pixels in accordance with the input image synchronization signal and output to the memory control unit 43 together with the memory access signal as needed. When the image output command is received, the image data from the memory control unit is output in synchronization with the output image synchronization signal.

<Image memory 42> The image data is temporarily stored as a buffer, and is composed of, for example, a semiconductor memory element such as DRAM, and the total memory amount is, for example, 600D.
PI, 9M bytes for A3 size of binary image data,
The memory for electronic sort storage is 9 MB and the total is 18 MB. The memory control unit 43 receives control of reading and writing. <Memory control unit 43> Comprised of a CPU and logic,
It communicates with the system control unit to receive a command, sets the operation according to the command, and transmits it to the system control unit 1 as status information to notify the state of the storage unit 4. The operation commands from the system control unit 1 include image input, image output, compression, decompression, acquisition / release of storage area, conversion, and the like. Image input and image output commands are sent to the image input / output DMAC 41, and compression-related commands are sent to the image transfer DMAC 44 and code transfer DMAC 4 described later.
5, transmitted to the compression / expansion unit 46. The storage area acquisition / release command acquires or releases the area of the image memory 42 or the HDD 48 in preparation for the next image input or image transfer. In addition, the conversion related command is transmitted to the image converter (not shown).

<Image transfer DMAC 44> This is composed of a CPU and logic, communicates with the memory control unit 43 to receive a command, and sets an operation according to the command.
Also, it is transmitted as status information to notify the state. When a compression command is received, a memory access request signal is output to the memory control unit 43, and when the memory access permission signal is active, the image data is received and transferred to the compression / expansion unit 46. Further, an address counter that counts up in response to a memory access request signal is built in, and a 22-bit memory address indicating a storage location where image data is stored is output. When a storage area acquisition / release command is received, the storage area in the HDD 48 is obtained or released. The descriptor access operation for this will be described later.

<Code transfer DMAC 45> It is composed of a CPU and a logic, communicates with the memory control unit 43 to receive a command, and sets an operation according to the command.
Also, it is transmitted as status information to notify the state. When it receives a decompression command, it outputs a memory access request signal to the memory control unit 43. When the memory access permission signal is active, it receives image data and transfers it to the compression / decompression unit 46. Further, an address counter that counts up in response to a memory access request signal is built in, and a 22-bit memory address indicating a storage location where image data is stored is output. When the storage area acquisition / release command is received, the storage area in the image memory 42 is acquired or released. The descriptor access operation for this will be described later.

<Compressor / Decompressor 46> It is composed of a CPU and logic, communicates with the memory control unit 43 to receive a command, sets an operation according to the command, and
It is sent as status information to inform the status. When the compression command is received, the image data (binary data) of the image memory 42 is acquired through the image transfer DMAC 44 and is compressed and converted by the MH (Modified Huffman) encoding method. When the decompression command is received, HDD4
8 image data (binary data) is acquired, and MH (Modifi
ed Huffman) Decompression conversion is performed by the encoding method. The decompressed image data is temporarily stored in the image memory 42 through the code transfer DMAC 45.

<HDD controller 47> It is composed of a CPU and logic, communicates with the memory control unit 43 to receive a command, sets an operation according to the command, and transmits it as status information to notify the state. . The status of the HHD 48 is read and the data is transferred. <HDD 48> It is composed of, for example, a magnetic disk for storing image data and has a large storage capacity.

The storage unit 4 having the above-mentioned configuration writes the image data in a predetermined image area of the image memory 42 by the image input / output DMAC 41 according to an instruction from the system control unit 1 when inputting / outputting the image data and storing the image data. Or read. At this time, the image input / output DMAC 41 counts the number of image lines. The transfer speed from the reading unit 20 to the image memory 42 is determined by the reading speed of the reading unit 20, and the speed depends on the hardware of the reading unit 20. The system control unit 1 obtains the reading speed from the reading unit 20 through communication with the reading unit 20, puts the data in the process execution instruction, and gives the process instruction to the storage unit 4. The system control unit 1 programs the device name and version of the compression / expansion unit 46 and its data processing speed as a data table. By reading the device name and version of the compression / expansion device 46 from the compression / expansion device at the time of initial setting of the system,
The processing speed of the compression / expansion unit 46 can be acquired. The system control unit 1 puts the acquired processing speed of the compression / expansion unit 46 in the process execution instruction and instructs the storage unit 4 about the process.

Further, the transfer speed of the HHD 48 from the image memory 42 depends on the transfer speed of the HHD 48, and the transfer speed also depends on the communication with the HDD controller 47.
It is acquired from the model name of the HDD 48. Since the model name and transfer speed of the HHD to be used are programmed in advance as a data table, the transfer speed can be obtained from the model name.

FIG. 5 is a block diagram showing the internal structure of the memory control unit 43. Hereinafter, the function will be described for each constituent block. <Input / output image address counter 435> Image input / output DM
An address counter that counts up in response to an input / output memory access request signal from the AC 41 outputs a 22-bit memory address indicating a storage location where input / output image data is stored. The address is initialized once when the memory access is started. <Transfer image address counter 437> An address counter that counts up in accordance with a transfer memory access permission signal and indicates a storage location where transfer image data is stored.
Output bit memory address. The address is initialized once when the memory access is started.

<Line setting unit 431> When the image memory 42 is used as a buffer at the time of image input, the difference comparison unit compares the difference between the input processing line and the transfer line output from the difference calculation unit with the system control value. Set from Part 1. It is possible to set any value. <Difference calculation unit 430> At the time of image input, the compression / expansion unit 46
The number of input / output processing lines output by the image input / output unit is subtracted from the number of transfer processing lines output by, and the result is output to the difference comparison unit. <Difference Comparison Unit 432> At the time of image input, the difference calculation unit 54
Compares the number of difference lines output by the line setting value with the setting value output by the line setting unit 53. If the number of difference lines is the same as the setting value, an error signal is output, and if the number of difference lines is 0, it will be described later. The transfer request mask signal of the comparison result output to the arbiter 57 is activated. Otherwise, active is not output when the input / output image is not in operation.

<Address Selector 436> A selector selected by an arbiter 434 described later selects either the address of the input image or the transfer image. <Arbiter 434> Outputs a memory access permission signal for accessing the compression / expansion unit 46. The memory access permission signal is output under the condition that the address comparison signal is active and the input / output memory access signal is inactive. <Request Mask 433> The transfer memory access request signal for access of the compression / expansion unit 46 is masked (disabled) based on the comparison result from the processing line number comparator, and the transfer processing is stopped.

<Access control circuit 438> The input physical address is divided into a row address and a column address corresponding to a DRAM which is a semiconductor memory by a signal from the access control circuit, and is output to an 11-bit address bus. Further, it outputs a DRAM control signal (RAS, CAS, WE) according to the access start signal from the arbiter 434.

In the memory control unit 43 having the above-mentioned structure, the memory control unit 43 is initialized by the image input instruction from the system control unit 1 and is in a waiting state for image data, and is read by operating the scanner of the reading unit 20. The image data is once written in the image memory 42. The number of processing lines of the written image data is counted by the image input / output DMAC 41 and input to the memory control unit 43. The compression / expansion unit 46 outputs the transfer memory access request signal in response to the image transfer command, but the request signal is masked by the request mask unit 58 of the memory control unit 43, and the actual memory access is not performed. . By completing one line of input data from the image input / output unit,
The mask of the transfer memory access request signal is released, the image memory 42 is read, and the transfer operation of the image data to the compression / expansion unit 46 is started. Even during the transfer operation, the difference calculator 54 calculates the difference between the two processing lines, and when the difference becomes 0, the transfer memory access request signal is masked so that the address will not be overtaken.

Next, the image transfer DMAC 44 (code transfer D
The descriptor access operation when the MAC 45) receives a storage area acquisition / release command will be described. The image transfer DMAC 44 (code transfer DMAC 4
5) includes counters such as a table ID counter, an acquired block counter, a descriptor table ID counter, and a free continuous counter necessary for descriptor access operation.

Image transfer DMAC 44 (code transfer DMAC
45) is the system control unit 1 via the memory control unit 43.
When the storage area acquisition / release command is received from, the image data management table is acquired from the non-volatile memory (not shown) of the system control unit 1. In the present embodiment, image transfer from the image memory 42 to the HDD 48 (image transfer from the HDD 48 to the image memory 42) based on this table.
In order to perform the operation at high speed, the storage area of the image data is acquired / released in the HDD 48 (image memory 42). For this,
Three management tables are used: i) image identification information table (hereinafter, identification information is abbreviated as ID), ii) descriptor table, and iii) block table.

FIG. 6 is a diagram showing the structure of the image ID table. In this image ID table, one table is composed of an image ID and a start descriptor table ID based on a table ID consisting of 0 to n. The image ID is unique image identification information in the primary storage means such as an image (semiconductor) memory and the secondary storage means such as HDD, and duplicate IDs for different images in each storage means must not exist. Further, since the image ID is 0 (Null) as the initial state on the image ID table, it cannot be used as the system reservation ID. Start descriptor table ID
Indicates the descriptor table ID acquired first. In the initial state of the image ID table, the image ID is Nul.
l, the start descriptor table ID is EOD (End of
Discriptor) state.

FIG. 7 is a diagram showing the structure of the descriptor table. One descriptor table is composed of a start block ID, the number of used blocks, and a next descriptor table ID. The start block ID indicates the ID of the first acquired block. The number of blocks used is
It means the number of blocks that are continuously acquired from the start block, and the next descriptor table ID is a chain structure that allows discontinuous acquisition and management when the storage area cannot be used continuously. is there. When the EOB (End of Block) code is inserted, the start block determines that it is an unused descriptor, and when the EOT (End of Table) code is inserted, it is determined that the next descriptor table ID is the end of the chain ( FIG. 7B).
Similarly, in the initial state of the descriptor table, the start block is in EOB, the number of used blocks is 0, and the next descriptor table ID is in EOT state.

FIG. 8 shows the structure of the block table. In the present invention, the storage area of the smallest unit obtained by subdividing the storage area of the storage means into fixed length sizes is called a block,
Each block has identification information assigned thereto.
One block is represented by 1 bit, 0 is defined as an unused block, and 1 is defined as a used block, and the usage state of the storage area is managed by this table. For example, when the storage area is 9 MB for data compression of the image memory, the fixed length size is 4
If KB is used, 9216 (KB) / 4 (KB) = 23
This is 04 (block), and since one block has 1 bit, a bit table of 2304 bits is required. In the initial state of the block table, all are set to 0 (unused state). Using the above table, one image data is at least one image ID table + 1 descriptor table +
Since there is one block, it is sufficient to secure the maximum number of each table of the image ID table and the descriptor table for the number of blocks.

Next, the processing for the code transfer DMAC 45 to acquire a storage area in the image memory 42 using the above tables will be described with reference to FIGS. 9, 10 and 11. When the code transfer DMAC 45 receives the storage area acquisition command, the storage area acquisition processing is started. When this process starts (S801), first, an image ID and the number of acquisition request blocks are required as input values, so it is checked whether or not the input values are valid (S802). If the input value is not valid (S802, NO), an input parameter error is returned (S803), and the process ends. If the input parameters are valid (S802, YES),
The table ID counter and the acquired block counter necessary for the image ID table acquisition processing are initialized (S80).
4) Attempt to acquire the image ID table (S805).
The image ID table is acquired by performing a loop search from the top of the image ID table for a table in which the image ID has a null value. Therefore, it is checked whether or not the table ID counter has reached the final table ID value (S806),
If the final table ID value is reached (S806, YE
S), it is determined that the image ID table cannot be acquired because all of them are used, and the image ID table full is returned (S807),
Exit the process.

If it is not the final table ID value (S806, NO), it is checked whether or not the image ID is a null value (S808), and if it is not a null value (S808, NO). That is, when the image ID exists, the table ID counter is incremented (S
809), and the process returns to step S806 again. Free image ID
If the table exists (S808, YE
S), the requested image ID in the image ID of the image ID table
Is set (S810), and the process moves to obtaining the descriptor table (811 in FIG. 10).

Next, the descriptor table acquisition is tried. In FIG. 10, first, the table ID counter required for the descriptor acquisition process is initialized to 0, and the previous descriptor table ID is initialized to EOD (S812). The descriptor table is acquired by performing a loop search from the beginning of the descriptor table for a table whose start block is EOB. For this reason, the table ID counter checks whether or not the final table ID value has been reached (S813). When the final table ID value is reached (S813, YES), it is determined that the descriptor table cannot be acquired because all of them have been used, and the descriptor table full is returned (S814), and the process exits. If it is not the final table ID value (S813, NO), it is checked whether the start block is EOB (unused block) (S815). As a result, the starting block is EOB
If the value is other than (S815, N0), the table ID counter is incremented (S816), and the process returns to step S813.

If there is a free descriptor table (S815, YES), it is checked whether the previous descriptor table ID is EOT (S817). If the previous descriptor table ID is EOT (S817), it is determined to be the first descriptor table, and the start descriptor table I of the image ID table is determined.
The retrieved descriptor table ID value is set in D (S818), and the process moves to acquisition of the block table (820 in FIG. 11). EO for the previous descriptor table ID
If a value other than T is substituted (S817, N
O), the descriptor table ID searched for in the next descriptor table ID of the previous descriptor table ID
A value is set (S819), and the process moves to block table acquisition (820 in FIG. 11).

Finally, the block table acquisition is tried. In FIG. 11, first, a block ID counter required for block acquisition processing and a loop flag indicating the beginning and the end of the block acquisition loop are initialized (S821). The block table is acquired by performing a loop search from the beginning of the block table for the bit that is 0. Therefore, it is first checked whether the loop flag is in the reset state (S822). In the set state (S822, N
O), the process returns to the descriptor table search of 811 in FIG. When the loop flag is in the reset state (S822, YES), it is checked whether the block ID counter has reached the final block ID value (S82).
3). When the block ID counter reaches the final block ID value (S823, YES), it is determined that the block cannot be acquired because all blocks are in use, and the block table full is returned (S824), and the process exits.
If the block ID counter has not reached the final block ID value (S823, NO), it is checked whether the target block is in use (bit is 1 or 0) (S82).
5). As a result, when the bit is 1, (S825, YE
S), the block ID counter is incremented (S826), and the process returns to step 822 again. If the bit is not 1, that is, if there is a free block (S825, NO), the block ID setting and the number of used blocks are added to the start block of the descriptor table currently being acquired (S82).
7) Then, the acquired block counter is incremented (S8).
28). Then, it is checked whether or not the acquisition request block number of the input parameter and the acquired block number match (S8).
29) If they match (YES in S829), it is determined that the block acquisition is completed, the acquisition completion is returned (S830), and the process ends. If they do not match (S829, NO), the loop flag is set to acquire the next block (S83).
1) and returns to step 822. With the above operation, the storage area can be acquired in the image memory.

Further, the process of releasing the storage area in the image memory 42 will be described with reference to the operation flow of FIGS. When the code transfer DMAC 45 receives the storage area release command, the storage area release processing is started (S901), and it is checked whether or not this input parameter is normal because the image ID is required as input data. (S902). If the input parameter is not valid (S902, NO), an abnormal input parameter is returned (S903), and the process ends. If the input parameters are valid (S902, YES), the table ID counter required for the image ID table search processing is initialized (S904). Then, first, an image ID table search is tried (S905). This search is performed by a loop search from the beginning of the image ID table until the image ID of the image ID table matches the image ID of the input parameter. Therefore, it is checked whether the table ID counter has reached the final table ID value (S906). If the table ID counter reaches the final table ID value (S906, YES), it is determined that there is no corresponding image ID table, and no corresponding image ID is returned (S907), and the process exits. If the table ID counter does not reach the final table ID value (S906, NO), the image ID
It is checked whether or not the image ID of the table is the image ID of the input parameter (open target image ID) (S908). As a result, if it is not the target image ID (S908, N
O), the table ID counter is incremented (S909), the process returns to step 906 again to check the next image ID table. If the image ID table exists (S908, YES), the descriptor table is released (910 in FIG. 13).

When the descriptor table is released, the start descriptor table ID of the retrieved image ID table
The final descriptor table used by the release image ID is searched based on the. The final descriptor can be determined by the next descriptor table ID of the descriptor table being EOT. Due to the chain structure, the descriptor table must be released from the last table.

Therefore, in FIG. 13, first, the start descriptor table ID entered in the image ID table.
Is set to the descriptor ID counter, and the previous descriptor table ID is set to EOT (S911).
A loop search is performed to determine whether or not (S912). When the table ID counter reaches the final table ID value (S912, YES), it is determined that the descriptor management table is abnormal, and the descriptor table abnormality is returned (S9).
13), exit the process. When it is not the final table ID (S912, NO), it is checked whether or not the next descriptor table ID of the descriptor table of the table ID counter value is EOT (S91).
4).

As a result, the next descriptor table ID
Is a value other than EOT (S914, NO), the table ID counter is set to the previous descriptor table ID from the target descriptor, and the next descriptor table ID is reset to the table ID counter (S915).
Then, the process returns to step 912. When the next descriptor table ID is EOT (S914, YES), the next descriptor table ID of the descriptor table ID set in the previous descriptor table ID is EOT.
(S916). When the descriptor table ID to be released is determined, the block of the block table is finally released.

The block is released by setting (resetting) bits for the number of used blocks to 0 from the start block in the descriptor table (S917). When the reset is completed, the previous descriptor table ID is E
It is checked whether or not it is OT (S918). In the case of EOT (S918, YES), it is determined that the descriptor table and the block have been released, and the process is exited. If it is not EOT (S918, NO), the previous descriptor table ID is set in the table ID counter (S91).
9) and returns to step 912 to continue the release process.

Next, the process of transferring and storing the image data stored in the image memory 42 to the HDD 48 will be described. The image data is transferred to the HDD 48 as data compressed and converted by the compression / expansion unit 46. Figure 1
4, FIG. 15, FIG. 16, and FIG. 17 are the operation flows thereof. First, in FIG. 14, when a command for acquiring a storage area is received in the HDD 48, this process is started (S1001). First, since the image ID and the number of acquisition request blocks are required as input values, is the input parameter valid? It is checked whether or not (S1002). If the input value is abnormal (S1002, NO), the input parameter abnormality is returned (S1003), and the process ends. If the input value is valid (S1002, YES), the table ID counter, the acquired block counter, the empty continuous counter, the block check counter, and the input position image ID necessary for the image ID table acquisition processing are initialized (S1004). ),
First, the acquisition of the image ID table and the block table is tried (S1005).

The image ID table is acquired by searching the block table for a free area in which the number of blocks equal to or larger than the number of blocks of the image data (input position image) to be stored is continuous. Therefore, it is checked whether the block check counter is the final block ID (S100).
6). If it is the final block (S1006, YES),
If the block is not the final block (S1006, NO), it is checked whether the number of continuous free blocks is greater than or equal to the arbitrarily set number of input blocks (S1008). If the number of consecutive empty blocks is not greater than or equal to the number of input blocks that can be set arbitrarily (S1008, N
O), it is checked whether the block table is empty (unused) (S1009).

When the block table is not empty (S1009, NO), the value obtained by adding 1 to the block check counter is stored in the input position image ID (S1).
060) and clear the empty continuous counter (S101
1) Add the block check counter (S10
12) and returns to step 1006. If the block table is empty (S1009, YES), the empty continuous counter is incremented (S1010) and the block check counter is incremented (S1012).
Returning to 06, empty blocks are acquired until the empty continuous counter exceeds the number of input blocks. If the number of consecutive empty blocks can store the number of input blocks (S
(1008, YES), the input position image ID is set to the image ID (S1013), and the process proceeds to step 1014 (FIG. 16) for acquiring the descriptor table.

When the block check counter reaches the final counter value (S1006, YE
S) Since there is no continuous image region, the process moves to a process (1050 in FIG. 15) of searching a free block of the divided region instead of the continuous region in order to store the divided region.

In FIG. 15, the image ID table is acquired by selecting the image ID table whose image ID is Null.
Perform a loop search from the beginning of the table. Therefore image I
It is checked whether the D table is the final table (S1)
051). When the table ID counter has the final table ID value (S1051, YES), it is determined that the image ID table cannot be acquired because all the table ID counters have been used, and the image ID table full is returned (S1052), and the process is exited. As a result of searching the image ID table (S1053), if there is no empty image ID (S1053, NO), the table ID
The counter is incremented (S1054), and the step 105 is performed again.
Return to 1. If there is an empty image ID table (S
(1053, YES), the acquisition request image ID is set in the image ID table (S1055), and the process proceeds to step 1014 (FIG. 16) for acquiring the descriptor table.

In FIG. 16, in order to acquire the descriptor table, first, the table ID counter required for the descriptor acquisition processing is initialized to 0, and the previous descriptor table ID is initialized to EOT (S1015). In order to obtain the descriptor table, a loop search is performed from the beginning of the descriptor table for a table whose start block is EOB. Therefore, it is checked whether the descriptor table is the final table (S1016). In the case of the final table ID value (1016, YES), it is determined that the descriptor table cannot be acquired because all are used, and the descriptor table full is returned (S101).
7), exit the process. As a result of searching the descriptor table (S1018), if the start block has a value other than EOB (S1018, NO), the table ID counter is incremented (S1019), and the process returns to step 1016. If there is a free descriptor table (S
1018, YES), it is checked whether or not the previous descriptor table ID is EOT (S1020), and in the case of EOT (S1020, YES), it is determined as the first descriptor table, and the descriptor searched for the start descriptor table ID of the image ID table is determined. The table ID is set (S1021), and the process moves to the block acquisition process (1030 in FIG. 17). If a value other than EOT is assigned to the previous descriptor table ID (S10
20, NO), the retrieved descriptor table ID is set in the next descriptor table ID of the previous descriptor table ID (S1022), and the process proceeds to block acquisition processing (1030 in FIG. 17).

In FIG. 17, in order to obtain a block,
An ID counter and a loop flag indicating the beginning and the end of the block acquisition loop are initialized (S1031). To obtain the block table, a loop search is performed from the beginning of the block table for the bit that is 0. First, it is checked whether the loop flag is in the reset state (S1032).
If it is not in the reset state (S1032, NO), the process returns to the descriptor table search in step 1014.
If it is in the reset state (S1032, YES), it is checked whether or not the block ID counter has reached the final block ID value (S1033), and if it has reached the final block ID (S1033, YES), all are in use. It is determined that the block cannot be acquired, and the block table full is returned (S1034), and the process ends. If it is not the final block ID (S1033, NO), as a result of searching the block table, if the bit of the target block is 1 (in use) (S1035, YES), the block ID counter is incremented (S1036), and then the block ID counter is added again. Step 1032
Return to. If there is an empty block (S1035,
No), the block ID is set to the start block of the descriptor table currently being acquired, and the number of used blocks is set (S1037). Subsequently, the acquired block counter is incremented (S1038). Then, the number of acquisition request blocks of the input parameter is compared with the number of acquired blocks (S103
9) If they match (S1039, YES), it is determined that the acquisition is completed, the acquisition completion is returned (S1040), and the process is exited. If they do not match (S1039, NO), the loop flag is set to acquire the next block (S104).
1), increment the block ID counter (S1036),
The procedure returns to step 1032 again. In this way, the storage area of the secondary storage unit can be acquired.

Further, means is provided for obtaining the ratio of the number of blocks thus obtained to the total block number storage capacity of the HDD 48. The number of input blocks (S1008 in FIG. 14) is reset based on the ratio.

According to the present embodiment, in the HDD 48, the storage blocks necessary for storing the image data are acquired as continuous blocks, and when continuous blocks cannot be acquired, continuous free space is obtained in the divided (discrete) blocks. A block is acquired, but at this time, if this ratio becomes large due to the ratio of the total number of blocks of the HDD 48 and the number of divided (discrete) blocks, the number of input blocks is increased and the blocks are stored continuously. Take a large number and reduce memory in divided blocks. Therefore, the image data can be efficiently transferred.

The release processing of the HDD 48 is performed by the image memory 42.
Since the same process of the release processing is performed, the flows shown in FIGS. 12 and 13 are applied.

Another embodiment of the present invention is an image transfer DMA.
The C44 acquires the position of the most continuous block among the blocks divided every time the HDD 48 is updated and the number of continuous blocks, and creates a space check table for storing this. To FIG. 18 is a diagram showing a block table of positions and lengths of divided empty blocks. In the figure, the block table is an image ID.
It consists of multiple blocks identified by (0-n).
In each block, 1 is assigned to a used block and 0 is assigned to an unused block. As a result, the identification number of the most continuous free block is ID18, and the number of continuous free blocks is 13. FIG. 19 is a diagram showing a space check table. In the figure, the space check table stores a block ID indicating which block a block in which data is not stored (empty block) starts and the number of consecutive blocks.

FIG. 20 is a flow chart of processing for creating a space check table. The process flow will be described with reference to FIG. 20. When the HDD 48 is updated, the image transfer DM
The AC 44 starts the detection processing of the start image ID in which the empty blocks are continuous for the longest time (S1101), and is a counter for detection, which is an empty continuous counter, a block check counter, a check image ID, and a maximum empty continuous counter. , The maximum free continuous image ID is initialized (S11
02). Then, it is checked whether or not the block check counter has the final block ID (S11).
03). If it is the final block ID (S11
03, YES), since all block tables have been detected, this processing ends. When the block ID is not the final block ID (S1103, NO), it is checked whether the block table designated for block check is empty (S1104). If it is free (S11
04, YES), and the free continuous counter is added (S110
5), the block check counter is also added (S111
0), the process returns to step 1103 and this process is repeated.

If it is not empty (S1104, N
O), it is checked whether or not the empty continuous counter is larger than or equal to the maximum empty continuous counter (S1106), and if the empty continuous counter is larger or the same (S110).
6, YES), the empty continuous counter is stored in the maximum empty continuous counter, the check image ID is stored in the maximum image empty image ID (S1107), and the empty continuous counter is cleared (S1108). As a result, the vacant block is interrupted, so to update the check image ID, the value obtained by adding 1 to the block check counter is stored in the check image ID (S1109), and the block check counter is added ( S1110), step 11
Return to 03. By repeating this processing, it is possible to store the longest continuous image ID and the number of blocks that are continuously free. According to this embodiment,
Data can be transferred immediately by specifying consecutive blocks regardless of input operation.

In still another embodiment of the present invention, each time data is stored in the HDD, the transfer rate time is acquired and stored in the table. FIG. 21 is a diagram showing a transfer rate time table. In the figure, the transfer rate time table is the number of block tables, and stores how long it took to transfer to the block. FIG. 22 is a flowchart of the process of creating the transfer rate time table, and the creating process will be described with reference to FIG. The image transfer DMAC 44 starts time measurement before starting the storage process (S1200), then initializes the Time counter necessary for time measurement and storage, and stores the input start block position in the input position counter (S1201). Then, the input operation is started (S120
2) It is checked whether the input position counter has exceeded the input end block position (S1203). If the input end block position is exceeded (S1203, YES), the processing ends, assuming that the transfer rate times of all blocks have been stored. If the input end block position has not been exceeded (S1203, NO), it is checked whether or not the designated block of the input position counter has completed the input (S1204). If the designated block of the input position counter has not finished inputting, the Time counter is incremented (S1205) and the process returns to step 1204.

When the designated block of the input position counter has finished inputting, the Time counter is stored in the transfer speed time table pointed to by the input position counter (S1206),
The Time counter is cleared (S1207). Since the input of the designated block is completed, the input position counter is incremented (S1208), the process returns to step 1203, and this process is repeated.

According to the present embodiment, by referring to the transfer speed time table, the block with the largest free space can be acquired with the highest priority and data transfer can be performed. Further, since the transfer rate for each block can be grasped, it is possible to perform recording from a block having a high transfer rate (small storage data amount) or release from a block having a low transfer rate. Therefore, the image data can be efficiently stored in the HDD 48.

[0064]

According to the present invention, the image data is temporarily stored in the primary storage means, the stored image data is compressed and transferred to the secondary storage means, and the secondary storage means is constructed. In an image processing apparatus that stores continuously or discretely in a plurality of stored storage areas, the storage capacity of continuous free storage areas is set by the ratio of the capacity of discrete free storage areas to the storage capacity of secondary storage means. Therefore, the data can be efficiently transferred to the secondary storage unit, and the performance of the image processing apparatus is improved. Effects corresponding to claims 2 and 3: When a large number of image data are successively stored, the empty storage area can be acquired according to the size of the image data by referring to the table. Effects corresponding to claims 4 and 5: It becomes possible to recognize the effective data transfer time of the secondary storage means over time. Based on this data transfer time, for example, if you want to minimize the processing time, you can preferentially secure a storage area that does not require the transfer time, or a quantity to secure a storage area to store image data. Therefore, it is possible to more optimally control the storage area of the secondary storage means.

[Brief description of drawings]

FIG. 1 is an overall schematic configuration diagram of a digital copying machine to which the present invention is applied.

FIG. 2 is a view of a document table as viewed from above.

FIG. 3 is a diagram showing an image synchronization signal output from an IPU.

FIG. 4 is a block diagram showing an internal configuration of a storage unit.

FIG. 5 is a block diagram showing an internal configuration of a memory control unit.

FIG. 6 is a diagram showing a configuration of an image ID table.

FIG. 7 is a diagram showing a structure of a descriptor table.

FIG. 8 is a diagram showing a configuration of a block table.

FIG. 9 is a flowchart of a storage area acquisition process of a semiconductor memory.

FIG. 10 is a flowchart of a storage area acquisition process of a semiconductor memory.

FIG. 11 is a flowchart of a storage area acquisition process of a semiconductor memory.

FIG. 12 is a flowchart of a storage area release process of a semiconductor memory.

FIG. 13 is a flowchart of a storage area release process of a semiconductor memory.

FIG. 14 is a flowchart of a storage area acquisition process of a hard disk.

FIG. 15 is a flowchart of a storage area acquisition process of a hard disk.

FIG. 16 is a flowchart of a storage area acquisition process of a hard disk.

FIG. 17 is a flowchart of a storage area acquisition process of a hard disk.

FIG. 18 is a diagram showing a block table having a divided free capacity.

FIG. 19 is a diagram showing a space check table.

FIG. 20 is a flowchart of a process of creating a space check table.

FIG. 21 is a diagram showing a transfer rate time table.

FIG. 22 is a flow chart of processing for creating a transfer rate time table.

[Explanation of symbols]

1 ... System control unit, 4 ... Storage unit, 5 ... Selector, 7 ...
Operation part, 9 ... FAX part, 20..reading part, 30..image forming part, 32..charger charger, 33..photoreceptor, 34..developing device, 35..transfer charger, 36..separation Charger, 37 ··· Cleaning device, 38 · ·
41 ... Image input / output DMAC, 42 ... Image memory, 43 ...
Memory controller, 44 ... Image transfer DMAC, 45 ... Code transfer DMAC

Continued front page    (72) Inventor Yasuhiro Hattori             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh (72) Inventor Kiyotaka Mogi             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh (72) Inventor Yasumitsu Shimizu             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh (72) Inventor Yuriko Obata             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh F term (reference) 2C087 AA03 AA09 BB10 BC06 BD53                 5B021 AA01 DD09 DD10                 5B082 CA02 CA08 FA01                 5C073 AA06 AB08 BB09 BD02

Claims (5)

[Claims] 1. Image data is temporarily stored in a primary storage means, the stored image data is compressed and transferred to a secondary storage means, and the image data is continuously stored in a plurality of storage areas configured in the secondary storage means. In an image processing apparatus that stores the data separately or in a discrete manner, means for sequentially detecting position information of the plurality of storage areas, and means for detecting a continuous free storage area having an arbitrarily set capacity each time the position information is detected, and the means. When the empty storage area is detected, a means for acquiring the storage area, a means for acquiring a discrete empty storage area when the detecting means does not detect the empty storage area, and the means A means for detecting the capacity of the discrete free storage area and a means for acquiring a ratio of the capacity of the free storage area detected by the means to the capacity of the storage area of the secondary storage means are provided, and the arbitrary value is calculated based on the ratio. Set capacity The image processing apparatus characterized by resetting. 2. The image processing apparatus according to claim 1,
The image processing apparatus, wherein the means for detecting the capacity of the discrete free storage area detects the maximum continuous capacity and head position information of the free storage area. 3. The image processing device according to claim 1, wherein the means for detecting the capacity of the discrete free storage area comprises means for storing the maximum continuous capacity and the head position information in a table. Image processing device. 4. The image processing apparatus according to claim 1,
An image processing apparatus comprising means for measuring a time for transferring image data to a storage area of the secondary storage means for each storage area. 5. The image processing apparatus according to claim 1, further comprising means for storing the image data transfer time of each storage area of the secondary storage means.