JP2003168872A - Wiring board and electronic apparatus using the same - Google Patents

Wiring board and electronic apparatus using the same

Info

Publication number
JP2003168872A
JP2003168872A JP2001365687A JP2001365687A JP2003168872A JP 2003168872 A JP2003168872 A JP 2003168872A JP 2001365687 A JP2001365687 A JP 2001365687A JP 2001365687 A JP2001365687 A JP 2001365687A JP 2003168872 A JP2003168872 A JP 2003168872A
Authority
JP
Japan
Prior art keywords
conductor
wiring
insulating layer
wiring board
conductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001365687A
Other languages
Japanese (ja)
Other versions
JP3924453B2 (en
Inventor
Hidenori Shikada
英典 鹿田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2001365687A priority Critical patent/JP3924453B2/en
Publication of JP2003168872A publication Critical patent/JP2003168872A/en
Application granted granted Critical
Publication of JP3924453B2 publication Critical patent/JP3924453B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15174Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board whose connection reliability of a wiring conductor to a through conductor is superior. <P>SOLUTION: The wiring board 5 is formed in such a way that a plurality of insulating layers 1 in which a glass fiber substrate is impregnated with a modified polyphenylene ether resin and a plurality of wiring conductors 2 composed of a metal foil are laminated alternately, and that the wiring conductors 2 situated in upper parts and lower parts by sandwiching the insulating layers 1 are electrically connected by through conductors 4 formed so as to be filled with a conductor. The content of the modified polyphenylene ether resin in the insulating layers 1 is 40 to 45 wt.%, and the through conductors 4 are arranged and installed in such a way that four to 12 pieces are distributed in the range within a radius of 500 μm. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、絶縁層および配線
導体が交互に複数層積層され、絶縁層を挟んで上下に位
置する配線導体同士を絶縁層に設けた貫通導体により電
気的に接続して成る配線基板およびこれを用いた電子装
置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention has a structure in which a plurality of insulating layers and wiring conductors are alternately laminated, and wiring conductors located above and below the insulating layer are electrically connected by a through conductor provided in the insulating layer. And a electronic device using the same.

【0002】[0002]

【従来の技術】従来、半導体素子や抵抗器等の電子部品
を搭載するために用いられる配線基板として、ガラス繊
維基材および変性ポリフェニレンエーテル樹脂から成る
絶縁層と銅箔等の金属箔から成る配線導体とを交互に複
数積層して成るプリント基板が知られている。このよう
なプリント基板は、絶縁層表面に被着した銅箔をエッチ
ングして配線導体を形成し、配線導体が形成された絶縁
層を複数枚、積層圧着して多層化することにより製作さ
れている。
2. Description of the Related Art Conventionally, as a wiring board used for mounting electronic parts such as semiconductor elements and resistors, a wiring consisting of an insulating layer made of a glass fiber base material and a modified polyphenylene ether resin and a metal foil such as a copper foil. A printed circuit board is known in which a plurality of conductors are alternately laminated. Such a printed circuit board is manufactured by etching a copper foil adhered to the surface of an insulating layer to form a wiring conductor, and laminating and pressing a plurality of insulating layers having the wiring conductor formed thereon to form a multilayer structure. There is.

【0003】しかしながらこのプリント基板は、絶縁層
表面の配線導体部と非配線導体部との段差により表面が
凹凸状態となることから、変性ポリフェニレンエーテル
樹脂の含有量を50〜80重量%と多くして絶縁層に若干の
可塑性を持たせた絶縁シートを用い、絶縁シートに配線
導体を被着させる際に、絶縁シートの配線導体に当接す
る部位を配線導体の厚みに対応して塑性変形させること
により配線導体を絶縁シート中に埋入し、配線基板表面
に凹凸が形成されないようにしている。なお、プリント
基板の上下の配線導体は、絶縁層に形成された貫通導体
を介して接続されている。
However, since the surface of this printed circuit board becomes uneven due to the step between the wiring conductor portion and the non-wiring conductor portion on the surface of the insulating layer, the content of the modified polyphenylene ether resin is increased to 50 to 80% by weight. When an insulating sheet with a slight degree of plasticity is used as an insulating layer, when the wiring conductor is applied to the insulating sheet, the portion of the insulating sheet that abuts the wiring conductor is plastically deformed according to the thickness of the wiring conductor. Thus, the wiring conductor is embedded in the insulating sheet so that no unevenness is formed on the surface of the wiring board. The upper and lower wiring conductors of the printed circuit board are connected to each other through the through conductors formed in the insulating layer.

【0004】このような配線基板は、ガラス繊維基材に
変性ポリフェニレンエーテル樹脂を含浸させた絶縁シー
トにレーザで貫通孔を形成した後、この貫通孔内に金属
粉末および熱硬化性樹脂から成る導体ペーストをスクリ
ーン印刷(圧入)で充填し貫通導体を形成し、他方、耐
熱性樹脂から成る転写用シート基材の表面に銅箔を被着
し、所定のパターンにエッチングして転写用シート基材
に配線導体を形成し、しかる後、貫通導体が形成された
絶縁シートに配線導体が形成された転写用シート基材を
圧接して配線導体を絶縁シートに転写埋入するとともに
貫通導体と接続させ、さらに、絶縁シートから転写用シ
ート基材を剥離した後、配線導体が埋入された絶縁シー
トを複数枚積層して熱プレスを用いて変性ポリフェニレ
ンエーテル樹脂を硬化一体化させることにより製作され
る。
In such a wiring board, a through hole is formed by a laser in an insulating sheet in which a modified polyphenylene ether resin is impregnated in a glass fiber base material, and then a conductor made of metal powder and a thermosetting resin is provided in the through hole. The paste is filled by screen printing (press-fitting) to form a through conductor, while the transfer sheet base made of a heat-resistant resin is coated with copper foil and etched into a predetermined pattern to form a transfer sheet base. A wiring conductor is formed on the wiring conductor, and then the transfer sheet base material on which the wiring conductor is formed is press-contacted to the insulating sheet on which the penetration conductor is formed, so that the wiring conductor is transfer-embedded in the insulating sheet and connected to the penetration conductor. In addition, after peeling the transfer sheet base material from the insulating sheet, a plurality of insulating sheets having wiring conductors embedded therein are laminated, and the modified polyphenylene ether resin is applied by hot pressing. It is fabricated by integrating reduction.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記の
配線基板は、絶縁層に含有される変性ポリフェニレンエ
ーテル樹脂量を50〜80重量%と多くしていることから、
絶縁層を積層して熱プレスする際に、熱プレスの熱によ
ってガラス繊維基材に対して変性ポリフェニレンエーテ
ル樹脂が大きく流動してしまい、それと同時に絶縁層表
面の配線導体の変形や移動が発生し、その結果、貫通導
体とそれに接続される配線導体との位置ずれが発生し、
断線を生じてしまうという問題点を有していた。
However, since the above wiring board has a large amount of the modified polyphenylene ether resin contained in the insulating layer of 50 to 80% by weight,
When the insulating layers are laminated and hot pressed, the heat of the hot pressing causes the modified polyphenylene ether resin to largely flow to the glass fiber substrate, and at the same time, the wiring conductor on the surface of the insulating layer is deformed or moved. , As a result, a position shift occurs between the through conductor and the wiring conductor connected to it,
There was a problem that a disconnection would occur.

【0006】本発明は、かかる従来技術の問題点に鑑み
完成されたものであり、その目的は、積層して熱プレス
する時に貫通導体とそれに接続される配線導体との位置
ずれを防止することができ、接続信頼性に優れた配線基
板およびこれを用いた電子装置を提供するものである。
The present invention has been completed in view of the above problems of the prior art, and an object thereof is to prevent positional deviation between a through conductor and a wiring conductor connected thereto when laminating and hot pressing. And a wiring board excellent in connection reliability and an electronic device using the same.

【0007】[0007]

【課題を解決するための手段】本発明の配線基板は、ガ
ラス繊維基材に変性ポリフェニレンエーテル樹脂を含浸
させた絶縁層と金属箔から成る配線導体とを交互に複数
層積層するとともに、絶縁層を挟んで上下に位置する配
線導体同士を絶縁層に設けた貫通孔を導体で充填して成
る貫通導体により電気的に接続して成る配線基板におい
て、絶縁層は変性ポリフェニレンエーテル樹脂の含有量
が40〜45重量%であり、貫通導体は半径500μm以内の
範囲に4〜12個分布するように配設されていることを特
徴とするものである。
A wiring board according to the present invention comprises an insulating layer in which a glass fiber base material is impregnated with a modified polyphenylene ether resin and a wiring conductor made of a metal foil, which are alternately laminated in plural layers. In the wiring board electrically connected by the through conductor formed by filling the through holes provided in the insulating layer between the wiring conductors located above and below the insulating layer, the insulating layer has a modified polyphenylene ether resin content of It is 40 to 45% by weight, and 4 to 12 through conductors are arranged so as to be distributed within a radius of 500 μm.

【0008】また、本発明の電子装置は、上記の配線基
板の表面に電子部品を実装するとともに、この電子部品
の電極を配線導体または貫通導体に電気的に接続して成
ることを特徴とするものである。
Further, the electronic device of the present invention is characterized in that an electronic component is mounted on the surface of the above-mentioned wiring board, and an electrode of this electronic component is electrically connected to a wiring conductor or a through conductor. It is a thing.

【0009】本発明の配線基板によれば、絶縁層の変性
ポリフェニレンエーテル樹脂の含有量を40〜45%と少な
くしたことから、絶縁層を積層して熱プレスする際に、
熱プレスの熱によってガラス繊維基材に対して変性ポリ
フェニレンエーテル樹脂が大きく流動することはなく、
また、貫通導体を半径500μm以内の範囲に4〜12個分
布するように配設したことから、貫通導体のアンカー効
果により変性ポリフェニレンエーテル樹脂の流動をより
抑制することができ、その結果、絶縁層表面の配線導体
の変形や移動が発生したり、貫通導体とそれに接続され
る配線導体との位置ずれが発生することはなく、貫通導
体と配線導体との断線等のない接続信頼性に優れた配線
基板とすることができる。
According to the wiring board of the present invention, since the content of the modified polyphenylene ether resin in the insulating layer is reduced to 40 to 45%, when the insulating layers are laminated and hot pressed,
The modified polyphenylene ether resin does not flow significantly against the glass fiber substrate due to the heat of the heat press,
Further, since the through conductors are arranged so as to be distributed in a range of 4 to 12 within a radius of 500 μm, the flow of the modified polyphenylene ether resin can be further suppressed by the anchor effect of the through conductor, and as a result, the insulating layer Deformation or movement of the wiring conductor on the surface does not occur, and there is no displacement between the through conductor and the wiring conductor connected to it, and excellent connection reliability without disconnection between the through conductor and the wiring conductor. It can be a wiring board.

【0010】また、本発明の電子装置によれば、上記の
配線基板の表面に電子部品を実装するとともに、この電
子部品の電極を配線導体または貫通導体に電気的に接続
したことから、貫通導体とそれに接続される配線導体と
が確実に接合でき、その結果、貫通導体と配線導体との
断線等のない接続信頼性に優れた電子装置とすることが
できる。
According to the electronic device of the present invention, since the electronic component is mounted on the surface of the wiring board and the electrode of the electronic component is electrically connected to the wiring conductor or the through conductor, the through conductor is formed. And the wiring conductor connected to the wiring conductor can be reliably joined, and as a result, an electronic device having excellent connection reliability without disconnection between the through conductor and the wiring conductor can be provided.

【0011】[0011]

【発明の実施の形態】次に、本発明の配線基板およびこ
れを用いた電子装置を添付の図面に基づいて詳細に説明
する。図1は、本発明の配線基板に半導体素子等の電子
部品を搭載して成る電子装置の実施の形態の一例を示す
断面図であり、図2は、本発明の配線基板の絶縁層に形
成された貫通導体の分布状態の一例を示す平面図であ
る。これらの図において、1は絶縁層、2は配線導体、
3は貫通孔、4は貫通導体であり、主にこれらで本発明
の配線基板5が構成される。また、6は電子部品であ
り、主に配線基板5と電子部品6と本発明の電子装置が
構成される。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a wiring board of the present invention and an electronic device using the same will be described in detail with reference to the accompanying drawings. FIG. 1 is a sectional view showing an example of an embodiment of an electronic device in which an electronic component such as a semiconductor element is mounted on a wiring board of the present invention, and FIG. 2 is formed on an insulating layer of the wiring board of the present invention. It is a top view which shows an example of the distribution state of the formed penetration conductor. In these figures, 1 is an insulating layer, 2 is a wiring conductor,
Reference numeral 3 is a through hole, and 4 is a through conductor, and these mainly constitute the wiring board 5 of the present invention. Reference numeral 6 denotes an electronic component, which mainly comprises the wiring board 5, the electronic component 6, and the electronic device of the present invention.

【0012】絶縁層1は、その厚みが50〜150μmであ
り、配線導体2を支持するとともに上下に位置する配線
導体2間の絶縁を保持する機能を有し、ガラス繊維基材
に変性ポリフェニレンエーテル樹脂を含浸させて成る。
なお、絶縁層1の厚みが50μm未満であると配線基板5
の剛性が低下して、配線基板5が撓んで反りが発生し易
くなる傾向があり、150μmを超えると配線基板5の厚
みが不要に厚いものとなり軽量化が困難となる傾向があ
る。従って、絶縁層1の厚みは50〜150μmが好まし
い。
The insulating layer 1 has a thickness of 50 to 150 μm, has a function of supporting the wiring conductors 2 and maintaining insulation between the wiring conductors 2 positioned above and below, and a modified polyphenylene ether is added to the glass fiber base material. It is made by impregnating a resin.
If the thickness of the insulating layer 1 is less than 50 μm, the wiring board 5
Of the wiring board 5 tends to bend and warp easily, and when it exceeds 150 μm, the wiring board 5 becomes unnecessarily thick and it is difficult to reduce the weight. Therefore, the thickness of the insulating layer 1 is preferably 50 to 150 μm.

【0013】そして、本発明においては、絶縁層1中の
変性ポリフェニレンエーテル樹脂の含有量を40〜45重量
%とすることが重要である。絶縁層1の変性ポリフェニ
レンエーテル樹脂の含有量を40〜45%と少なくすること
により、絶縁層1を積層して熱プレスする際に、熱プレ
スの熱によってガラス繊維基材に対して変性ポリフェニ
レンエーテル樹脂が大きく流動することはなく、後述す
る絶縁層1表面の配線導体2の変形や移動および貫通導
体4とそれに接続される配線導体2との位置ずれを抑制
して、貫通導体4と配線導体2との接続信頼性を高める
ことができる。変性ポリフェニレンエーテル樹脂の含有
量が40重量%より少ないと、ガラス繊維基材に変性ポリ
フェニレンエーテル樹脂が充分に含浸されず絶縁層1に
空隙が生じ、電子部品6を実装する際のリフロー等の急
激な熱履歴で絶縁層1に膨れや剥がれが生じてしまう傾
向にあり、他方、45重量%を超えると絶縁層1を積層し
て熱プレスする時に変性ポリフェニレンエーテル樹脂が
流動して絶縁層1表面の配線導体2が変形してしまい、
貫通導体4とそれに接続される配線導体2との位置ずれ
が発生し、断線を生じてしまい易くなる傾向にある。従
って、絶縁層1中の変性ポリフェニレンエーテル樹脂の
含有率を40〜45重量%とすることが重要である。なお、
変性ポリフェニレンエーテル樹脂の架橋密度をあげるた
めに、トリアリルイソシアヌレート等の架橋剤を添加し
ても良い。
In the present invention, it is important that the content of the modified polyphenylene ether resin in the insulating layer 1 is 40 to 45% by weight. By reducing the content of the modified polyphenylene ether resin in the insulating layer 1 to 40 to 45%, when the insulating layer 1 is laminated and hot-pressed, the modified polyphenylene ether is added to the glass fiber substrate by the heat of the hot-pressing. The resin does not flow largely, and deformation and movement of the wiring conductor 2 on the surface of the insulating layer 1 described later and displacement of the through conductor 4 and the wiring conductor 2 connected thereto are suppressed, and the through conductor 4 and the wiring conductor are prevented. It is possible to improve the connection reliability with 2. If the content of the modified polyphenylene ether resin is less than 40% by weight, the glass fiber substrate is not sufficiently impregnated with the modified polyphenylene ether resin and voids are generated in the insulating layer 1, which causes a rapid reflow when mounting the electronic component 6. The heat history tends to cause swelling or peeling of the insulating layer 1. On the other hand, when it exceeds 45% by weight, the modified polyphenylene ether resin flows when the insulating layer 1 is laminated and hot pressed, and the surface of the insulating layer 1 The wiring conductor 2 of
There is a tendency that a positional shift occurs between the through conductor 4 and the wiring conductor 2 connected to the through conductor 4, causing disconnection. Therefore, it is important that the content of the modified polyphenylene ether resin in the insulating layer 1 is 40 to 45% by weight. In addition,
A crosslinking agent such as triallyl isocyanurate may be added to increase the crosslinking density of the modified polyphenylene ether resin.

【0014】また、各絶縁層1の表面には配線導体2が
被着・埋入されている。配線導体2は、配線基板4に搭
載される半導体素子等の電子部品6の各電極を外部電気
回路基板(図示せず)に電気的に接続する導電路の一部
としての機能を有し、幅が20〜200μm、厚みが5〜50
μmで、銅やアルミニウム・ニッケル・銀・金等の金属
箔から成り、特に加工性および安価という観点からは銅
箔から成ることが好ましい。配線導体2の幅が20μm未
満となると配線導体2の変形や断線が発生しやすくなる
傾向があり、200μmを超えると高密度配線が形成でき
なくなる傾向がある。また、配線導体2の厚みが5μm
未満になると配線導体2の強度が低下し変形や断線が発
生しやすくなる傾向があり、50μmを超えると絶縁層1
への埋入が困難となる傾向がある。したがって、配線導
体2は、その幅を20〜200μm、厚みを5〜50μmとす
ることが好ましい。
A wiring conductor 2 is deposited / embedded on the surface of each insulating layer 1. The wiring conductor 2 has a function as a part of a conductive path that electrically connects each electrode of the electronic component 6 such as a semiconductor element mounted on the wiring board 4 to an external electric circuit board (not shown), Width 20-200μm, thickness 5-50
The thickness is μm and is made of a metal foil such as copper or aluminum / nickel / silver / gold. Particularly, from the viewpoint of workability and low cost, it is preferably made of a copper foil. If the width of the wiring conductor 2 is less than 20 μm, the wiring conductor 2 tends to be deformed or broken, and if it exceeds 200 μm, high density wiring cannot be formed. In addition, the thickness of the wiring conductor 2 is 5 μm
When it is less than 50 μm, the strength of the wiring conductor 2 is lowered and deformation or disconnection tends to occur.
Implantation tends to be difficult. Therefore, the wiring conductor 2 preferably has a width of 20 to 200 μm and a thickness of 5 to 50 μm.

【0015】また、各絶縁層1には、その上面から下面
にかけて貫通導体4が複数個配設されている。これらの
貫通導体4は、絶縁層1の上下に位置する配線導体2間
を電気的に接続する機能を有し、その直径が30〜100μ
mであり、絶縁層1に設けた貫通孔3に銅や銀・錫合金
等の金属粉末とトリアジン系熱硬化性樹脂等とから成る
導体を埋め込むことにより形成されている。なお、貫通
孔3の直径が30μm未満になるとその加工が困難となる
傾向があり、100μmを超えると高密度配線が形成でき
なくなる傾向がある。したがって、貫通孔3、その直径
を30〜100μmとすることが好ましい。
Further, each insulating layer 1 is provided with a plurality of penetrating conductors 4 from its upper surface to its lower surface. These penetrating conductors 4 have a function of electrically connecting the wiring conductors 2 located above and below the insulating layer 1 and have a diameter of 30 to 100 μm.
m, which is formed by embedding a conductor made of a metal powder such as copper or silver-tin alloy and a triazine-based thermosetting resin in the through hole 3 provided in the insulating layer 1. If the diameter of the through hole 3 is less than 30 μm, its processing tends to be difficult, and if it exceeds 100 μm, high-density wiring cannot be formed. Therefore, it is preferable that the through hole 3 has a diameter of 30 to 100 μm.

【0016】なお、上述したように絶縁層1中の変性ポ
リフェニレンエーテル樹脂の含有量を40〜45重量%と少
なくしたことから、絶縁層1を積層して熱プレスする際
に変性ポリフェニレンエーテル樹脂がガラス繊維基材に
効率良く含浸・圧縮されて硬化されるので、絶縁層1中
に形成される貫通導体4の金属粉末同士も強固に接続で
き、その結果、長期の熱履歴を加えても、接続信頼性に
優れる貫通導体4とすることができる。
Since the content of the modified polyphenylene ether resin in the insulating layer 1 is reduced to 40 to 45% by weight as described above, when the insulating layer 1 is laminated and hot pressed, the modified polyphenylene ether resin is Since the glass fiber base material is efficiently impregnated / compressed and cured, the metal powders of the through conductors 4 formed in the insulating layer 1 can be firmly connected to each other, and as a result, even if a long-term heat history is applied, The through conductor 4 having excellent connection reliability can be obtained.

【0017】このような貫通導体4は、半径500μm以
内の範囲に4〜12個分布するように配設することが重要
である。貫通導体4を半径500μm以内の範囲に4〜12
個分布するように配設することにより、貫通導体4のア
ンカー効果により変性ポリフェニレンエーテル樹脂の流
動をより抑制することができ、その結果、絶縁層1表面
の配線導体2の変形や移動が発生したり、貫通導体4と
それに接続される配線導体2との位置ずれが発生するこ
とはなく、貫通導体4と配線導体2との断線等のない接
続信頼性に優れた配線基板5とすることができる。な
お、貫通導体4がその各々から半径500μm以内の範囲
に4個より少ないと貫通導体4のアンカー効果が低下
し、絶縁層1を積層して熱プレスする際に絶縁層1表面
の配線導体2が変形してしまい、貫通導体4とそれに接
続される配線導体2との位置ずれが発生し、断線を生じ
てしまい易くなる傾向にある。従って、貫通導体4は、
半径500μm以内の範囲に4〜12個分布するように配設
することが重要である。
It is important that such through conductors 4 are arranged so as to be distributed in a range of 4 to 12 within a radius of 500 μm. Put the through conductor 4 within a radius of 500 μm from 4 to 12
By arranging them so as to be distributed individually, the flow of the modified polyphenylene ether resin can be further suppressed by the anchor effect of the through conductors 4, and as a result, the wiring conductor 2 on the surface of the insulating layer 1 is deformed or moved. In addition, the through conductor 4 and the wiring conductor 2 connected to the through conductor 4 are not displaced from each other, and the wiring board 5 is excellent in connection reliability without disconnection between the through conductor 4 and the wiring conductor 2. it can. If the number of through conductors 4 is less than four within a radius of 500 μm from each of them, the anchor effect of the through conductors 4 is reduced, and the wiring conductors 2 on the surface of the insulating layer 1 are stacked when the insulating layers 1 are laminated and hot pressed. Of the through conductor 4 and the wiring conductor 2 connected to the through conductor 4 are displaced, and disconnection tends to occur. Therefore, the through conductor 4 is
It is important to dispose 4 to 12 distributions within a radius of 500 μm.

【0018】このような配線基板5は、以下に述べる方
法により製作される。まず、ガラス繊維基材に変性ポリ
フェニレンエーテル樹脂をその含有量が40〜45重量%に
なるように含浸させて乾燥することにより絶縁シートを
製作する。次に、絶縁シートの所定の位置に炭酸ガスレ
ーザやYAGレーザ等の従来周知の方法を採用して直径
が30〜100μmの貫通孔3を穿設する。この時、貫通孔
3は、半径500μm以内の範囲に4〜12個分布するよう
に配設する。そして、貫通孔3に従来周知のスクリーン
印刷法を採用して、例えば錫や銅等の金属粉およびトリ
アジン系樹脂等の熱硬化性樹脂を含む導体ペーストをス
クリーン印刷法(圧入)で充填することによって貫通導
体4を形成する。その後、別途準備した、表面に銅箔か
ら成る配線導体2を所定のパターンに被着形成した、ポ
リエチレンテレフタレート(PET)樹脂等の耐熱性樹
脂からなる転写シートを絶縁シートに、所定の貫通導体
4と配線導体2とが接続するように位置合わせして重ね
合わせ、これらを熱プレス機を用いて100〜150℃の温度
で数分間プレスすることにより転写シートを絶縁シート
に圧接して、配線導体2を絶縁シートに転写埋入させ
る。しかる後、転写シートを絶縁シートから剥離すると
ともに配線導体2を埋入した絶縁シートを複数枚上下に
重ね合わせ、熱プレス機を用いて150〜200℃の温度で数
時間加熱プレスすることにより、配線基板5が製造され
る。
Such a wiring board 5 is manufactured by the method described below. First, an insulating sheet is manufactured by impregnating a glass fiber base material with a modified polyphenylene ether resin so that its content is 40 to 45% by weight and drying. Then, a through hole 3 having a diameter of 30 to 100 μm is formed at a predetermined position of the insulating sheet by using a conventionally known method such as a carbon dioxide laser or a YAG laser. At this time, the through holes 3 are arranged so that 4 to 12 through holes 3 are distributed within a radius of 500 μm. Then, the through-hole 3 is filled with a conductor paste containing a metal powder such as tin or copper and a thermosetting resin such as a triazine resin by a screen printing method (press-fitting) by using a conventionally known screen printing method. The through conductor 4 is formed by. After that, a separately prepared transfer sheet made of a heat-resistant resin such as polyethylene terephthalate (PET) resin, which has a wiring conductor 2 made of copper foil formed on a surface thereof in a predetermined pattern, is used as an insulating sheet, and a predetermined through conductor 4 is provided. And the wiring conductor 2 are aligned and overlapped so as to be connected to each other, and these are pressed at a temperature of 100 to 150 ° C. for several minutes by using a heat press machine to press the transfer sheet into contact with the insulating sheet, and thus the wiring conductor. 2 is transferred and embedded in an insulating sheet. Then, the transfer sheet is peeled off from the insulating sheet, a plurality of insulating sheets having the wiring conductors 2 embedded therein are stacked on top of each other, and hot-pressed at a temperature of 150 to 200 ° C. for several hours using a heat press machine. The wiring board 5 is manufactured.

【0019】かくして、本発明の配線基板5によれば、
絶縁層1の熱変性ポリフェニレンエーテル樹脂の含有量
を40〜45%と少なくしたことから、絶縁層1を積層して
熱プレスする際に変性ポリフェニレンエーテル樹脂の流
動を抑制でき、絶縁層1表面の配線導体2の変形を防止
でき、また、貫通導体4とそれに接続される配線導体2
との位置ずれが発生し、貫通導体4をその各々から半径
500μm以内の範囲に4〜12個の貫通導体4を分布する
ように配設したことから、貫通導体4のアンカー効果に
より、貫通導体4とそれに接続される配線導体2とが確
実に接合でき、その結果、貫通導体4と配線導体2との
断線等のない接続信頼性に優れた配線基板とすることが
できる。
Thus, according to the wiring board 5 of the present invention,
Since the content of the heat-modified polyphenylene ether resin in the insulating layer 1 is reduced to 40 to 45%, the flow of the modified polyphenylene ether resin can be suppressed when the insulating layer 1 is laminated and hot pressed, and the surface of the insulating layer 1 can be suppressed. The wiring conductor 2 can be prevented from being deformed, and the penetrating conductor 4 and the wiring conductor 2 connected thereto can be prevented.
And the position of the through conductor 4 is
Since 4 to 12 penetrating conductors 4 are arranged so as to be distributed within a range of 500 μm, the penetrating conductor 4 and the wiring conductor 2 connected thereto can be reliably joined by the anchor effect of the penetrating conductor 4. As a result, it is possible to obtain a wiring board having excellent connection reliability without breakage of the through conductor 4 and the wiring conductor 2.

【0020】さらに、絶縁層1の一方の最外層表面に形
成された配線導体2の一部は、電子部品6の各電極に導
体バンプ11を介して接合される電子部品6接続用の実装
用電極2aを形成し、また、絶縁層1の他方の最外層表
面に形成された配線導体2の一部は、外部電気回路基板
(図示せず)の各電極に導体バンプ11を介して接続され
る外部接続用の実装用電極2bを形成している。
Furthermore, a part of the wiring conductor 2 formed on the surface of one outermost layer of the insulating layer 1 is connected to each electrode of the electronic component 6 through the conductor bump 11 for mounting the electronic component 6 for mounting. A part of the wiring conductor 2 forming the electrode 2a and formed on the surface of the other outermost layer of the insulating layer 1 is connected to each electrode of the external electric circuit board (not shown) via the conductor bump 11. A mounting electrode 2b for external connection is formed.

【0021】実装用電極2a・2bの表面には、その酸
化腐蝕を防止するとともに導体バンプ11との接続を良好
とするために、半田等の導体バンプ11との濡れ性が良好
で耐腐蝕性に優れたニッケル−金等のめっき層が被着さ
れている。
The surfaces of the mounting electrodes 2a and 2b have good wettability with the conductor bumps 11 such as solder and corrosion resistance in order to prevent their oxidation and corrosion and to make a good connection with the conductor bumps 11. An excellent plating layer of nickel-gold or the like is deposited.

【0022】また、最外層の絶縁層1および実装用電極
2a・2bには、その中央部を露出させる開口を有する
耐半田樹脂層12が被着されている。耐半田樹脂層12は、
その厚みが10〜50μmであり、例えばアクリル変性エポ
キシ樹脂等の感光性樹脂と光開始剤等とから成る混合物
に30〜70重量%のシリカやタルク等の無機粉末フィラー
を含有させた絶縁材料から成り、隣接する実装用電極2
a・2b同士が導体バンプ11により電気的に短絡するこ
とを防止するとともに、実装用電極2a・2bと絶縁層
1との接合強度を向上させる機能を有する。
The outermost insulating layer 1 and the mounting electrodes 2a and 2b are covered with a solder-resistant resin layer 12 having an opening exposing the central portion thereof. The solder-resistant resin layer 12 is
From an insulating material having a thickness of 10 to 50 μm, for example, a mixture of a photosensitive resin such as an acrylic modified epoxy resin and a photoinitiator containing 30 to 70% by weight of an inorganic powder filler such as silica or talc. Negative, adjacent mounting electrode 2
It has a function of preventing electrical short-circuiting between the a and 2b due to the conductor bump 11 and improving the bonding strength between the mounting electrodes 2a and 2b and the insulating layer 1.

【0023】このような耐半田樹脂層12は、感光性樹脂
と光開始剤と無機粉末フィラーとから成る未硬化樹脂フ
ィルムを最外層の絶縁層1表面に被着させる、あるい
は、熱硬化性樹脂と無機粉末フィラーとから成る未硬化
樹脂ワニスを最外層の絶縁層1表面に塗布するとともに
乾燥し、しかる後、露光・現像により開口部を形成し、
これをUV硬化および熱硬化させることにより形成され
る。
Such a solder-resistant resin layer 12 is formed by applying an uncured resin film composed of a photosensitive resin, a photoinitiator, and an inorganic powder filler to the surface of the outermost insulating layer 1, or a thermosetting resin. An uncured resin varnish consisting of an inorganic powder filler and an inorganic powder filler is applied to the surface of the outermost insulating layer 1 and dried, and then an opening is formed by exposure and development.
It is formed by UV curing and heat curing.

【0024】かくして、本発明の電子装置によれば、配
線基板5の表面に電子部品6を実装するとともに、この
電子部品6の電極を配線導体2または貫通導体4に電気
的に接続したことから、貫通導体4とそれに接続される
配線導体2とが確実に接合でき、その結果、貫通導体4
と配線導体2との断線等のない接続信頼性に優れた電子
装置とすることができる。
Thus, according to the electronic device of the present invention, the electronic component 6 is mounted on the surface of the wiring board 5 and the electrodes of the electronic component 6 are electrically connected to the wiring conductor 2 or the through conductor 4. , The through conductor 4 and the wiring conductor 2 connected to the through conductor 4 can be reliably joined, and as a result, the through conductor 4
It is possible to provide an electronic device having excellent connection reliability without disconnection between the wiring conductor 2 and the wiring conductor 2.

【0025】なお、本発明は上述の実施例に限定される
ものではなく、本発明の要旨を逸脱しない範囲であれば
種々の変更は可能であり、例えば上述の実施例では絶縁
層1を4層積層した場合を例示したが、5層以上であっ
てもかまわない。
The present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the scope of the present invention. Although the case where the layers are laminated is shown as an example, the number of layers may be five or more.

【0026】[0026]

【発明の効果】本発明の配線基板によれば、絶縁層の変
性ポリフェニレンエーテル樹脂の含有量を40〜45%と少
なくしたことから、絶縁層を積層して熱プレスする際
に、熱プレスの熱によってガラス繊維基材に対して変性
ポリフェニレンエーテル樹脂が大きく流動することはな
く、また、貫通導体を半径500μm以内の範囲に4〜12
個分布するように配設したことから、貫通導体のアンカ
ー効果により変性ポリフェニレンエーテル樹脂の流動を
より抑制することができ、その結果、絶縁層表面の配線
導体の変形や移動が発生したり、貫通導体とそれに接続
される配線導体との位置ずれが発生することはなく、貫
通導体と配線導体との断線等のない接続信頼性に優れた
配線基板とすることができる。
According to the wiring board of the present invention, the content of the modified polyphenylene ether resin in the insulating layer is reduced to 40 to 45%. The modified polyphenylene ether resin does not largely flow to the glass fiber base material due to heat, and the through conductor is 4 to 12 within a radius of 500 μm.
Since they are arranged so as to be distributed, the flow of the modified polyphenylene ether resin can be further suppressed by the anchor effect of the penetrating conductor, and as a result, the wiring conductor on the surface of the insulating layer may be deformed or moved, or There is no displacement between the conductor and the wiring conductor connected thereto, and a wiring board having excellent connection reliability without disconnection between the through conductor and the wiring conductor can be provided.

【0027】また、本発明の電子装置によれば、上記の
配線基板の表面に電子部品を実装するとともに、この電
子部品の電極を配線導体または貫通導体に電気的に接続
したことから、貫通導体とそれに接続される配線導体と
が確実に接合でき、その結果、貫通導体と配線導体との
断線等のない接続信頼性に優れた電子装置とすることが
できる。
According to the electronic device of the present invention, since the electronic component is mounted on the surface of the wiring board and the electrode of the electronic component is electrically connected to the wiring conductor or the through conductor, the through conductor is formed. And the wiring conductor connected to the wiring conductor can be reliably joined, and as a result, an electronic device having excellent connection reliability without disconnection between the through conductor and the wiring conductor can be provided.

【0028】[0028]

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の配線基板に半導体素子等の電子部品を
搭載して成る電子装置の実施の形態の一例を示す断面図
である。
FIG. 1 is a cross-sectional view showing an example of an embodiment of an electronic device in which an electronic component such as a semiconductor element is mounted on a wiring board of the present invention.

【図2】本発明の配線基板の絶縁層に形成された貫通導
体の分布状態の一例を示す平面図である。
FIG. 2 is a plan view showing an example of a distribution state of through conductors formed in an insulating layer of the wiring board of the present invention.

【符号の説明】[Explanation of symbols]

1・・・・・・絶縁層 2・・・・・・配線導体 3・・・・・・貫通孔 4・・・・・・貫通導体 5・・・・・・配線基板 6・・・・・・電子部品 1 ... Insulating layer 2 ... Wiring conductor 3 ... through holes 4 ... Penetration conductor 5 ··· Wiring board 6 ... Electronic parts

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ガラス繊維基材に変性ポリフェニレンエ
ーテル樹脂を含浸させた絶縁層と金属箔から成る配線導
体とを交互に複数層積層するとともに、前記絶縁層を挟
んで上下に位置する前記配線導体同士を前記絶縁層に設
けた貫通孔を導体で充填して成る貫通導体により電気的
に接続して成る配線基板において、前記絶縁層は前記変
性ポリフェニレンエーテル樹脂の含有量が40〜45重
量%であり、前記貫通導体は半径500μm以内の範囲
に4〜12個分布するように配設されていることを特徴
とする配線基板。
1. A wiring conductor, wherein a plurality of insulating layers made of a glass fiber base material impregnated with a modified polyphenylene ether resin and a wiring conductor made of a metal foil are alternately laminated, and the wiring conductors are positioned above and below the insulating layer. In a wiring board which is electrically connected to each other by a through conductor formed by filling a through hole provided in the insulating layer with a conductor, the insulating layer has a modified polyphenylene ether resin content of 40 to 45% by weight. The wiring board is characterized in that 4 to 12 of the through conductors are arranged in a range of a radius of 500 μm or less.
【請求項2】 請求項1記載の配線基板の表面に電子部
品を実装するとともに、該電子部品の電極を前記配線導
体または前記貫通導体に電気的に接続して成ることを特
徴とする電子装置。
2. An electronic device in which an electronic component is mounted on the surface of the wiring board according to claim 1, and an electrode of the electronic component is electrically connected to the wiring conductor or the through conductor. .
JP2001365687A 2001-11-30 2001-11-30 WIRING BOARD AND ELECTRONIC DEVICE USING THE SAME Expired - Fee Related JP3924453B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001365687A JP3924453B2 (en) 2001-11-30 2001-11-30 WIRING BOARD AND ELECTRONIC DEVICE USING THE SAME

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001365687A JP3924453B2 (en) 2001-11-30 2001-11-30 WIRING BOARD AND ELECTRONIC DEVICE USING THE SAME

Publications (2)

Publication Number Publication Date
JP2003168872A true JP2003168872A (en) 2003-06-13
JP3924453B2 JP3924453B2 (en) 2007-06-06

Family

ID=19175679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001365687A Expired - Fee Related JP3924453B2 (en) 2001-11-30 2001-11-30 WIRING BOARD AND ELECTRONIC DEVICE USING THE SAME

Country Status (1)

Country Link
JP (1) JP3924453B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014168005A (en) * 2013-02-28 2014-09-11 Kyocer Slc Technologies Corp Wiring board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014168005A (en) * 2013-02-28 2014-09-11 Kyocer Slc Technologies Corp Wiring board

Also Published As

Publication number Publication date
JP3924453B2 (en) 2007-06-06

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