JP2003158361A - Method of examining insulation reliability of printed wiring board - Google Patents

Method of examining insulation reliability of printed wiring board

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Publication number
JP2003158361A
JP2003158361A JP2001354823A JP2001354823A JP2003158361A JP 2003158361 A JP2003158361 A JP 2003158361A JP 2001354823 A JP2001354823 A JP 2001354823A JP 2001354823 A JP2001354823 A JP 2001354823A JP 2003158361 A JP2003158361 A JP 2003158361A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
hole
copper foil
layer circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001354823A
Other languages
Japanese (ja)
Other versions
JP3997762B2 (en
Inventor
Mitsuru Yamanaka
充 山中
Hiroji Yokosuka
洋児 横須賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP2001354823A priority Critical patent/JP3997762B2/en
Publication of JP2003158361A publication Critical patent/JP2003158361A/en
Application granted granted Critical
Publication of JP3997762B2 publication Critical patent/JP3997762B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a method of examining the insulation reliability of printed wiring board capable of easily evaluating in a short time without breaking any insulation materials a decrease in the insulation reliability caused by ion migration in a printed wiring board which has been mounted with high density. SOLUTION: The method of examining the insulation reliability of printed wiring board has a comparison step of comparing insulation resistance values. The resistance values include a value that is measured at a high temperature in a case where a through hole of the printed wiring board is a positive electrode and an inner-layer circuit copper foil is a negative electrode, and a value that is measured at a high temperature in a case where the through hole is a negative electrode and the inner-layer circuit copper foil is a positive electrode.

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、プリント配線板の
絶縁信頼性試験方法に関する。 【0002】 【従来の技術】プリント配線板では、回路を構成する銅
が電気化学的にイオン化して絶縁材料中に溶出し、導電
性のパスを形成する現象が発生する。この現象はイオン
マイグレーションと呼ばれ、回路間の絶縁抵抗が低下
し、最終的には短絡事故を引き起こすこととなる。イオ
ンマイグレーションの程度は絶縁材料によって異なり、
また、イオン性残渣等のプロセス汚染によって促進され
る。 【0003】プリント配線板においては、電子機器の高
機能化、軽薄短小化のニーズに従って、回路の細線化と
狭間隔化とが進行しており、イオンマイグレーションに
よる絶縁信頼性の低下が重大な問題となってきた。 【0004】イオンマイグレーションによる絶縁信頼性
低下を評価する方法として、高温高湿中でプリント配線
板の回路間に直流電圧を印加し、一定時間ごとに絶縁抵
抗値を測定する方法が特開平1−259591号公報に
記載されている。また、直流電圧を印加したプリント配
線板の回路間を、光学顕微鏡や走査型電子顕微鏡を用い
て観察する方法が知られている。 【0005】 【発明が解決しようとする課題】回路間の絶縁抵抗値を
測定する方法では、イオンマイグレーションが進行し、
絶縁抵抗値の変化が検出されるまでに長時間を要する。 【0006】光学顕微鏡、走査型電子顕微鏡を用いて観
察する方法では、イオンマイグレーションの進行の初期
段階を検出することが可能であるが、不透明な絶縁材料
の内部、或いは裏面側でイオンマイグレーションが進行
しているような場合には、試料を破壊しなければ、イオ
ンマイグレーションを検出することができない。 【0007】本発明は、プリント配線板のイオンマイグ
レーションによる絶縁信頼性低下を短時間に、容易に評
価することができるプリント配線板の絶縁信頼性試験方
法を提供するものである。 【0008】 【課題を解決するための手段】本発明は、スルーホール
形成に用いられる無電解銅めっきによる銅被膜が、回路
形成に用いられる電解銅箔よりも、イオン化しやすいこ
とに基づく。すなわち、本発明は、内層回路銅箔に接続
されていない孔内が無電解銅めっきされたスルーホール
と内層回路銅箔の絶縁信頼性試験方法において、スルー
ホールをプラス極、内層回路銅箔をマイナス極として高
温で測定した絶縁抵抗値と、スルーホールをマイナス
極、内層回路銅箔をプラス極として高温で測定した絶縁
抵抗値とを比較することを特徴とするプリント配線板の
絶縁信頼性試験方法に関する。 【0009】 【発明の実施の形態】以下に本発明の実施の形態を図面
と実施例を用いて説明する。 【0010】図1は、本発明によるプリント配線板用の
試験方法の一例を示す模式図である。また、図2は、プ
リント配線板の断面の模式図である。プリント配線板1
を恒温槽2の中に配置し、絶縁抵抗計3のプラス極を内
層回路銅箔に接続されていない孔内が無電解銅めっきさ
れたスルーホール4に接続する。また、内層回路銅箔に
接続されている孔内が無電解銅めっきされたスルーホー
ル5には、マイナス極を接続する。恒温槽2の温度を上
昇させ、50、100、150、200℃の雰囲気に各
々30分放置した後、DC100Vを印加して、各温度
雰囲気での絶縁抵抗を測定する。測定が終了した後に、
絶縁抵抗計の極性を変えて、同様な温度雰囲気で絶縁抵
抗値を測定する。なお、試験片は、全測定を通して同一
のものを使用する。なお、7は絶縁材料、8は絶縁間隔
である。 【0011】図3に、スルーホール4をプラス極とした
場合の、スルーホール4と内層回路銅箔6間の模式図を
示す。スルーホール4の無電解銅めっきによる銅被膜
と、内層回路銅箔6の電解銅箔とで、銅がイオン化され
る傾向が同等であれば、絶縁抵抗値と温度の関係は、ス
ルーホール4をプラス極、内層回路銅箔6をマイナス極
とした場合と、スルーホール4をマイナス極、内層回路
銅箔6をプラス極とした場合とで類似の挙動を示す。し
かしながら、スルーホール4の無電解銅めっきによる銅
被膜は、内層回路銅箔6の電解銅箔よりもイオン化され
やすいため、高温においてプラスの電圧が印加されると
イオン化し、内層回路銅箔6側に移行するため、リーク
電流が流れ、絶縁抵抗値が低下することとなる。一方、
スルーホール4にマイナスの電圧が印加された場合に
は、スルーホール4におけるイオン化は発生せず、絶縁
抵抗値も低下しない。したがって、絶縁抵抗値の低下を
検出することにより、銅のイオン化とそれにともなうイ
オンマイグレーションの発生を検出することができる。
絶縁抵抗値の測定は、好ましくは50〜200℃の温度
範囲で、50℃間隔で行うことが好ましい。また、絶縁
間隔8は50〜600μmに設定することが好ましい。
スルーホール4をプラス極とした場合の測定値に比べ、
スルーホール4をマイナス極とした場合の測定値を比較
して低下する場合はイオンマイグレーションが発生しや
すいと判断される。特に、高温(好ましくは180℃か
ら220℃)でスルーホール4をプラス極とした場合の
抵抗値が逆転し低下する場合、また、高温でスルーホー
ル4をプラス極とした場合、あるいはマイナス極とした
場合の抵抗値が極端に低下する場合にイオンマイグレー
ションが発生しやすくなる。 【0012】 【実施例】以下、本発明の実施例及びその比較例によっ
て本発明を更に具体的に説明するが、本発明はこれらの
実施例に限定されるものではない。絶縁材料Aと絶縁材
料Bを用いて、内層回路とスルーホールとを有する多層
プリント配線板A及び多層プリント配線板Bを製造し
た。各々の試験片を恒温槽内に配置し、上記の条件で絶
縁抵抗値を測定した。測定には5時間を要した。結果を
図4と図5に示した。なお、試験片のスルーホールの径
はφ0.1mm、高さ(板厚)は1.6mm、回路銅箔
の厚さは35μm、絶縁間隔(クリアランス)は250
μmに設定したものを用いた。 【0013】絶縁材料Aを用いた多層プリント配線板A
では、100℃以上になると、スルーホールをプラス極
にして測定した絶縁抵抗値が、スルーホールをマイナス
極として測定した絶縁抵抗値に比べて低下した。一方、
絶縁材料Bを用いた多層プリント配線板Bでは、スルー
ホールをプラス極としても、マイナス極としても、絶縁
抵抗値の同様な傾向を示した。このことから、絶縁材料
Aでは、絶縁材料Bに比べて銅がイオン化されやすく、
イオンマイグレーションが発生しやすいことが分かっ
た。 【0014】図6は、一般的に行われる高温高湿試験
(85℃/85%RH、DC100V)を行った場合の
絶縁抵抗の変化を示したものである。絶縁材料Bは40
0時間以上経過しても絶縁性が低下しなかったが、絶縁
材料Aでは、60時間後に絶縁性が低下し、短絡に至っ
た。 【0015】 【発明の効果】以上の説明から理解される如く、本発明
の評価方法によれば、プリント配線板の導体間に於ける
絶縁抵抗値を高温高湿中で直流電圧を印加しつつ、一定
時間毎に絶縁抵抗値を測定する方法よりも、イオンマイ
グレーションの発生を短時間で検出できる。また不透明
な絶縁材料の内部、或いは裏面側にイオンマイグレーシ
ョンが発生していても、絶縁材料を破壊することなく、
これを的確に検出することができ、本発明は今後一層の
高密度実装化が図られるであろうプリント配線板におけ
るイオンマイグレーションの発生の可能性評価に大きく
寄与することができる。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for testing insulation reliability of a printed wiring board. 2. Description of the Related Art In a printed wiring board, a phenomenon occurs in which copper constituting a circuit is electrochemically ionized and eluted into an insulating material to form a conductive path. This phenomenon is called ion migration, which lowers the insulation resistance between circuits and eventually causes a short circuit accident. The degree of ion migration depends on the insulating material,
It is also promoted by process contamination such as ionic residues. [0003] In printed wiring boards, thinning and narrowing of circuits have been progressing in accordance with the need for higher functionality, lighter and thinner electronic devices, and a serious problem is that insulation reliability is reduced by ion migration. It has become. As a method for evaluating a decrease in insulation reliability due to ion migration, a method in which a DC voltage is applied between circuits of a printed wiring board in a high-temperature and high-humidity state and an insulation resistance value is measured at regular time intervals is disclosed in Japanese Patent Application Laid-Open No. HEI 1-1990. No. 259591. In addition, a method of observing between circuits of a printed wiring board to which a DC voltage is applied by using an optical microscope or a scanning electron microscope is known. In the method for measuring the insulation resistance between circuits, ion migration proceeds,
It takes a long time until a change in the insulation resistance value is detected. In the method of observation using an optical microscope or a scanning electron microscope, it is possible to detect the initial stage of the progress of ion migration, but the ion migration proceeds inside the opaque insulating material or on the back side. In such a case, the ion migration cannot be detected unless the sample is destroyed. An object of the present invention is to provide a method for testing insulation reliability of a printed wiring board, which can easily and easily evaluate a decrease in insulation reliability due to ion migration of the printed wiring board in a short time. [0008] The present invention is based on the fact that a copper film formed by electroless copper plating used for forming a through hole is more easily ionized than an electrolytic copper foil used for forming a circuit. That is, the present invention provides a method for testing the insulation reliability of an inner layer circuit copper foil and a through hole in which a hole not connected to the inner layer circuit copper foil is electrolessly plated with copper. Insulation reliability test for printed wiring boards, which compares the insulation resistance measured at high temperature as a negative pole with the insulation resistance measured at high temperature using a through-hole as a negative pole and the inner layer circuit copper foil as a positive pole. About the method. Embodiments of the present invention will be described below with reference to the drawings and examples. FIG. 1 is a schematic view showing an example of a test method for a printed wiring board according to the present invention. FIG. 2 is a schematic diagram of a cross section of the printed wiring board. Printed wiring board 1
Is placed in the thermostat 2 and the positive electrode of the insulation resistance meter 3 is connected to the through hole 4 in which the hole not connected to the inner layer circuit copper foil is plated with electroless copper. Further, a negative electrode is connected to the through hole 5 in which the inside of the hole connected to the inner layer circuit copper foil is plated with electroless copper. After raising the temperature of the thermostatic chamber 2 and leaving each to stand in the atmosphere of 50, 100, 150, and 200 degreeC for 30 minutes, 100V DC is applied and the insulation resistance in each temperature atmosphere is measured. After the measurement is completed,
Change the polarity of the insulation resistance meter and measure the insulation resistance value in the same temperature atmosphere. The same test piece is used throughout all measurements. Note that 7 is an insulating material, and 8 is an insulating interval. FIG. 3 shows a schematic diagram between the through hole 4 and the inner layer circuit copper foil 6 when the through hole 4 is a positive electrode. If the tendency of copper to be ionized is the same between the copper film formed by electroless copper plating of the through hole 4 and the electrolytic copper foil of the inner layer circuit copper foil 6, the relationship between the insulation resistance value and the temperature is as follows. Similar behavior is exhibited when the positive electrode and the inner layer circuit copper foil 6 are negative electrodes, and when the through hole 4 is a negative electrode and the inner layer circuit copper foil 6 is positive electrode. However, since the copper film formed by electroless copper plating of the through hole 4 is more easily ionized than the electrolytic copper foil of the inner layer circuit copper foil 6, when a positive voltage is applied at a high temperature, it ionizes and the inner layer circuit copper foil 6 side , A leak current flows, and the insulation resistance value decreases. on the other hand,
When a negative voltage is applied to the through hole 4, no ionization occurs in the through hole 4, and the insulation resistance value does not decrease. Therefore, by detecting a decrease in the insulation resistance value, it is possible to detect the ionization of copper and the occurrence of ion migration accompanying the ionization.
The measurement of the insulation resistance value is preferably performed at a temperature range of 50 to 200 ° C. and at 50 ° C. intervals. Further, the insulating interval 8 is preferably set to 50 to 600 μm.
Compared to the measured value when the through hole 4 is a positive pole,
If the measured value is lower than the measured value when the through hole 4 is a negative pole, it is determined that ion migration is likely to occur. In particular, when the resistance value of the through-hole 4 becomes a positive pole at a high temperature (preferably 180 ° C. to 220 ° C.), the resistance reverses and decreases. In the case where the resistance value is extremely lowered in this case, ion migration is likely to occur. EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples of the present invention and comparative examples thereof, but the present invention is not limited to these examples. Using the insulating material A and the insulating material B, a multilayer printed wiring board A and a multilayer printed wiring board B having an inner layer circuit and a through hole were manufactured. Each test piece was placed in a thermostat and the insulation resistance was measured under the above conditions. The measurement took 5 hours. The results are shown in FIGS. The diameter of the through hole of the test piece was φ0.1 mm, the height (plate thickness) was 1.6 mm, the thickness of the circuit copper foil was 35 μm, and the insulation interval (clearance) was 250.
The one set to μm was used. A multilayer printed wiring board A using an insulating material A
When the temperature reached 100 ° C. or higher, the insulation resistance measured with the through-hole as the positive electrode was lower than the insulation resistance measured with the through-hole as the negative electrode. on the other hand,
In the multilayer printed wiring board B using the insulating material B, the same tendency of the insulation resistance value was exhibited regardless of whether the through hole was a positive electrode or a negative electrode. From this, in the insulating material A, copper is more easily ionized than in the insulating material B,
It was found that ion migration easily occurred. FIG. 6 shows a change in insulation resistance when a commonly performed high-temperature and high-humidity test (85 ° C./85% RH, DC 100 V) is performed. Insulation material B is 40
Although the insulating property did not decrease even after the elapse of 0 hour or more, in the case of the insulating material A, the insulating property decreased after 60 hours, resulting in a short circuit. As can be understood from the above description, according to the evaluation method of the present invention, the insulation resistance between the conductors of the printed wiring board can be determined while applying a DC voltage at high temperature and high humidity. In addition, the occurrence of ion migration can be detected in a shorter time than the method of measuring the insulation resistance value at regular intervals. Also, even if ion migration occurs inside the opaque insulating material or on the back side, without destroying the insulating material,
This can be accurately detected, and the present invention can greatly contribute to the evaluation of the possibility of occurrence of ion migration in a printed wiring board, which will be further densely mounted in the future.

【図面の簡単な説明】 【図1】本発明によるプリント配線板の試験方法の一例
を示す模式図である。 【図2】プリント配線板の断面構造模式図である。 【図3】スルーホールをプラスに印加した場合の絶縁間
隙拡大模式図である。 【図4】本発明によるプリント配線板、絶縁材料Aの場
合の高温絶縁抵抗の変化を示したグラフである。 【図5】本発明によるプリント配線板、絶縁材料Bの場
合の高温絶縁抵抗の変化を示したグラフである。 【図6】一般的な高温高湿試験(85℃/85%RH、
DC100V印加)を行った時の絶縁材料A、Bの絶縁
抵抗の変化を示したグラフである。 【符号の説明】 1 プリント配線板 2 恒温槽 3 絶縁抵抗計 4 スルーホール 5 内層回路銅箔と接続されているスルーホール 6 内層回路銅箔 7 絶縁材料 8 絶縁間隔(クリアランス)
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing an example of a method for testing a printed wiring board according to the present invention. FIG. 2 is a schematic sectional view of a printed wiring board. FIG. 3 is an enlarged schematic diagram of an insulating gap when a through hole is applied in a positive direction. FIG. 4 is a graph showing a change in high-temperature insulation resistance in the case of a printed wiring board and an insulating material A according to the present invention. FIG. 5 is a graph showing a change in high-temperature insulation resistance in the case of a printed wiring board and an insulating material B according to the present invention. FIG. 6 shows a general high temperature and high humidity test (85 ° C./85% RH,
5 is a graph showing a change in insulation resistance of insulating materials A and B when DC 100 V is applied). [Description of Signs] 1 Printed wiring board 2 Constant temperature bath 3 Insulation resistance meter 4 Through hole 5 Through hole connected to inner layer circuit copper foil 6 Inner layer circuit copper foil 7 Insulating material 8 Insulation interval (clearance)

Claims (1)

【特許請求の範囲】 【請求項1】 内層回路銅箔に接続されていない孔内が
無電解銅めっきされたスルーホールと内層回路銅箔の絶
縁信頼性試験方法において、スルーホールをプラス極、
内層回路銅箔をマイナス極として高温で測定した絶縁抵
抗値と、スルーホールをマイナス極、内層回路銅箔をプ
ラス極として高温で測定した絶縁抵抗値とを比較するこ
とを特徴とするプリント配線板の絶縁信頼性試験方法。
Claims: 1. A method for testing the insulation reliability of an inner layer circuit copper foil and a through hole in which a hole not connected to the inner layer circuit copper foil is electrolessly plated with a positive electrode,
Printed wiring board characterized by comparing the insulation resistance measured at high temperature with the inner layer circuit copper foil as the negative pole and the insulation resistance measured at high temperature with the through hole as the negative pole and the inner layer circuit copper foil as the positive pole Insulation reliability test method.
JP2001354823A 2001-11-20 2001-11-20 Insulation reliability test method for printed wiring boards Expired - Lifetime JP3997762B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001354823A JP3997762B2 (en) 2001-11-20 2001-11-20 Insulation reliability test method for printed wiring boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001354823A JP3997762B2 (en) 2001-11-20 2001-11-20 Insulation reliability test method for printed wiring boards

Publications (2)

Publication Number Publication Date
JP2003158361A true JP2003158361A (en) 2003-05-30
JP3997762B2 JP3997762B2 (en) 2007-10-24

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Country Status (1)

Country Link
JP (1) JP3997762B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008203077A (en) * 2007-02-20 2008-09-04 Micro Craft Kk Circuit inspection device and method
JP2018185241A (en) * 2017-04-27 2018-11-22 三菱電機株式会社 Insulation deterioration diagnosis system
CN113660773A (en) * 2021-07-14 2021-11-16 深圳市景旺电子股份有限公司 Reliability test board and manufacturing method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008203077A (en) * 2007-02-20 2008-09-04 Micro Craft Kk Circuit inspection device and method
JP2018185241A (en) * 2017-04-27 2018-11-22 三菱電機株式会社 Insulation deterioration diagnosis system
JP6991649B2 (en) 2017-04-27 2022-01-12 三菱電機株式会社 Insulation deterioration diagnostic sensor
CN113660773A (en) * 2021-07-14 2021-11-16 深圳市景旺电子股份有限公司 Reliability test board and manufacturing method thereof
CN113660773B (en) * 2021-07-14 2022-10-21 深圳市景旺电子股份有限公司 Reliability test board and manufacturing method thereof

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