JP2003152084A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can reduce loss of a signal caused by a pad of a semiconductor substrate. SOLUTION: The semiconductor device 100 is equipped with the pad 112 formed on the semiconductor substrate 110, an FET 114 which receives a signal inputted to the pad 112, a capacitor 116 which is inserted between the pad 110 and FET 114, and a switching element 122 which is connected in parallel to the capacitor 116. For a test, the switching element 122 is turned on, and the pad 112 and the gate of the FET 114 are short-circuited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device connected to another circuit.

[0002]

2. Description of the Related Art If various devices as a whole can be formed on a single semiconductor substrate, there are various advantages such as facilitation of manufacturing. However, some actual circuits are suitable for semiconductorization. There are circuits that are not available or circuits that cannot be semiconductorized. Therefore, in addition to one or a plurality of semiconductor devices configured by using a semiconductor substrate, many external parts are required. For example, in the case of a receiver, a high-frequency circuit including a tuning circuit using a capacitor and a coil is prepared as a separate component, and all or part of the circuit at the subsequent stage is formed as a semiconductor device on a semiconductor substrate. Wired on the printed circuit board.

Generally, when connecting the circuit of the preceding stage and the semiconductor device of the succeeding stage in this way, a pad formed on a semiconductor substrate is used. FIG. 2 is a diagram showing a conventional connection state between a semiconductor device and another circuit. Semiconductor substrate 2
00 has a pad 202 formed thereon.
A high frequency circuit 210 is connected to 02 via a capacitor 212.

[0004]

By the way, as described above, the high frequency circuit 210 as an external component to the semiconductor device.
A capacitor 212 for the purpose of impedance matching, DC component removal, and the like is normally used to connect the two. However, when the capacitance of the pad 202 exists, the capacitance of the capacitor 212 and the capacitance of the pad 202 are However, there is a problem that a part of the input signal is lost due to the serial connection. For example, the capacitance of the pad 202 is
Considering a general area of the pad 202 and the like, it is about 3 pF. On the other hand, if an external capacitor 212 having, for example, a capacitance of 1 pF is used, a part of the signal output from the high frequency circuit 210 is bypassed via the capacitor formed by the pad 202. , Will be a loss.

The present invention was created in view of the above points, and an object of the present invention is to provide a semiconductor device capable of reducing signal loss occurring in a pad of a semiconductor substrate.

[0006]

In order to solve the above-mentioned problems, a semiconductor device of the present invention comprises a pad formed on a semiconductor substrate, an input element for receiving a signal input through the pad, and a pad. And an input element, and a short-circuit switching element connected in parallel with the capacitor. By forming the capacitors inside the pads of the semiconductor substrate, rather than outside,
It is possible to reduce the signal loss at the pad, which is caused by the voltage input from the circuit connected to the outside of the pad being divided by the external capacitor and the capacitor formed by the pad. Further, by providing a capacitor inside the pad, the input element and the pad are separated from each other in terms of direct current, which causes a problem that the state of the input element cannot be externally tested via the pad. This inconvenience can be avoided by short-circuiting the input element and the pad with the switching element connected in parallel with the capacitor.

Specifically, the above-mentioned input element is an FET, and it is desirable to connect a bias circuit for applying a predetermined bias voltage to the gate of this FET. When an FET is used as an input element, it is necessary to test whether or not a normal bias voltage necessary for operation is applied to the gate of this FET by a bias circuit. , It becomes possible to observe the gate voltage of the FET from the outside through the pad.

The switching element described above is an FE
It is controlled to the ON state when measuring the gate voltage of T,
It is desirable to have a short between the pad and the gate of the FET. By shorting the switching element only when measuring the gate voltage of the FET, except during the test,
It becomes possible to input a signal via a capacitor provided between the pad and the gate of the FET.

[0009]

DETAILED DESCRIPTION OF THE INVENTION A semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a configuration of a semiconductor device of one embodiment and a connection form with another circuit. Semiconductor device 1 shown in FIG.
00 is a pad 112 formed on the semiconductor substrate 110.
And an FE that receives a signal input to this pad 112
It has a T114 and a capacitor 116 inserted between the pad 110 and the FET 114.

The pad 112 is a terminal for connecting the semiconductor device 100 to an external circuit, and is connected to a high frequency circuit 150 such as a tuning circuit. FET 114
Is an input element that receives a signal input to the pad 112 from the high frequency circuit 150, and is connected to the bias circuit 120 that applies a bias voltage to the gate. The capacitor 116 is for impedance matching or for removing a direct current component, and in the present embodiment, the capacitor 116 which is connected to the outside of the pad 112 in the conventional configuration is provided at this position. In addition, a switching element 122 including, for example, an analog switch is connected in parallel to the capacitor 116. This switching element 122 is a FET that short-circuits both ends of the capacitor 116 if necessary.
The gate of 114 is directly connected to the pad 112.

The semiconductor device 100 of this embodiment has such a structure, and its operation will be described below. During normal operation, the signal output from the high frequency circuit 150 is input to the pad 112 and then to the gate of the FET 114 via the capacitor 116. FET 11
A bias voltage generated by a bias circuit 120 is applied to the gate of the FET No. 4, and the FET 114 operates in response to a signal input via the capacitor 116, and this input signal is transmitted to a circuit (not shown) in the subsequent stage. To do.

Incidentally, the semiconductor device 100 of the present embodiment.
Is a capacitor 1 between the pad 112 and the FET 114.
16 is inserted, the pad 112 and the high frequency circuit 15
No capacitor is provided between 0 and 0. Therefore, the signal input from the high frequency circuit 150 is not
It is possible to reduce the loss of the signal that is input to the gate of the FET 114 through only the capacitor 116 without being divided by the capacitor 130 formed by 12 and is generated at the pad 112.

In particular, the capacitor 130 formed by the pad 112 is only connected in parallel with the impedance element (resistor, capacitor, coil) in the high frequency circuit 150, and the external capacitor and pad 112 are conventionally used. The loss of the input signal can be significantly reduced compared to the case where the signal is divided by connecting the capacitor 130 formed by the above in series.

Further, the semiconductor device 100 of this embodiment is
Since the capacitor 116 is inserted between the FET 114 and the pad 112, a normal bias voltage is applied to the gate of the FET 114 even if the voltage of the pad 112 is measured in the product inspection in the manufacturing process or the investigation at the occurrence of a defect. It is not possible to know whether it is being applied. The switching element 122 is used for the FET 11 during such inspection and investigation.
When the gate voltage of 4 is measured, it is controlled to the ON state. That is, the switching element 122 connected in parallel with the capacitor 116 is turned on and the capacitor 116 is turned on.
By short-circuiting both ends, that is, between the pad 112 and the gate of the FET 114, the voltage of the pad 112 can be measured to know whether or not the bias voltage is normally applied to the gate of the FET 114. Various methods are conceivable as a mechanism for controlling the switching element 122 to be in the ON state. For example, a test pad may be newly added and the switching element 122 may be turned on when a high-level signal is input to the test pad.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the present invention. For example, in the embodiment described above,
Although the FET 114 is considered as the input element, other elements such as a bipolar transistor may be used. Further, although the case where the high-frequency circuit 150 is connected to the pad 112 is shown as an example, other circuits may be connected.

[0016]

As described above, according to the present invention, by forming the capacitor on the inside of the pad of the semiconductor substrate, not on the outside, the signal input from the circuit connected to the outside of the pad is It is possible to reduce signal loss at the pad caused by voltage division between the external capacitor and the capacitor formed by the pad. Also, by providing a capacitor inside the pad,
Since the input element and the pad are galvanically separated, the state of the input element cannot be externally tested via the pad, but the switching element connected in parallel with the capacitor causes the input element to By shorting the pads, this inconvenience can be avoided.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a semiconductor device of one embodiment and a connection form with another circuit.

FIG. 2 is a diagram showing a conventional connection state of a semiconductor device and another circuit.

[Explanation of symbols]

100 semiconductor devices 110 Semiconductor substrate 112 pads 114 FET 116, 130 capacitors 120 bias circuit 122 switching element 150 high frequency circuits

Claims (3)

[Claims] 1. A pad formed on a semiconductor substrate, an input element for receiving a signal input through the pad, a capacitor inserted between the pad and the input element, and a capacitor in parallel with the capacitor. A semiconductor device comprising: a short-circuit switching element connected thereto. 2. The semiconductor device according to claim 1, wherein the input element is a FET, and a bias circuit for applying a predetermined bias voltage is connected to the gate of the FET. 3. The switching element according to claim 1 or 2, wherein the switching element is controlled to be in an ON state when measuring a gate voltage of the FET, and the pad and the F
A semiconductor device characterized by short-circuiting with the gate of ET.