WO2003043087A1

WO2003043087A1 - Semiconductor device

Info

Publication number: WO2003043087A1
Application number: PCT/JP2002/011761
Authority: WO
Inventors: Hiroshi Miyagi
Original assignee: Niigata Seimitsu Co., Ltd.
Priority date: 2001-11-13
Filing date: 2002-11-12
Publication date: 2003-05-22
Also published as: JP2003152084A

Abstract

A semiconductor device capable of reducing the signal loss caused in a pad of a semiconductor substrate. The semiconductor substrate (100) includes a pad (112) formed on a semiconductor substrate (110), an FET (114) for receiving the signal input to this pad (112), a capacitor (116) inserted between the pad (110) and the FET (114), and a switching element (122) connected in parallel to the capacitor (116). During a test, the switching element (122) is turned on to shortcircuit between the pad (112) and the gate of FET (114).

Description

Description Semiconductor device technical field

The present invention relates to a semiconductor device connected to another circuit. Background art

If various devices can be formed on a single semiconductor substrate, there are various advantages such as simplicity of manufacturing, but actual circuits include circuits that are suitable for semiconductorization and circuits or semiconductors that are not suitable. There are circuits that cannot be changed. Therefore, in addition to one or more semiconductor devices configured using a semiconductor substrate, many external components are required. For example, in the case of a receiver, a high-frequency circuit including a tuning circuit using a capacitor or a coil is prepared as a separate component, and all or a part of a subsequent circuit is formed as a semiconductor device on a semiconductor substrate. These are connected on a printed circuit board. In general, when connecting a circuit in a preceding stage and a semiconductor device in a subsequent stage in this way, a pad formed on a semiconductor substrate is used.

FIG. 2 is a diagram showing a conventional connection state between a semiconductor device and another circuit. A pad 202 is formed on the semiconductor substrate 200, and a high-frequency circuit 210 is connected to the pad 202 via a capacitor 212.

By the way, when the high-frequency circuit 210 as an external component is connected to the semiconductor device as described above, a capacitor 212 for the purpose of impedance matching or DC component removal is usually used. If the capacitance of 0 2 exists, the capacitance of the capacitor 2 12 and the capacitance of the pad 2 2 are connected in series, causing a problem that a part of the input signal is lost. there were. For example, the capacitance of the pad 202 is about 3 pF in consideration of the general area of the pad 202 and the like. On the other hand, assuming that an external capacitor with a capacitance of 1 pF is used as the external capacitor 2 1 2, part of the signal output from the high-frequency circuit 2 10 Bypassed through the formed capacitor, resulting in loss. Disclosure of the invention

The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device capable of reducing a signal loss generated at a pad of a semiconductor substrate.

A semiconductor device according to the present invention includes a pad, an input element that receives a signal input through the pad, a capacitor inserted between the pad and the input element, a short-circuit switching element connected in parallel with the capacitor, These pads, input elements, capacitors, and switching elements are formed on a semiconductor substrate. By forming the capacitor inside the pad of the semiconductor substrate instead of outside, the signal input from the circuit connected outside this pad is divided between the external capacitor and the capacitor formed by the pad. Signal loss at the pad caused by the pressure can be reduced. Also, by providing a capacitor inside the pad, the input element and the pad are separated from each other in a DC manner, so that the state of the input element cannot be tested externally via the pad. This inconvenience can be avoided by short-circuiting between the input element and the pad with the switching element connected in parallel to the capacitor.

Specifically, the above-mentioned input element is FET, and it is desirable to connect a bias circuit for applying a predetermined bias voltage to the gate of FET. When using an FET as an input element, it is necessary to test whether a normal bias voltage required for operation is applied to the gate of this FET by a bias circuit.However, it is necessary to short-circuit the switching element. This makes it possible to externally observe the FET gate voltage through the pad.

Further, it is desirable that the above-described switching element is controlled to be in an on state when measuring the gate voltage of the FET, and short-circuits between the pad and the gate of the FET. By short-circuiting the switching element only when measuring the gate voltage of the FET, signals can be input via a capacitor provided between the pad and the gate of the FET except during testing. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a diagram illustrating a configuration of a semiconductor device according to an embodiment and a connection form between the semiconductor device and another circuit. FIG. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram illustrating a configuration of a semiconductor device according to an embodiment and a connection form with another circuit. The semiconductor device 100 shown in FIG. 1 includes a pad 112 formed on a semiconductor substrate 110, an FET 114 for receiving a signal input to the pad 112, and a pad 110 between the pad 110 and the FET 114. And a capacitor 116 inserted in the capacitor. The pad 112 is a terminal for connecting the semiconductor device 100 to an external circuit. For example, the pad 112 is connected to a high-frequency circuit 150 such as a tuning circuit. The FET 114 is an input element that receives a signal input from the high-frequency circuit 150 to the pad 112, and is connected to a bias circuit 120 that applies a bias voltage to the gate. The capacitor 116 is used for impedance matching or for removing a DC component. In the case of the conventional configuration, a capacitor connected to the outside of the pad 112 is provided at this position in the present embodiment. Further, a switching element 122 composed of, for example, an analog switch is connected in parallel to the capacitor 116. The switching element 122 is for connecting the gate of the FET 114 directly to the pad 112 by short-circuiting both ends of the capacitor 116 as necessary.

The semiconductor device 100 of the present embodiment has such a configuration, and the operation will be described next.

During normal operation, a signal output from the high-frequency circuit 150 is input to the pad 112 and then to the gate of the FET 114 via the capacitor 116. The bias voltage generated by the bias circuit 120 is applied to the gate of the FET 114, and the FET 114 operates according to the signal input via the capacitor 116. To a circuit (not shown).

By the way, the semiconductor device 100 of the present embodiment includes a pad 112 and a FET 114. A capacitor 1 16 is inserted between the two, and no capacitor is provided between the pad 1 12 and the high-frequency circuit 150. Therefore, the signal input from the high-frequency circuit 150 is not divided by the capacitor 130 formed by the pad 112, but is input to the gate of the FET 114 only through the capacitor 116. Therefore, it is possible to reduce signal loss caused by the pads 112.

In particular, the capacitor 130 formed by the pad 1 12 is simply connected in parallel with the impedance element (resistance, capacitor, coil) in the high-frequency circuit 150. The loss of the input signal can be greatly reduced as compared with the case where the signal is divided by connecting the capacitor 130 formed by the capacitor and the pad 112 in series.

Further, in the semiconductor device 100 of the present embodiment, since the capacitor 116 is inserted between the FET 114 and the pad 112, the semiconductor device 100 can be used for product inspection in the manufacturing process and investigation at the time of occurrence of a defect. Even if the voltage of the pad 112 is measured, it cannot be determined whether the normal bias voltage is applied to the gate of the FET 114. The switching element 122 is turned on when measuring the gate voltage of the FET 114 during such inspection or inspection. That is, switching element 122 connected in parallel with capacitor 116 is turned on to short-circuit both ends of capacitor 116, that is, between pad 112 and the gate of FET 114. By measuring the voltage of the pad 112, it is possible to know whether or not the bias voltage is normally applied to the gate of the FET 114. Various methods are conceivable for a mechanism for controlling the switching elements 122 to be in the ON state. For example, a new test pad may be added, and when a high-level signal is input to the test pad, the switching elements 122 may be switched to the ON state.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the present invention. For example, in the above embodiment, the FET 114 is considered as the input element, but another element such as a bipolar transistor may be used. Further, the case where the high-frequency circuit 150 is connected to the pad 112 is shown as an example, but another circuit may be connected. Industrial applicability

As described above, according to the present invention, by forming a capacitor on the inside of a pad of a semiconductor substrate instead of on the outside, a signal input from a circuit connected to the outside of the pad can be externally connected. Signal loss at the pad caused by voltage division between the capacitor and the capacitor formed by the pad can be reduced. In addition, by providing a capacitor inside the pad, the input element and the pad are separated directly, so that the state of the input element cannot be tested from the outside via the pad. This inconvenience can be avoided by short-circuiting between the input element and the pad with a switching element connected in parallel to the capacitor.

Claims

The scope of the claims

1. Pad and

An input element for receiving a signal input through the pad;

A capacitor inserted between the pad and the input element;

A short-circuit switching element connected in parallel with the capacitor;

A semiconductor device, comprising: the pad, the input element, the capacitor, and the switching element formed on the semiconductor substrate.

2. The semiconductor device according to claim 1, wherein said input element is FET, and a bias circuit for applying a predetermined bias voltage is connected to a gate of said FET.

3. The switching device according to claim 1, wherein the switching element is controlled to be in an on state when measuring a gate voltage of the FET, and short-circuits the pad and the gate of the FET. Semiconductor device.