JP2003151930A - Semiconductor wafer protecting sheet - Google Patents

Semiconductor wafer protecting sheet

Info

Publication number
JP2003151930A
JP2003151930A JP2001344285A JP2001344285A JP2003151930A JP 2003151930 A JP2003151930 A JP 2003151930A JP 2001344285 A JP2001344285 A JP 2001344285A JP 2001344285 A JP2001344285 A JP 2001344285A JP 2003151930 A JP2003151930 A JP 2003151930A
Authority
JP
Japan
Prior art keywords
wafer
semiconductor wafer
support
adhesive layer
base material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001344285A
Other languages
Japanese (ja)
Inventor
Masanobu Kutsumi
正信 九津見
Hiroyuki Uchida
弘之 内田
Tomomichi Takatsu
知道 高津
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Kagaku Co Ltd
Original Assignee
Toyo Kagaku Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Kagaku Co Ltd filed Critical Toyo Kagaku Co Ltd
Priority to JP2001344285A priority Critical patent/JP2003151930A/en
Publication of JP2003151930A publication Critical patent/JP2003151930A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding

Abstract

PROBLEM TO BE SOLVED: To overcome the problems wherein a uniform thickness cannot be obtained, when a semiconductor wafer is polished until it becomes extremely thin, and that the semiconductor wafer is damaged when polishing, transferring, or peeling of the semiconductor wafer. SOLUTION: This semiconductor wafer protecting sheet includes a sheet-like support 1, an adhesive layer 2 for bonding a base material, which is laminated on the support 1, a base material 3 laminated on the adhesive layer 2 for bonding a base material and an adhesive layer 4 for bonding a wafer, which is laminated on the base material 3. The support 1 has a modulus of elongation of 0.05-10 GPa and a thickness of 50-300 μm, and at least one of the peeling strength, when the support 1 is peeled from the base material 3 after wafer polishing and the peeling strength when the base material 3 is peeled from the wafer, is set at 1.0×10<-3> to 2.0 N/20 mm.

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、半導体ウエハ保護
用シートに係り、特に半導体ウエハを極薄まで研磨し、
搬送時の反りや割れを防止した半導体ウエハ保護用シー
トに関する。 【0002】 【従来の技術】半導体チップの製造に用いられるウエハ
にはシリコンウエハ、ガリウム−砒素等があり、中でも
シリコンウエハが多用されている。シリコンウエハは高
純度の単結晶シリコンを厚さ500〜1000μm程度
に薄くスライスすることにより製造されているが、近年
ICカード(インテクレーテッド サーキット カー
ド)の普及やスタックドCSP(チップ サイズ パッ
ケージ)の多層化により、さらなる薄肉化が望まれてい
る。従来は、厚さが350μm程度であった半導体ウエ
ハを100μm以下まで研磨することが必要とされてき
た。 【0003】従来、半導体ウエハの研磨には、軟質基材
上に粘着剤が塗布してある粘着シートが使用されていた
が、軟質基材を用いた粘着シートでは貼り付け時にかけ
る張力が残留応力として蓄積してしまうため、半導体ウ
エハを極薄にまで研磨すると、ウエハの強度よりも粘着
シートの残留応力が勝り、残留応力を解消しようとする
力によってウエハに反りが発生していた。また、研磨後
にはウエハが脆いため、軟質基材では搬送時にウエハが
破損してしまうことがあった。 【0004】この研磨時及びその後の搬送時の破損を防
止するため、薄膜ウエハや大口径ウエハの保護用シート
の基材として、硬質基材が考えられる。しかしながら、
この硬質基材を半導体ウエハから剥離しようとすると、
硬質基材の剛性のため剥離時に加えられる力がウエハに
まで伝わり、脆いウエハを破損してしまうという新たな
課題が発生した。 【0005】 【発明が解決しようとする課題】したがって、本発明の
目的は、半導体ウエハを極薄まで研磨しても、均一な厚
みを得られる研磨ができ、この研磨時、搬送時及び半導
体ウエハから剥離するいずれの際であっても、該半導体
ウエハに破損が生じない半導体ウエハ保護用シートに関
する。 【0006】 【課題を解決するための手段】本発明者は、上記に鑑み
鋭意検討を行った結果、シート状の支持体、該支持体上
に積層された基材粘着剤層と、該基材粘着剤層上に積層
された基材と、該基材上に積層されたウエハ粘着剤層を
有する半導体ウエハ保護用シートであって、該支持体の
引張弾性率と、その厚み及びウエハ研磨後における前記
支持体を前記基材から剥離する際の剥離強度や該基材を
ウエハから剥離する際の剥離強度を特定したため、半導
体ウエハを極薄まで研磨しても、搬送時の反りや割れを
抑制できた。 【0007】 【発明の実施の形態】本発明で特定した支持体の引張弾
性率を特定したのは、あまりに低いと研磨後の半導体ウ
エハを搬送する際に半導体ウエハを補助できず、たわみ
が発生しクラック等の破損が発生してしまうからであ
り、あまりに高いとウエハより剥離する際にウエハに破
損が生じるためであり、具体的には0.05〜10GP
a(ギガパスカル)が好ましい。該引張弾性率は、幅1
0mmの短冊状の試料を23℃において1分間に100
%の割合で引張った時に得られるS−S曲線から求めら
れる初期弾性率(JIS K 7127)である。 【0008】該支持体の厚みを特定したのは、あまりに
薄いと研磨後の半導体ウエハを搬送する際に半導体ウエ
ハを補助できず、たわみが発生し、クラック等の破損が
発生し、あまりに厚いと湾曲せず貼り合わせ時に気泡が
混入し、研磨不良が発生してしまうため、具体的には5
0〜300μmが好ましい。 【0009】該支持体として採用される素材は、引張弾
性率及び厚みが上記値であれば適宜選択でき、具体的に
はポリエチレンテレフタレート、ポリエチレンナフタレ
ート、ポリイミド、ポリカーボネート、ポリスチレン、
アクリルニトリルブタジエンスチレン共重合体等があ
る。 【0010】該支持体は、後述する粘着剤層が紫外線硬
化型粘着剤の場合には、支持体側から照射される紫外線
を粘着剤層にまで届かせる必要があるため、紫外線透過
性のものでなければならない。また、該支持体は、後述
する粘着剤層が加熱硬化型粘着剤や加熱発泡型粘着剤の
場合には、加熱時に使用される温度より高い温度の融点
を有していなければならない。 【0011】ウエハ研磨後における前記支持体と前記基
材を剥離する際の剥離強度(JISZ 0237)や該
基材をウエハから剥離する際の剥離強度(JIS Z
0237)を特定したのは、あまりに低いと粘着力が発
揮されず、あまりに高いと剥離時に掛かる応力でウエハ
が破損してしまうからであり、具体的には1.0×10
-3〜2.0N/20mmが好ましい。この剥離強度を特
定するにあっては、上記粘着剤層の剥離強度を従来公知
の方法で調整することによって達成される。該粘着剤層
としては、一般的な感圧型粘着剤、紫外線硬化型粘着
剤、加熱硬化型粘着剤、加熱発泡型粘着剤等がある。該
感圧型粘着剤としてはアクリル系、ゴム系、シリコン系
等従来公知の粘着剤が用いられる。前記紫外線硬化型粘
着剤としてはベースポリマ、紫外線硬化性化合物、紫外
線硬化開始剤等を配合したものが採用され、該ベースポ
リマとしては、一般的なアクリル系粘着剤、ゴム系粘着
剤等がある。 【0012】なお、上記紫外線硬化型粘着剤の硬化を開
始するためには、紫外線の照射が必要になる。また、熱
硬化型粘着剤及び加熱発泡型粘着剤については剥離時に
加熱が必要となる。紫外線照射及び加熱のタイミングと
しては、半導体ウエハを研磨し、搬送した後に行われ
る。 【0013】本発明で採用される基材は、半導体ウエハ
保護用シートの基材として使用される従来公知の合成樹
脂を採用できる。具体的にはポリ塩化ビニル、ポリブテ
ン、ポリブタジエン、ポリウレタン、エチレン−酢酸ビ
ニルコポリマ、ポリエチレン、ポリプロピレン、エチレ
ン−アクリル共重合体等の単独層、複合層又はこれらの
複数層がある。 【0014】該基材は、後述する粘着剤層が紫外線硬化
型粘着剤の場合には、基材側から照射される紫外線を粘
着剤層にまで届かせる必要があるため、紫外線透過性の
ものでなければならない。また、該基材は、上記粘着剤
層が加熱硬化型粘着剤や加熱発泡型粘着剤の場合には、
加熱時に使用される温度より高い温度の融点を有してい
なければならない。 【0015】本発明にかかる半導体ウエハ保護用シート
は、必要に応じて、上記ウエハ粘着剤層の粘着面にポリ
エチレンラミネート紙、剥離処理プラスチックフィルム
等の剥離紙又は剥離シートを密着させて保存される。 【0016】本発明にあっては、シート状の支持体、該
支持体上に積層された基材粘着剤層と、該基材粘着剤層
上に積層された基材と、該基材上に積層されたウエハ粘
着剤層を有する半導体ウエハ保護用シートであって、該
支持体の引張弾性率が0.05〜10GPaで、その厚
みが50〜300μmであり、ウエハ研磨後における前
記支持体を前記基材から剥離する際の剥離強度又は該基
材をウエハから剥離する際の剥離強度の少なくとも一方
が1.0×10-3〜2.0N/20mmであることによ
って上記課題を解決できることを見出し、本発明を完成
した。 【0017】 【実施例】本発明にかかる半導体ウエハ保護用シートの
実施例を、比較例と比較しつつ、図1及び表1を用いて
詳細に説明する。図1は、本発明にかかる半導体ウエハ
保護用シートの実施例及び比較例を模式的に示した断面
図である。 【0018】 【表1】 【0019】表1の特性値における「研磨性」は該半導体
ウエハ保護用シート上に直径8インチ、厚さ700μm
の半導体ウエハを貼り付けてから研磨機(株式会社ディ
スコ製バックグラインダーDFG−82IF/8)を用
いてウエハの裏面を厚みが50μmになるまで研磨し、
半導体ウエハを貼り合わせる際に気泡が混入したり、研
磨時に貼り合わせた支持体が剥離する等して、研磨後の
半導体ウエハの表面に凹凸が生じた場合を×、それ以外
を○とした。 【0020】表1の特性値における「剥離性」は、該半導
体ウエハ保護用シート上に直径8インチ、厚さ700μ
mの半導体ウエハを貼り付けてから研磨機(株式会社デ
ィスコ製バックグラインダーDFG−82IF/8)を
用いてウエハの裏面を厚みが50μmになるまで研磨
し、支持体を剥離する際、ウエハに割れが発生したもの
を×、それ以外を○とした。 【0021】表1の特性値における「搬送性」は、該半導
体ウエハ保護用シート上に直径8インチ、厚さ700μ
mの半導体ウエハを貼り付けてから研磨機(株式会社デ
ィスコ製バックグラインダーDFG−82IF/8)を
用いてウエハの裏面を厚みが50μmになるまで研磨
し、研磨後の半導体ウエハを搬送する際に半導体ウエハ
を補助できず、たわみが発生し破損やカセット等に搬送
できなくなったものを×、それ以外を○とした。 【0022】表1に示した実施例について説明する。本
実施例かかる半導体ウエハ保護用シートは、図1に示す
ように、シート状の支持体1、該支持体1上に積層され
た基材粘着剤層2と、該基材粘着剤層2上に積層された
基材3と、該基材3上に積層されたウエハ粘着剤層4を
有するものである。該支持体1の引張弾性率は、3.0
GPa、その厚みが100μmであり、ウエハ研磨後に
おける前記支持体1を前記基材3から剥離する際の剥離
強度及び該基材3をウエハから剥離する際の剥離強度の
両方共、0.1N/20mmである。該支持体は、ポリ
エチレンテレフタレート製であり、該基材粘着剤層2は
ベースポリマとしてのアクリル酸エチル−アクリル酸2
−エチルヘキシルの共重合体100重量部、紫外線硬化
性化合物としての6官能性ウレタンアクリレートオリゴ
マ120重量部、架橋剤としての2,4−トルイレンジ
イソシアナート3重量部及び紫外線硬化開始剤としての
ベンゾインイソプロピルエーテル8重量部を配合したも
のであり、該ウエハ粘着剤層4はベースポリマとしての
アクリル酸エチル−アクリル酸2−エチルヘキシルの共
重合体100重量部及び架橋剤としての2,4−トルイ
レンジイソシアナート3重量部を配合したものであり、
さらに、基材はポリエチレンである。なお、基材の厚み
は100μmであり、該基材粘着剤層2及び該ウエハ粘
着剤層4の厚みはそれぞれ20μmである。 【0023】比較例1乃至比較例6の半導体ウエハ保護
用シートは、実施例の半導体ウエハ保護用シートとは表
1における値を変更した以外、該実施例と同様のもので
ある。 【0024】比較例1及び比較例2が示すように、支持
体1の引張弾性率が、あまりに低いと搬送時に支持体1
がたわんでしまってウエハの破損が生じ、あまりに高い
と支持体1が硬すぎて半導体ウエハを貼り合わせる際に
気泡が混入してウエハ表面に凹凸が生じ研磨不良となっ
た。 【0025】比較例3及び比較例4が示すように、支持
体1の厚みが、あまりに薄いと搬送時に支持体1がたわ
んでしまってウエハの破損が生じ、あまりに厚いと半導
体ウエハを貼り合わせる際に気泡が混入してウエハ表面
に凹凸が生じ研磨不良となった。 【0026】比較例5及び比較例6が示すように、ウエ
ハ研磨後における前記支持体1を前記基材3から剥離す
る際の剥離強度及び該基材3をウエハから剥離する際の
剥離強度が、あまりに小さいと研磨中に支持体1と基材
3がずれて研磨不良を起こし、あまりに大きいと剥離時
にウエハの破損が生じた。 【0027】 【発明の効果】本発明にかかる半導体ウエハ保護用シー
トは、シート状の支持体、該支持体上に積層された基材
粘着剤層と、該基材粘着剤層上に積層された基材と、該
基材上に積層されたウエハ粘着剤層を有する半導体ウエ
ハ保護用シートであって、該支持体の引張弾性率を0.
05〜10GPa、その厚みを50〜300μmとし、
ウエハ研磨後における前記支持体を前記基材から剥離す
る際の剥離強度又は該基材をウエハから剥離する際の剥
離強度の少なくとも一方を1.0×10-3〜2.0N/
20mmにすることによって、半導体ウエハを薄く研磨
する際であっても、研磨不良が生じず、支持体を基材か
ら剥離したり、基材を半導体ウエハから剥離する際であ
っても半導体ウエハの破損が生じなくなった。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer protection sheet, and more particularly to a method for polishing a semiconductor wafer to an extremely thin thickness.
The present invention relates to a semiconductor wafer protection sheet that prevents warpage and cracking during transport. 2. Description of the Related Art Silicon wafers and gallium-arsenic wafers are used for manufacturing semiconductor chips. Among them, silicon wafers are frequently used. Silicon wafers are manufactured by slicing high-purity single-crystal silicon thinly to a thickness of about 500 to 1000 μm. In recent years, the spread of IC cards (integrated circuit cards) and the stacking of stacked CSP (chip size packages) Therefore, further thinning is desired. Conventionally, a semiconductor wafer having a thickness of about 350 μm has been required to be polished to 100 μm or less. Conventionally, an adhesive sheet in which an adhesive is applied on a soft base material has been used for polishing a semiconductor wafer. However, in the case of an adhesive sheet using a soft base material, the tension applied at the time of bonding is a residual stress. Therefore, when the semiconductor wafer is polished to an extremely thin thickness, the residual stress of the pressure-sensitive adhesive sheet exceeds the strength of the wafer, and the wafer is warped by a force for eliminating the residual stress. In addition, since the wafer is brittle after polishing, the wafer may be damaged when transporting a soft substrate. In order to prevent breakage during polishing and subsequent transportation, a hard base material is considered as a base material for a protective sheet for a thin film wafer or a large-diameter wafer. However,
When trying to peel this hard substrate from the semiconductor wafer,
Due to the rigidity of the hard base material, the force applied at the time of peeling is transmitted to the wafer, causing a new problem that the brittle wafer is damaged. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a polishing method capable of obtaining a uniform thickness even when a semiconductor wafer is polished to an extremely small thickness. The present invention relates to a semiconductor wafer protection sheet in which the semiconductor wafer is not damaged in any case of peeling from the semiconductor wafer. The present inventors have made intensive studies in view of the above, and as a result, have found that a sheet-shaped support, a substrate pressure-sensitive adhesive layer laminated on the support, A semiconductor wafer protection sheet having a base material laminated on a material pressure-sensitive adhesive layer and a wafer pressure-sensitive adhesive layer laminated on the base material, the tensile elastic modulus of the support, its thickness and wafer polishing Since the peel strength at the time of peeling the support from the base material and the peel strength at the time of peeling the base material from the wafer are specified, even if the semiconductor wafer is polished to an extremely thin thickness, warpage or cracking at the time of transport is performed. Was suppressed. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The tensile modulus of the support specified in the present invention is specified. If the support is too low, the semiconductor wafer cannot be assisted in transporting the polished semiconductor wafer, and deflection occurs. This is because breakage such as cracks may occur, and if it is too high, the wafer may be damaged when peeled off from the wafer.
a (gigapascal) is preferred. The tensile modulus is width 1
A rectangular sample of 0 mm is measured at 23 ° C. for 100 minutes per minute.
% Is an initial elastic modulus (JIS K 7127) obtained from an SS curve obtained when tensile is performed at a rate of%. The reason why the thickness of the support is specified is that if the thickness is too small, the semiconductor wafer cannot be assisted in transporting the polished semiconductor wafer, causing deflection, cracks and other damages, and too large a thickness. Air bubbles are mixed at the time of bonding without bending, and poor polishing occurs.
0 to 300 μm is preferred. The material used as the support can be appropriately selected as long as the tensile elastic modulus and the thickness are the above-mentioned values. Specifically, polyethylene terephthalate, polyethylene naphthalate, polyimide, polycarbonate, polystyrene,
Acrylic nitrile butadiene styrene copolymer and the like. When the pressure-sensitive adhesive layer to be described later is an ultraviolet-curable pressure-sensitive adhesive, it is necessary that ultraviolet rays irradiated from the support side reach the pressure-sensitive adhesive layer. There must be. When the pressure-sensitive adhesive layer described later is a heat-curable pressure-sensitive adhesive or a heat-foamable pressure-sensitive adhesive, the support must have a melting point higher than the temperature used during heating. The peel strength (JIS Z 0237) when the support and the substrate are peeled off after the wafer polishing and the peel strength (JIS Z 023) when the substrate is peeled from the wafer.
[0237] The reason for specifying [0237] is that if it is too low, the adhesive force will not be exerted, and if it is too high, the wafer will be damaged by the stress applied during peeling.
-3 to 2.0 N / 20 mm is preferred. The specification of the peel strength is achieved by adjusting the peel strength of the pressure-sensitive adhesive layer by a conventionally known method. Examples of the pressure-sensitive adhesive layer include a general pressure-sensitive pressure-sensitive adhesive, an ultraviolet-curable pressure-sensitive adhesive, a heat-curable pressure-sensitive adhesive, and a heat-foamable pressure-sensitive adhesive. As the pressure-sensitive pressure-sensitive adhesive, a conventionally known pressure-sensitive adhesive such as an acrylic-based, rubber-based, or silicone-based pressure-sensitive adhesive is used. As the UV-curable pressure-sensitive adhesive, a compound in which a base polymer, a UV-curable compound, a UV-curable initiator, and the like are blended is used. Examples of the base polymer include a general acrylic pressure-sensitive adhesive and a rubber-based pressure-sensitive adhesive. . In order to start the curing of the ultraviolet-curable pressure-sensitive adhesive, irradiation with ultraviolet light is required. Further, the thermosetting pressure-sensitive adhesive and the heat-foamable pressure-sensitive adhesive require heating at the time of peeling. The ultraviolet irradiation and heating are performed after the semiconductor wafer is polished and transported. The substrate used in the present invention can be a conventionally known synthetic resin used as a substrate for a semiconductor wafer protection sheet. Specifically, there are a single layer, a composite layer or a plurality of layers of polyvinyl chloride, polybutene, polybutadiene, polyurethane, ethylene-vinyl acetate copolymer, polyethylene, polypropylene, ethylene-acrylic copolymer and the like. When the pressure-sensitive adhesive layer to be described later is an ultraviolet-curable pressure-sensitive adhesive, it is necessary to transmit the ultraviolet rays irradiated from the substrate side to the pressure-sensitive adhesive layer. Must. Further, the base material, when the pressure-sensitive adhesive layer is a heat-curable pressure-sensitive adhesive or a heat-foamable pressure-sensitive adhesive,
It must have a melting point above the temperature used during heating. The semiconductor wafer protection sheet according to the present invention is stored by adhering a release paper or a release sheet such as polyethylene laminated paper or a release-treated plastic film to the adhesive surface of the wafer adhesive layer, if necessary. . In the present invention, a sheet-like support, a substrate adhesive layer laminated on the support, a substrate laminated on the substrate adhesive layer, A semiconductor wafer protection sheet having a wafer adhesive layer laminated on a substrate, wherein the support has a tensile modulus of 0.05 to 10 GPa, a thickness of 50 to 300 μm, and the support after polishing the wafer. The above problem can be solved by that at least one of the peel strength when peeling the substrate from the base material or the peel strength when peeling the base material from the wafer is 1.0 × 10 −3 to 2.0 N / 20 mm. And completed the present invention. An embodiment of a sheet for protecting a semiconductor wafer according to the present invention will be described in detail with reference to FIG. 1 and Table 1 while comparing with a comparative example. FIG. 1 is a cross-sectional view schematically showing an example and a comparative example of a semiconductor wafer protection sheet according to the present invention. [Table 1] "Abrasiveness" in the characteristic values in Table 1 is such that the semiconductor wafer protective sheet has a diameter of 8 inches and a thickness of 700 μm.
After the semiconductor wafer is attached, the back surface of the wafer is polished to a thickness of 50 μm using a polishing machine (a back grinder DFG-82IF / 8 manufactured by Disco Corporation).
When the surface of the polished semiconductor wafer became uneven due to air bubbles entering the semiconductor wafer during bonding or peeling of the bonded support at the time of polishing, etc., the result was evaluated as x. "Releasability" in the characteristic values of Table 1 is as follows: 8 inches in diameter and 700 μm in thickness on the semiconductor wafer protection sheet.
After polishing the back surface of the wafer to a thickness of 50 μm using a polishing machine (Back Grinder DFG-82IF / 8 manufactured by Disco Co., Ltd.), and peeling the support, the wafer is cracked. Was evaluated as x, and the others were evaluated as ○. The "transportability" in the characteristic values in Table 1 indicates that the semiconductor wafer protection sheet has a diameter of 8 inches and a thickness of 700 μm.
When a semiconductor wafer having a thickness of 50 m is polished using a polishing machine (a back grinder DFG-82IF / 8 manufactured by Disco Co., Ltd.) until the thickness of the semiconductor wafer becomes 50 μm, and the polished semiconductor wafer is transferred. When the semiconductor wafer could not be assisted and was bent and could not be transported to a cassette or the like due to bending, it was evaluated as x, and the others were evaluated as ○. The embodiment shown in Table 1 will be described. As shown in FIG. 1, the semiconductor wafer protection sheet according to the present embodiment includes a sheet-like support 1, a base adhesive layer 2 laminated on the support 1, and a base adhesive layer 2 on the support 1. And a wafer adhesive layer 4 laminated on the substrate 3. The tensile modulus of the support 1 was 3.0.
GPa, the thickness of which is 100 μm, and both the peel strength when peeling the support 1 from the substrate 3 after polishing the wafer and the peel strength when peeling the substrate 3 from the wafer are 0.1 N. / 20 mm. The support is made of polyethylene terephthalate, and the base adhesive layer 2 is ethyl acrylate-acrylic acid 2 as a base polymer.
100 parts by weight of a copolymer of -ethylhexyl, 120 parts by weight of a hexafunctional urethane acrylate oligomer as an ultraviolet curable compound, 3 parts by weight of 2,4-toluylene diisocyanate as a crosslinking agent, and benzoin isopropyl as an ultraviolet curing initiator The wafer pressure-sensitive adhesive layer 4 contains 100 parts by weight of a copolymer of ethyl acrylate-2-ethylhexyl acrylate as a base polymer and 2,4-toluylene diisocyanate as a cross-linking agent. It contains 3 parts by weight of Nart,
Further, the substrate is polyethylene. The thickness of the substrate is 100 μm, and the thickness of the substrate adhesive layer 2 and the thickness of the wafer adhesive layer 4 are each 20 μm. The semiconductor wafer protection sheets of Comparative Examples 1 to 6 are the same as the semiconductor wafer protection sheets of the examples except that the values in Table 1 are changed. As shown in Comparative Examples 1 and 2, if the tensile elastic modulus of the support 1 is too low, the support 1
When the wafer 1 was too high, the support 1 was too hard and bubbles were mixed when bonding the semiconductor wafers, and irregularities were formed on the wafer surface, resulting in poor polishing. As shown in Comparative Examples 3 and 4, if the thickness of the support 1 is too small, the support 1 bends at the time of transportation, causing damage to the wafer. Air bubbles were mixed in, and irregularities were formed on the wafer surface, resulting in poor polishing. As shown in Comparative Examples 5 and 6, the peel strength when peeling the support 1 from the substrate 3 after polishing the wafer and the peel strength when peeling the substrate 3 from the wafer after polishing. If it is too small, the support 1 and the base material 3 are displaced during polishing, causing poor polishing. If it is too large, the wafer is damaged during peeling. The semiconductor wafer protection sheet according to the present invention comprises a sheet-like support, a substrate adhesive layer laminated on the support, and a substrate adhesive layer laminated on the substrate adhesive layer. And a semiconductor wafer protection sheet having a wafer pressure-sensitive adhesive layer laminated on the base material, wherein the support has a tensile modulus of 0.
05 to 10 GPa, the thickness of which is 50 to 300 μm,
At least one of the peel strength when peeling the support from the substrate after the wafer polishing or the peel strength when peeling the substrate from the wafer is 1.0 × 10 −3 to 2.0 N /.
By setting the thickness to 20 mm, poor polishing does not occur even when the semiconductor wafer is thinly polished, and the support is peeled from the base material, and even when the base material is peeled from the semiconductor wafer, No damage occurred.

【図面の簡単な説明】 【図1】図1は、本発明にかかる半導体ウエハ保護用シ
ートの実施例及び比較例を模式的に示した断面図であ
る。 【符号の説明】 1 支持体 2 基材粘着剤層 3 基材 4 ウエハ粘着剤層
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view schematically showing an example and a comparative example of a semiconductor wafer protection sheet according to the present invention. [Description of Signs] 1 support 2 base material pressure-sensitive adhesive layer 3 base material 4 wafer pressure-sensitive adhesive layer

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4J004 AA05 AA10 AA11 AB01 AB05 AB07 AC03 CA03 CA04 CA05 CA06 CC03 DB01 FA04 FA05 FA08 4J040 CA001 DF001 EK001 JA09 JB02 JB08 JB09 NA20 PA22 PA23 PA42    ────────────────────────────────────────────────── ─── Continuation of front page    F term (reference) 4J004 AA05 AA10 AA11 AB01 AB05                       AB07 AC03 CA03 CA04 CA05                       CA06 CC03 DB01 FA04 FA05                       FA08                 4J040 CA001 DF001 EK001 JA09                       JB02 JB08 JB09 NA20 PA22                       PA23 PA42

Claims (1)

【特許請求の範囲】 【請求項1】 シート状の支持体(1)、該支持体
(1)上に積層された基材粘着剤層(2)と、該基材粘
着剤層(2)上に積層された基材(3)と、該基材
(3)上に積層されたウエハ粘着剤層(4)を有する半
導体ウエハ保護用シートであって、該支持体(1)の引
張弾性率が0.05〜10GPaで、その厚みが50〜
300μmであり、ウエハ研磨後における前記支持体
(1)を前記基材(3)から剥離する際の剥離強度又は
該基材(3)をウエハから剥離する際の剥離強度の少な
くとも一方が1.0×10-3〜2.0N/20mmであ
ることを特徴とする半導体ウエハ保護用シート。
Claims: 1. A sheet-shaped support (1), a substrate adhesive layer (2) laminated on the support (1), and the substrate adhesive layer (2) A semiconductor wafer protection sheet having a substrate (3) laminated thereon and a wafer adhesive layer (4) laminated on the substrate (3), wherein the tensile elasticity of the support (1) is The rate is 0.05 to 10 GPa and the thickness is 50 to
300 μm, and at least one of the peel strength at the time of peeling the support (1) from the substrate (3) after the wafer polishing and the peel strength at the time of peeling the substrate (3) from the wafer is 1. A semiconductor wafer protection sheet having a size of 0 × 10 −3 to 2.0 N / 20 mm.
JP2001344285A 2001-11-09 2001-11-09 Semiconductor wafer protecting sheet Pending JP2003151930A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001344285A JP2003151930A (en) 2001-11-09 2001-11-09 Semiconductor wafer protecting sheet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001344285A JP2003151930A (en) 2001-11-09 2001-11-09 Semiconductor wafer protecting sheet

Publications (1)

Publication Number Publication Date
JP2003151930A true JP2003151930A (en) 2003-05-23

Family

ID=19157834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001344285A Pending JP2003151930A (en) 2001-11-09 2001-11-09 Semiconductor wafer protecting sheet

Country Status (1)

Country Link
JP (1) JP2003151930A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004079817A1 (en) * 2003-03-05 2004-09-16 Nitto Denko Corporation Adhering and releasing method for protective tape
JP2005019518A (en) * 2003-06-24 2005-01-20 Nitto Denko Corp Semiconductor wafer processing protective sheet and method of grinding rear surface of semiconductor wafer
JP2005116652A (en) * 2003-10-06 2005-04-28 Nitto Denko Corp Protective sheet for working semiconductor wafer, and method for grinding rear of the semiconductor wafer
JP2005244206A (en) * 2004-01-28 2005-09-08 Mitsui Chemicals Inc Protecting method of semiconductor wafer and semiconductor wafer protective adhesive film
JP2005243780A (en) * 2004-02-25 2005-09-08 Hitachi Chem Co Ltd Wafer-supporting member and wafer-processing method
JP2009141265A (en) * 2007-12-10 2009-06-25 Lintec Corp Surface protection sheet and method for grinding semiconductor wafer

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004079817A1 (en) * 2003-03-05 2004-09-16 Nitto Denko Corporation Adhering and releasing method for protective tape
US7335605B2 (en) 2003-03-05 2008-02-26 Nitto Denko Corporation Protective tape applying and separating method
JP2005019518A (en) * 2003-06-24 2005-01-20 Nitto Denko Corp Semiconductor wafer processing protective sheet and method of grinding rear surface of semiconductor wafer
JP2005116652A (en) * 2003-10-06 2005-04-28 Nitto Denko Corp Protective sheet for working semiconductor wafer, and method for grinding rear of the semiconductor wafer
JP4666565B2 (en) * 2003-10-06 2011-04-06 日東電工株式会社 Protective sheet for processing semiconductor wafer and method for grinding back surface of semiconductor wafer
JP2005244206A (en) * 2004-01-28 2005-09-08 Mitsui Chemicals Inc Protecting method of semiconductor wafer and semiconductor wafer protective adhesive film
JP2005243780A (en) * 2004-02-25 2005-09-08 Hitachi Chem Co Ltd Wafer-supporting member and wafer-processing method
JP2009141265A (en) * 2007-12-10 2009-06-25 Lintec Corp Surface protection sheet and method for grinding semiconductor wafer

Similar Documents

Publication Publication Date Title
JP3784202B2 (en) Double-sided adhesive sheet and method of using the same
JP5823591B1 (en) Adhesive tape for protecting semiconductor wafer surface and method for processing semiconductor wafer
KR101350045B1 (en) Adhesive sheet for dicing and method for processing a work using the same
KR100643450B1 (en) Pressure sensitive adhesive sheet, method of protecting semiconductor wafer surface and method of processing work
JP4392732B2 (en) Manufacturing method of semiconductor chip
WO2011078193A1 (en) Adhesive tape for protecting surface of semiconductor wafer
KR102180168B1 (en) Adhesive tape for semiconductor wafer surface protection and processing method of semiconductor wafer
TWI459455B (en) Adhesive sheet for grinding back surface of semiconductor wafer and method for grinding back surface of semiconductor wafer using the same
JP4312419B2 (en) Semiconductor wafer processing method
JP2007005530A (en) Manufacturing method of chip product
JP2008021871A (en) Method of treating workpiece
JP2003147300A (en) Surface protecting sheet in grinding wafer rear and method for producing semiconductor chip
JP2004256595A (en) Adhesive sheet and method for using the same
JP2005116610A (en) Processing method of semiconductor wafer, and adhesive sheet for processing semiconductor wafer
US7105226B2 (en) Pressure sensitive adhesive double coated sheet and method of use thereof
TWI761467B (en) Adhesive tape for dicing, method for producing adhesive tape for dicing, and method for producing semiconductor chip
JPWO2019181731A1 (en) Manufacturing method of adhesive tape and semiconductor device
JP2004146761A (en) Protective structure for semiconductor wafer, protective method for semiconductor wafer, lamination protecting sheet used for the same, and method for processing semiconductor wafer
JP2000061785A (en) Semiconductor wafer with protective sheet attached thereto and grinding method of semiconductor wafer
JP2002203822A (en) Method for processing brittle member and both-side adhesive sheet
JP2003151930A (en) Semiconductor wafer protecting sheet
JP4477314B2 (en) Wafer manufacturing method and adhesive tape
JP2008171934A (en) Protective structure of fragile member, and processing method for fragile member
JP7326249B2 (en) Adhesive tape and method for manufacturing semiconductor device
JP4377144B2 (en) Semiconductor wafer fixing sheet

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040726

A977 Report on retrieval

Effective date: 20060517

Free format text: JAPANESE INTERMEDIATE CODE: A971007

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060523

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060714

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20060905

A521 Written amendment

Effective date: 20061106

Free format text: JAPANESE INTERMEDIATE CODE: A523

A521 Written amendment

Effective date: 20061204

Free format text: JAPANESE INTERMEDIATE CODE: A523

A911 Transfer of reconsideration by examiner before appeal (zenchi)

Effective date: 20061211

Free format text: JAPANESE INTERMEDIATE CODE: A911

A912 Removal of reconsideration by examiner before appeal (zenchi)

Effective date: 20070202

Free format text: JAPANESE INTERMEDIATE CODE: A912