JP2003149287A - Method and apparatus for inspecting semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow the burn-in by a burn-in apparatus to be omitted to simplify the manufacturing process of a semiconductor integrated circuit. SOLUTION: Prior to the function inspection of a semiconductor integrated circuit with test signals applied to the integrated circuit, a signal for giving a higher load to the integrated circuit than in its usual operation is applied thereto under a normal temperature condition.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit inspection method and inspection apparatus.

[0002]

2. Description of the Related Art Semiconductor devices such as CPUs, memories and solid-state image pickup devices are manufactured by forming various circuit elements on the surface of a semiconductor substrate made of single crystal silicon. In the manufacturing process of such a semiconductor device, a pre-process of forming a semiconductor integrated circuit by forming a large number of semiconductor elements on a silicon wafer, a lead terminal is connected to each semiconductor integrated circuit, and the semiconductor integrated circuit is sealed with a resin. It consists of a post process to stop.

In order to eliminate defective products such as those caused by defective contact of the barrier metal of the contact, a semiconductor device is used by using a burn-in device during the transition from the pre-process to the post-process or before the shipping after the post-process. A function test was performed by applying a test signal to the semiconductor integrated circuit by using a function tester after performing a burn-in to apply an initial stress to the integrated circuit under a high temperature condition.

As described above, the burn-in is performed before the shipment of the semiconductor integrated circuit. Generally, the failure rate of the semiconductor integrated circuit is high immediately after manufacturing, and the failure rate is low during a predetermined service period thereafter. The so-called bathtub curve (Bath Tub Cur
ve: bathtub curve) is drawn, so that an initial stress is applied to the semiconductor integrated circuit immediately after manufacturing so that a failure (initial failure) immediately after manufacturing is revealed and a defective product is removed.

In such burn-in, a semiconductor integrated circuit is mounted on a burn-in device, and a voltage (for example, 3.3 V) higher than a voltage (for example, 3.3 V) at the time of use under high temperature conditions (about 125 ° C.) is used.
4.6V) A signal with a frequency (eg, 1MHz) lower than the frequency (eg, 20MHz) used for a long time (about 1 hour)
The initial stress was applied to the semiconductor integrated circuit by applying it over the semiconductor integrated circuit (see Table 1).

[0006]

However, in the above-mentioned conventional method, since the burn-in is performed for all the semiconductor integrated circuits, there is a possibility that the following problems may occur.

That is, in burn-in, it is necessary to apply a signal to the semiconductor integrated circuit under a high temperature condition, and an expensive dedicated burn-in device is required, which requires a large capital investment.

Further, the burn-in requires a complicated work such as mounting the semiconductor integrated circuit in the burn-in device, setting the conditions of the burn-in device, and finally removing the semiconductor integrated circuit from the burn-in device. It took labor and time.

Further, the burn-in requires a long lead time because a signal must be applied to the semiconductor integrated circuit over a long period of time.

Further, when the semiconductor integrated circuit is attached to or detached from the burn-in device, the lead terminals of the semiconductor integrated circuit may be damaged.

[0011]

Therefore, according to the present invention, there is provided an inspection method or an inspection apparatus for performing a function inspection of a semiconductor integrated circuit by applying a test signal to the semiconductor integrated circuit, wherein Therefore, it has been decided to apply a signal to the semiconductor integrated circuit that causes a higher load than in normal use.

The high-load signal is a signal having a higher voltage or a lower frequency than that during normal use.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION A method of inspecting a semiconductor integrated circuit according to the present invention includes a function inspection apparatus for performing a function inspection of a semiconductor integrated circuit before performing a function inspection of a semiconductor integrated circuit which has been conventionally performed. It is intended to apply a high load signal, which is a signal under a normal temperature condition, which is a stricter condition (high voltage, low frequency) than that during normal use, to the semiconductor integrated circuit.

As described above, by applying a signal having a higher load than that during normal use to the semiconductor integrated circuit before the function test, an initial stress is applied to the semiconductor integrated circuit,
The failure (initial failure) of the semiconductor integrated circuit immediately after the manufacture is made apparent, and thereby, the same effect as that of performing the burn-in using the burn-in device on the semiconductor integrated circuit can be obtained. Therefore, even if the burn-in of the semiconductor integrated circuit using the burn-in device, which has been conventionally performed before the normal function inspection, is not performed, only the function inspection device for performing the normal function inspection is used. The initial stress can be applied to the burn-in device, and the burn-in by the conventional burn-in device can be omitted. Therefore, it is not necessary to prepare an expensive dedicated burn-in device, it is possible to eliminate the capital investment for the burn-in device, and it is possible to simplify the inspection process of the semiconductor integrated circuit and to inspect the semiconductor integrated circuit. The labor and time required for the semiconductor integrated circuit can be reduced. Furthermore, the semiconductor integrated circuit can be attached to the functional inspection device only once, and the number of times the semiconductor integrated circuit is attached and detached can be reduced. It is possible to prevent damage to the terminals.

In particular, when the initial stress is applied to the semiconductor integrated circuit by applying a test signal having a higher voltage or a lower frequency than that in the normal use, the function test normally used is performed. The function testing device can easily generate test signals under more severe conditions than normal use without adding any special improvement to the device, and the function testing device that was normally used does not require new equipment investment. Initial stress equivalent to burn-in can be applied to the integrated circuit.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a semiconductor integrated circuit 1.
2 shows a function inspection device 2 for performing a function inspection of the semiconductor integrated circuit 1 to be inspected and attached to a socket 4 provided in the inspection stage 3. The test signal generating section 5 and the judging section 6 are connected to each other, and the test signal generating section 5 and the judging section 6 are connected to the control section 7. 8 in the figure
Is a signal input bus, and 9 is a signal output bus. The semiconductor integrated circuit 1 to be inspected may be a plurality of semiconductor integrated circuits 1 formed on a silicon wafer, or the semiconductor integrated circuit 1 embedded in a packaged semiconductor device. May be

The function inspection device 2 sends a predetermined control signal from the control section 7 to the test signal generation section 5 and the judgment section 6 at the time of function inspection, and the test signal generation section 5 is sent based on the control signal.
When a predetermined test signal is generated at the same time and the test signal is applied to the semiconductor integrated circuit 1 through the signal input bus 8, the output signal of the semiconductor integrated circuit 1 is input to the determination unit 6 through the signal output bus 9. It On the other hand, the determination unit 6 generates an ideal output signal to be output by the semiconductor integrated circuit 1 when a predetermined test signal is input to the semiconductor integrated circuit 1 based on the control signal from the control unit 7, and the ideal output signal is generated. Is compared with the actual output signal actually output by the semiconductor integrated circuit 1 by the application of the test signal generated by the test signal generator 5, and when both output signals are completely matched, the semiconductor integrated circuit An OK signal indicating that the circuit 1 is functioning normally is sent to the control unit 7, and if both output signals do not match, an NG signal indicating that the semiconductor integrated circuit 1 is not functioning normally is sent to the control unit. I am going to send it to 7.

Then, the control unit 7 judges that the semiconductor integrated circuit 1 to be inspected is a non-defective product when the OK signal is sent from the judging unit 6 for all the test signals, while When the NG signal is sent from the determination unit 5 for one test signal, it is determined that the semiconductor integrated circuit 1 to be inspected is a defective product, and thus the semiconductor integrated circuit 1 is determined.
Is to perform a function test to determine whether or not it exhibits a predetermined function.

Such a functional test is carried out by inputting a test signal having the same power supply voltage, signal voltage and signal frequency to the semiconductor integrated circuit 1 under normal temperature conditions as in normal use.

In the present invention, before performing the above-mentioned normal function test, that is, before inputting a test signal having the same power supply voltage, signal voltage, and signal frequency to the semiconductor integrated circuit 1 under normal temperature conditions as in normal use. In addition, a high-load signal, which is a stricter condition than during normal use (during functional inspection), is applied to the semiconductor integrated circuit 1, and thereafter, the same power supply voltage, signal voltage, and the like as those during normal use are applied to the semiconductor integrated circuit 1. A test signal of the signal frequency is input to perform a normal function test.

That is, as shown in Table 1, the power supply voltage during normal use is 3.3V, the signal voltage is 1.8V, and the signal frequency is 20MH.
During the normal function test, the semiconductor integrated circuit 1 of z receives a test signal with a power supply voltage of 2.95V, a signal voltage of 1.4V, and a signal frequency of 20MHz, which is almost the same as during normal use. On the other hand, before the normal function test, the semiconductor integrated circuit 1 is subjected to a stricter condition than a signal during normal use, that is, a power supply voltage which is a high voltage and low frequency signal.
A signal of 3.8V, signal voltage of 2.8V and signal frequency of 10MHz is input.

[0022]

[Table 1] Specifically, first, the socket 4 provided on the inspection stage 3
The semiconductor integrated circuit 1 to be inspected is mounted on the semiconductor integrated circuit 1 from the test signal generator 5 to the semiconductor integrated circuit 1 with a power supply voltage of 3.8 V, a signal voltage of 2.8 V, and a signal frequency of 10 MHz.
A high load signal is applied for 5 seconds, and then the power supply voltage from the test signal generator 5 to the semiconductor integrated circuit 1 is 2.
A plurality of types of test signals of 95V, a signal voltage of 1.4V, and a signal frequency of 20MHz are sequentially input, and the determination unit 7 determines the quality of the semiconductor integrated circuit 1 based on the output signal of the semiconductor integrated circuit 1 for each test signal. I am trying.

As described above, when the function inspection apparatus 2 for performing the function inspection of the semiconductor integrated circuit 1 is used and a signal having a higher load than that in normal use is applied to the semiconductor integrated circuit 1 under normal temperature conditions, it takes time. The semiconductor integrated circuit 1 is subjected to initial stress due to the high-load signal, which causes
The failure (initial failure) of the semiconductor integrated circuit 1 immediately after manufacturing can be revealed, and the same effect as that of performing the burn-in on the semiconductor integrated circuit 1 can be obtained.

Therefore, even if the semiconductor integrated circuit 1 is not burned in using the burn-in device, which has been conventionally performed before the normal functional test, only the functional test device 2 for the normal functional test is used. Thus, the initial stress can be applied to the semiconductor integrated circuit 1, and the burn-in by the conventional burn-in device can be omitted.

As a result, there is no need to prepare an expensive dedicated burn-in device, the capital investment for the burn-in device can be eliminated, the inspection process of the semiconductor integrated circuit 1 can be simplified, and the semiconductor integrated circuit can be integrated. The labor and time required to inspect the circuit 1 can be reduced.

Moreover, in the conventional inspection process, it was necessary to attach and detach the semiconductor integrated circuit 1 to and from the burn-in device and the function inspection device 2, respectively. However, in this method, the semiconductor integrated circuit 1 is attached to the function inspection device 2 only once. The semiconductor integrated circuit 1 can be attached and detached, and the number of times of attachment and detachment of the semiconductor integrated circuit 1 can be reduced, whereby damage to the lead terminals of the semiconductor integrated circuit 1 can be prevented. The high-load signal, which is a stricter condition than the normal use described above, is determined as follows.

That is, a signal having a higher voltage or a lower frequency than the test signal during normal use is applied to the semiconductor integrated circuit 1 for a predetermined time, and then a normal function test is performed to obtain the defective product rate at that time. The defective product occurrence rate is compared with the defective product occurrence rate when performing burn-in using the conventional burn-in device. Then, a signal of a condition (voltage, frequency) such that both defective product occurrence rates are approximately the same is determined as a signal having a higher load than in normal use.

As a signal having a higher load than that during normal use, a signal having a higher voltage and a lower frequency than the signal during normal use becomes a signal under more severe conditions, and the signal application time is shortened. However, only the voltage may be higher than the signal in normal use, or only the frequency may be lower than the signal in normal use. in this way,
Since the initial stress is applied to the semiconductor integrated circuit 1 by applying to the semiconductor integrated circuit 1 a signal having a higher voltage or a lower frequency than that during normal use, the program in the control unit 7 of the function inspection device 2 is It can be dealt with only by changing the function inspection device 2 that is normally used, and a signal having a higher load than that during normal use can be easily generated by the function inspection device 2 without adding special improvement. It is possible to apply the initial stress equivalent to the burn-in to the semiconductor integrated circuit 1 with the function inspection device 2 which is normally used without investing new equipment.

[0029]

The present invention is carried out in the form described above, and has the following effects. That is, in the present invention, before performing the functional test of the semiconductor integrated circuit by applying the test signal to the semiconductor integrated circuit, a signal having a higher load than that in normal use is applied to the semiconductor integrated circuit under normal temperature conditions. Therefore, the failure (initial failure) of the semiconductor integrated circuit immediately after manufacturing can be revealed, and an effect equivalent to that of performing burn-in on the semiconductor integrated circuit can be obtained.

As a result, even if the semiconductor integrated circuit using the burn-in device, which has been conventionally performed before the normal function test, is not burned in, only the function test device for performing the normal function test is used. Therefore, the initial stress can be applied to the semiconductor integrated circuit, and the burn-in by the conventional burn-in device can be omitted. Therefore, it is not necessary to prepare an expensive dedicated burn-in device, and the capital investment for the burn-in device can be reduced. In addition, the inspection process of the semiconductor integrated circuit can be simplified, the labor and time required for the inspection of the semiconductor integrated circuit can be reduced, and further, the semiconductor integrated circuit can be used as a function inspection device. It only needs to be attached once, and the number of times the semiconductor integrated circuit is attached and detached can be reduced. It is possible to prevent the damage.

Further, in the present invention, since the initial stress is applied to the semiconductor integrated circuit by applying the signal of the voltage higher than that in the normal use, the function test which is normally used is checked. It is possible to easily generate a test signal with severer conditions than in normal use without adding special equipment to the function inspection device, and with the function inspection device that was normally used without investing new equipment. An initial stress equivalent to burn-in can be applied to the semiconductor integrated circuit.

Further, in the present invention, since the initial stress is applied to the semiconductor integrated circuit by applying the signal of the frequency lower than that in the normal use, the semiconductor integrated circuit is also normally used. The function inspection device can easily generate test signals under more severe conditions than those during normal use without adding special improvements to the function inspection device, and the function inspection normally used without additional capital investment. The device can apply initial stress equivalent to burn-in to the semiconductor integrated circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing an inspection device for a semiconductor integrated circuit.

[Explanation of symbols]

1 Semiconductor integrated circuit 2 Functional inspection device 3 inspection stage 4 socket 5 Test signal generator 6 Judgment section 7 control unit 8 signal input bus 9 signal output bus

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 2G003 AA07 AA10 AC01 AD01 AE00                       AE09 AF06 AH02 AH04 AH05                 2G132 AA00 AB03 AB06 AB14 AC04                       AE14 AE22 AG09 AL09 AL11                 4M106 AA01 BA14 DJ18 DJ20 DJ21                       DJ27

Claims (6)

[Claims] 1. A test method for performing a functional test of a semiconductor integrated circuit by applying a test signal to the semiconductor integrated circuit, wherein the semiconductor integrated circuit has a higher load than a normal use under normal temperature conditions before the functional test. A method for inspecting a semiconductor integrated circuit, which comprises applying a signal that becomes 2. The high-load signal is a signal having a higher voltage than that during normal use.
A method for inspecting a semiconductor integrated circuit as described above. 3. The method for inspecting a semiconductor integrated circuit according to claim 1, wherein the signal having a high load is a signal having a frequency lower than that during normal use. 4. An inspection apparatus for performing a function test of a semiconductor integrated circuit by applying a test signal to the semiconductor integrated circuit, wherein the load on the semiconductor integrated circuit under normal temperature conditions before the function test is higher than that during normal use. An apparatus for inspecting a semiconductor integrated circuit, characterized in that a signal that becomes 5. The high-load signal is a signal having a voltage higher than that in normal use.
A semiconductor integrated circuit inspection device according to claim 1. 6. The semiconductor integrated circuit inspection device according to claim 4, wherein the high-load signal is a signal having a frequency lower than that in normal use.