JP2003141880A - Nonvolatile semiconductor memory device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device of which reliability about the number of times of rewriting guarantee is improved and in which a substantial lifetime about the number of times of rewriting can be extended by replacing with a spare block being not yet used for a block in which the number of times of guarantee exceeds, in a nonvolatile semiconductor memory which is constituted of a plurality of blocks and in which rewriting of data can be performed with a block unit. SOLUTION: The number of times of rewriting guarantee Na and the number of times of rewriting guarantee Nb of an object block are read out from a rewriting control information storing region 4, when the number of times Nb of rewriting reaches the number of times Na of rewriting guarantee, a spare storing region 3 is retrieved and a block being not yet used is retrieved, when a block being not yet used is detected, block replacement information I (Nx) required for replacing a block is updated, while block replacement is performed. Also, the number of times Nb of rewriting is updated for a block in the spare storing region 3 being block-replaced. When a block being not yet used is not detected, prohibition of rewriting is informed to the outside.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a non-volatile semiconductor memory device, and more particularly to a technique for improving the reliability of the guaranteed number of rewrites and for substantially extending the life of the number of rewrites. Regarding

[0002]

2. Description of the Related Art A conventional nonvolatile semiconductor memory device capable of block erasing and capable of redundancy repair will be described below.

FIG. 7 is a block diagram showing the structure of a conventional non-volatile semiconductor memory device. Reference numeral 14 is a non-volatile semiconductor memory, 15 is a main memory area composed of a plurality of blocks and block erasable, and 16 is a plurality of blocks. A redundant area composed of blocks and capable of block erasing, 17 is a memory control unit, 1
Reference numeral 8 is a row decoder, 19 is a column decoder, 20 is an erase signal, and 21 is erase block information indicating a block to be erased at the time of executing block erase.

In the conventional configuration shown in FIG. 7, the main storage area 1
When a defect is confirmed in the inspection stage before shipment in any of the blocks forming the block 5, a switching operation between the defective block of the main storage area 15 and any of the blocks forming the redundant area 16 is performed, That is, redundant relief is applied.

If the above-described redundancy repair is not performed, all the blocks in the redundancy area 16 do not function at all and the data is not rewritten.

When an erase signal 20 and erase block information 21 are input to the memory control unit 17 from the outside, the memory control unit 17 controls the row decoder 18 according to the presence / absence of the redundancy repair, and the row decoder 18 is operated. Erase is unconditionally executed for the block of the nonvolatile semiconductor memory 14 selected by.

[0007]

SUMMARY OF THE INVENTION In the above conventional configuration,
Since it is not possible to recognize how many times the rewriting operation has been performed on the non-volatile semiconductor memory 14, it is possible that the rewriting operation is unexpectedly performed more than the guaranteed number of times of rewriting. The reliability of the data stored in the memory 14 may be impaired.

When rewriting data in units of blocks in the nonvolatile semiconductor memory, the maximum number of times,
Since the number of rewrites of the entire nonvolatile semiconductor memory is limited by the number of rewrites of the block in which data is rewritten, there are cases where some blocks do not reach the guaranteed number of rewrites, and all rewritable blocks are rewritten. There was a problem that it could not be fully utilized until the life of each rewriting.

The present invention solves the above problems.
In a non-volatile semiconductor memory that is composed of multiple blocks and that allows data to be rewritten in block units, improves the reliability of the guaranteed number of rewrites, and replaces blocks that exceed the guaranteed number of times with unused spare blocks. By doing so, it is an object of the present invention to provide a non-volatile semiconductor memory device capable of substantially extending the life of rewriting.

[0010]

The present invention concerning a non-volatile semiconductor memory device solves the above-mentioned problems by taking the following means.

A main memory area which is composed of a plurality of blocks corresponding to logical addresses and in which data can be rewritten in block units, and a plurality of blocks which can be replaced with the same logical address as an arbitrary block of the main memory area. A nonvolatile semiconductor memory having a spare storage area in which data can be rewritten in block units, a guaranteed number of rewrites of the nonvolatile semiconductor memory, a number of rewrites of each block constituting the nonvolatile semiconductor memory, and block replacement information. Rewriting control information storage means for storing in a non-volatile manner,
Counting means for counting the number of times of rewriting of each block constituting the non-volatile semiconductor memory, and a count value of the counting means when an erase signal is input to any block of the non-volatile semiconductor memory, the rewriting control information storage Determination means for determining whether the block is erasable when the guaranteed number of rewrites stored in the means has been reached,
Block replacement control means for detecting an unused block in the spare storage area and updating block replacement information necessary for executing block replacement and executing block replacement when the determination means determines that the block is not erasable, and the block replacement control Notification means for notifying the outside that the nonvolatile semiconductor memory has been prohibited from being rewritten when the unused block is not detected by the means, and each time the count value of the counting means and the block replacement information are updated. Rewriting means for timely rewriting the stored content of the rewrite control information storage means according to the updated content.

When the erase signal for an arbitrary block is input, the judging means reads the number of rewrites of the block and the guaranteed number of rewrites of the nonvolatile semiconductor memory from the rewrite control information storage means, and the number of rewrites becomes the guaranteed number of rewrites. Whether or not the block has been reached is judged. When it has not been reached yet, rewriting of the block is permitted, but when it is reached, information indicating that erasure is impossible is passed to the block replacement control means.

The block replacement control means searches the spare storage area in the non-volatile semiconductor memory to check whether or not an unused block exists. If there is an unused block, the block replacement information necessary for executing the block replacement is updated via the rewriting means, and the block replacement is executed. The rewriting means records, in the block replacement information, which block in the main storage area is replaced with which block in the auxiliary storage area, and
The number of times of rewriting is updated for the block in the spare storage area in which the block has been replaced.

On the other hand, in the detection of the unused block by the block replacement control means, if the unused block does not exist and is not detected, the block replacement control means rewrites the nonvolatile semiconductor memory via the notification means. Notify outside that it is prohibited.

As described above, when the number of times of rewriting of a block in the main memory area reaches the guaranteed number of times of rewriting, block replacement is switched to an unused block of the spare memory area, so that further rewriting of blocks in the main memory area is performed. Is suppressed and excessive rewriting is prohibited, so that the reliability of the data stored in the nonvolatile semiconductor memory can be ensured.

Further, when a certain block in the main memory area reaches the guaranteed number of rewrites, the block replacement is not impossible anymore regardless of the presence or absence of an unused block as in the prior art, but the spare memory is not used. As long as an unused block exists in the area, the block replacement is allowed, so that the life can be substantially extended with respect to the number of rewrites.

In the above description, as to where the rewrite control information storage means is provided, the main memory area and the spare memory area are provided inside the nonvolatile semiconductor memory including the main memory area and the spare memory area. The rewrite control information storage means may be provided in an area other than the storage area, or may be provided separately from the nonvolatile semiconductor memory in which the main storage area and the auxiliary storage area are incorporated.

In the former case, the rewrite control information storage means can be accessed by using the row decoder and the column decoder for the main memory area and the spare memory area.

In the latter case, the rewrite control information storage means can be accessed independently of the access to the non-volatile semiconductor memory.

Further, in the above-described preferred embodiment, the block replacement information has the same number of block unit information as the number of blocks in the main storage area, which is a numerical value indicating the presence or absence of block replacement in each block constituting the main storage area. It is configured by doing. And
This block unit information indicates that there is no block replacement in the case of the initial value, and if it is other than the initial value, it indicates which block in the spare storage area is to be replaced according to the value. Of course, the initial value of this block unit information is other than the value that can be set in the block unit information at the time of block replacement. As an initial value, generally,
The minimum or maximum value. In this case, since block unit information indicating the presence / absence of block replacement is held for each block in the main storage area, the block replacement information can be simply configured.

Further, in the above-mentioned preferred embodiment, the block replacement control means detects the latest updated block replacement information from among the plurality of block unit information constituting the block replacement information, and the latest updated block replacement information is When the predetermined value has not been reached, the block replacement information necessary for executing the block replacement is updated by adding a specific value to the latest updated block replacement information, and the latest updated block replacement information reaches the predetermined value. In this case, it is configured to judge that there is no unused block in the spare storage area. The significance of this will become clear in the description of the embodiments below.

Further, in the above, a preferable mode is the minimum value or the maximum value of a plurality of block unit information with respect to the latest update block replacement information, and when the latest update block replacement information is the minimum value, the predetermined value is set. The maximum value is used to determine that there are no unused blocks in the spare storage area when the value reaches the maximum value, or when the latest update block replacement information is set to the maximum value, the predetermined value is reached. In this case, the minimum value is used to determine that there is no unused block in the spare storage area.

In this case, since the block replacement is executed at a proper time based on the block replacement information, the block replacement can be performed without the need for a complicated decoder.

Further, in the above, in a preferable mode, at least the operation of the judging means is stopped so that the main storage area is not restricted by the number of rewrites indicated by the guaranteed number of rewrites stored in the rewrite control information storage means. The second operation mode is to provide rewriting to any block in the spare storage area.

In this case, the inspection and the characteristic evaluation of the memory cells forming the rewrite control information storage means can be advantageously developed.

Further, in the above, in a preferred mode, it is possible to directly rewrite the information stored in the rewriting control information storage means by inputting a predetermined control signal from the outside without depending on the rewriting means. 3 operation modes.

In this case, when some trouble occurs in the non-volatile semiconductor memory device, the limit on the number of rewrites designated by the rewrite reference number information is relaxed, and the analysis for investigating the cause of the trouble is advantageously developed. can do.

[0028]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a nonvolatile semiconductor memory device of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a nonvolatile semiconductor memory device according to an embodiment of the present invention. 1
Is a non-volatile semiconductor memory composed of a flash EEPROM, 2 is a main storage area composed of a plurality of blocks and capable of rewriting data in block units, 3 is a preliminary memory composed of a plurality of blocks and capable of rewriting data in block units Area, 4 is a rewrite control information storage area, 5 is a control unit, 6
Is a row decoder, 7 is a switching control unit, 8 is a selection circuit unit, 9
Is a column decoder, 10 is an erase signal for erasing an arbitrary block of the main memory area 2 and the spare memory area 3, 1
1 is erase block information for designating a block to be erased at the time of erasing, 12 is a block replacement signal, and 13 is a control unit 5 that the writing or erasing is completed when writing or erasing the nonvolatile semiconductor memory 1.
It is a rewriting completion signal for notifying the.

Each block forming the main memory area 2 has the same memory cell array structure as each block forming the spare memory area 3, and can be replaced with a block address of the same logic.

The replacement of the blocks forming the main storage area 2 with the blocks forming the auxiliary storage area 3 is performed in accordance with the block replacement signal 12 output from the control section 5.
Outputs a switching signal to the selection circuit unit 8, and the selection circuit unit 8 switches the block of the connection destination.

In the data rewriting and reading operations of the non-volatile semiconductor memory 1, a signal line activated by the row decoder 6 for selecting an arbitrary block in the main memory area 2 or an address existing in the arbitrary block is selected. By switching to the signal line selected by the switching control unit 7 and the selection circuit unit 8, that is, the signal line connected to the block to which the spare storage area 3 is to be replaced, the block address of the same logic is replaced.

Therefore, at the time of rewriting and reading the data of the non-volatile semiconductor memory 1, the address data for designating the address to be rewritten and read is decoded by the row decoder 6 and the column decoder 9 and the non-volatile semiconductor memory. It is necessary to perform block replacement by the switching control unit 7 and the selection circuit unit 8 before reaching 1.

Therefore, when the nonvolatile semiconductor memory device shown in FIG. 1 is powered on, the control unit 5 outputs the block replacement signal 12. Block replacement signal 1
2 will be described later.

FIG. 2 is a configuration diagram of the rewrite control information storage area 4 in one embodiment of the present invention.

Reference numeral 41 stores rewriting reference count information I (Na) which is information about the guaranteed number of rewriting Na of data in the storage area of the nonvolatile semiconductor memory 1 constituted by the main storage area 2 and the spare storage area 3. Rewriting reference count storage area, 42 is block replacement information I (Nx) between an arbitrary block in the main storage area 2 and an arbitrary block in the auxiliary storage area 3.
Is a block replacement information storage area, and 43 is a rewrite frequency storage area that stores the actual rewrite frequency information I (Nb) of each block constituting the main storage area 2 and the spare storage area 3.

Since the rewrite control information storage area 4 is provided in the same non-volatile semiconductor memory 1 as the main storage area 2 and the spare storage area 3, the row decoder 6 shown in FIG.
The data can be rewritten to any address selected by the column decoder 9 and the stored data can be stored in a non-volatile manner.

Here, the case where the rewrite control information storage area 4 is provided in the non-volatile semiconductor memory 1 will be described as an example. However, in the non-volatile semiconductor memory device according to the present invention, the rewrite control information storage area 4 is provided. A non-volatile semiconductor memory for storing may be provided separately from the non-volatile semiconductor memory 1.

The data stored in the rewrite control information storage area 4 is used to determine whether or not the data rewrite to the main storage area 2 and the spare storage area 3 is valid, and for the above-mentioned arbitrary block of the main storage area 2. It is used for the replacement control of an arbitrary block in the spare storage area 3. Therefore, in order to prevent an erroneous operation at the time of rewriting or reading of data in the main memory area 2 and the spare memory area 3, in the actual use mode by the user of the nonvolatile semiconductor memory device, in principle,
The rewrite operation on the rewrite control information storage area 4 from the outside of the nonvolatile semiconductor memory device is prohibited.

FIG. 3 is a block diagram showing the configuration of the control unit 5 in the embodiment of the present invention.

Reference numeral 51 is a command control circuit for executing a preset command according to an input signal, 52 is an erase block register for storing erase block information 11, 5
Reference numeral 3 is a rewriting reference number register that stores rewriting reference number information I (Na), and 54 is a rewriting actual number information I (Nb).
, A block replacement information register 55 for storing block replacement information I (Nx), 5
6 is the input two data (I (Na), I (N
b)) is compared, and a comparator that outputs a preset signal according to the result, 57 is a calculator that performs a preset calculation according to the input computing command, and outputs a computation result, 58
Indicates a unidirectional data transfer from the rewrite control information storage area 4 to the rewrite reference count register 53 and a bidirectional data transfer between the rewrite control information storage area 4 and the rewrite count register 54 and a rewrite control information storage area 4. This is a data bus for bidirectional data transfer with the block replacement information register 55.

Reference numeral 511 is address data output from the command control circuit 51 for designating an address in the rewrite control information storage area 4, and 512 is the command control circuit 51.
From the command control circuit 51 to the rewrite control information storage area 4, a read signal 513 is output from the command control circuit 51 to the rewrite control information storage area 4, and a write signal 514 is output from the command control circuit 51 to the rewrite control information storage area 4. Erase signal, 515 is a count-up operation instruction output from the command control circuit 51 to the operation unit 57, 516 is a block replacement operation instruction output from the command control circuit 51 to the operation unit 57, 517 is the main storage area 2 and the spare An erase signal output from the command control circuit 51 to the main storage area 2 and the auxiliary storage area 3 in order to execute the erase to the storage area 3, 518 is a read signal output from the command control circuit 51 to the rewriting reference count register 53, 5
Reference numeral 19 is a rewrite prohibition signal output from the command control circuit 51 to the outside of the nonvolatile semiconductor memory device, 521 is erase block information, 531 is rewrite reference count information I (N
a) and 541 are information on the number of rewrites I (Nb), 551
Is the block replacement information I (Nx), 561 is the comparison result output from the comparator 56 to the command control circuit 51, 571
Is a calculation result output from the computing unit 57 to the rewriting number register 54, 572 is a calculation result output from the computing unit 57 to the block replacement information register 55, and 573 is a computing unit 57.
Is a control signal output from the computing unit 57 to the command control circuit 51 for designating the next operation of the command control circuit 51 according to the computation result of

With respect to the nonvolatile semiconductor memory device configured as described above, the operation in the actual use mode by the user will be described below with reference to the flowchart of FIG.

When the nonvolatile semiconductor memory device according to the present embodiment is powered on as a preparatory work for rewriting and reading data in the main memory area 2 and the spare memory area 3, the control unit 5 First, the rewrite reference number storage area 41 of the rewrite control information storage area 4
The address data 511 for designating the data and the read signal 512 are output, and the rewriting reference number information I (Na) stored in the rewriting reference number storage area 41 is stored in the data bus 58.
It is read out and stored in the rewriting reference count register 53 through (step S1).

Next, the control section 5 outputs address data 511 for designating the block replacement information storage area 42 of the rewrite control information storage area 4 and a read signal 512,
The block replacement information I (Nx) stored in the block replacement information storage area 42 is read out and stored in the block replacement information register 55 through the data bus 58 (step S2).

In the above description of FIG. 1, it has been explained that the control section 5 outputs the block replacement signal 12 when the power of the nonvolatile semiconductor memory device is turned on. The operation of storing the rewrite reference number information I (Na) in the reference number register 53 and the operation of storing the block replacement information I (Nx) in the block replacement information register 55 are performed first.

The control unit 5 uses the block replacement information register 5
The information stored in 5 is output to the switching control unit 7 as the block replacement signal 12.

When erasing data in an arbitrary block in the main memory area 2, the erase signal 10 and erase block information 11 are input to the control unit 5. As shown in FIG. 3, the erase signal 10 is input to the command control circuit 51 in the control unit 5,
The erase block information 11 is stored in the erase block register 52 in the control unit 5 and then input to the command control circuit 51 (step S3).

The erase block information 11 and the erase block information 521 shown in FIG. 3 are the same information. The erase block information 11 has the same number of bits as the number of blocks forming the main memory area 2 or more bits than the number of blocks forming the main memory area 2, and the bit corresponding to the block to be erased is set to "1" and erased. The erase block is designated by setting the bit corresponding to the block that is not the target to “0”. By setting a plurality of bits in the erase block information 11 to "1", a plurality of blocks in the main memory area 2 can be erased simultaneously as an erase target. The erase block register 52 has the same number of bits as the erase block information 11 to store the erase block information 11.

Hereinafter, a case will be described as an example in which the blocks designated to be erased by the erase block information 521 are a plurality of blocks.

When the erase signal 10 and the erase block information 521 are input to the command control circuit 51, the command control circuit 51 reads out the rewrite history number information I (Nb) of the erase target block designated by the erase block information 521. Therefore, the address data 511 and the read signal 512 for designating an area in the rewrite frequency storage area 43 of the rewrite control information storage area 4 in which the rewrite record frequency information I (Nb) of the erase target block is stored are output. To do.

However, in the rewrite frequency storage area 43 of the rewrite control information storage area 4, the area storing the rewrite record frequency information I (Nb) of the erase target block is subjected to block replacement for the erase target block. The command control circuit 51 uses the block replacement information I (Nx) 5 from the block replacement information register 55 because it depends on whether or not
51 is read out, and based on the block replacement information I (Nx) 551, in the rewriting frequency storage area 43 of the rewriting control information storage area 4, the rewriting actual performance frequency information I of the block to be erased.
Address data 511 for designating an area storing (Nb) is output.

That is, in a state where the block to be erased is not a block replacement and is a block forming the main memory area 2, the number of rewriting history information I (N
Address data 511 for designating the area storing b) is output. Further, when the block to be erased has already been replaced with one of the spare blocks forming the spare storage area 3, the area storing the rewrite record count information I (Nb) of the replaced spare block is designated. The address data 511 is output (step S4).

(1) First erase target block When a plurality of blocks designated as erase targets exist, that is, when a plurality of bits in the erase block information 521 are "1", the command The control circuit 51 first sets the address data 511 for designating an area in which the rewrite record count information I (Nb) of one block lower in the logical block address is stored among the plurality of blocks designated to be erased. Output at the beginning. In this way, the block designated as the erase target block is first called the first erase target block.

In the same manner, the i-th block from the lower logical block address among the plurality of blocks designated to be erased will be called the i-th erased block. That is, the second block from the lower logical block address is called the second erase target block, and the third block from the lower logical block address is called the third erase target block.

Information on the actual number of rewrites I (N) of the first erase target block stored in the rewrite count storage area 43.
b) is a rewrite count register 5 through the data bus 58.
4 and is stored (step S4).

In the present embodiment, the rewrite frequency register 54 has a size capable of storing the rewrite record frequency information I (Nb) for one block, as an example configuration. Therefore, when there are a plurality of blocks designated to be erased, the command control circuit 51 causes the information I on the number of rewrites corresponding to one block lower in the logical block address among the plurality of blocks designated to be erased.
It is necessary to read and store in the rewriting frequency register 54 in order from (Nb).

The first stored in the rewrite count register 54
Information I (Nb) on the number of rewrites of the block to be erased
Is input to the comparator 56 as the number of rewriting history information I (Nb) 541.

The command control circuit 51 outputs a read signal 512 to the rewrite count storage area 43 in accordance with the erase block information 521, and then, the rewrite reference count information I (Na) stored in the rewrite reference count register 53. )
A read signal 518 for reading the value into the comparator 56 is output to the rewriting reference count register 53. Read signal 5
Rewriting reference number register 53 which has received 18 outputs the stored information to comparator 56 as rewriting reference number information I (Na) 531. Here, the comparator 56 has the guaranteed number of times of rewriting Na, which is the value of the input number of times of rewriting reference I (Na) 531, and the number of times of actual rewriting I (Nb) 5
The magnitude relationship of the number of rewrites Nb, which is the value of 41, is compared, and the comparison result 561 is output to the command control circuit 51. This function corresponds to the "determination means" in the claims (step S5).

(1-1) In the case of Nb <Na The comparison result 561 is a control signal for causing the command control circuit 51 to execute a command, and the comparison result 561 is the value of the actual rewriting frequency information I (Nb) 541. If the signal indicates that the certain number of times of rewriting Nb is less than the guaranteed number of times of rewriting Na, which is the value of the reference number of times of rewriting information I (Na) 531, the command control circuit 51 validates the erasing of the first erase target block. In addition, the control is performed to increase the number of rewrites of the first erase target block by "+1". More details are as follows.

First of all, the command control circuit 51 stores the rewriting record count information I stored in the rewriting count register 54.
(Nb) is incremented by "+1". This function corresponds to the "counter" in the claims (step S6).

Then, the count-up operation instruction 515 for storing in the rewriting number register 54 is output again. When the calculator 57 receives the count-up calculation command,
The 1 ”count-up operation is completed, and the operation result 571 is output to the rewrite number register 54. Then, the computing unit 57 updates the updated rewriting frequency information I (Nb) of the rewriting frequency register 54 to the rewriting frequency information I (Nb) of the first erase target block in the rewriting frequency storage area 43.
Is output to the command control circuit 51, that is, a control signal 573 for storing in a region in the rewrite number storage region 43 in which the rewrite record number information I (Nb) before being updated is stored.

Upon receipt of the control signal 573, the command control circuit 51 erases the address data 511 for designating an area in the rewrite frequency storage area 43 for storing the actual rewrite frequency information I (Nb) of the first erase target block. Signal 514
Is output to erase the area of the rewrite frequency storage area 43 in which the rewrite record frequency information I (Nb) of the first erase target block is stored. The rewrite count storage area 43 outputs a rewrite completion signal 13 indicating the completion of erasing to the command control circuit 51.

In response to the rewrite completion signal 13, the command control circuit 51 further specifies address data 511 for designating an area in the rewrite frequency storage area 43 for storing the actual rewrite frequency information I (Nb) of the first erase target block. And a write signal 513 is output. As a result, the count-up operation result 5 stored in the rewrite count register 54
71, that is, the rewrite record count information I (Nb) that has been incremented by “+1” is transferred to the rewrite count storage area 43 through the data bus 58. As a result, the rewrite record count information I (Nb) that has been incremented by “+1” is written to the region in the rewrite count storage area 43 that stores the rewrite record count information I (Nb) of the first erase target block. (Step S7).

As described above, the command control circuit 51 performs the data rewriting operation on the rewriting frequency storage area 43 in the actual use mode by the user of the nonvolatile semiconductor memory device shown in the present embodiment.

(1-2) In the case of Nb ≧ Na, the comparison result 561 is the rewriting record number information I (Nb) 541.
The number of rewrites Nb, which is the value of
a) When the signal indicates that the number of guaranteed rewriting Na is 531 or more, the command control circuit 51
An unused block is detected from the blocks forming the spare memory area 3 (step S8), and the first erase target block is replaced with the detected unused block of the spare memory area 3 (step S8). S11), a control for validating the erase for the first erase target block is performed,
If an unused block cannot be detected among the blocks forming the spare storage area 3, control is performed to invalidate the erasure of the first erase target block (step S13). More details are as follows.

First, the command control circuit 51 detects an unused block from the blocks forming the spare memory area 3 (step S8), and the unallocated block of the spare memory area 3 detected as the first erase target block is detected. A block replacement operation instruction 516 for replacing the used block is output.

Before describing the block replacement operation, the block replacement information I (Nx) will be described with reference to FIG.

FIG. 4 is a block diagram of the block replacement information I (Nx) in one embodiment of the present invention.

The block replacement information I (Nx) is information indicating which spare block in the spare storage area 3 is to replace an arbitrary block in the main storage area 2.

When the spare storage area 3 is composed of three spare blocks, the information indicating which of the three spare blocks is to be replaced is shown in FIG.
Two bits are required as shown in.

That is, if one block in the main memory area 2 is not replaced with a spare block in the spare memory area 3, then "00" is set and any one block in the main memory area 2 is spared in the spare memory area 3. To replace block 1,
If "01" is set and one block in the main memory area 2 is replaced with the spare block 2 in the spare memory area 3, "1" is set.
When the arbitrary block in the main memory area 2 is replaced with the spare block 3 in the spare memory area 3, the replacement information of the arbitrary block in the main memory area 2 is configured by setting it to "11". To do.

Therefore, the block replacement information I (Nx) of the entire main memory area 2 composed of N blocks is N × 2.
It can be configured as bit data.

FIG. 5A shows the block replacement information I indicating that the replacement of the spare block in the spare storage area 3 with the spare block in the main storage area 2 composed of N blocks is not performed.
(Nx) is shown. In this case, block 1 of main memory area 2
The replacement information of each block from to N is the initial value "00".

FIG. 5B shows a block 1 of the main memory area 2.
And block replacement information I (Nx) indicating a state in which the spare block 1 in the spare storage area 3 is replaced. in this case,
Only the replacement information of the block 1 is “01”, and the replacement information of each block other than the block 1 is “00”.

FIG. 5C shows a block 1 of the main memory area 2.
And the spare block 1 in the spare storage area 3 and the block 3 in the main storage area 2 and the spare block 2 in the spare storage area 3 are replaced with block replacement information I (N
x) is shown. In this case, the replacement information of block 1 is "0".
1 "and the replacement information of the block 3 is" 10 ", and the replacement information of each block other than the block 1 and the block 3 is" 00 ".

Similarly, FIG. 5D shows replacement of the block 1 in the main memory area 2 with the spare block 1 in the spare memory area 3,
Block replacement information I indicating a state in which the block 3 in the main memory area 2 and the spare block 2 in the spare memory area 3 are replaced, and the block 5 in the main memory area 2 and the spare block 3 in the spare memory area 3 are replaced. (Nx) is shown. In this case, the replacement information of block 1 is “01”, the replacement information of block 3 is “10”, and the replacement information of block 5 is “11”.
And block 1 and block 3 and block 5
The replacement information of each block other than is “00”.

In the above description, the block replacement information I when the spare storage area 3 is composed of three spare blocks
Although (Nx) has been described, the spare storage area 3 is set to, for example, 1
In the case of configuring with 5 spare blocks, 4-bit data as shown in FIG. 4B is required as information indicating which spare block of 15 spare blocks is to be replaced. , The block replacement information I (Nx) of the entire main memory area 2 composed of N blocks can be configured as N × 4 bit data. That is, the number of bits of the block replacement information I (Nx) varies depending on how many blocks the main storage area 2 is made up of and how many spare blocks the spare storage area 3 is made up of.

Although the block replacement information I (Nx) has been described above, the main storage area 2 is composed of 32 blocks for the block replacement operation when the calculator 57 receives the block replacement operation instruction 516. An example will be described in which the spare storage area 3 is configured by three blocks. In this case, the block replacement information I (Nx) of 32 × 2 = 64 bits is stored in the block replacement information register 5
Stored in 5.

The arithmetic unit 57 has a block replacement arithmetic instruction 51.
6 is received, the block replacement information I (Nx) of 64 bits stored in the block replacement information register 55 contains 32 pieces of block 1 replacement information to block 32 replacement information each consisting of 2 bits. The replacement information is sequentially read, and the maximum value of the 32 pieces of replacement information is detected.

If the maximum value is "00", it indicates that all three spare blocks forming the spare storage area 3 are unused.

When the maximum value is "01", it indicates that the spare block 1 of the three spare blocks forming the spare storage area 3 has already been used for block replacement.

When the maximum value is "10", it indicates that among the three spare blocks forming the spare storage area 3, the spare block 1 and the spare block 2 have already been used by block replacement.

When the maximum value is "11",
This indicates that all three spare blocks forming the spare storage area 3 have already been used by block replacement, that is, there is no unused spare block.

When the maximum value detected by the calculator 57 is other than "11", the calculator 57 adds "+1" to the detected maximum value. Then, of the 64-bit block replacement information I (Nx) stored in the block replacement information register 55, 2-bit replacement information corresponding to the first erase target block is added with “+1” to the maximum value. The block replacement information I (Nx) is updated by replacing with the calculation result. This function corresponds to "rewriting means" in the claims (step S10).

When the block replacement information I (Nx) stored in the block replacement information register 55 is updated, the block replacement information register 55 outputs the updated content as the block replacement signal 12 to the switching control section 7. , Shall perform block replacement immediately. This function corresponds to "block replacement control means" in the claims (step S11).

Further, the computing unit 57 has the block replacement information I (N) stored in the block replacement information register 55.
When the update of x) is completed, the control signal 573 indicating that the first erase target block has been replaced with the spare block is output to the command control circuit 51.

When the command control circuit 51 receives the control signal 573 from the calculator 57 indicating that the first block to be erased has been replaced with the spare block, the command control circuit 51 rewrites the updated block replacement information I (Nx). Control for writing to the block replacement information storage area 42 of the storage area 4 is performed. More details are as follows.

First, the command control circuit 51 outputs address data 511 for designating the block replacement information storage area 42 and an erase signal 514, erases the block replacement information storage area 42, and confirms that the erase is completed. In response to the rewriting completion signal 13 shown, the command control circuit 51 further outputs the address data 511 for designating the block replacement information storage area 42 and the write signal 513, and is updated in the block replacement information register 55. The updated block replacement information I (Nx) is written to the block replacement information storage area 42 by transferring the block replacement information I (Nx) to the block replacement information storage area 42 through the data bus 58.

As described above, the command control circuit 51 performs the data rewriting operation on the block replacement information storage area 42 in the actual use mode by the user of the nonvolatile semiconductor memory device shown in the present embodiment.

When the command control circuit 51 receives the rewrite completion signal 13 indicating that the writing to the block replacement information storage area 42 is completed, this time, the block replacement information I (Nx) 551 is read from the block replacement information register 55. It is determined by reading out which spare block in the spare storage area 3 the first erase target block has been replaced, and the rewrite record count information I (Nb) of the replacement destination spare block in the rewrite count storage area 43 is displayed. The actual rewriting frequency information I (Nb) indicating that the actual rewriting frequency Nb is 1 is written in the stored area. This is to update the rewrite history number information I (Nb) of the spare block that has been replaced with the first erase target block (step S12).

As described above, the erase block information 52
When there are a plurality of blocks designated to be erased by 1 and the command control circuit 51 receives the rewrite completion signal 13, it determines that the first block to be erased is permitted to erase, and at the same time, the first The control for enabling the erase of the erase target block ends.

The case of receiving the rewrite completion signal 13 is the following two cases.

In the first case, by determining that the actual number of rewrites of the first erase target block is less than the reference number of rewrites, the actual record number of rewrites information I (Nb) of the first erase target block is updated to rewrite. The rewriting history number information I (N) updated for a predetermined area of the number-of-times storage area 43
b) is written, and the number of rewriting results information I (Nb)
This is the case when the writing of is completed.

In the second case, although the actual number of rewrites of the first erase target block is equal to or greater than the reference number of rewrites, it is determined that the spare block in the spare storage area 3 can be replaced.
Block replacement is performed and the number of rewrites storage area 43
In order to update the actual rewriting frequency information I (Nb) in a predetermined area of
This is the case when the writing of (Nb) is completed.

The initial value may be set to the maximum value "11" instead of the minimum value "00". In this case, it is "-1" every time the spare block is used.
By adding or decrementing, "10",
The spare blocks are used in the order of “01” and “00”, and when the minimum value detected by the arithmetic unit 57 becomes “00”, all three spare blocks forming the spare storage area 3 are already used by the block replacement. That is, that is, there is no unused spare block.

In the above-mentioned unused block detection, whether or not the maximum value is "11" is a criterion (step S9).

When the maximum value detected by the calculator 57 is "11", there is no unused spare block in the spare storage area 3, so the calculator 57 replaces the first erase target block. Control signal 5 indicating that the erasure of the first erase target block is invalid.
73 is output to the command control circuit 51.

The command control circuit 51 controls the control signal 573 indicating that the erase of the first erase target block is invalid.
When the data is received, the number Nb of data rewrites to the non-volatile semiconductor memory device is the preset number of guaranteed rewrites Na.
In order to notify that the non-volatile semiconductor memory device has reached, the rewrite prohibition signal 519 is output to the outside of the non-volatile semiconductor memory device to prohibit the subsequent rewriting of data to the non-volatile semiconductor memory device. This function corresponds to the "notifying means" in the claims (step S13).

(2) When the second erase target block command control circuit 51 completes the control for validating the erase of the first erase target block, the second erase target block command control circuit 51 subsequently erases a plurality of blocks designated to be erased. Of these, the control for enabling the erasing of the second block from the lower logical block address, that is, the second erasing target block is started (step 14). More details are as follows.

First, the command control circuit 51 outputs the block replacement information I (Nx) from the block replacement information register 55.
551 is read, and block replacement information I (Nx) 551
On the basis of the above, the address data 511 for designating the area in which the rewritable count information I (Nb) of the second erase target block is stored in the rewritable count storage area 43 of the rewrite control information storage area 4 and read. The signal 512 is output, and the actual rewriting frequency information I (Nb) of the second erase target block is read to the rewriting frequency register 54.

The second data stored in the rewrite count register 54
Rewriting history information I (Nb) 5 of the block to be erased
41 is input to the comparator 56. Command control circuit 51
After outputting the read signal 512 to the rewrite frequency storage area 43, the comparator 56 compares the rewrite standard frequency information I (Na) stored in the rewrite standard frequency register 53.
The read signal 518 for reading out is output to the rewriting reference count register 53.

Rewriting reference number register 53 receiving read signal 518 outputs the stored information to comparator 56 as rewriting reference number information I (Na) 531.
Here, the comparator 56 determines the magnitude relationship between the guaranteed number of times of rewriting Na, which is the value of the input rewriting reference number of times information I (Na) 531, and the number of times of rewriting Nb, which is the value of the actual number of rewriting times information I (Nb) 541. The comparison result 561 is output to the command control circuit 51.

The comparison result 561 is a control signal for causing the command control circuit 51 to execute a command. When the comparison result 561 is a signal indicating that the number of rewrites Nb is less than the guaranteed number of rewrites Na, command control is performed. Circuit 5
1 makes the erasing of the second erasing target block valid, and performs control for counting up the number of rewrites of the second erasing target block by "+1".

First, the command control circuit 51 causes the rewriting frequency information I stored in the rewriting frequency register 54.
(Nb) is incremented by "+1", and the count-up operation instruction 515 for storing in the rewriting number register 54 is output again. When the computing unit 57 that has received the count-up computing command completes the “+1” count-up computation and outputs the computation result 571 to the rewriting number register 54, the computing unit 57 updates the rewriting number register 5
4 is the area for storing the actual rewriting frequency information I (Nb) of the second erasing target block in the rewriting frequency storage area 43, that is, the rewriting actual frequency information I (Nb) before being updated. ) Is stored in the area of the rewrite frequency storage area 43 that has been stored.
3 is output to the command control circuit 51.

Upon receiving the control signal 573, the command control circuit 51 erases the address data 511 for designating an area in the rewrite frequency storage area 43 for storing the actual rewrite frequency information I (Nb) of the second erase target block. Signal 514
Is output to erase the area in the rewrite frequency storage area 43 for storing the rewrite history frequency information I (Nb) of the second erase target block. Further, the command control circuit 51 is responsive to the rewriting completion signal 13 indicating the completion of erasing to specify an area of the rewriting frequency storage area 43 for storing the actual rewriting frequency information I (Nb) of the second erase target block. The address data 511 and the write signal 513 are output. Then, the count-up operation result 571 stored in the rewrite count register 54, that is, the rewrite record count information I (Nb) that has been incremented by “+1” is transferred to the data bus 58.
Through the rewriting frequency storage area 43. As a result, the rewrite record count information I (Nb) that has been incremented by “+1” is written to the region in the rewrite count storage area 43 in which the rewrite record count information I (Nb) of the second erase target block is stored. .

If the comparison result 561 is a signal indicating that the number of rewrites Nb is the guaranteed number of rewrites Na or more, the command control circuit 51 selects an unused block from the blocks constituting the spare storage area 3. By detecting and replacing the second block to be erased with an unused block of the detected spare memory area 3, control is performed to validate the erase to the second block to be erased, and the spare memory is also stored. If an unused block cannot be detected among the blocks forming the area 3, control is performed to invalidate the erasure of the second erase target block. More details are as follows.

First, the command control circuit 51 detects an unused block from the blocks forming the spare storage area 3, and identifies the second block to be erased and the detected unused block in the spare storage area 3. The block replacement calculation instruction 516 for replacement is output to the calculator 57. Calculator 5
Upon receipt of the block replacement operation instruction 516, the block 7 from the block replacement information I (Nx) of 64 bits stored in the block replacement information register 55 to the block 32 from the block 1 replacement information composed of 2 bits. The 32 pieces of replacement information up to the replacement information are sequentially read, and the maximum value of the 32 pieces of replacement information is detected.

When the maximum value detected by the computing unit 57 is "11", there is no unused spare block in the spare storage area 3, so the computing unit 57 replaces the second erase target block. Control signal 5 indicating that the erasure of the second erase target block is invalid.
73 is output to the command control circuit 51.

The command control circuit 51 controls the control signal 573 indicating that the erasure of the second erase target block is invalid.
When the data is received, the number Nb of data rewrites to the non-volatile semiconductor memory device is the preset number of guaranteed rewrites Na.
In order to notify that the non-volatile semiconductor memory device has reached, the rewrite prohibition signal 519 is output to the outside of the non-volatile semiconductor memory device to prohibit the subsequent rewriting of data to the non-volatile semiconductor memory device.

When the maximum value detected by the calculator 57 is other than "11", the calculator 57 adds "+1" to the detected maximum value. Then, of the 64-bit block replacement information I (Nx) stored in the block replacement information register 55, the operation result obtained by adding “+1” to the maximum value of the 2-bit replacement information corresponding to the second block to be erased. The block replacement information I (Nx) is updated by replacing with, and block replacement is executed.

Further, the computing unit 57 has the block replacement information I (N) stored in the block replacement information register 55.
When the updating of x) is completed, the control signal 573 indicating that the second erase target block has been replaced with the spare block is output to the command control circuit 51. Command control circuit 51
When the control signal 573 indicating that the second block to be erased has been replaced with the spare block is received from the arithmetic unit 57, the updated block replacement information I (Nx) is written to the block replacement information in the rewrite control information storage area 4. Control for writing to the storage area 42 is performed. More details are as follows.

First, the command control circuit 51 outputs address data 511 for designating the block replacement information storage area 42 and an erase signal 514 to erase the block replacement information storage area 42. In response to the rewriting completion signal 13 indicating that the erasing is completed, the command control circuit 51 further outputs address data 511 for designating the block replacement information storage area 42 and a write signal 513, and stores it in the block replacement information register 55. The updated block replacement information I (Nx) is transferred to the block replacement information storage area 42 through the data bus 58. As a result, the updated block replacement information I (Nx) is written in the block replacement information storage area 42. When the command control circuit 51 receives the rewrite completion signal 13 indicating that the writing to the block replacement information storage area 42 is completed, this time, the block replacement information I (Nx) 551 is read from the block replacement information register 55. And
It is determined which spare block in the spare storage area 3 the second erase target block has been replaced with, and the actual rewriting frequency information I (Nb) of the replacement destination spare block in the rewriting frequency storage area 43 is stored. Rewriting record number information I (N
Write b). This is the information I (N) of the number of rewrites of the spare block that has been replaced with the second block to be erased.
This is for updating b).

As described above, the erase block information 52
When there are a plurality of blocks designated to be erased by 1 and the command control circuit 51 receives the rewrite completion signal 13, the command control circuit 51 determines that the second block to be erased is permitted to erase, and at the same time the second block is erased. The control for enabling the erase of the erase target block ends.

The case where the rewrite completion signal 13 is received is the following two cases.

In the first case, it is determined that the actual number of rewrites of the second erase target block is less than the reference number of rewrites, and the actual rewrite count information I (Nb) of the second erase target block is updated to rewrite. The rewriting history number information I (N) updated for a predetermined area of the number-of-times storage area 43
b) is written, and the number of rewriting results information I (Nb)
This is the case when the writing of is completed.

In the second case, although the actual number of rewrites of the second erase target block is equal to or greater than the reference number of rewrites, it is determined that the spare block in the spare storage area 3 can be replaced.
Block replacement is performed and the number of rewrites storage area 43
In order to update the actual rewriting frequency information I (Nb) in a predetermined area of
This is the case when the writing of (Nb) is completed.

When the erase target block designated by the erase block information 521 is three or more blocks, the command control circuit 51 similarly performs the control for enabling the erase of the second erase target block. The above control for determining whether or not to permit the erasure is repeated for all the erasure target blocks after the third erasure target block.

The command control circuit 51 notifies that the number of times Nb of data rewriting to the nonvolatile semiconductor memory device has reached the preset guaranteed number of times of rewriting Na, and prohibits the rewriting of data to the nonvolatile semiconductor memory device. If the erase prohibition signal 519 is output to the outside of the non-volatile semiconductor memory device, and erasing is permitted for all blocks to be erased,
The command control circuit 51 outputs the erase signal 517 and collectively erases all the blocks specified by the erase block information 521 (step S1).
5).

If the block designated as the erase target by the erase block information 521 is one block, the first block in the series of controls for determining whether or not to permit the erase of a plurality of blocks described above is performed. The command control circuit 51 outputs an erase signal 517 when the erase of the erase target block is permitted, and erases one block designated by the erase block information 521.

Up to this point, the operation of control unit 5 in the actual use mode by the user of the nonvolatile semiconductor memory device shown in the present embodiment has been described.

In the above description, the data rewriting operation for the block replacement information storage area 42 and the rewriting frequency storage area 43 in the rewriting control information storage area 4 is all performed by the command control circuit 51, and the nonvolatile semiconductor memory device It is stated that the rewriting operation from outside is prohibited.

Further, in the above description, in the actual use mode by the user, the rewrite reference number storage area 41 in the rewrite control information storage area 4 has a read operation of the rewrite reference number information I (Na) by the command control circuit 51. It has been described that only data can be written, and data cannot be rewritten from outside the nonvolatile semiconductor memory device.

However, in order to carry out the inspection and characteristic evaluation of the memory cells forming the rewrite control information storage area 4 and the setting of the guaranteed rewrite frequency Na, that is, the writing of data to the rewrite reference count storage area 41, the rewrite control is performed. It is essential that the information storage area 4 can be rewritten from the outside of the nonvolatile semiconductor memory device.

Further, when any failure occurs in the non-volatile semiconductor memory device shown in the present embodiment, in order to perform an analysis for investigating the cause of the failure occurrence, the rewriting reference frequency information I (Na) is designated. Number of rewrites N
It is desirable that b is not limited.

Therefore, the non-volatile semiconductor memory device according to the present embodiment allows a rewriting operation to the rewriting control information storage area 4 from the outside of the non-volatile semiconductor memory device, and the number of rewriting times Nb is unlimited. The second operation mode).

First, in the test mode of the non-volatile semiconductor memory device shown in the present embodiment, the replacement of the blocks forming main memory area 2 with the spare memory area 3 is initially performed. Not yet. Then, all read signals, write signals, and erase signals input to the nonvolatile semiconductor memory device from the outside of the nonvolatile semiconductor memory device pass through the control unit 5 and are directly input to the nonvolatile semiconductor memory 1.

Similarly, the address information for designating the address of the nonvolatile semiconductor memory 1 to be read, written, and erased, which is input to the nonvolatile semiconductor memory device from the outside of the nonvolatile semiconductor memory device, and the block erase execution are executed. Sometimes, the erase block information for designating the erase target block in the main memory area 2 or the spare memory area 3 in the nonvolatile semiconductor memory 1 is directly passed to the row decoder 6 and the column decoder 9 through the control unit 5. It is input and selects a predetermined address or a block to be erased in the nonvolatile semiconductor memory 1.

During this time, the command control circuit 5 in the control unit 5
1 does not operate at all. Therefore, in the test mode, it is possible to directly perform a data read operation or a rewrite operation for an arbitrary address of the nonvolatile semiconductor memory 1 and a block erase operation for an arbitrary block from the outside of the nonvolatile semiconductor memory device. Becomes

Further, the command control circuit 51 in the control unit 5
Does not perform any operation, but by directly inputting a control signal for executing a desired operation to the command control circuit 51 from the outside of the nonvolatile semiconductor memory device, the user can operate in the actual use mode. Similarly, the command control circuit 51 can be operated.

[0131]

As described above, according to the present invention, when the number of times of rewriting of a block in the main memory area reaches the guaranteed number of times of rewriting, the main memory area is switched to an unused block of the spare memory area. Further rewriting in the block in the storage area is suppressed and excessive rewriting is prohibited, so that the reliability of the data stored in the nonvolatile semiconductor memory can be secured.

When a certain block in the main memory area reaches the guaranteed number of rewrites, the block replacement is no longer impossible regardless of the presence or absence of an unused block as in the conventional technique, but the spare memory is not used. As long as an unused block exists in the area, the block replacement is allowed, so that the life can be substantially extended with respect to the number of rewrites.

Further, by retaining the block unit information indicating the presence / absence of block replacement for each block in the main storage area, the block replacement information can be simply constructed.

Further, in the block replacement by judging whether or not there is an unused block in the spare storage area, since the block replacement is executed at a proper time by judging the maximum value or the minimum value using a numerical value, it is complicated. You don't need a special decoder.

If an operation mode is provided that allows the information in the rewrite control information storage means to be directly rewritten from the outside, the rewrite control information storage means can be inspected and analyzed and the guaranteed number of rewrites can be guaranteed. It is possible to set an arbitrary value in advance. That is, the inspection and characteristic evaluation of the memory cell forming the rewrite control information storage means can be advantageously developed. When some trouble occurs in the non-volatile semiconductor memory device, it is possible to relax the restriction on the number of rewrites designated by the rewrite reference number information, and to advantageously develop the analysis for investigating the cause of the trouble.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a nonvolatile semiconductor memory device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a rewrite control information storage area according to the embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a control unit according to the embodiment of the present invention.

FIG. 4 is a configuration diagram of block replacement information according to the embodiment of the present invention.

FIG. 5 is a configuration diagram showing an example of block replacement information according to the embodiment of the present invention.

FIG. 6 is a flowchart showing an operation of the nonvolatile semiconductor memory device according to the embodiment of the present invention.

FIG. 7 is a block diagram showing a configuration of a conventional nonvolatile semiconductor memory device.

[Explanation of symbols]

1 Non-volatile semiconductor memory (flash EEPROM) 2 main storage area 3 spare storage area 4 Rewrite control information storage area 5 control unit 6 row decoder 7 Switching control unit 8 Selection circuit section 9 column decoder 10 Erase signal 11 Erase block information 12 block replacement signal 13 Rewrite completion signal 41 Rewriting reference count storage area 42 block replacement information storage area 43 Rewrite count storage area 51 Command control circuit 52 Erase Block Register 53 Rewriting reference count register 54 Rewrite count register 55 Block replacement information register 56 comparator 57 calculator 58 data bus 511 address data 512 read signal 513 write signal 514 Erase signal 515 Count up operation instruction 516 Block replacement operation instruction 517 erase signal 518 read signal 519 Rewrite prohibition signal 521 erase block information 531 Rewriting reference count information (I (Na)) 541 Rewriting record information (I (Nb)) 551 block replacement information (I (Nx)) 561 comparison result 571 Count up calculation result 572 Block replacement operation result 573 control signal I (Na) Rewriting reference count information I (Nb) Rewriting record information I (Nx) block replacement information

Claims (9)

[Claims] 1. A main memory area configured by a plurality of blocks corresponding to logical addresses and capable of rewriting data in block units, and a plurality of blocks capable of replacing an arbitrary block of the main memory area with the same logical address. A non-volatile semiconductor memory having a spare storage area in which data can be rewritten in block units, the guaranteed number of rewrites of the non-volatile semiconductor memory, the number of rewrites of each block constituting the non-volatile semiconductor memory, and block replacement Rewriting control information storage means for storing information in a non-volatile manner, counting means for counting the number of times of rewriting of each block constituting the non-volatile semiconductor memory, and an erasing signal is input to an arbitrary block of the non-volatile semiconductor memory. At this time, the count value of the counting means is stored in the rewrite control information storage means. And a determination unit that determines whether or not the corresponding block is erasable when the guaranteed number of rewrites has been reached, and an unused block in the spare storage area that is detected when the determination unit determines that the block cannot be erased. Block replacement control means for updating the block replacement information and executing block replacement, and externally that the nonvolatile semiconductor memory is prohibited from being rewritten when the unused block is not detected by the block replacement control means. And a rewriting unit that rewrites the stored content of the rewrite control information storage unit in accordance with the updated content each time the count value of the counting unit and the block replacement information are updated. Non-volatile semiconductor memory device. 2. The rewrite control information storage means is provided in an area other than the main storage area and the spare storage area inside the nonvolatile semiconductor memory having the main storage area and the spare storage area built therein. The non-volatile semiconductor memory device according to claim 1, wherein the non-volatile semiconductor memory device is a non-volatile semiconductor memory device. 3. The rewrite control information storage means is provided separately from the non-volatile semiconductor memory in which the main storage area and the auxiliary storage area are incorporated. Non-volatile semiconductor memory device. 4. The block replacement information is configured by holding the same number of block unit information as the numerical value of the number of blocks in the main storage area, the block unit information indicating the presence or absence of block replacement in each block forming the main storage area, The block unit information indicates that there is no block replacement in the case of the initial value, and if it is other than the initial value, it indicates which block of the spare storage area is to be replaced according to the value, and the block 4. The non-volatile semiconductor memory device according to claim 1, wherein the initial value of the unit information is other than a value that can be set in the block unit information at the time of block replacement. 5. The initial value of the block replacement information is
The non-volatile semiconductor memory device according to claim 4, wherein the block unit information is a minimum value that can be set. 6. The block replacement control means detects latest updated block replacement information from a plurality of the block unit information constituting the block replacement information, and the latest updated block replacement information has reached a predetermined value. If not, the block replacement information necessary for executing the block replacement is updated by adding a specific value to the latest updated block replacement information, and if the latest updated block replacement information has reached a predetermined value. 6. The nonvolatile semiconductor memory device according to claim 4, wherein it is determined that there are no unused blocks in the spare storage area. 7. The latest updated block replacement information is a minimum value or a maximum value of a plurality of the block unit information,
When the latest updated block replacement information is set to the minimum value,
When the predetermined value is reached, the value for determining that there is no unused block in the spare storage area is the maximum value, and when the latest updated block replacement information is the maximum value, the predetermined value is set to the predetermined value. 7. The non-volatile semiconductor memory device according to claim 6, wherein a value for determining that there is no unused block in the spare storage area when the storage capacity has reached the minimum value is the minimum value. 8. The non-volatile semiconductor memory device according to claim 1, wherein at least the rewriting control information storage means stores the rewrite operation by stopping the operation of the determination means. A non-volatile semiconductor memory device comprising a second operation mode that enables rewriting to an arbitrary block of the main memory area and the auxiliary memory area without being subject to the number of rewriting times indicated by the guaranteed number of times. 9. The non-volatile semiconductor memory according to claim 1, wherein the information stored in the rewrite control information storage means is input by inputting a predetermined control signal from the outside. A non-volatile semiconductor memory device having a third operation mode which enables direct rewriting regardless of rewriting means.