JP2003133495A - Connector type semiconductor device - Google Patents
Connector type semiconductor deviceInfo
- Publication number
- JP2003133495A JP2003133495A JP2001327882A JP2001327882A JP2003133495A JP 2003133495 A JP2003133495 A JP 2003133495A JP 2001327882 A JP2001327882 A JP 2001327882A JP 2001327882 A JP2001327882 A JP 2001327882A JP 2003133495 A JP2003133495 A JP 2003133495A
- Authority
- JP
- Japan
- Prior art keywords
- connector
- lead
- width
- connecting portion
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、コネクター型半導
体素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a connector type semiconductor device.
【０００２】[0002]
【従来の技術】従来、コネクター型半導体素子として
は、例えば図３（Ａ）〜（Ｃ）に示すものが知られてい
る。ここで、図３（Ａ）は断面図、図３（Ｂ）は図３
（Ａ）のＰ矢視図、図３（Ｃ）は図３（Ａ）の平面図を
示す。2. Description of the Related Art Conventionally, as a connector type semiconductor device, for example, those shown in FIGS. 3A to 3C are known. Here, FIG. 3A is a cross-sectional view, and FIG.
FIG. 3A is a plan view of FIG. 3A, and FIG. 3C is a plan view of FIG.
【０００３】図中の符番１は第1のリードを示す。この
第1のリード１と離間した位置には、一部が第１のリー
ドと段違いに配置された第２のリード２が配置されてい
る。前記第1のリード１上には、半田層３ａを介して半
導体チップ４が搭載されている。前記半導体チップ４及
び前記第２のリード２には、夫々半田層３ｂ，３ｃを介
してコネクター５が接続されている。ここで、コネクタ
ー５と接続する前記第２のリード２の部分をコネクター
接続部７と称する。前記第１のリード１の一部、第２の
リード２の一部、半導体チップ４及びコネクター５は樹
脂製の外囲器６により樹脂封止されている。Reference numeral 1 in the figure indicates a first lead. At a position separated from the first lead 1, a second lead 2 is arranged, a part of which is arranged in a step different from that of the first lead. A semiconductor chip 4 is mounted on the first lead 1 via a solder layer 3a. A connector 5 is connected to the semiconductor chip 4 and the second lead 2 via solder layers 3b and 3c, respectively. Here, the portion of the second lead 2 that is connected to the connector 5 is referred to as a connector connecting portion 7. A part of the first lead 1, a part of the second lead 2, the semiconductor chip 4 and the connector 5 are resin-sealed by an envelope 6 made of resin.
【０００４】前記コネクター５はフラット形状で、第２
のリード２のコネクター接続部Ｘの幅（図中のＸ方向）
はコネクター５の幅やコネクター接続部７以外の第２の
リード２の幅より広く設定されている。The connector 5 is flat and has a second
Width of the connector connection part X of the lead 2 (X direction in the figure)
Is set wider than the width of the connector 5 and the width of the second lead 2 other than the connector connecting portion 7.
【０００５】こうした構成のコネクター型半導体素子
は、次のようにして製造される。まず、第１のリード１
に半田層３ａを、第２のリード２に半田層３ｂを形成す
る。次に、半田層３ａ上に半導体チップ４を搭載する。
つづいて、半導体チップ４上に半田層３ｃを形成した
後、コネクター５を半田層３ｃ、３ｂを介して半導体チ
ップ４、第２のリード２上に載せる。ひきつづき、リフ
ローを施し、半田層３ａ，３ｂ，３ｃを融着させた後、
半導体チップ４等の樹脂封止を行って外囲器６を形成
し、コネクター型半導体素子を製造する。The connector type semiconductor device having such a structure is manufactured as follows. First, the first lead 1
Then, the solder layer 3a is formed on the first lead 2, and the solder layer 3b is formed on the second lead 2. Next, the semiconductor chip 4 is mounted on the solder layer 3a.
Subsequently, after forming the solder layer 3c on the semiconductor chip 4, the connector 5 is placed on the semiconductor chip 4 and the second lead 2 via the solder layers 3c and 3b. Continuously, after performing reflow to fuse the solder layers 3a, 3b, 3c,
The semiconductor chip 4 and the like are sealed with resin to form the envelope 6, and a connector-type semiconductor element is manufactured.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、従来の
コネクター型半導体素子の場合、コネクター接続部７の
幅がコネクター５の幅やコネクター接続部７以外の第２
のリード２の幅より広く形成されているため、リフロー
時に半田層３ｂがコネクター接続部７の幅方向（Ｘ方
向）に広がり、その結果コネクター５の特に先端（第２
のリード２側）がＸ方向に移動するという問題があっ
た。However, in the case of the conventional connector type semiconductor element, the width of the connector connecting portion 7 is the width of the connector 5 or the second portion other than the connector connecting portion 7.
Since it is formed to be wider than the width of the lead 2, the solder layer 3b spreads in the width direction (X direction) of the connector connecting portion 7 during reflow, and as a result, particularly the tip of the connector 5 (second
However, there was a problem that the lead 2 side of) moved in the X direction.
【０００７】本発明はこうした事情を考慮してなされた
もので、第２のリードのうち、コネクターと接続するコ
ネクター接続部の幅を、コネクターの幅や第２のリード
のコネクター接続部以外の部分の幅に比べて部分的に大
きくすることにより、リフロー時に第２のリード上の半
田層の広がりを制限してコネクターの移動を回避しえる
コネクター型半導体素子を提供することを目的とする。The present invention has been made in consideration of such circumstances, and the width of the connector connecting portion of the second lead to be connected to the connector is determined by the width of the connector and the portion other than the connector connecting portion of the second lead. It is an object of the present invention to provide a connector type semiconductor element capable of avoiding the movement of the connector by limiting the spread of the solder layer on the second lead at the time of reflow by making it partially larger than the width.
【０００８】[0008]
【課題を解決するための手段】本発明は、第1のリード
と、この第1のリードと離間すると共に一部が第１のリ
ードと段違いに配置された第２のリードと、前記第1の
リード上に半田層を介して搭載された半導体チップと、
前記半導体チップ及び第２のリードと夫々半田層を介し
て接続されたコネクターと、前記第１、第２のリードの
夫々の一部、半導体チップ及びコネクターを樹脂封止す
る外囲器とを具備し、前記第２のリードのうち、前記コ
ネクターと接続するコネクター接続部の幅が、前記コネ
クターの幅や第２のリードのコネクター接続部以外の部
分の幅に比べて部分的に大きいことを特徴とするコネク
ター型半導体素子である。According to the present invention, there is provided a first lead, a second lead which is separated from the first lead, and a part of which is arranged in a step different from the first lead, and the first lead. A semiconductor chip mounted on the leads of the via a solder layer,
A connector connected to the semiconductor chip and the second lead via a solder layer, respectively, and an envelope for sealing the semiconductor chip and the connector with a part of each of the first and second leads. In the second lead, the width of the connector connecting portion to be connected to the connector is partially larger than the width of the connector and the width of the portion of the second lead other than the connector connecting portion. Is a connector-type semiconductor element.
【０００９】本発明において、「第２のリードのうち、
前記コネクターと接続するコネクター接続部の幅が、前
記コネクターの幅や第２のリードのコネクター接続部以
外の部分の幅に比べて部分的に大きい」とは、具体的に
はコネクター接続部の平面形状が幅方向に対称的な台形
形状である場合（図１（Ｃ）、図４参照）、あるいはコ
ネクター接続部に幅方向に互いに対称的な突起が形成さ
れている場合（図２（Ｃ）参照）を示す。In the present invention, "of the second leads,
The width of the connector connecting portion to be connected to the connector is partially larger than the width of the connector or the width of the portion other than the connector connecting portion of the second lead ", specifically, the plane of the connector connecting portion. When the shape is a trapezoidal shape that is symmetrical in the width direction (see FIG. 1C and FIG. 4), or when protrusions that are symmetrical in the width direction are formed in the connector connection portion (FIG. 2C) Refer to).
【００１０】いずれの場合も、リフロー時の半田融着の
際に半田層のＸ方向（幅方向）への広がりを制限するこ
とができ、コネクターのＸ方向の移動を回避することが
できる。従って、コネクターを所定の位置に精度良く位
置決めすることができる。また、コネクター接続部の一
部が該接続部以外の第２のリードの幅に比べて幅方向に
広いため、第２のリードの外囲器からの抜けを防止する
ことができ、第２のリードの強度を保持できる。In either case, it is possible to limit the spread of the solder layer in the X direction (width direction) during solder fusion during reflow, and to avoid movement of the connector in the X direction. Therefore, the connector can be accurately positioned at a predetermined position. In addition, since a part of the connector connecting portion is wider in the width direction than the width of the second lead other than the connecting portion, it is possible to prevent the second lead from coming off from the envelope. The strength of the lead can be maintained.
【００１１】[0011]
【発明の実施の形態】以下、本発明の各実施例に係るコ
ネクター型半導体素子について図面を参照して説明す
る。
（実施例１）図１（Ａ）〜（Ｃ）を参照する。ここで、
図１（Ａ）は本発明の実施例１に係るコネクター型半導
体素子の縦断面図、図１（Ｂ）は図１（Ａ）のＰ矢視
図、図１（Ｃ）は図１（Ａ）の平面図を示す。BEST MODE FOR CARRYING OUT THE INVENTION A connector type semiconductor device according to each embodiment of the present invention will be described below with reference to the drawings. (Embodiment 1) Reference will be made to FIGS. here,
1A is a longitudinal sectional view of a connector-type semiconductor element according to a first embodiment of the present invention, FIG. 1B is a view taken in the direction of arrow P of FIG. 1A, and FIG. ) Shows a plan view of FIG.
【００１２】図中の符番１１は、銅からなる第1のリー
ドを示す。この第1のリード１１と離間した位置には、
一部が第１のリード１１と段違いに配置された銅からな
る第２のリード１２が配置されている。前記第1のリー
ド１１上には、Ｐｂ９５％，Ｓｎ５％からなる組成の半
田層１３ａを介して半導体チップ１４が搭載されてい
る。前記半導体チップ１４及び前記第２のリード１２に
は、夫々前記半田層１３ａと同組成の半田層１３ｂ，１
３ｃを介してコネクター１５が接続されている。ここ
で、コネクター１５と接続する前記第２のリード１２の
部分をコネクター接続部１７と称する。前記第１のリー
ド１１の一部、第２のリード１２の一部、半導体チップ
１４及びコネクター１５は樹脂製の外囲器１６により樹
脂封止されている。Reference numeral 11 in the drawing indicates a first lead made of copper. At a position separated from the first lead 11,
A second lead 12 made of copper, which is partially arranged in a step different from the first lead 11, is arranged. A semiconductor chip 14 is mounted on the first lead 11 via a solder layer 13a having a composition of 95% Pb and 5% Sn. The semiconductor chip 14 and the second lead 12 have solder layers 13b, 1 having the same composition as the solder layer 13a, respectively.
The connector 15 is connected via 3c. Here, the portion of the second lead 12 that is connected to the connector 15 is referred to as a connector connecting portion 17. A part of the first lead 11, a part of the second lead 12, the semiconductor chip 14 and the connector 15 are resin-sealed by an envelope 16 made of resin.
【００１３】前記コネクター１５の幅と第２のリード１
２の幅は等しい。また、前記第２のリード１２のコネク
ター接続部１７の一部は、図１（ｃ）に示すように、コ
ネクター１５の幅やコネクター接続部１７を除く第２の
リード１２の幅に比べて外寄り側で突出して、平面形状
がコネクター接続部１７の幅方向に対称的な台形形状に
なっている。The width of the connector 15 and the second lead 1
The width of 2 is equal. In addition, as shown in FIG. 1C, a part of the connector connecting portion 17 of the second lead 12 is outside the width of the connector 15 and the width of the second lead 12 excluding the connector connecting portion 17. The planar shape is a trapezoidal shape which is symmetrical in the width direction of the connector connecting portion 17 and projects on the side closer to the side.
【００１４】こうした構成のコネクター型半導体素子
は、次のようにして製造される。まず、第１のリード１
１に半田層１３ａを、第２のリード１２に半田層１３ｂ
を形成する。次に、半田層１３ａ上に半導体チップ１４
を搭載する。つづいて、半導体チップ１４上に半田層１
３ｃを形成した後、コネクター１５を半田層１３ｂ、１
３ｃを介して半導体チップ１４、第２のリード１２上に
載せる。ひきつづき、リフローを施し、半田層１３ａ，
１３ｂ，１３ｃを融着させた後、半導体チップ１４等の
樹脂封止を行って外囲器１６を形成し、コネクター型半
導体素子を製造する。The connector type semiconductor device having such a structure is manufactured as follows. First, the first lead 1
1 to the solder layer 13a, and the second lead 12 to the solder layer 13b
To form. Next, the semiconductor chip 14 is formed on the solder layer 13a.
Equipped with. Next, the solder layer 1 is formed on the semiconductor chip 14.
After forming 3c, connect the connector 15 to the solder layers 13b, 1
It is placed on the semiconductor chip 14 and the second lead 12 via 3c. Continuing, reflowing is performed, and the solder layer 13a,
After fusing 13b and 13c, the semiconductor chip 14 and the like are sealed with resin to form the envelope 16, and a connector-type semiconductor element is manufactured.
【００１５】実施例１のコネクター型半導体素子によれ
ば、第２のリード１２のコネクター接続部１７の一部
は、図１（ｃ）に示すように、コネクター１５の幅やコ
ネクター接続部１７を除く第２のリード１２の幅に比べ
て外寄り側で突出して、平面形状がコネクター接続部１
７の幅方向に対称的な台形形状になっているため、リフ
ロー時の半田融着の際に半田層１３ｂのＸ方向への広が
りを制限することができ、コネクター１５のＸ方向の移
動を回避することができる。従って、コネクター１５を
所定の位置に精度良く位置決めすることができる。ま
た、コネクター接続部１７の一部が該接続部１７以外の
第２のリード１２の幅に比べて幅方向に広いため、第２
のリード１２の外囲器１６からの抜けを防止することが
でき、第２のリード１２の強度を保持できる。According to the connector type semiconductor device of the first embodiment, a part of the connector connecting portion 17 of the second lead 12 has the width of the connector 15 and the connector connecting portion 17 as shown in FIG. 1 (c). Except for the width of the second lead 12 that is excluded, it protrudes on the outer side and has a planar shape of the connector connecting portion 1.
7 has a trapezoidal shape symmetrical in the width direction, it is possible to limit the spread of the solder layer 13b in the X direction during soldering during reflow, and avoid the connector 15 from moving in the X direction. can do. Therefore, the connector 15 can be accurately positioned at a predetermined position. In addition, since a part of the connector connecting portion 17 is wider in the width direction than the width of the second lead 12 other than the connecting portion 17,
The lead 12 can be prevented from coming off from the envelope 16, and the strength of the second lead 12 can be maintained.
【００１６】（実施例２）図２（Ａ）〜（Ｃ）を参照す
る。ここで、図２（Ａ）は本発明の実施例２に係るコネ
クター型半導体素子の縦断面図、図２（Ｂ）は図２
（Ａ）のＰ矢視図、図２（Ｃ）は図２（Ａ）の平面図を
示す。但し、図１と同部材は同符番を付して説明を省略
し、要部のみ説明する。(Embodiment 2) Reference will be made to FIGS. Here, FIG. 2A is a vertical cross-sectional view of a connector type semiconductor device according to a second embodiment of the present invention, and FIG.
FIG. 2A is a view on arrow P, and FIG. 2C is a plan view of FIG. However, the same members as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted, and only the main parts will be described.
【００１７】実施例２に係るコネクター型半導体素子
は、図１のそれと比べ、第２のリード２１のコネクター
接続部２２の一部を、図２（ｃ）に示すように、コネク
ター１５の幅やコネクター接続部２２を除く第２のリー
ド２１の幅に比べて外寄り側で幅方向に対称的に突出し
た形状になっていることを特徴とする。ここで、コネク
ター接続部２２をＸ方向に対称的に突出させるのは、リ
フロー時の半田層１３ｂが幅方向の一方に偏るのを回避
するためである。実施例２によれば、実施例１と同様
に、リフロー時の半田融着の際に半田層１３ｂのＸ方向
への広がりを制限することができ、コネクター１５のＸ
方向の移動を回避することができ、第２のリード２１の
強度を保持できる。In the connector type semiconductor device according to the second embodiment, as compared with that of FIG. 1, a part of the connector connecting portion 22 of the second lead 21 is provided with a width of the connector 15 as shown in FIG. Compared with the width of the second lead 21 excluding the connector connecting portion 22, it is characterized in that it has a shape protruding symmetrically in the width direction on the outer side. Here, the reason why the connector connecting portion 22 is projected symmetrically in the X direction is to prevent the solder layer 13b from being biased to one side in the width direction during reflow. According to the second embodiment, similarly to the first embodiment, it is possible to limit the spread of the solder layer 13b in the X direction at the time of solder fusion during reflow, and the X of the connector 15 can be restricted.
The movement in the direction can be avoided, and the strength of the second lead 21 can be maintained.
【００１８】（実施例３）図４を参照する。図４は、実
施例３に係るコネクター型半導体素子の平面図を示す。
但し、図１と同部材は同符番を付して説明を省略し、要
部のみ説明する。実施例３に係るコネクター型半導体素
子は、図１のそれと比べ、第２のリード２３のコネクタ
ー接続部２４の一部を、図４に示すように、コネクター
１５の幅やコネクター接続部２４を除く第２のリード２
３の幅に比べて内側寄りで幅方向に突出して、台形形状
になっていることを特徴とする。(Embodiment 3) Referring to FIG. FIG. 4 is a plan view of the connector type semiconductor device according to the third embodiment.
However, the same members as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted, and only the main parts will be described. The connector type semiconductor device according to the third embodiment is different from that of FIG. 1 in that a part of the connector connecting portion 24 of the second lead 23 is excluded from the width of the connector 15 and the connector connecting portion 24 as shown in FIG. Second lead 2
It is characterized in that it has a trapezoidal shape protruding in the width direction toward the inner side compared to the width of 3.
【００１９】実施例３によれば、実施例１と同様に、リ
フロー時の半田融着の際に半田層１３ｂのＸ方向への広
がりを制限することができ、コネクター１５のＸ方向の
移動を回避することができ、第２のリード２３の強度を
保持できる。According to the third embodiment, as in the first embodiment, it is possible to limit the spread of the solder layer 13b in the X direction at the time of solder fusion during reflow, and the movement of the connector 15 in the X direction can be restricted. This can be avoided, and the strength of the second lead 23 can be maintained.
【００２０】なお、上記実施例では、第１のリード、第
２のリードが銅からなる場合について述べたが、これに
限らず、銅合金等他の材料でもよい。また、半田層の組
成も上述した組成に限らない。In the above embodiment, the case where the first lead and the second lead are made of copper has been described, but the present invention is not limited to this, and other materials such as copper alloy may be used. Further, the composition of the solder layer is not limited to the above-mentioned composition.
【００２１】[0021]
【発明の効果】以上詳述したように本発明のリード型半
導体素子によれば、第２のリードのうち、コネクターと
接続するコネクター接続部の幅を、コネクターの幅や第
２のリードのコネクター接続部以外の部分の幅に比べて
部分的に大きくすることにより、リフロー時に第２のリ
ード上の半田層の広がりを制限してコネクターの移動を
回避できるとともに、第２のリードの外囲器からの抜け
を防止して第２のリードの強度を保持しえるコネクター
型半導体素子を提供できる。As described in detail above, according to the lead-type semiconductor element of the present invention, the width of the connector connecting portion of the second lead, which is connected to the connector, is the width of the connector or the connector of the second lead. By making the width larger than the width of the portion other than the connection portion, the spread of the solder layer on the second lead can be restricted during reflow to prevent the connector from moving, and the envelope of the second lead can be prevented. It is possible to provide a connector-type semiconductor element capable of preventing the detachment of the second lead and maintaining the strength of the second lead.
【図面の簡単な説明】[Brief description of drawings]
【図１】本発明の実施例１に係るコネクター型半導体素
子の説明図。FIG. 1 is an explanatory diagram of a connector-type semiconductor element according to a first embodiment of the present invention.
【図２】本発明の実施例２に係るコネクター型半導体素
子の説明図。FIG. 2 is an explanatory view of a connector type semiconductor device according to a second embodiment of the invention.
【図３】従来のコネクター型半導体素子の説明図。FIG. 3 is an explanatory view of a conventional connector type semiconductor device.
【図４】本発明の実施例３に係るコネクター型半導体素
子の平面図。FIG. 4 is a plan view of a connector type semiconductor device according to a third embodiment of the invention.
【符号の説明】 １１…第１のリード、 １２，２１，２３…第２のリード、 １３ａ，１３ｂ，１３ｃ…半田層、 １４…半導体チップ、 １５…コネクター、 １６…外囲器、 １７，２２，２４…コネクター接続部。[Explanation of symbols] 11 ... the first lead, 12, 21, 23 ... second lead, 13a, 13b, 13c ... Solder layer, 14 ... Semiconductor chip, 15 ... Connector, 16 ... envelope, 17, 22, 24 ... Connector connection part.
Claims (3)
すると共に一部が第１のリードと段違いに配置された第
２のリードと、前記第1のリード上に半田層を介して搭
載された半導体チップと、前記半導体チップ及び第２の
リードと夫々半田層を介して接続されたコネクターと、
前記第１、第２のリードの夫々の一部、半導体チップ及
びコネクターを樹脂封止する外囲器とを具備し、 前記第２のリードのうち、前記コネクターと接続するコ
ネクター接続部の幅が、前記コネクターの幅や第２のリ
ードのコネクター接続部以外の部分の幅に比べて部分的
に大きいことを特徴とするコネクター型半導体素子。1. A first lead, a second lead which is spaced apart from the first lead and a part of which is arranged at a step different from the first lead, and a solder layer on the first lead. A semiconductor chip mounted thereon, and a connector connected to the semiconductor chip and the second lead via a solder layer, respectively.
A portion of each of the first and second leads, a semiconductor chip and an envelope for resin-sealing the connector, and a width of a connector connecting portion of the second lead that is connected to the connector. A connector-type semiconductor element, characterized in that it is partially larger than the width of the connector and the width of the portion other than the connector connecting portion of the second lead.
向に対称的な台形形状であることを特徴とする請求項１
記載のコネクター型半導体素子。2. The planar shape of the connector connecting portion is a trapezoidal shape symmetrical in the width direction.
The connector-type semiconductor device described.
いに対称的な突起が形成されていることを特徴とする請
求項１記載のコネクター型半導体素子。3. The connector type semiconductor device according to claim 1, wherein the connector connecting portion is formed with protrusions symmetrical to each other in the width direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001327882A JP2003133495A (en) | 2001-10-25 | 2001-10-25 | Connector type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001327882A JP2003133495A (en) | 2001-10-25 | 2001-10-25 | Connector type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003133495A true JP2003133495A (en) | 2003-05-09 |
Family
ID=19144038
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001327882A Pending JP2003133495A (en) | 2001-10-25 | 2001-10-25 | Connector type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003133495A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006216736A (en) * | 2005-02-03 | 2006-08-17 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacturing method thereof |
-
2001
- 2001-10-25 JP JP2001327882A patent/JP2003133495A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006216736A (en) * | 2005-02-03 | 2006-08-17 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacturing method thereof |
| JP4565634B2 (en) * | 2005-02-03 | 2010-10-20 | パナソニック株式会社 | Semiconductor device and manufacturing method thereof |
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