JP2003133474A - Mounting structure of electronic device - Google Patents

Mounting structure of electronic device

Info

Publication number
JP2003133474A
JP2003133474A JP2001328250A JP2001328250A JP2003133474A JP 2003133474 A JP2003133474 A JP 2003133474A JP 2001328250 A JP2001328250 A JP 2001328250A JP 2001328250 A JP2001328250 A JP 2001328250A JP 2003133474 A JP2003133474 A JP 2003133474A
Authority
JP
Japan
Prior art keywords
electronic device
solder
nickel
plating layer
nickel plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001328250A
Other languages
Japanese (ja)
Inventor
Yoshimasa Miyamoto
義政 宮本
Tomoko Kuwabara
智子 桑原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2001328250A priority Critical patent/JP2003133474A/en
Publication of JP2003133474A publication Critical patent/JP2003133474A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Abstract

PROBLEM TO BE SOLVED: To solve a problem that the external connection pad of an electronic device is stripped from a solder connecting the pad with an external electric circuit board and thereby an electronic component cannot be operated normally over a long term. SOLUTION: An alloy layer 19 containing copper, nickel, and tin is formed on a nickel plating layer 17 covering the external connection pad 15 of an electronic device 1. The nickel plating layer 17 is bonded rigidly to a solder through the alloy layer 19 containing copper, nickel, and tin.

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、下面にニッケル層
で被覆された外部接続パッドを有する絶縁基体上に半導
体素子等の電子部品を搭載して成る電子装置を、上面に
電子装置接続パッドを有する外部電気回路基板上に錫を
含有する半田を介して実装して成る電子装置の実装構造
に関するものである。 【0002】 【従来の技術】従来、例えばガラス−エポキシ板等から
成る絶縁板やエポキシ樹脂等から成る絶縁層を複数層積
層して成る絶縁基体の内部および上下面に銅箔等から成
る複数の配線導体を設けるとともにこの絶縁基体上に半
導体素子等の電子部品を搭載して成る電子装置が知られ
ている。 【0003】このような電子装置においては、絶縁基体
上に導出した配線導体の一部に電子部品の電極がボンデ
ィングワイヤや金属バンプを介して電気的に接続されて
おり、絶縁基体の下面に導出した配線導体の一部が外部
電気回路基板に半田を介して接続される外部接続パッド
を形成している。さらに、外部接続パッドには外部電気
回路基板との半田を介した接続を容易なものとするため
に例えば鉛−錫共晶合金から成る半田が予め接合されて
いる。 【0004】なお、このような電子装置において外部接
続パッドに半田を接合するには、外部接続パッドの露出
表面に厚みが0.5〜10μm程度のニッケルめっき層およ
び厚みが0.01〜0.8μm程度の金めっき層を順次被着さ
せておくとともに、その上に半田を溶融させて付着させ
る方法が採用される。このとき、金めっき層は溶融した
半田内に拡散吸収されて消滅し、またニッケルめっき層
上にはこのニッケルめっき層中のニッケルと半田中の錫
とが反応してニッケル−錫合金層が形成される。 【0005】そして、この電子装置は外部接続パッドに
接合された半田を外部電気回路基板上に設けた電子装置
接続パッド上に溶融接合させることにより外部電気回路
基板に実装される。なお、電子装置接続パッドは、銅箔
上にニッケルめっき層を被着させて成る場合や銅箔のみ
から成る場合がある。そしてこのとき、外部電気回路基
板の電子装置接続パッドが銅箔上にニッケルめっき層を
被着させて成る場合であれば、電子装置の外部接続パッ
ド上のニッケルめっき層上のニッケル−錫合金層は略そ
のまま残り、銅箔から成る場合であれば、電子装置接続
パッドの銅箔に含有される銅が半田中に拡散して、これ
が電子装置の外部接続パッド上のニッケル−錫合金層と
反応することにより電子装置の外部接続パッド上のニッ
ケル−錫合金層上に銅−ニッケル−錫合金層が形成され
る。 【0006】 【発明が解決しようとする課題】しかしながら、この従
来の電子装置の実装構造によると、半導体素子等の電子
部品が作動時に発生する熱等に起因する熱応力が半田と
外部接続パッドとの間に繰返し印加されると、外部接続
パッドのニッケルめっき層上のニッケル−錫合金から剥
離が生じやすく、そのため電子部品を長期間にわたり正
常に作動させることができないという問題点を有してい
た。 【0007】本発明は、かかる上述の問題点に鑑み完成
されたものであり、その目的は、ニッケルめっき層と半
田との間で剥離が発生することがなく、電子部品を長期
間にわたり、正常に作動させることが可能な電子装置の
実装構造を提供することにある。 【0008】 【課題を解決するための手段】本発明の電子装置の実装
構造は、下面にニッケル層で被覆された外部接続パッド
を有する絶縁基体上に電子部品を搭載して成る電子装置
を、上面に電子装置接続パッドを有する外部電気回路基
板上に、外部接続パッドと電子装置接続パッドとを錫を
含有する半田を介して接合することにより実装して成る
電子装置の実装構造であって、ニッケル層上に銅とニッ
ケルと錫とを含有する合金層が形成されていることを特
徴とするものである。 【0009】本発明の電子装置の実装構造によれば、電
子装置の外部接続パッドを被覆するニッケルめっき層上
に銅とニッケルと錫とを含む略均質な合金層が形成され
ていることから、外部接続パッド上のニッケルめっき層
と半田とが銅とニッケルと錫とを含有する合金層を介し
て強固に接合される。 【0010】 【発明の実施の形態】つぎに、本発明を添付の図面に基
づき詳細に説明する。図1は、本発明を半導体素子を搭
載した電子装置に適用した場合の実施の形態の一例を示
す断面図であり、1は電子装置、2は外部電気回路基板
である。この外部電気回路基板2上に電子装置1を半田
3を介して実装することにより本発明の電子装置の実装
構造が形成される。 【0011】電子装置1は、主として絶縁基体4とこれ
に搭載された電子部品5と封止部材6とから構成されて
いる。この例では、電子部品5は例えばLSI等の半導
体素子である。また、封止部材6はエポキシ樹脂等の封
止樹脂である。 【0012】絶縁基体4は、例えばガラス繊維を縦横に
織り込んだガラス織物にエポキシ樹脂やビスマレイミド
トリアジン樹脂等の熱硬化性樹脂を含浸させて成る板状
の芯体7の上下面にエポキシ樹脂やビスマレイミドトリ
アジン樹脂等の熱硬化性樹脂から成る絶縁層8をそれぞ
れ複数層ずつ積層して成り、その上面から下面にかけて
は銅箔等から成る複数の配線導体9が形成されている。 【0013】絶縁基体4を構成する芯体7は、厚みが0.
3〜1.5mm程度であり、その上面から下面にかけて直径
が0.2〜1.0mm程度の複数の貫通孔10を有している。そ
して、その上下面および各貫通孔10の内壁には配線導体
9の一部が被着されており、上下面の配線導体9が貫通
孔10を介して電気的に接続されている。 【0014】このような芯体7は、ガラス織物に未硬化
の熱硬化性樹脂を含浸させたシートを熱硬化させた後、
これに上面から下面にかけてドリル加工を施すことによ
り製作される。なお、芯体7上下面の配線導体9は、芯
体7用のシートの上下全面に厚みが5〜50μm程度の銅
箔を貼着しておくとともにこの銅箔をシートの硬化後に
エッチング加工することにより所定のパターンに形成さ
れる。また、貫通孔10内壁の配線導体9は、芯体7に貫
通孔10を設けた後に、この貫通孔10内壁に無電解めっき
法および電解めっき法により厚みが5〜50μm程度の銅
箔を析出させることにより形成される。 【0015】さらに、芯体7は、その貫通孔10の内部に
エポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬
化性樹脂から成る樹脂柱11が充填されている。樹脂柱11
は、貫通孔10を塞ぐことにより貫通孔10の直上および直
下に絶縁層8を形成可能とするためのものであり、未硬
化のペースト状の熱硬化性樹脂を貫通孔10内にスクリー
ン印刷法により充填し、これを熱硬化させた後、その上
下面を略平坦に研磨することにより形成される。そし
て、この樹脂柱11を含む芯体7の上下面に絶縁層8が積
層されている。 【0016】芯体7の上下面に積層された絶縁層8は、
それぞれの厚みが20〜50μm程度であり、各層の上面か
ら下面にかけて直径が30〜100μm程度の複数の貫通孔1
2を有している。これらの絶縁層8は、配線導体9を高
密度に配線するための絶縁間隔を提供するためのもので
あり、最表層を除く絶縁層8にはその表面および貫通孔
12内に配線導体9の一部が被着されている。そして、上
層の配線導体9と下層の配線導体9とを貫通孔12を介し
て電気的に接続することにより高密度配線を立体的に形
成可能としている。なお、最表層の絶縁層8は、ソルダ
ーレジスト層である。このような絶縁層8は、厚みが20
〜50μm程度の未硬化の熱硬化性樹脂のフィルムを芯体
7の上下面に貼着し、これを熱硬化させるとともにレー
ザー加工により貫通孔12を穿孔し、さらにその上に同様
にして次の絶縁層8を順次積み重ねることによって形成
される。なお、各絶縁層8表面および貫通孔12内に被着
された配線導体9は、各絶縁層8を形成する毎に各絶縁
層8の表面および貫通孔12内に5〜50μm程度の厚みの
銅めっき層を公知のセミアディティブ法やサブトラクテ
ィブ法等のパターン形成法により所定のパターンに被着
させることによって形成される。 【0017】絶縁基体4の上面から下面にかけて形成さ
れた配線導体9は、電子部品5の各電極を外部電気回路
基板2に接続するための導電路として機能し、絶縁基体
4の上面に露出している部位が電子部品5の各電極に半
田13を介して接続された電子部品接続パッド14を、絶縁
基体4の下面に露出した部位が外部電気回路基板2に半
田3を介して接続された外部接続パッド15を形成してい
る。なお、この例では電子部品5の各電極は電子部品接
続パッド14に半田13を介して接続されているが、電子部
品5の電極は例えばボンディングワイヤを介して電子部
品接続パッド14に接続されてもよい。その場合、電子部
品接続パッド14は電子部品5が搭載される部位の周囲に
配置される。 【0018】そして、絶縁基体4上面の電子部品接続パ
ッド14に電子部品5の各電極を半田13を介して接続した
後、電子部品5をエポキシ樹脂等から成る封止部材6に
より封止することにより電子装置1が完成し、この電子
装置1の外部接続パッド15を半田3を介して外部電気回
路基板2の電子装置接続パッド16に接続することによっ
て電子装置1が外部電気回路基板2に実装される。 【0019】なお、このような電子装置1においては、
半田3を介した外部電気回路基板2への実装を容易なも
のとするために、半田3を外部接続パッド15に予め取着
させておく。そうすることによって電子装置1を外部電
気回路基板2に実装する際に半田3の保持や位置合わせ
などを容易かつ確実に行なうことができる。このとき、
半田3としては、例えば鉛−錫共晶合金に0.25質量%程
度の銅を含有させたものを用いる。 【0020】外部接続パッド15に半田3を予め取着させ
るには、まず、図2(a)に要部拡大断面図で示すよう
に、外部接続パッド15の表面に0.5〜10μmの厚みのニ
ッケルめっき層17および0.01〜0.8μmの厚みの金めっ
き層18を被着させるとともに、その上に例えば鉛−錫共
晶合金に0.25質量%程度の銅を含有させてなる直径が0.
4〜0.7mm程度の球状の半田3を接触させる。次に、こ
れらを例えば窒素ガス雰囲気中で半田3の溶融温度以上
の温度に加熱してリフローさせれば、図2(b)に要部
拡大断面図で示すように、球状の半田3が一旦溶融した
後に固化して半田3が外部接続パッドに取着される。こ
のとき、ニッケルめっき層17上の金めっき層18は溶融し
た半田3中に拡散吸収されて消滅する。また、ニッケル
めっき層17上には、ニッケルめっき層17中のニッケルと
半田3中の錫および銅とが反応して銅とニッケルと錫と
を含有する厚みが0.5〜5μm程度の合金層19が形成さ
れる。そして、この合金層19を介してニッケルめっき層
17と半田3とが強固に接合される。 【0021】なお、ニッケルめっき層17としては、例え
ばリンを4〜12重量%程度含有する無電解ニッケルめっ
きが好適に使用される。そして、そのようなニッケルめ
っき層17用のめっき液としては、例えば硫酸ニッケル40
g/l、クエン酸ナトリウム24g/l、酢酸ナトリウム
14g/l、次亜リン酸ナトリウム20g/l、塩化アンモ
ニウム5g/lからなる温度が50〜90℃の無電解ニッケ
ルめっきが使用される。また、金めっき層18用のめっき
液としては、例えばシアン化金カリウム5g/l、クエ
ン酸カリウム50g/l、エチレンジアミン4酢酸ナトリ
ウム5g/lから成る温度50〜90℃の無電解金めっき液
が使用される。 【0022】なお、ニッケルめっき層17は、外部接続パ
ッド15が酸化腐蝕するのを防止して外部接続パッド15と
半田3との接合を容易かつ強固なものとするためのもの
であり、その厚みが0.5μm未満では、外部接続パッド1
5を良好に被覆することができずに、外部接続パッド15
の表面に酸化や変色をきたして半田3との接合が弱いも
のとなる傾向にあり、他方、10μmを超えると、ニッケ
ルめっき層17の内部応力によりニッケルめっき層17にク
ラックや剥がれが発生しやすくなる。したがって、ニッ
ケルめっき層17の厚みは0.5〜10μmの範囲が好まし
い。 【0023】また、ニッケルめっき層17がリンを含有す
る無電解ニッケルめっきから成る場合、ニッケルめっき
層17中のリンの含有量が4重量%未満であると、外部接
続パッド15にニッケルめっき層17を被着させる際、ニッ
ケルめっきの析出速度が遅くなり所定の厚みのニッケル
めっき層17を得るために長時間を要するので半導体装置
の生産性が極めて低くなり、他方12重量%を超えると、
ニッケルめっき層17上に金めっき層18を良好に被着させ
ることが困難となる。従って、ニッケルめっき層17中の
リンの含有量は、4〜12重量%の範囲が好ましい。 【0024】さらに、ニッケルめっき層17上に被着させ
る金めっき層18は、ニッケルめっき層17と半田3とを良
好に接合させるためのものであり、その厚みが0.01μ
m未満であると、ニッケルめっき層17と半田3との接合
が弱いものとなる傾向にあり、他方0.8μmを超える
と、半田3中に金が多量に溶け込んでしまい、半田3が
脆化し、電子部品5が作動時に発生する熱等による応力
によってニッケルめっき層17と半田3との間で剥離が発
生しやすくなる。従って、金めっき層18の厚みは0.01〜
0.8μmの範囲が好ましい。 【0025】また、このようなニッケルめっき層17およ
び金めっき層18は、例えば絶縁基体1の電子部品接続パ
ッド14に電子部品5の電極を接続する前に被着させれば
よい。そして、それと同時に電子部品接続パッド14にも
同様にニッケルめっき層および金めっき層を被着させて
もよい。そうすることで電子部品接続パッド14が酸化腐
蝕するのが有効に防止されるとともに電子部品接続パッ
ド14と半田13との接合を容易かつ強固なものとすること
ができる。 【0026】他方、電子装置1が実装された外部電気回
路基板2は、例えば一般的なプリント基板であり、ガラ
ス繊維を縦横に織り込んだガラス織物にエポキシ樹脂や
ビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸
させて成る絶縁板20の上面に複数の電子装置接続パッド
16が形成されて成る。電子装置接続パッド16は、銅箔上
にニッケルめっき層を被着させて成る場合や銅箔のみか
ら成る場合がある。このような外部電気回路基板2は常
法によって製作される。 【0027】そして、電子装置1を外部電気回路基板2
に実装するには、電子装置1をその外部接続パッド15に
予め取着させた半田3と電子装置接続パッド16とが接す
るようにして外部電気回路基板2上に載置し、これらを
例えば窒素ガス雰囲気中で半田3が溶融する温度以上の
温度に加熱して半田3を溶融させる方法が採用される。 【0028】このとき図3に要部拡大断面図で示すよう
に、電子装置1の外部接続パッド15のニッケルめっき層
17上には銅とニッケルと錫とを含有する合金層19が予め
形成されているので、たとえ外部電気回路基板2の電子
装置接続パッド16が銅箔上にニッケルめっき層を被着さ
せて成る場合や銅箔のみから成る場合であってもニッケ
ルめっき層17上には銅とニッケルと錫とを含有する厚み
が0.05〜10μm程度の略均質な合金層19が形成される。 【0029】このように外部接続パッド15上のニッケル
めっき17上に銅とニッケルと錫とを含有する合金層19が
形成されていることから、外部接続パッド15上のニッケ
ルめっき層17と半田3とが銅とニッケルと錫とを含有す
る合金層19を介して強固に接合され、その結果、電子部
品5が作動時に発生する熱等による熱応力が繰り返し印
加されたとしても、外部接続パッド15と半田3との間に
剥離が発生することがなく、電子部品5を長期間にわた
り正常かつ安定して作動させることができる。 【0030】なお、ニッケルめっき層17上に形成された
銅とニッケルと錫とを含有する合金層19の厚みが0.05μ
m未満ではニッケルめっき層17と合金層19との密着性が
悪く、両者の間から剥離が生じることがあり、他方、10
μmを越えると銅とニッケルと錫とを含有する合金層19
中から破断が生じることがある。したがってニッケルめ
っき層17と半田3との間に形成された銅とニッケルと錫
とを含む合金層19の厚みは0.05〜10μmの範囲が好まし
い。 【0031】 【実施例】評価用基板としてガラス織物にエポキシ樹脂
を含浸させて成る厚みが1.6mmの芯体上にエポキシ樹
脂から成る厚みが35μmの絶縁層を2層積層するととも
に、最上層の絶縁層上に厚みが15μmの銅めっき層から
成る直径が0.6mmの略円形の試験パッドを10個ずつ形
成し、その上にアクリル変性エポキシ樹脂から成り銅め
っき上からの厚みが25μmのソルダーレジスト層を、試
験パッドと同心円状の直径が0.5mmの開口を有するよ
うに被着させ、さらにソルダーレジスト層の開口から露
出した試験パッドの表面に厚みが3μmのニッケルめっ
き層および厚みが0.06μmの金めっき層を順次被着させ
た評価用基板を用意するとともに、その試験パッド上
に、鉛−錫共晶合金に0.25質量%の銅を含有させた体積
が0.1mm3の半田をピーク温度230℃で溶融させて半田
バンプを形成した後、これを銅箔上にニッケルめっき層
を被着させて成る厚みが15μmで直径が0.53mmの接続
パッドを評価用基板の試験パッドと対応する位置に有す
るプリント基板上に載置するとともに評価用基板に形成
した半田バンプを230℃のピーク温度で溶融させてプリ
ント基板の接続パッドと評価用基板の試験パッドとを半
田バンプを介して接合させて本発明による第一の評価用
試料を得た。また、上述の評価用基板の試験パッド上
に、鉛−錫共晶合金に0.25質量%の銅を含有させた体積
が0.1mm3の半田をピーク温度230℃で溶融させて半田
バンプを形成した後、これを銅箔のみから成る厚みが12
μmで直径が0.53mmの接続パッドを評価用基板の試験
パッドと対応する位置に有するプリント基板上に載置す
るとともに評価用基板に形成した半田バンプをピーク温
度230℃で溶融させてプリント基板の接続パッドと評価
用基板の試験パッドとを半田バンプを介して接合させて
本発明による第二の評価用試料を得た。これらの本発明
による第一および第二の評価用資料は、試験パッド上の
ニッケルめっき層と半田バンプとの間に18〜30質量%の
銅と0.3〜5質量%のニッケルと50〜60質量%の錫とを含
有する合金層が0.05〜10μmの厚みに形成されていた。 【0032】さらに、上述の評価用基板のパッド上に鉛
−錫共晶合金から成る体積が0.1mm3の半田をピーク温
度220℃で溶融させて半田バンプを形成するとともにこ
れを銅箔のみから成る厚みが12μmで直径が0.53mmの
接続パッドを評価用基板の試験パッドと対応する位置に
有するプリント基板上に載置するとともに評価用基板に
形成した半田バンプをピーク温度220℃で溶融させてプ
リント基板の接続パッドと評価用基板の試験パッドとを
半田バンプを介して接合させて比較のための評価用試料
を得た。比較用の評価用試料は、試験パッド上のニッケ
ルめっき層と半田バンプとの間に厚みが0.05〜20μmの
ニッケル−錫合金層および銅とニッケルと錫とを含有す
る合金層が形成されていた。 【0033】かくして得られた各評価用試料の評価用基
板をプリント基板から引き剥がし、その剥がれた面を観
察した。 【0034】その結果、本発明による評価用試料では、
全ての試験パッドにおいて、試験パッドと絶縁層との間
で剥離が発生しており、ニッケルめっき層と半田とは極
めて強固に接合していることが確認できた。他方、比較
のための評価試料では、全ての試験パッドにおいてニッ
ケルめっき層と半田との間で剥離が発生しており、ニッ
ケルめっき層と半田との接合強度が弱いことが確認でき
た。 【0035】かくして、本発明の電子装置の実装構造に
よれば、電子部品5を長期間にわたり正常に作動させる
ことができる。 【0036】なお、本発明は、上述の実施の形態の一例
に限定されるものではなく、本発明の要旨を逸脱しない
範囲であれば種々の変更は可能であり、例えば上述の実
施の形態の一例では、絶縁基体4はガラス織物に熱硬化
性樹脂を含浸させた材料および熱硬化性樹脂から形成さ
れていたが、絶縁基体4は、セラミックス材料等の他の
絶縁材料から形成されていてもよく、また、配線導体8
としては、タングステンやモリブデン・銅・銀等の金属
粉末のメタライズ導体等の他の導電材料を使用すること
ができる。さらに、上述の実施の形態の一例では、半田
3中に銅を含有させることによりニッケルめっき層17上
に銅とニッケルと錫とを含有する合金層19を形成した
が、例えばニッケルめっき層17の表面に銅を含有するめ
っき層を被着させ、その上に銅を含有しない鉛−錫共晶
合金から成る半田3を溶融させることによってニッケル
めっき層17上に銅とニッケルと錫とを含有する合金層19
を形成してもよい。 【0037】 【発明の効果】本発明の電子装置の実装構造によれば、
電子装置の外部接続パッドのニッケルめっき層上に銅と
ニッケルと錫とを含有する合金層が形成されていること
から、この銅とニッケルと錫とを含有する合金層により
外部接続パッドのニッケルめっき層と半田とが強固に接
合され、その結果、電子部品が作動時に発生する熱等に
よる熱応力が繰り返し印加されたとしても外部接続パッ
ドと半田とが剥離することがなく、電子部品を長期間に
わたり正常に作動させることができる。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device comprising an electronic component such as a semiconductor element mounted on an insulating substrate having external connection pads covered on its lower surface with a nickel layer. The present invention relates to a mounting structure of an electronic device in which the device is mounted on an external electric circuit board having an electronic device connection pad on an upper surface via a solder containing tin. 2. Description of the Related Art Conventionally, an insulating substrate formed by laminating a plurality of insulating layers made of, for example, an epoxy resin or an insulating plate made of a glass-epoxy plate or the like, and a plurality of insulating films made of a copper foil or the like on the upper and lower surfaces. 2. Description of the Related Art An electronic device in which a wiring conductor is provided and an electronic component such as a semiconductor element is mounted on the insulating base is known. In such an electronic device, an electrode of an electronic component is electrically connected to a part of a wiring conductor led out on the insulating base via a bonding wire or a metal bump, and is connected to a lower surface of the insulating base. Some of the wiring conductors form external connection pads that are connected to the external electric circuit board via solder. Further, solder made of, for example, a lead-tin eutectic alloy is previously bonded to the external connection pad in order to facilitate connection with an external electric circuit board via solder. In order to bond the solder to the external connection pad in such an electronic device, a nickel plating layer having a thickness of about 0.5 to 10 μm and a gold plating having a thickness of about 0.01 to 0.8 μm are formed on the exposed surface of the external connection pad. A method is adopted in which the layers are sequentially applied, and the solder is melted and applied thereon. At this time, the gold plating layer is diffused and absorbed in the molten solder and disappears, and nickel on the nickel plating layer reacts with tin in the solder to form a nickel-tin alloy layer on the nickel plating layer. Is done. [0005] The electronic device is mounted on the external electric circuit board by fusing the solder joined to the external connection pad to the electronic device connection pad provided on the external electric circuit board. The electronic device connection pad may be formed by depositing a nickel plating layer on a copper foil or may be formed only of a copper foil. At this time, if the electronic device connection pad of the external electric circuit board is formed by depositing a nickel plating layer on a copper foil, the nickel-tin alloy layer on the nickel plating layer on the external connection pad of the electronic device Remains substantially as it is, and when the wiring is made of copper foil, the copper contained in the copper foil of the electronic device connection pad diffuses into the solder and reacts with the nickel-tin alloy layer on the external connection pad of the electronic device. By doing so, a copper-nickel-tin alloy layer is formed on the nickel-tin alloy layer on the external connection pads of the electronic device. However, according to the mounting structure of the conventional electronic device, the thermal stress caused by heat or the like generated when an electronic component such as a semiconductor element is operated causes the solder and the external connection pad to have a problem. When the voltage is repeatedly applied during this time, the nickel-tin alloy on the nickel plating layer of the external connection pad is apt to peel off, so that the electronic component cannot be normally operated for a long period of time. . The present invention has been completed in view of the above-mentioned problems, and an object of the present invention is to prevent the peeling between the nickel plating layer and the solder from occurring and keep the electronic component for a long period of time. It is an object of the present invention to provide a mounting structure of an electronic device that can be operated at a high speed. [0008] The electronic device mounting structure of the present invention is an electronic device comprising an electronic component mounted on an insulating base having external connection pads covered with a nickel layer on the lower surface. On an external electric circuit board having an electronic device connection pad on the upper surface, a mounting structure of an electronic device which is mounted by bonding the external connection pad and the electronic device connection pad via solder containing tin, An alloy layer containing copper, nickel and tin is formed on the nickel layer. According to the electronic device mounting structure of the present invention, since a substantially homogeneous alloy layer containing copper, nickel and tin is formed on the nickel plating layer covering the external connection pads of the electronic device, The nickel plating layer on the external connection pad and the solder are firmly joined via an alloy layer containing copper, nickel and tin. Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a sectional view showing an example of an embodiment in which the present invention is applied to an electronic device on which a semiconductor element is mounted, wherein 1 is an electronic device, and 2 is an external electric circuit board. By mounting the electronic device 1 on the external electric circuit board 2 via the solder 3, the mounting structure of the electronic device of the present invention is formed. The electronic device 1 mainly includes an insulating base 4, an electronic component 5 mounted thereon, and a sealing member 6. In this example, the electronic component 5 is a semiconductor element such as an LSI, for example. The sealing member 6 is a sealing resin such as an epoxy resin. The insulating base 4 is made of a glass fabric in which glass fibers are woven vertically and horizontally and impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. A plurality of insulating layers 8 each made of a thermosetting resin such as a bismaleimide triazine resin are laminated, and a plurality of wiring conductors 9 made of copper foil or the like are formed from the upper surface to the lower surface. The core 7 constituting the insulating base 4 has a thickness of 0.1 mm.
It has a plurality of through holes 10 of about 3 to 1.5 mm and a diameter of about 0.2 to 1.0 mm from the upper surface to the lower surface. A part of the wiring conductor 9 is attached to the upper and lower surfaces and the inner wall of each through hole 10, and the wiring conductors 9 on the upper and lower surfaces are electrically connected through the through hole 10. The core 7 is formed by thermally curing a sheet in which a glass fabric is impregnated with an uncured thermosetting resin.
It is manufactured by performing drilling from the upper surface to the lower surface. The wiring conductors 9 on the upper and lower surfaces of the core 7 are attached with copper foil having a thickness of about 5 to 50 μm on the entire upper and lower surfaces of the sheet for the core 7 and are etched after the copper foil is cured. Thus, a predetermined pattern is formed. The wiring conductor 9 on the inner wall of the through-hole 10 is formed by depositing a copper foil having a thickness of about 5 to 50 μm on the inner wall of the through-hole 10 by providing the through-hole 10 on the core body 7 by electroless plating and electrolytic plating. Formed. Further, the core 7 is filled with a resin column 11 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin inside the through hole 10. Resin pillar 11
Is intended to enable the insulating layer 8 to be formed directly above and directly below the through-hole 10 by closing the through-hole 10. An uncured paste-like thermosetting resin is screen-printed in the through-hole 10. And hardened by heat, and then the upper and lower surfaces are polished to be substantially flat. An insulating layer 8 is laminated on the upper and lower surfaces of the core 7 including the resin pillar 11. The insulating layers 8 laminated on the upper and lower surfaces of the core 7
A plurality of through holes 1 each having a thickness of about 20 to 50 μm and a diameter of about 30 to 100 μm from the upper surface to the lower surface of each layer.
Has two. These insulating layers 8 are provided to provide an insulating interval for wiring the wiring conductors 9 at high density, and the insulating layers 8 except for the outermost layer have surfaces and through holes.
A part of the wiring conductor 9 is attached in the inside 12. By electrically connecting the upper-layer wiring conductor 9 and the lower-layer wiring conductor 9 through the through-hole 12, high-density wiring can be formed three-dimensionally. Note that the outermost insulating layer 8 is a solder resist layer. Such an insulating layer 8 has a thickness of 20
A film of an uncured thermosetting resin having a thickness of about 50 μm is attached to the upper and lower surfaces of the core 7, which is thermally cured, and a through hole 12 is formed by laser processing. It is formed by sequentially stacking the insulating layers 8. The wiring conductor 9 attached to the surface of each insulating layer 8 and the inside of the through hole 12 has a thickness of about 5 to 50 μm on the surface of each insulating layer 8 and inside the through hole 12 every time the insulating layer 8 is formed. It is formed by applying a copper plating layer to a predetermined pattern by a known pattern forming method such as a semi-additive method or a subtractive method. The wiring conductor 9 formed from the upper surface to the lower surface of the insulating base 4 functions as a conductive path for connecting each electrode of the electronic component 5 to the external electric circuit board 2, and is exposed on the upper surface of the insulating base 4. The electronic component connection pad 14 is connected to the respective electrodes of the electronic component 5 via the solder 13 at the portion where the electronic component 5 is connected, and the portion exposed at the lower surface of the insulating base 4 is connected to the external electric circuit board 2 via the solder 3. External connection pads 15 are formed. In this example, each electrode of the electronic component 5 is connected to the electronic component connection pad 14 via the solder 13, but the electrode of the electronic component 5 is connected to the electronic component connection pad 14 via, for example, a bonding wire. Is also good. In that case, the electronic component connection pads 14 are arranged around the portion where the electronic component 5 is mounted. After connecting the electrodes of the electronic component 5 to the electronic component connection pads 14 on the upper surface of the insulating base 4 via the solder 13, the electronic component 5 is sealed with a sealing member 6 made of epoxy resin or the like. The electronic device 1 is completed, and the electronic device 1 is mounted on the external electric circuit board 2 by connecting the external connection pad 15 of the electronic device 1 to the electronic device connection pad 16 of the external electric circuit board 2 via the solder 3. Is done. In such an electronic device 1,
In order to facilitate the mounting on the external electric circuit board 2 via the solder 3, the solder 3 is previously attached to the external connection pad 15. By doing so, when the electronic device 1 is mounted on the external electric circuit board 2, it is possible to easily and surely hold and position the solder 3. At this time,
As the solder 3, for example, a solder containing about 0.25% by mass of copper in a lead-tin eutectic alloy is used. In order to attach the solder 3 to the external connection pad 15 in advance, first, as shown in an enlarged sectional view of a main part in FIG. A plating layer 17 and a gold plating layer 18 having a thickness of 0.01 to 0.8 μm are deposited, and a diameter of about 0.25% by mass of copper contained in, for example, a lead-tin eutectic alloy is added.
A spherical solder 3 of about 4 to 0.7 mm is brought into contact. Next, these are heated to a temperature higher than the melting temperature of the solder 3 in, for example, a nitrogen gas atmosphere and reflowed, and as shown in an enlarged sectional view of a main part in FIG. After being melted and solidified, the solder 3 is attached to the external connection pads. At this time, the gold plating layer 18 on the nickel plating layer 17 is diffused and absorbed into the molten solder 3 and disappears. Further, on the nickel plating layer 17, an alloy layer 19 having a thickness of about 0.5 to 5 μm containing copper, nickel and tin reacts with nickel in the nickel plating layer 17 and tin and copper in the solder 3 reacting. It is formed. Then, the nickel plating layer is interposed through the alloy layer 19.
17 and the solder 3 are firmly joined. As the nickel plating layer 17, for example, electroless nickel plating containing about 4 to 12% by weight of phosphorus is preferably used. As a plating solution for such a nickel plating layer 17, for example, nickel sulfate 40
g / l, sodium citrate 24 g / l, sodium acetate
Electroless nickel plating of 14 g / l, sodium hypophosphite 20 g / l, and ammonium chloride 5 g / l at a temperature of 50 to 90 ° C. is used. Examples of the plating solution for the gold plating layer 18 include an electroless gold plating solution having a temperature of 50 to 90 ° C. and including 5 g / l of potassium gold cyanide, 50 g / l of potassium citrate, and 5 g / l of sodium ethylenediaminetetraacetate. used. The nickel plating layer 17 is provided for preventing the external connection pads 15 from being oxidized and corroded, thereby making the connection between the external connection pads 15 and the solder 3 easy and strong. Is less than 0.5 μm, external connection pad 1
5 cannot be covered well and the external connection pad 15
Is liable to be oxidized or discolored on the surface, and the bonding with the solder 3 tends to be weak. On the other hand, if the thickness exceeds 10 μm, cracks and peeling are likely to occur in the nickel plating layer 17 due to the internal stress of the nickel plating layer 17. Become. Therefore, the thickness of the nickel plating layer 17 is preferably in the range of 0.5 to 10 μm. When the nickel plating layer 17 is made of electroless nickel plating containing phosphorus, if the content of phosphorus in the nickel plating layer 17 is less than 4% by weight, the nickel plating layer 17 When depositing, the deposition rate of nickel plating is slow, and it takes a long time to obtain a nickel plating layer 17 of a predetermined thickness, so that the productivity of the semiconductor device is extremely low. On the other hand, if it exceeds 12% by weight,
It becomes difficult to satisfactorily apply the gold plating layer 18 on the nickel plating layer 17. Therefore, the content of phosphorus in the nickel plating layer 17 is preferably in the range of 4 to 12% by weight. Further, the gold plating layer 18 to be adhered on the nickel plating layer 17 is for satisfactorily joining the nickel plating layer 17 and the solder 3 and has a thickness of 0.01 μm.
If it is less than m, the bonding between the nickel plating layer 17 and the solder 3 tends to be weak. On the other hand, if it exceeds 0.8 μm, a large amount of gold melts into the solder 3 and the solder 3 becomes brittle. Separation is likely to occur between the nickel plating layer 17 and the solder 3 due to stress due to heat or the like generated when the electronic component 5 operates. Therefore, the thickness of the gold plating layer 18 is 0.01 to
A range of 0.8 μm is preferred. The nickel plating layer 17 and the gold plating layer 18 may be applied, for example, before connecting the electrodes of the electronic component 5 to the electronic component connection pads 14 of the insulating base 1. At the same time, a nickel plating layer and a gold plating layer may be similarly applied to the electronic component connection pads. By doing so, it is possible to effectively prevent the electronic component connection pad 14 from being oxidized and corroded, and it is possible to easily and firmly join the electronic component connection pad 14 and the solder 13. On the other hand, the external electric circuit board 2 on which the electronic device 1 is mounted is, for example, a general printed circuit board, and a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin is added to a glass fabric in which glass fibers are woven vertically and horizontally. A plurality of electronic device connection pads are provided on the upper surface of the insulating plate 20 impregnated with resin.
16 is formed. The electronic device connection pad 16 may be formed by depositing a nickel plating layer on a copper foil or may be formed only of a copper foil. Such an external electric circuit board 2 is manufactured by an ordinary method. Then, the electronic device 1 is connected to the external electric circuit board 2.
In order to mount the electronic device 1, the electronic device 1 is placed on the external electric circuit board 2 so that the solder 3 previously attached to the external connection pad 15 and the electronic device connection pad 16 are in contact with each other. A method is employed in which the solder 3 is melted by heating to a temperature higher than the temperature at which the solder 3 melts in a gas atmosphere. At this time, as shown in an enlarged sectional view of a main part in FIG. 3, the nickel plating layer of the external connection pad 15 of the electronic device 1 is formed.
Since an alloy layer 19 containing copper, nickel and tin is previously formed on 17, an electronic device connection pad 16 of the external electric circuit board 2 is formed by depositing a nickel plating layer on a copper foil. Even in the case where it is made of only copper foil, a substantially uniform alloy layer 19 containing copper, nickel and tin and having a thickness of about 0.05 to 10 μm is formed on the nickel plating layer 17. Since the alloy layer 19 containing copper, nickel and tin is formed on the nickel plating 17 on the external connection pad 15 in this manner, the nickel plating layer 17 on the external connection pad 15 and the solder 3 Are firmly joined via an alloy layer 19 containing copper, nickel and tin, and as a result, even if thermal stress due to heat or the like generated during operation of the electronic component 5 is repeatedly applied, the external connection pads 15 The electronic component 5 can be operated normally and stably for a long period of time without peeling between the solder and the solder 3. The thickness of the alloy layer 19 containing copper, nickel and tin formed on the nickel plating layer 17 is 0.05 μm.
If it is less than m, the adhesion between the nickel plating layer 17 and the alloy layer 19 is poor, and peeling may occur between them.
If it exceeds μm, an alloy layer containing copper, nickel and tin 19
Breakage may occur from inside. Therefore, the thickness of the alloy layer 19 containing copper, nickel and tin formed between the nickel plating layer 17 and the solder 3 is preferably in the range of 0.05 to 10 μm. EXAMPLE As a substrate for evaluation, two insulating layers made of epoxy resin and having a thickness of 35 μm were laminated on a 1.6 mm thick core obtained by impregnating a glass fabric with an epoxy resin. A solder resist with a thickness of 25 μm from copper plating made of acrylic-modified epoxy resin is formed on each of ten approximately circular test pads with a diameter of 0.6 mm consisting of a copper plating layer with a thickness of 15 μm on the insulating layer. The layer was applied so as to have an opening having a diameter of 0.5 mm concentric with the test pad, and a nickel plating layer having a thickness of 3 μm and a thickness of 0.06 μm were formed on the surface of the test pad exposed from the opening of the solder resist layer. with providing a evaluation substrate with a gold plating layer are sequentially deposited, the on the test pad, a lead - tin eutectic peak solder volume which contains 0.25% by weight of copper alloy 0.1 mm 3 After forming a solder bump by melting at a soldering temperature of 230 ° C, this is applied to a nickel plating layer on copper foil. The connection pad with a thickness of 15 μm and a diameter of 0.53 mm corresponds to the test pad on the evaluation board. The solder bumps formed on the evaluation board are melted at a peak temperature of 230 ° C, and the connection pads on the printed board and the test pads on the evaluation board are joined via the solder bumps. Thus, a first evaluation sample according to the present invention was obtained. Further, on a test pad of the above-described evaluation substrate, a solder having a volume of 0.1 mm 3 containing 0.25% by mass of copper in a lead-tin eutectic alloy was melted at a peak temperature of 230 ° C. to form a solder bump. After that, this was changed to 12
A connection pad having a diameter of 0.53 mm and a diameter of 0.53 mm is placed on a printed circuit board having a position corresponding to the test pad on the evaluation board, and the solder bumps formed on the evaluation board are melted at a peak temperature of 230 ° C. The connection pads and the test pads of the evaluation substrate were joined via solder bumps to obtain a second evaluation sample according to the present invention. The first and second evaluation materials according to the present invention include 18 to 30% by mass of copper, 0.3 to 5% by mass of nickel and 50 to 60% by mass between the nickel plating layer and the solder bump on the test pad. % Of tin was formed to a thickness of 0.05 to 10 μm. Further, a solder made of a lead-tin eutectic alloy and having a volume of 0.1 mm 3 was melted at a peak temperature of 220 ° C. on a pad of the above-mentioned evaluation substrate to form a solder bump, and this was formed only from copper foil. A connection pad having a thickness of 12 μm and a diameter of 0.53 mm is placed on a printed circuit board having a position corresponding to the test pad on the evaluation board, and the solder bumps formed on the evaluation board are melted at a peak temperature of 220 ° C. The connection pads on the printed board and the test pads on the evaluation board were joined via solder bumps to obtain evaluation samples for comparison. In the evaluation sample for comparison, a nickel-tin alloy layer having a thickness of 0.05 to 20 μm and an alloy layer containing copper, nickel and tin were formed between the nickel plating layer and the solder bump on the test pad. . The thus-obtained evaluation substrate of each evaluation sample was peeled off the printed circuit board, and the peeled surface was observed. As a result, in the evaluation sample according to the present invention,
In all the test pads, peeling occurred between the test pad and the insulating layer, and it was confirmed that the nickel plating layer and the solder were extremely strongly bonded. On the other hand, in the evaluation samples for comparison, peeling occurred between the nickel plating layer and the solder in all the test pads, and it was confirmed that the bonding strength between the nickel plating layer and the solder was weak. Thus, according to the electronic device mounting structure of the present invention, the electronic component 5 can be normally operated for a long period of time. It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. In one example, the insulating base 4 is formed of a material obtained by impregnating a glass fabric with a thermosetting resin and a thermosetting resin. However, the insulating base 4 may be formed of another insulating material such as a ceramic material. Well, the wiring conductor 8
Other conductive materials such as metallized conductors of metal powder such as tungsten or molybdenum / copper / silver can be used. Further, in the example of the above-described embodiment, the alloy layer 19 containing copper, nickel, and tin is formed on the nickel plating layer 17 by including copper in the solder 3. A copper-containing plating layer is deposited on the surface, and copper, nickel and tin are contained on the nickel plating layer 17 by melting the solder 3 made of a lead-tin eutectic alloy containing no copper. Alloy layer 19
May be formed. According to the electronic device mounting structure of the present invention,
Since the alloy layer containing copper, nickel, and tin is formed on the nickel plating layer of the external connection pad of the electronic device, the nickel plating of the external connection pad is performed by the alloy layer containing copper, nickel, and tin. As a result, the external connection pads and the solder are not separated from each other even if thermal stress due to heat or the like generated during operation of the electronic component is repeatedly applied. For normal operation.

【図面の簡単な説明】 【図1】本発明の電子装置の実装構造の実施形態の一例
を示す断面図である。 【図2】(a)・(b)は、図1に示す電子装置1の外
部接続用パッド15に半田3を予め取着させる方法を説明
するための要部拡大断面図である。 【図3】図1に示す電子装置の実装構造の要部拡大断面
図である。 【符号の説明】 1・・・・・電子装置 2・・・・・外部電気回路基板 3・・・・・半田 4・・・・・絶縁基体 5・・・・・電子部品 15・・・・・外部接続用パッド 17・・・・・ニッケルめっき層 16・・・・・電子装置接続用パッド 19・・・・・銅とニッケルと錫とを含有する合金層
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing an example of an embodiment of a mounting structure of an electronic device of the present invention. FIGS. 2A and 2B are enlarged cross-sectional views of a main part for describing a method of attaching solder 3 to an external connection pad 15 of the electronic device 1 shown in FIG. 1 in advance. FIG. 3 is an enlarged sectional view of a main part of the mounting structure of the electronic device shown in FIG. 1; [Description of Signs] 1 ... Electronic device 2 ... External electric circuit board 3 ... Solder 4 ... Insulating base 5 ... Electronic component 15 ... ..Pad 17 for external connection Nickel plating layer 16 Pad 19 for electronic device connection Alloy layer containing copper, nickel and tin

Claims (1)

【特許請求の範囲】 【請求項1】 下面にニッケル層で被覆された外部接続
パッドを有する絶縁基体上に電子部品を搭載して成る電
子装置を、上面に電子装置接続パッドを有する外部電気
回路基板上に、前記外部接続パッドと前記電子装置接続
パッドとを錫を含有する半田を介して接合することによ
り実装して成る電子装置の実装構造であって、前記ニッ
ケル層上に銅とニッケルと錫とを含有する合金層が形成
されていることを特徴とする電子装置の実装構造。
Claims: 1. An electronic device comprising an electronic component mounted on an insulating base having external connection pads covered with a nickel layer on a lower surface, and an external electric circuit having electronic device connection pads on an upper surface. A mounting structure of an electronic device, which is mounted on a substrate by bonding the external connection pad and the electronic device connection pad via solder containing tin, wherein copper and nickel are provided on the nickel layer. An electronic device mounting structure, wherein an alloy layer containing tin is formed.
JP2001328250A 2001-10-25 2001-10-25 Mounting structure of electronic device Pending JP2003133474A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
JP2001328250A JP2003133474A (en) 2001-10-25 2001-10-25 Mounting structure of electronic device

Publications (1)

Publication Number Publication Date
JP2003133474A true JP2003133474A (en) 2003-05-09

Family

ID=19144343

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Country Link
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006237151A (en) * 2005-02-23 2006-09-07 Shinko Electric Ind Co Ltd Wiring board and semiconductor apparatus
JP2010262960A (en) * 2009-04-30 2010-11-18 Furukawa Electric Co Ltd:The Interposer and joint structure of solder joint
JP2014143407A (en) * 2012-12-25 2014-08-07 Mitsubishi Materials Corp Power module
WO2014157178A1 (en) * 2013-03-29 2014-10-02 三菱マテリアル株式会社 Power module
US9642275B2 (en) 2012-12-25 2017-05-02 Mitsubishi Materials Corporation Power module

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006237151A (en) * 2005-02-23 2006-09-07 Shinko Electric Ind Co Ltd Wiring board and semiconductor apparatus
JP2010262960A (en) * 2009-04-30 2010-11-18 Furukawa Electric Co Ltd:The Interposer and joint structure of solder joint
JP2014143407A (en) * 2012-12-25 2014-08-07 Mitsubishi Materials Corp Power module
KR20150099754A (en) * 2012-12-25 2015-09-01 미쓰비시 마테리알 가부시키가이샤 Power module
CN104885207A (en) * 2012-12-25 2015-09-02 三菱综合材料株式会社 Power module
US9426915B2 (en) 2012-12-25 2016-08-23 Mitsubishi Materials Corporation Power module
TWI581343B (en) * 2012-12-25 2017-05-01 三菱綜合材料股份有限公司 Power module
US9642275B2 (en) 2012-12-25 2017-05-02 Mitsubishi Materials Corporation Power module
KR102154369B1 (en) * 2012-12-25 2020-09-09 미쓰비시 마테리알 가부시키가이샤 Power module
WO2014157178A1 (en) * 2013-03-29 2014-10-02 三菱マテリアル株式会社 Power module
US9953944B2 (en) 2013-03-29 2018-04-24 Mitsubishi Materials Corporation Power module

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