JP2003110410A - Wind comparator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a circuit for performing a wind comparator operation in a simple constitution at a low cost. SOLUTION: Resistors R1, R2 are connected in series between a signal input terminal for inputting an input signal Vin and a ground potential. An NPN transistor Q1 has a base terminal connected to the signal input terminal, an emitter terminal connected to the ground potential through a resistor R3, and a collector terminal connected to a reference potential through a resistor R4. It inversely amplifies the input signal Vin inputted to the base terminal and outputs it from the output terminal. The resistors R1, R2 divide the input signal Vin to a voltage V2 which is then inputted to an input terminal 2 of a voltage comparator CP1, and the input signal Vin is applied to the base terminal of the NPN transistor Q1 to output an inversely amplified voltage V1 from the collector terminal of the NPN transistor Q1 to an input terminal 1 of the voltage comparator CP1 to obtain an output signal from an output terminal 3 of the comparator CP1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a window comparator that performs a window comparator operation according to a change in an input signal voltage to generate an output signal.

[0002]

2. Description of the Related Art An example of the configuration of a conventional window comparator circuit is shown in FIG. This window comparator circuit includes two voltage comparators CP11 and CP12, four resistors R11 to R14, and an exclusive NOR circuit L1.
It is composed by.

Voltage comparator CP11 and voltage comparator CP1
Reference numeral 2 is a voltage level comparator for comparing the voltage levels input to the two input terminals 1 and 2, and the output terminal 3
Outputs a logic level signal which is a comparison output.

That is, the voltage at the input terminal 2 is equal to the voltage at the input terminal 1
When the voltage of the input terminal 2 is lower than the voltage of the input terminal 1, a low level (L level) signal is output from the output terminal 3 when the voltage of the input terminal 2 is lower than the voltage of the input terminal 1. Level) signal is output.

A reference voltage V11 obtained by dividing the constant voltage power supply Vcc by resistors R11 and R12 is input to the input terminal 2 of the voltage comparator CP11, and at the same time, the voltage comparator CP12.
The reference voltage V12 obtained by dividing the constant voltage power supply Vcc by the resistors R13 and R14 is input to the input terminal 2 of the input terminal 2, and the input terminal 1 of the voltage comparator CP11 and the voltage comparator CP12.
The input signal Vin is input to both of the input terminals 1.
The reference voltage V11 is set to a voltage level lower than the reference voltage V12.

The output terminals 3 of the voltage comparator CP11 and the voltage comparator CP12 are exclusive N respectively.
The final output signal Out of the logic level is output from the output terminal of the exclusive NOR circuit L1 which is connected to the input terminal of the OR circuit L1.

FIG. 6 shows a time change of an input / output signal in the window comparator circuit configured as described above.

In the period from time t100 to time t101 in FIG. 6A, the input signal Vin is the reference voltage V1.
Since it is less than 1, the output signals of the voltage comparators CP11 and CP12 are both at the H level. As a result, as shown in FIGS. 6B and 6C, the output signal Out of the exclusive NOR circuit L1 is at the L level.

Next, time t101 has passed and time t102 has passed.
In the period up to, since the input signal Vin is equal to or higher than the reference voltage V11 and equal to or lower than the reference voltage V12, the voltage comparator CP
The output of 11 becomes L level, and the output of the voltage comparator CP12 becomes H level. As a result, exclusive NOR
The output signal Out of the circuit L1 changes from the L level to the H level.

Next, after the time t102, since the input signal Vin becomes the reference voltage V12 or higher, both outputs of the voltage comparator CP11 and the voltage comparator CP12 become L level. As a result, the exclusive NOR circuit L1
Output signal Out changes from H level to L level.

In the window comparator circuit which operates as described above, when the input signal Vin has a voltage level between the reference voltage V11 and the reference voltage V12 (time t101).
From time t102), an H level output signal is output from the output terminal of the exclusive NOR circuit L1.

Next, as another conventional window comparator circuit, a resistor R is provided between the input terminal 2 and the output terminal 3 of the voltage comparator CP11 of the window comparator circuit of FIG.
15 and the input terminal 2 of the voltage comparator CP12
FIG. 7 shows a configuration in which the resistor R16 is provided between the output terminal 3 and the output terminal 3.

When the output terminal 3 of the voltage comparator CP11 outputs an H level voltage, the reference voltage V11H is input to the input terminal 2 of the voltage comparator CP11, and the output terminal 3 of the voltage comparator CP11 is input to the input terminal 2. When the L level voltage is output, the reference voltage V11L is input. At this time, the reference voltage V11H, the reference voltage V11L, and the reference voltage V11
The relationship is as follows: reference voltage V11L <reference voltage V11 <reference voltage V11H.

Similarly, the input terminal 2 of the voltage comparator CP12
Is input with the reference voltage V12H when the output terminal 3 of the voltage comparator CP12 outputs the H level voltage, and when the output terminal 3 of the voltage comparator CP12 outputs the L level voltage. The reference voltage V12L is input to. At this time, the relationship among the reference voltage V12H, the reference voltage V12L, and the reference voltage V12 is reference voltage V12L <reference voltage V12 <reference voltage V12H.

The reference voltage V11H is the reference voltage V12.
It is set to a voltage level lower than L.

FIG. 8 shows the change over time of the input / output signals in the window comparator circuit configured as described above.

As shown in FIG. 8A, since the input signal Vin is lower than the reference voltage V11L in the period from time 110 to time t111, as shown in FIGS. 8B, 8A and 8B. The voltage comparator CP11 and the voltage comparator CP12.
Both outputs become H level. As a result, FIG. 8 (B)
As shown in (c), the exclusive NOR circuit L1
Output signal Out becomes L level. As a result, the reference voltage V11 and the reference voltage V12 applied to the input terminals 2 of the voltage comparator CP11 and the voltage comparator CP12 at this time.
Are the reference voltage V11H and the reference voltage V12H, respectively.

During the period from the time t111 to the time 112, the input signal Vin is higher than the reference voltage V11H and lower than the reference voltage V12H, so the voltage comparator CP11.
Output changes from the H level to the L level, and as a result, the output signal Out of the exclusive NOR circuit L1 changes from the L level to the H level. As a result, the voltage comparator C
The reference voltage V11 applied to the input terminal 2 of P11 changes from the reference voltage V11H to the reference voltage V11L.

Since the input signal Vin is higher than the reference voltage V12H during the period after the time t112, the output of the voltage comparator CP12 changes from H level to L level. As a result, the output signal Ou of the exclusive NOR circuit L1
t changes from H level to L level. As a result, the reference voltage V applied to the input terminal 2 of the voltage comparator CP12
12 changes from the reference voltage V12H to the reference voltage V12L.

Next, during the period when the input signal Vin starts to fall, the input signal Vin becomes less than the reference voltage V12L at time t113, so that the output of the voltage comparator CP12 becomes L.
The level changes from the H level. As a result, the output signal Out of the exclusive NOR circuit L1 changes from the L level to the H level. As a result, the reference voltage V12 applied to the input terminal 2 of the voltage comparator CP12 becomes equal to the reference voltage V1.
The reference voltage V12H changes from 2L.

During the period when the input signal Vin further decreases,
After time t114, the input signal Vin is the reference voltage V
Since it is less than 11 L, the output of the voltage comparator CP11 is L
Change from level to H level. As a result, the output signal Out of the exclusive NOR circuit L1 changes from H level to L level. As a result, the reference voltage V11 applied to the input terminal 2 of the voltage comparator CP11 becomes the reference voltage V11L.
Becomes the reference voltage V11H.

According to the window comparator circuit shown in FIG. 7, the window comparator operation shown in FIG. 5 has hysteresis characteristics added to the output signal Out.

[0023]

However, in the above-described conventional window comparator circuit, the voltage comparator has two components.
However, there is a problem in that the cost of the entire apparatus increases because many parts are expensive because they are composed of general-purpose parts.

Therefore, the present invention has been proposed in view of the above-mentioned circumstances, and provides a window comparator having a simple structure and low cost.

[0025]

In order to solve the above-mentioned problems, in the invention according to claim 1, between a signal input terminal for inputting an input signal voltage and a ground potential connection terminal connected to the ground potential. A first resistor and a second resistor are connected in series to a base terminal connected to the signal input terminal, an emitter terminal connected to a ground potential via a third resistor, a reference potential connection terminal and a fourth resistor. A bipolar transistor having a collector terminal connected to the base terminal and amplifying and outputting an input signal voltage input to the base terminal, and a signal obtained by dividing the input signal voltage by the first resistor and the second resistor. The voltage is input to the first input terminal of the voltage comparator, and the signal voltage amplified by applying the input signal voltage to the base terminal of the bipolar transistor is input to the second input terminal of the voltage comparator. Wherein the extracting an output signal from the output terminal of the voltage comparator.

The invention according to claim 2 is the invention according to claim 1, characterized in that a fifth resistor is connected between the first input terminal and the output terminal of the voltage comparator.

The invention according to claim 3 is the invention according to claim 2, which is higher than a predetermined voltage when the output signal from the output terminal of the voltage comparator is at a high level.
A level voltage is input to the first input terminal, and when the output signal from the output terminal of the voltage comparator is low level, a second level voltage lower than a predetermined voltage is input to the first input terminal. The resistance value of the fifth resistor is set so as to be input.

[0028]

According to the first aspect of the invention, the signal voltage obtained by dividing the input signal voltage by the first resistor and the second resistor is input to the first input terminal of the voltage comparator, and the bipolar transistor The input signal voltage is applied to the base terminal and the amplified signal voltage is input to the second input terminal of the voltage comparator, and the output signal is taken out from the output terminal of the voltage comparator. A circuit that operates as a window comparator can be configured with.

According to the second aspect of the invention, since the fifth resistor is connected between the first input terminal and the output terminal of the voltage comparator, it has a hysteresis characteristic with respect to the input signal voltage. It is possible to realize a simple circuit at low cost.

According to the third aspect of the present invention, when the output signal from the output terminal of the voltage comparator is at a high level, the first level voltage higher than the predetermined voltage is input to the first input terminal. When the output signal from the output terminal of the voltage comparator is low level, the resistance value of the fifth resistor is set so that the second level voltage lower than the predetermined voltage is input to the first input terminal. It is possible to realize a circuit that has a hysteresis characteristic for an input signal voltage at a simple and low cost.

[0031]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

The present invention is applied to the window comparator circuit according to the first embodiment configured as shown in FIG. 1, for example.

[Configuration of Window Comparator Circuit According to First Embodiment] The window comparator circuit according to the first embodiment includes a voltage comparator CP1 and four resistors R1 to R.
4, NPN transistor (bipolar transistor) Q
It is composed of 1.

The voltage comparator CP1 is a voltage level comparator for comparing the voltage levels input to the input terminal 1 and the input terminal 2, and outputs a logic level signal which is a comparison output from the output terminal 3.

That is, the voltage at the input terminal 2 is equal to that at the input terminal 1
When the voltage of the input terminal 2 is lower than the voltage of the input terminal 1, a low level (L level) signal is output from the output terminal 3 when the voltage of the input terminal 2 is lower than the voltage of the input terminal 1. Level) signal is output.

The NPN transistor Q1 is an inverting amplifier that inverts and amplifies the voltage input to the base terminal and outputs it from the collector terminal. This NPN transistor Q1 is
The base terminal is connected to the input signal input terminal, the emitter terminal is connected to the ground terminal via the resistor R3, and the collector terminal is connected to the constant voltage power supply Vcc via the resistor R4.

The voltage V2 obtained by dividing the input signal Vin by the resistors R1 and R2 is input to the input terminal 2 of the voltage comparator CP1, and the input terminal 1 of the voltage comparator CP1 is input.
Input signal Vin to NPN transistor Q1 and resistor R
3, the voltage V1 obtained by inverting and amplifying by the resistor R4 is input, and the logic level output signal Out is taken out from the output terminal 3 of the voltage comparator CP1.

[Operation of Window Comparator Circuit According to First Embodiment] Next, the first comparator configured as described above will be described.
FIG. 2 shows the operation of the window comparator circuit according to the embodiment.
Will be described with reference to.

First, as shown in FIG. 2A, when the input signal Vin is 0 V, that is, the ground potential, NP
Since there is no voltage input to the base terminal of the N-transistor Q1 and there is a cutoff state, no current flows through the NPN transistor Q1, the resistors R3 and R4, and the voltage V of the collector terminal of the NPN transistor Q1 and the input terminal 1 of the voltage comparator CP1.
1 becomes equal to the constant voltage power supply Vcc.

At this time, as shown in FIG. 2B, the voltage V2 at the input terminal 2 of the voltage comparator CP1 is 0 V, and the output terminal 3 of the voltage comparator CP1, that is, the output signal Out is at the L level signal. Is output.

When the input signal Vin rises from 0V and becomes larger than Vbe at time t1, the NPN transistor Q1 shifts from the cutoff state to the active state, and the NPN transistor Q1, the resistor R3, and the resistor R4.
A current from the constant voltage power supply Vcc starts to flow to the. As a result, after time t1, the voltage V1 at the collector terminal of the NPN transistor Q1 and the input terminal 1 of the voltage comparator CP1 starts to drop below the constant voltage power supply Vcc.

Here, when the potential difference between the base terminal and the emitter terminal when the NPN transistor Q1 shifts from the cutoff state to the active state is Vbe, and b = R4 / R3 (Equation 1), the voltage V1 is V1 = Vcc −b · (Vin−Vbe) (Expression 2) Further, the voltage V2 of the input terminal 2 of the voltage comparator CP1 rises in proportion to the input signal Vin, and if a = R2 / (R1 + R2) (Equation 3), then V2 = a · Vin (Equation 4) expressed.

Then, after the time t1, the input signal V
As in increases, the voltage V1 decreases and the voltage V2 increases, but when the voltage V2 is higher than the voltage V1, the output signal Out from the output terminal 3 of the voltage comparator CP1 is at L level. Becomes

At time t2, when the voltage V1 becomes lower than the voltage V2, the output terminal 3 of the voltage comparator CP1
Output signal Out changes from L level to H level. Here, the level change point of the output signal Out, that is, the input signal Vi when the voltage V1 and the voltage V2 become the same voltage
When n is VA, the value of the reference voltage VA is represented by the following equation 2 and equation 4: VA = (Vcc + b · Vbe) / (a + b) (Equation 5)

When the input signal Vin further rises, the NPN
The transistor Q1 shifts from the active state to the saturation state to stop the inverting amplification operation, and the voltage V1 changes to the NPN transistor Q1.
The voltage is in accordance with the emitter terminal voltage and the base terminal voltage of and changes from falling to rising. Assuming that the potential difference between the collector terminal and the emitter terminal when the NPN transistor Q1 is in a saturated state is Vsat, the voltage V
1 is represented by V1 = Vin−Vbe + Vsat (Equation 6). Since the voltage V1 is lower than the voltage V2 at the time when the NPN transistor Q1 enters the saturated state, the output signal Out is at the H level.

When the input signal Vin further rises, the voltage V
1 and the voltage V2 further increase, but since the rate of increase of the voltage V1 is larger than that of the voltage V2, the voltage V1 and the voltage V2 become the same voltage at the time t3, and further, after the time t3, the voltage V1 becomes the voltage. From the state lower than V2, the voltage V1
Becomes higher than the voltage V2. As a result, the output signal Out changes from the H level to the L level. here,
The level change point of the output signal Out (time t3), that is, the input signal Vi when the voltage V1 and the voltage V2 become the same voltage
When n is VB, the reference voltage VB is expressed by the following equation (4) and equation (6): VB = (Vbe-Vsat) / (1-a) (Equation 7)

According to the window comparator circuit of the first embodiment which operates as described above, the output signal Out is set to the H level when the input signal Vin has a voltage value between the reference voltage VA and the reference voltage VB. It is possible to perform a window comparator operation.

That is, according to the window comparator circuit of the first embodiment, the input signal Vin is divided by the resistors R1 and R2 and applied to the input terminal 2 of the voltage comparator CP1, and the input signal Vin is also added to the NPN transistor. Applied to the base terminal of Q1, and NPN transistor Q
By applying the signal voltage taken out from the collector terminal of No. 1 to the input terminal 1 of the voltage comparator CP1 and taking out the output signal Out from the output terminal 3 of the voltage comparator CP1, the wind comparator effect can be realized. Therefore, according to this window comparator circuit, it is possible to configure the window comparator circuit by the single voltage comparator CP1, and it is possible to provide a circuit having a simple configuration and low cost.

The reference voltage VA and the reference voltage VB are
The value of b expressed by the above formula 1 and the value of a expressed by the above formula 3, that is, the resistance R1, the resistance R2, the resistance R3, and the resistance R4.
It can be arbitrarily set by changing the resistance value of. That is, by arbitrarily setting the reference voltage VA and the reference voltage VB, it is possible to arbitrarily set the input signal Vin that sets the output signal Out to the H level.

[Configuration of Window Comparator Circuit According to Second Embodiment] Next, a window comparator circuit according to a second embodiment to which the present invention is applied will be described. In the description of the window comparator circuit according to the second embodiment, the same parts as those in the first embodiment described above will be denoted by the same reference numerals and detailed description thereof will be omitted.

The window comparator circuit according to the second embodiment is different from that of the first embodiment in that a resistor R5 is connected between the input terminal 2 and the output terminal 3 of the voltage comparator CP1 as shown in FIG. Different from the window comparator circuit.

The input terminal 2 of the voltage comparator CP1 has an H level output signal Ou from the output terminal 3 of the voltage comparator CP1.
When t is output, the voltage V2H higher than the voltage V2 by the voltage α is applied, and when the L level output signal Out is output from the output terminal 3 of the voltage comparator CP1, the voltage β is higher than the voltage V2. The H-level voltage and L-level voltage of the voltage comparator CP1 and the resistance value of the resistor R5 are set so that the voltage V2L that is as low as V2L is applied.

[Operation of Window Comparator Circuit According to Second Embodiment] The operation of the window comparator circuit according to the second embodiment configured as described above will be described with reference to FIG.

First, in FIG. 4A, the input signal Vi
When n is 0V, that is, the ground voltage, and when the input signal Vin rises and the NPN transistor Q1 changes from the cutoff state to the active state, the same operation as the window comparator circuit according to the first embodiment is performed.

At this time, as shown in FIG. 4B, since the L-level output signal Out is output from the output terminal 3 of the voltage comparator CP1, the voltage V2L is applied to the input terminal 2. The voltage V2L at this time is represented by V2L = a · Vin−β (Equation 8).

After the NPN transistor Q1 shifts to the active state, the voltage V1 decreases as the voltage of the input signal Vin increases, and the voltage V2 continues to increase, but the voltage V1 changes to the voltage V1.
In a state where the output signal Out is smaller than 2L, the output signal Out becomes L level.

Further, the input signal Vin rises, and the voltage V1
The output signal Out changes to the H level after time t11 when V becomes smaller than the voltage V2. The voltage applied to the input terminal 2 by such an operation is from the voltage V2L to the voltage V2L.
Change to H. The voltage V2H at this time is expressed by V2H = a · Vin + α (Equation 9). Here, the level change point of the output signal Out,
That is, assuming that the input signal Vin when the voltage V1 and the voltage V2L are the same voltage is VAL, the value of the reference voltage VAL is VAL = (Vcc + b · Vbe + β) / (a + b) (Equation 2) 10) is represented.

When the input signal Vin further rises, the NPN
The transistor Q1 shifts from the active state to the saturation state to stop the inverting amplification operation, and the voltage V1 changes to the NPN transistor Q1.
The voltage is in accordance with the emitter terminal voltage and the base terminal voltage of, and changes from falling to rising. Assuming that the potential difference between the collector terminal and the emitter terminal when the NPN transistor Q1 is in a saturated state is Vsat, the voltage V1
Is expressed by V1 = Vin−Vbe + Vsat (Equation 6). Since the voltage V1 is lower than the voltage V2H at the time when the NPN transistor Q1 enters the saturation state, the output signal Out is at the H level.

When the input signal Vin further rises, the voltage V
1 and the voltage V2H further increase, but since the increase rate of the voltage V1 is larger than that of the voltage V2H, the voltage V1H and the voltage V2H become the same voltage at the time t12, and after the time t12, the voltage V1 becomes the voltage. The voltage V1 changes from a state lower than V2H to a state higher than the voltage V2H. As a result, the output signal Out changes from the H level to the L level. At this time, the voltage V2 applied to the input terminal 2 of the voltage comparator CP1 changes from the voltage V2H to the voltage V2L. Also, the level change point of the output signal Out (time t1
3) That is, if the input signal Vin when the voltage V1 and the voltage V2H are the same voltage is VBH, the voltage VBH is
From the equations (6) and (9), VBH = (Vbe-Vsat + α) / (1-a) (Equation 11).

Next, when the input signal Vin starts to drop, the voltage V1 and the voltage V2L also start to drop, but the voltage V1
1 has a larger fall rate than the voltage V2L, and therefore, when the voltage drops to a certain input signal Vin, the voltage V1 changes to the voltage V1.
The voltage V1 changes from the state higher than 2L to the state lower than the voltage V2L, and the output signal Out changes from the L level to the H level.
The level changes (time t13). As a result, the voltage applied to the input terminal 2 changes from the voltage V2L to the voltage V2H. Here, when the level change point of the output signal Out, that is, when the input signal Vin at the time when the voltage V1 and the voltage V2L become the same voltage (time t13) is VBL, the value of the reference voltage VBL becomes Therefore, VBL = (Vcc + b · Vbe−β) / (1-a) (Expression 12)

When the input signal Vin further decreases, the NPN
The transistor Q1 shifts from the saturated state to the active state, and the voltage V1 at the input terminal 1 turns from falling to rising. After the NPN transistor Q1 becomes active, the input signal Vi
The voltage V1 increases and the voltage V2H continues to decrease as the voltage of n decreases, but the output signal Out remains at the H level when the voltage V1 is smaller than the voltage V2H.

From this state, when the input signal Vin further decreases, the voltage V1 and the voltage V2H continue to increase and decrease, and when the voltage V1 after the time t14 becomes larger than the voltage V2H, the output signal Out becomes H. Change from level to L level. At this time, the voltage V2 applied to the input terminal 2 of the voltage comparator CP1 changes from the voltage V2H to the voltage V2.
It becomes L.

Here, the level change point of the output signal Out,
That is, when the input signal Vin when the voltage V1 and the voltage V2H become the same voltage is VAH, the value of the reference voltage VAH is VAH = (Vcc + b · Vbe−α) / (a + b) from the above equations 2 and 9. It is expressed by (Equation 13).

According to the window comparator circuit of the second embodiment which operates as described above, it is possible to perform the window comparator operation in which the output signal Out has a hysteresis characteristic.

That is, according to the window comparator circuit of the second embodiment, the resistor R5 is connected between the input terminal 2 and the output terminal 3 of the voltage comparator CP1 so that the voltage comparator CP input terminal 1 has a hysteresis characteristic. Since a single voltage comparator CP1 can realize the window comparator operation, the circuit can be simple in structure and low in cost.

The above embodiment is an example of the present invention. For this reason, the present invention is not limited to the above-described embodiment, and other than this embodiment, as long as it does not deviate from the technical idea of the present invention, various types according to the design etc. Of course, it is possible to change.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a window comparator circuit according to a first embodiment to which the present invention is applied.

FIG. 2 is a timing chart showing the operation of the window comparator circuit according to the first embodiment to which the present invention is applied.

FIG. 3 is a circuit diagram showing a configuration of a window comparator circuit according to a second embodiment of the present invention.

FIG. 4 is a timing chart showing the operation of the window comparator circuit according to the second embodiment of the present invention.

FIG. 5 is a circuit diagram showing an example of a conventional window comparator circuit.

FIG. 6 is a timing chart showing a time change of an input signal in a conventional window comparator circuit.

FIG. 7 is a circuit diagram showing an example of another conventional window comparator circuit.

FIG. 8 is a timing chart showing a time change of an input signal in another conventional window comparator circuit.

[Explanation of symbols]

1,2 input terminals 3 output terminals

Claims (3)

[Claims] 1. A first resistor and a second resistor are connected in series between a signal input terminal for inputting an input signal voltage and a ground potential connecting terminal connected to a ground potential, and the first resistor and the second resistor are connected to the signal input terminal. A base terminal, an emitter terminal connected to the ground potential via the third resistor, a collector terminal connected to the reference potential connection terminal via the fourth resistor, and an input signal voltage input to the base terminal. A bipolar transistor for amplifying and outputting is provided, and a signal voltage obtained by dividing the input signal voltage by the first resistor and the second resistor is input to the first input terminal of the voltage comparator, and the base terminal of the bipolar transistor is also provided. And a signal voltage amplified by applying an input signal voltage to the second input terminal of the voltage comparator to output an output signal from the output terminal of the voltage comparator. Comparator. 2. The window comparator according to claim 1, further comprising a fifth resistor connected between the first input terminal and the output terminal of the voltage comparator. 3. A first voltage higher than a predetermined voltage when the output signal from the output terminal of the voltage comparator is at a high level.
A level voltage is input to the first input terminal, and when the output signal from the output terminal of the voltage comparator is low level, a second level voltage lower than a predetermined voltage is input to the first input terminal. The window comparator according to claim 2, wherein the resistance value of the fifth resistor is set so as to be input.