JP2003109844A - Thin film electronic component - Google Patents
Thin film electronic componentInfo
- Publication number
- JP2003109844A JP2003109844A JP2001298648A JP2001298648A JP2003109844A JP 2003109844 A JP2003109844 A JP 2003109844A JP 2001298648 A JP2001298648 A JP 2001298648A JP 2001298648 A JP2001298648 A JP 2001298648A JP 2003109844 A JP2003109844 A JP 2003109844A
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- Prior art keywords
- layer
- thin film
- film
- thin
- electronic component
- Prior art date
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- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は薄膜電子部品に関
し、例えば、薄膜コンデンサ部品、薄膜抵抗部品に好適
に用いられる高周波用途の薄膜電子部品、特に耐湿性に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film electronic component, and more particularly to a thin film electronic component for high frequency use which is preferably used for a thin film capacitor component and a thin film resistor component, and more particularly to moisture resistance.
【０００２】[0002]
【従来の技術】近年、電子機器の小型化、高機能化に伴
い、電子機器内に設置される電子部品にも小型化、薄型
化、高周波対応などの要求が強くなってきている。2. Description of the Related Art In recent years, with the miniaturization and high functionality of electronic equipment, electronic parts installed in the electronic equipment are also required to be smaller, thinner, and compatible with high frequencies.
【０００３】特に、大量の情報を高速に処理する必要の
あるコンピュータの高速デジタル回路では、パーソナル
コンピュータレベルにおいても、ＣＰＵチップ内のクロ
ック周波数は２００ＭＨｚから１ＧＨｚ、チップ間バス
のクロック周波数も７５ＭＨｚから１３３ＭＨｚという
具合に高速化が顕著である。Particularly, in a high-speed digital circuit of a computer that needs to process a large amount of information at high speed, the clock frequency in the CPU chip is 200 MHz to 1 GHz and the clock frequency of the inter-chip bus is also 75 MHz to 133 MHz even at the personal computer level. The speedup is remarkable.
【０００４】また、ＬＳＩの集積度が高まりチップ内の
素子数の増大につれ、消費電力を抑えるために電源電圧
は低下の傾向にある。これらＩＣ回路の高速化、高密度
化、低電圧化に伴い、コンデンサや抵抗等の受動部品も
小型大容量化と併せて、高周波もしくは高速パルスに対
して優れた特性を示すことが必須になってきている。例
えは、薄膜コンデンサの小型・大容量化を実現するため
には、誘電体層の薄膜化、電極層パターンの小型化が有
効であり、種々の薄膜コンデンサが提案されている。Further, as the degree of integration of LSIs increases and the number of elements in a chip increases, the power supply voltage tends to decrease in order to suppress power consumption. As the speed, density and voltage of these IC circuits have increased, it has become essential for passive components such as capacitors and resistors to exhibit small size and large capacity, as well as excellent characteristics for high frequency or high speed pulses. Is coming. For example, in order to reduce the size and increase the capacity of the thin film capacitor, it is effective to reduce the thickness of the dielectric layer and the electrode layer pattern, and various thin film capacitors have been proposed.
【０００５】誘電体層の薄膜化による弊害として、絶縁
特性の劣化が懸念される。これら薄膜電子部品の絶縁特
性を向上するため、種々の手法が提案されている。例え
ば、特開平７−１８３１６５号公報、特開平８−３１９
５１号公報には誘電体層の微構造を改良し、誘電体層自
身のリーク特性を改良した例が開示されている。また、
特開平９−１９９３７３号公報には上側電極層が誘電体
層端部を被覆しない様なエアブリッジ構造を採用し、誘
電体層端部での絶縁性劣化を改善した例が開示されてい
る。As an adverse effect due to the thinning of the dielectric layer, there is concern that the insulation characteristics will deteriorate. Various techniques have been proposed to improve the insulating properties of these thin film electronic components. For example, JP-A-7-183165 and JP-A-8-319.
Japanese Patent No. 51 discloses an example in which the microstructure of the dielectric layer is improved and the leak characteristics of the dielectric layer itself are improved. Also,
Japanese Unexamined Patent Publication No. 9-199373 discloses an example in which an air bridge structure in which the upper electrode layer does not cover the end of the dielectric layer is adopted to improve the insulation deterioration at the end of the dielectric layer.
【０００６】薄膜コンデンサとしては、例えば、図５に
示す外観斜視図、図６の断面図に示すように、支持基板
１１上に、電子部品素体（誘電体層１３）と下側電極層
１２、上側電極層１４を有する薄膜素子が複数設けられ
て構成され、誘電体層１３は電極層１２、１４により挟
持されて薄膜素子Ａ（容量素子）を構成することが考え
られる。As the thin film capacitor, for example, as shown in the external perspective view of FIG. 5 and the sectional view of FIG. 6, an electronic component element body (dielectric layer 13) and a lower electrode layer 12 are formed on a support substrate 11. It is conceivable that a plurality of thin film elements having the upper electrode layer 14 are provided and the dielectric layer 13 is sandwiched between the electrode layers 12 and 14 to form a thin film element A (capacitive element).
【０００７】また、薄膜素子Ａは絶縁性保護膜１５で被
覆されており、この絶縁性保護膜１５には、底面に上側
電極層１４の一部が露出する貫通孔１９が形成されてい
る。この貫通孔１９内には、ハンダバンプからなる外部
端子２０ａ、２０ｂが形成されている。この薄膜コンデ
ンサでは、上側電極層１４は、下側電極層１２との導通
を防止するため、貫通孔１９の周りが環状に除去され、
上側電極層１４の一部が分割されている。The thin film element A is covered with an insulating protective film 15, and the insulating protective film 15 has a through hole 19 formed in the bottom surface to expose a part of the upper electrode layer 14. External terminals 20a and 20b made of solder bumps are formed in the through holes 19. In this thin film capacitor, the upper electrode layer 14 is removed in an annular shape around the through hole 19 in order to prevent conduction with the lower electrode layer 12.
A part of the upper electrode layer 14 is divided.
【０００８】このような薄膜コンデンサは、支持基板１
１上にスパッタリング法、ＣＶＤ法等の気相合成法を用
いて下側電極層１２を形成し、フォトリソグラフィ技術
を用いて、パターン加工を行う工程と、パターン加工さ
れた下側電極層１２上に、気相合成法やゾルゲル法など
で誘電体層１３を形成し、フォトリソグラフィを用いて
パターン加工する工程と、パターン加工された誘電体層
１３上に上側電極層１４を形成し、フォトリソグラフィ
技術を用いて、パターン加工を行う工程と、上側電極層
１４上に絶縁性保護膜１５を形成する工程と、この絶縁
性保護膜１５に貫通孔１９を形成し、この貫通孔１９内
に、下側電極層１２および上側電極層１４にそれぞれ電
気的に接続する外部端子２０ａ、２０ｂを形成する工程
を経て作製される。Such a thin film capacitor has a support substrate 1
1. The step of forming the lower electrode layer 12 on the substrate 1 by a vapor phase synthesis method such as a sputtering method or a CVD method, and performing pattern processing by using a photolithography technique, and the step of performing the pattern processing on the lower electrode layer 12 Then, a step of forming the dielectric layer 13 by a vapor phase synthesis method or a sol-gel method and patterning using photolithography, and forming an upper electrode layer 14 on the patterned dielectric layer 13 and performing photolithography. Using the technique, a step of patterning, a step of forming the insulating protective film 15 on the upper electrode layer 14, a through hole 19 is formed in the insulating protective film 15, and the through hole 19 is formed. It is manufactured through a process of forming external terminals 20a and 20b electrically connected to the lower electrode layer 12 and the upper electrode layer 14, respectively.
【０００９】[0009]
【発明が解決しようとする課題】しかしながら、常温常
湿雰囲気での絶縁特性の向上には上記手法は有効である
が、一般の信頼性試験の湿中雰囲気下では、水分の浸入
による絶縁劣化が想定されるので、薄膜電子部品の保護
膜層の耐湿性の向上は必要不可欠である。However, although the above-mentioned method is effective for improving the insulation characteristics in the normal temperature and normal humidity atmosphere, the insulation deterioration due to the infiltration of water may occur in the general reliability test in the wet atmosphere. As it is assumed, it is essential to improve the moisture resistance of the protective film layer of the thin film electronic component.
【００１０】本発明は、上述の課題に鑑みて案出された
ものであり、その目的は、高絶縁性、高い耐湿信頼性を
有する小型の薄膜電子部品を提供することである。The present invention has been devised in view of the above-mentioned problems, and an object thereof is to provide a small-sized thin film electronic component having high insulation and high moisture resistance reliability.
【００１１】[0011]
【課題を解決するための手段】本発明の薄膜電子部品
は、支持基板上に、電極層および薄膜部品素体からなる
該薄膜素子を形成し、該薄膜素子を耐湿性保護膜で被覆
するとともに、該耐湿性保護膜に、前記電極層と電気的
に接続する外部電極が設けられる貫通孔を形成して成る
薄膜電子部品において、前記耐湿性保護膜は、薄膜素子
側より有機樹脂層、無機化合物層、金属層を順次積層し
た積層構造で構成されている。In the thin film electronic component of the present invention, the thin film element consisting of an electrode layer and a thin film element body is formed on a supporting substrate, and the thin film element is covered with a moisture resistant protective film. In the thin-film electronic component, wherein the moisture-resistant protective film is formed with a through hole provided with an external electrode electrically connected to the electrode layer, the moisture-resistant protective film includes an organic resin layer and an inorganic layer from the thin film element side. It has a laminated structure in which a compound layer and a metal layer are sequentially laminated.
【００１２】この薄膜部品素体が薄膜誘電体層であり、
薄膜電子部品とは、薄膜コンデンサである。また、この
薄膜部品素体が薄膜抵抗体層であり、薄膜電子部品は、
薄膜抵抗部品である。This thin film component body is a thin film dielectric layer,
A thin film electronic component is a thin film capacitor. Also, this thin film component body is a thin film resistor layer, and the thin film electronic component is
It is a thin film resistance component.
【００１３】また、耐湿性保護膜層を構成する金属層
は、前記貫通孔の内部及び貫通孔の開口周囲に独立して
形成されている。The metal layer forming the moisture-resistant protective film layer is independently formed inside the through hole and around the opening of the through hole.
【００１４】また、耐湿性保護膜を構成する有機樹脂層
がポリイミド、ベンゾシクロブテンから選ばれる少なく
とも１種以上の材料で形成されている。The organic resin layer forming the moisture-resistant protective film is formed of at least one material selected from polyimide and benzocyclobutene.
【００１５】また、耐湿性保護膜を構成する無機化合物
層がＳｉＯ2、ＳｉＮx、から選ばれる少なくとも１種以
上の材料で形成されている。The inorganic compound layer forming the moisture-resistant protective film is made of at least one material selected from SiO 2 and SiNx.
【００１６】また、前記耐湿性保護膜を構成する金属層
がＴｉ、Ｃｒ、Ｎｉ、Ａｕから選ばれる少なくとも２種
以上の材料で形成されている。The metal layer forming the moisture-resistant protective film is made of at least two materials selected from Ti, Cr, Ni and Au.
【作用】この耐湿性保護膜は、素子側より（１）有機樹
脂層、（２）無機化合物層（３）金属層とから成ってい
る。有機樹脂層は、素子の電極層の形状及び厚みなどに
より発生する凹凸を吸収し、その平滑な有機樹脂層表面
に、無機化合物層を安定して形成させるためのものであ
る。また、（２）無機化合物層は、水分が薄膜素子部に
まで浸入しないように水分遮断する目的で形成される。
また、（３）金属層は、電極層を露出する貫通孔の端面
や界面部分にからの水分の浸入を抑制するシール金属の
目的で形成される。この金属層はＴｉ，Ｃｒ，Ｎｉ，Ａ
ｕから選ばれる少なくとも２種以上の金属より選択され
る。このように、それぞれの役割を担う（１）有機樹脂
層、（２）無機化合物層（３）金属層とから成る耐湿性
保護膜が順次積層された層構成をしているので、耐湿特
性を大幅に改善することが可能となる。This moisture-resistant protective film is composed of (1) an organic resin layer, (2) an inorganic compound layer, and (3) a metal layer from the element side. The organic resin layer is for absorbing irregularities generated due to the shape and thickness of the electrode layer of the element and for stably forming the inorganic compound layer on the smooth surface of the organic resin layer. Further, (2) the inorganic compound layer is formed for the purpose of blocking water so that the water does not enter the thin film element portion.
In addition, (3) the metal layer is formed for the purpose of a seal metal that suppresses the infiltration of water from the end surface and the interface portion of the through hole that exposes the electrode layer. This metal layer is made of Ti, Cr, Ni, A
It is selected from at least two metals selected from u. As described above, since the moisture-resistant protective film composed of (1) an organic resin layer and (2) an inorganic compound layer (3) a metal layer, which have respective roles, is sequentially laminated, the moisture-resistant property is improved. It is possible to greatly improve.
【００１７】また、本発明の薄膜電子部品では、誘電体
層や抵抗体層の非形成領域にハンダバンプからなる外部
端子が形成されるため、誘電体層や抵抗体層の厚みに対
して非常に大きな外部端子がリフロー時に収縮しても、
リフロー工程で生じる外部端子の熱収縮に伴う応力に対
して誘電体層が直接ダメージを受けず、誘電体層や抵抗
体層に過大な応力が発生することがなく、クラック発生
を防止することができ、クラックに半田が流れ込むこと
がなく、これにより絶縁性を確保することができ、素子
特性を維持した状態で、かつ実装信頼性も確保できる。Further, in the thin film electronic component of the present invention, since the external terminals made of solder bumps are formed in the regions where the dielectric layer and the resistor layer are not formed, the thickness of the dielectric layer and the resistor layer is very large. Even if a large external terminal contracts during reflow,
The dielectric layer is not directly damaged by the stress caused by the thermal contraction of the external terminal generated in the reflow process, and the generation of cracks can be prevented without causing excessive stress in the dielectric layer and the resistor layer. Therefore, the solder does not flow into the cracks, so that the insulation can be ensured, and the mounting reliability can be ensured while maintaining the element characteristics.
【００１８】[0018]
【発明の実施の形態】以下、本発明の薄膜電子部品を図
面に基づいて詳説する。尚、以下の実施の形態では、薄
膜電子部品素体として誘電体層を形成した薄膜コンデン
サを例に説明する。BEST MODE FOR CARRYING OUT THE INVENTION The thin film electronic component of the present invention will be described below in detail with reference to the drawings. In the following embodiments, a thin film capacitor having a dielectric layer as a thin film electronic component body will be described as an example.
【００１９】図１は、本発明の薄膜コンデンサからなる
薄膜電子部品を示すもので、この薄膜コンデンサは、支
持基板１上に、誘電体層３と下側電極層２、上側電極層
４を有する薄膜素子Ａが複数設けられて構成されてい
る。電極層２、４はＡｕから構成され、誘電体層３は電
極層２、４により挟持されて容量素子（薄膜素子）Ａが
構成されている。FIG. 1 shows a thin film electronic component comprising the thin film capacitor of the present invention. This thin film capacitor has a dielectric layer 3, a lower electrode layer 2 and an upper electrode layer 4 on a support substrate 1. A plurality of thin film elements A are provided and configured. The electrode layers 2 and 4 are made of Au, and the dielectric layer 3 is sandwiched between the electrode layers 2 and 4 to form a capacitive element (thin film element) A.
【００２０】また、薄膜素子Ａは有機樹脂層６、無機化
合物層７、金属層８とから成る耐湿性保護膜５で被覆さ
れている。この耐湿性保護膜５を構成する有機樹脂層
６、無機化合物層７には、底面に下側電極層２または上
側電極層４が露出する貫通孔９が形成されている。ま
た、耐湿性保護膜５を構成する金属層８は、貫通孔９、
具体的には、少なくとも貫通孔９の底面、端面（耐湿性
保護膜５の有機樹脂層６、無機化合物層７の厚み部分）
及び貫通孔９の周囲（無機化合物１０に現れる貫通孔９
の開口周囲）を一連で被覆するように形成されている。
従って、金属層８は、下側電極層２（それと導通する外
部端子）と上側電極層４（それと導通する外部端子）と
が短絡しないようにして、無機化合物１０上に被覆して
もよい。The thin film element A is covered with a moisture resistant protective film 5 composed of an organic resin layer 6, an inorganic compound layer 7 and a metal layer 8. The organic resin layer 6 and the inorganic compound layer 7 which form the moisture-resistant protective film 5 are formed with through holes 9 through which the lower electrode layer 2 or the upper electrode layer 4 is exposed. Further, the metal layer 8 constituting the moisture resistant protective film 5 has the through holes 9,
Specifically, at least the bottom surface and the end surface of the through hole 9 (thickness portions of the organic resin layer 6 and the inorganic compound layer 7 of the moisture resistant protective film 5)
And around the through-hole 9 (through-hole 9 appearing in the inorganic compound 10
(Around the opening of) is formed so as to cover in series.
Therefore, the metal layer 8 may be coated on the inorganic compound 10 so that the lower electrode layer 2 (external terminal conducting with it) and the upper electrode layer 4 (external terminal conducting with it) are not short-circuited.
【００２１】この貫通孔９内には、半田バンプからなる
外部端子１０ａ、１０ｂが突出して形成されている。External terminals 10a and 10b made of solder bumps are formed in the through hole 9 so as to project therefrom.
【００２２】薄膜コンデンサの電子部品素体である誘電
体層３は、高周波領域において高い比誘電率を有するペ
ロブスカイト型酸化物結晶からなる誘電体でよく、例え
ばＰｂ（Ｍｇ，Ｎｂ）Ｏ3系、Ｐｂ（Ｍｇ，Ｎｂ）Ｏ3−
ＰｂＴｉＯ3系、Ｐｂ（Ｚｒ，Ｔｉ）Ｏ3系、Ｐｂ（Ｍ
ｇ，Ｎｂ）Ｏ3−Ｐｂ（Ｚｒ，Ｔｉ）Ｏ3系、（Ｐｂ，Ｌ
ａ）ＺｒＴｉＯ3系、ＢａＴｉＯ3系、（Ｓｒ，Ｂａ）Ｔ
ｉＯ3系、あるいはこれに他の添加物を添加したり、置
換した化合物であってもよく、特に限定されるものでは
ない。The dielectric layer 3, which is an electronic component element body of the thin film capacitor, may be a dielectric material composed of a perovskite type oxide crystal having a high relative dielectric constant in a high frequency region, for example, Pb (Mg, Nb) O 3 system, Pb (Mg, Nb) O 3 −
PbTiO 3 system, Pb (Zr, Ti) O 3 system, Pb (M
g, Nb) O 3 -Pb ( Zr, Ti) O 3 system, (Pb, L
a) ZrTiO 3 system, BaTiO 3 system, (Sr, Ba) T
It may be an iO 3 system, or a compound obtained by adding or substituting other additives thereto, and is not particularly limited.
【００２３】また、誘電体層３の膜厚は、高容量と絶縁
性を確保するため０．３〜１．０μｍが望ましい。これ
は０．３μｍよりも薄い場合には被覆性が低下し、絶縁
性が低下する場合があり、１．０μｍよりも厚い場合に
は容量が小さくなる傾向があるからである。誘電体層３
の膜厚は０．４〜０．８μｍが望ましい。The thickness of the dielectric layer 3 is preferably 0.3 to 1.0 μm in order to secure high capacity and insulation. This is because if it is thinner than 0.3 μm, the covering property may be lowered and the insulating property may be lowered, and if it is thicker than 1.0 μm, the capacity tends to be small. Dielectric layer 3
The film thickness of is preferably 0.4 to 0.8 μm.
【００２４】Ａｕからなる電極層２、４の膜厚は、高周
波領域でのインピーダンスと膜の被覆性を考慮すると
０．３〜０．５μｍが望ましい。電極層２、４の膜厚が
０．３μｍよりも薄い場合には、一部に被覆されない部
分が発生する虞があるからであり、また０．５μｍより
も厚い場合は、高周波領域における導体の表皮効果を考
慮すると導体層の抵抗は殆ど変化しないからである。The thickness of the electrode layers 2 and 4 made of Au is preferably 0.3 to 0.5 μm in consideration of the impedance in the high frequency region and the film coverage. This is because when the film thickness of the electrode layers 2 and 4 is thinner than 0.3 μm, there is a possibility that a part of the electrode layers 2 and 4 which is not covered is generated. This is because the resistance of the conductor layer hardly changes in consideration of the skin effect.
【００２５】支持基板１としては、アルミナ、サファイ
ア、窒化アルミ、ＭｇＯ単結晶、ＳｒＴｉＯ3単結晶、
表面酸化シリコン、ガラス、石英等から選択されるもの
で特に限定されない。As the supporting substrate 1, alumina, sapphire, aluminum nitride, MgO single crystal, SrTiO 3 single crystal,
It is selected from surface oxide silicon, glass, quartz, etc., and is not particularly limited.
【００２６】耐湿性保護膜５を構成する有機樹脂層６
は、その上側に形成する無機化合物層７を安定的に薄膜
素子Ａ上に形成するる、即ち、表面を平滑にするために
形成されている。具体的には、ポリイミド、もしくはベ
ンゾシクロブテン（以下ＢＣＢ）より選ばれる。その厚
みは上側電極層４の段差を平滑化できれば特に限定され
ないが、３μｍ以下の膜厚があることが望ましい。膜厚
が３μｍより大きい場合は、樹脂層の熱膨張により、そ
の下層に形成される薄膜素子Ａとの間で浮きが発生し、
剥離が生じてしまう。Organic resin layer 6 constituting the moisture resistant protective film 5
Are formed in order to stably form the inorganic compound layer 7 formed on the upper side of the thin film element A, that is, to smooth the surface. Specifically, it is selected from polyimide or benzocyclobutene (hereinafter referred to as BCB). The thickness thereof is not particularly limited as long as the steps of the upper electrode layer 4 can be smoothed, but a thickness of 3 μm or less is desirable. If the film thickness is larger than 3 μm, thermal expansion of the resin layer causes floating between the resin layer and the thin film element A formed thereunder,
Peeling will occur.
【００２７】前記耐湿性保護膜５の無機化合物層７は、
水分が容量形成部に浸入しない水分遮断膜の目的で形成
され、酸化ケイ素（以下ＳｉＯ2）もしくは窒化ケイ素
（以下ＳｉＮx）より選ばれる。その膜厚は０．1μｍか
ら０．５μｍが望ましい。０．１μｍよりも薄い場合
は、下地となる有機樹脂層６を完全に被覆できない恐れ
があり、耐湿特性を劣化させてしまう。また、０．５μ
ｍより厚い場合は、有機樹脂層６との熱膨張係数差によ
り、無機化合物層７自身のクラックが生じやすくなり、
耐湿特性を劣化させてしまう。The inorganic compound layer 7 of the moisture resistant protective film 5 is
It is formed for the purpose of a moisture barrier film that prevents moisture from penetrating into the capacity forming portion, and is selected from silicon oxide (hereinafter referred to as SiO 2 ) or silicon nitride (hereinafter referred to as SiNx). The film thickness is preferably 0.1 μm to 0.5 μm. If the thickness is less than 0.1 μm, the underlying organic resin layer 6 may not be completely covered, resulting in deterioration of moisture resistance. Also, 0.5μ
When it is thicker than m, the inorganic compound layer 7 itself tends to crack due to the difference in thermal expansion coefficient from the organic resin layer 6,
It will deteriorate the moisture resistance.
【００２８】耐湿性保護膜５を構成する金属層８は、貫
通孔９の界面や端面などのから水分が浸入することを抑
制するシール金属として形成される。具体的には、Ｔ
ｉ，Ｃｒ，Ｎｉ，Ａｕから選ばれる少なくとも２種以上
の金属より選択される。金属層８の厚みは無機化合物層
７を完全に被覆できれば特に限定されないが、少なくと
も０．２μｍ以上の厚みが望ましい。また、この層１１
は各外部端子１０ａ、１０ｂを電気的に独立させるため
貫通孔９及び貫通孔９の開口周囲である端子部のみを被
覆するようにパターン加工することが望ましい。これに
より、下側電極層２に導通する外部端子１０ａと上側電
極層４に導通する外部端子１０ｂとの短絡も完全に防止
できる。The metal layer 8 constituting the moisture-resistant protective film 5 is formed as a seal metal that suppresses the infiltration of water from the interface of the through hole 9 or the end face. Specifically, T
It is selected from at least two metals selected from i, Cr, Ni and Au. The thickness of the metal layer 8 is not particularly limited as long as it can completely cover the inorganic compound layer 7, but a thickness of at least 0.2 μm or more is desirable. Also, this layer 11
In order to electrically separate the external terminals 10a and 10b from each other, it is desirable to perform pattern processing so as to cover only the through hole 9 and the terminal portion around the opening of the through hole 9. As a result, it is possible to completely prevent a short circuit between the external terminal 10a that conducts to the lower electrode layer 2 and the external terminal 10b that conducts to the upper electrode layer 4.
【００２９】また、上記例では、本発明を薄膜コンデン
サに適用した例について説明したが、本発明では上記例
に限定されるものではなく、例えば、このような薄膜素
体として抵抗体層を用いても構わない。この場合、電極
層の構造は、積層関係ではなく、同一平面関係となり、
例えば、所定パターンの抵抗体層の両端と接続するよう
に形成される。また、抵抗体層の材料と所定パターンに
よって、インダクタンス成分をもたることもできる。即
ち、薄膜抵抗部品とは、薄膜インダク部品をも包含す
る。また、これらの薄膜コンデンサに、上述のインダク
タ成分を付加して共振部品やフィルタ部品などに用いら
れる薄膜ＬＣ部品、薄膜ＲＣ部品としてもよい。In the above example, an example in which the present invention is applied to a thin film capacitor has been described. However, the present invention is not limited to the above example, and for example, a resistor layer is used as such a thin film element. It doesn't matter. In this case, the structure of the electrode layers has the same plane relationship, not the laminated relationship,
For example, it is formed so as to be connected to both ends of the resistor layer having a predetermined pattern. Further, an inductance component can be provided depending on the material of the resistor layer and the predetermined pattern. That is, the thin-film resistance component also includes a thin-film inductor component. Further, the above-mentioned inductor component may be added to these thin film capacitors to form a thin film LC component or a thin film RC component used for a resonance component, a filter component or the like.
【００３０】また、上記例では、一層の誘電体層を電極
層で挟持した単板型を示したが、複数の誘電体層と電極
層とを交互に積層した積層型の薄膜コンデンサであって
も良い。In the above example, the single plate type in which one dielectric layer is sandwiched by the electrode layers is shown, but it is a laminated type thin film capacitor in which a plurality of dielectric layers and electrode layers are alternately laminated. Is also good.
【００３１】さらに、本発明の薄膜電子部品では、半田
バンプからなる外部端子１０ａ、１０ｂを有機樹脂層
６、無機化合物層７に貫通孔９に設けた例について説明
したが、本発明は上記例に限定されるものではなく、要
旨を変更しない範囲で変更できる。Furthermore, in the thin film electronic component of the present invention, an example in which the external terminals 10a and 10b formed of solder bumps are provided in the through holes 9 in the organic resin layer 6 and the inorganic compound layer 7 has been described. The present invention is not limited to the above, and can be changed without changing the gist.
【００３２】例えば、半田バンプを形成しない場合に
は、図３に示すように、耐湿性保護膜５の金属層８がそ
のまま外部端子となる。尚、図３は、半田バンプからな
る外部端子を設けない以外は、図２と同一であるため同
一符号を付した。For example, when solder bumps are not formed, as shown in FIG. 3, the metal layer 8 of the moisture resistant protective film 5 serves as an external terminal as it is. Note that FIG. 3 is the same as FIG. 2 except that the external terminals made of solder bumps are not provided, and thus the same reference numerals are given.
【００３３】また、上記例では、金属層８が湿性保護膜
層５の最上層に形成した場合の構造を示したが、図４、
図５に示したようなこの金属層８上に耐磨耗用保護膜１
１をさらに形成した場合も、同様の耐湿性効果が得られ
る。尚、図３及び図４は耐磨耗性保護膜１１以外は図２
と同様である為同一符号とした。In the above example, the structure in which the metal layer 8 is formed as the uppermost layer of the wet protective film layer 5 is shown.
A wear-resistant protective film 1 is formed on the metal layer 8 as shown in FIG.
When 1 is further formed, the same moisture resistance effect can be obtained. 3 and 4 are the same as FIG. 2 except for the abrasion resistant protective film 11.
Since the same as above, the same reference numerals are used.
【００３４】この場合には、母基板に実装する段階で導
電性部材により、母基板の表面電極層と少なくとも貫通
孔９の底面に露出する金属層８に接続される。導電性部
材としては、形状的には、バンプ状、箔状、板状、ワイ
ヤ、ペースト状等があり、特に限定されるものではな
く、複数の形状を組合せても良い。また、材質は、Ｐ
ｂ、Ｓｎ、Ａｕ、Ｃｕ、Ｐｔ、Ｐｄ、Ａｇ、Ａｌ、Ｎ
ｉ、Ｂｉ、Ｉｎ、Ｓｂ、Ｚｎなどがあり、導電性のもの
であれば良く、複数の材料を組合せても良い。導電性樹
脂であっても良い。In this case, at the stage of mounting on the mother board, it is connected to the surface electrode layer of the mother board and the metal layer 8 exposed at least on the bottom surface of the through hole 9 by a conductive member. The conductive member may have a bump shape, a foil shape, a plate shape, a wire shape, a paste shape, or the like, and is not particularly limited, and a plurality of shapes may be combined. The material is P
b, Sn, Au, Cu, Pt, Pd, Ag, Al, N
There are i, Bi, In, Sb, Zn, etc., as long as they are conductive, and a plurality of materials may be combined. It may be a conductive resin.
【００３５】[0035]
【実施例】本発明者は薄膜コンデンサとして、電極層
２、４ならびに耐湿性保護膜層５の形成を高周波マグネ
トロンスパッタ法にて、誘電体層３をゾルゲル法にて作
製した。EXAMPLES The inventor of the present invention produced the electrode layers 2 and 4 and the moisture-resistant protective film layer 5 as a thin-film capacitor by a high-frequency magnetron sputtering method and the dielectric layer 3 by a sol-gel method.
【００３６】先ず、アルミナからなる支持基板１上にＴ
ｉからなる３ｎｍの密着層を形成し、この密着層の上面
に、０．２μｍのＡｕ層を形成し、密着層とＡｕ層から
なる下側電極層となる導体膜とした。First, T is placed on a supporting substrate 1 made of alumina.
A 3 nm adhesion layer made of i was formed, and a 0.2 μm Au layer was formed on the upper surface of this adhesion layer to obtain a conductor film to be a lower electrode layer composed of the adhesion layer and the Au layer.
【００３７】そして、この導体膜をフォトリソグラフィ
技術を用いて下側電極層２をパターン加工した。加工さ
れた下側電極層２に、ゾルゲル法にて合成したＰｂ（Ｍ
ｇ1/ 3Ｎｂ2/3）Ｏ3−ＰｂＴｉＯ3−ＰｂＺｒＯ3塗布溶
液をスピンコート法を用いて塗布し、乾燥させた後、３
８０℃で熱処理、８００℃で焼成を行い、膜厚０．７μ
ｍのＰｂ（Ｍｇ1/3Ｎｂ2/3）Ｏ3−ＰｂＴｉＯ3−ＰｂＺ
ｒＯ3からなる誘電体層３を形成した。その後フォトリ
ソグラフィ技術を用いて、下側電極層２の一部が露出す
るように、誘電体層３を加工し、第１貫通孔９、第２貫
通孔９を形成した。Then, the lower electrode layer 2 was patterned on this conductor film by using a photolithography technique. On the processed lower electrode layer 2, Pb (M
After the g 1/3 Nb 2/3) O 3 -PbTiO 3 -PbZrO 3 coating solution was coated by spin coating, dried, 3
Heat treatment at 80 ° C, firing at 800 ° C, film thickness 0.7μ
m Pb (Mg 1/3 Nb 2/3 ) O 3 -PbTiO 3 -PbZ
A dielectric layer 3 made of rO 3 was formed. After that, the dielectric layer 3 was processed by photolithography so that a part of the lower electrode layer 2 was exposed, and the first through hole 9 and the second through hole 9 were formed.
【００３８】次に、誘電体層３の表面、第１貫通孔９お
よび第２貫通孔９の内面に、膜厚３０ｎｍのＴｉからな
る密着層と膜厚０．３μｍのＡｕ層並びに半田バリア層
として０．２μｍのＴｉ層、１．０μｍのＮｉ層を形成
して上側電極層４となる導体膜とした。そして、この導
体膜をフォトリソグラフィ技術を用いて、Ｎｉ層、Ｔｉ
層及びＡｕ層とＴｉ層を除去し、上側電極層４とした。Next, on the surface of the dielectric layer 3 and the inner surfaces of the first through hole 9 and the second through hole 9, an adhesion layer made of Ti having a film thickness of 30 nm, an Au layer having a film thickness of 0.3 μm, and a solder barrier layer were formed. Then, a Ti layer having a thickness of 0.2 μm and a Ni layer having a thickness of 1.0 μm were formed as a conductor film serving as the upper electrode layer 4. Then, this conductor film is formed into a Ni layer and a Ti film by using a photolithography technique.
The upper layer, the Au layer and the Ti layer were removed to form the upper electrode layer 4.
【００３９】この後、光感光性ＢＣＢを全面に塗布し、
露光、現像を行い、上側電極層４のＡｕ層の一部が露出
するように、直径約１２０μｍ、深さ３μｍの貫通孔９
を有する有機樹脂層６を形成した。After that, the photosensitive BCB is applied to the entire surface,
The through hole 9 having a diameter of about 120 μm and a depth of 3 μm is exposed and developed so that a part of the Au layer of the upper electrode layer 4 is exposed.
The organic resin layer 6 having a is formed.
【００４０】この後、ＲＦスパッタを用いて、膜厚０．
３μｍのＳｉＯ2膜を全面に形成した後、フォトリソグ
ラフィ技術を用いて、直径１００μｍの貫通孔９を有す
る無機化合物層７を形成した。After that, the film thickness of 0.
After forming a 3 μm SiO 2 film on the entire surface, an inorganic compound layer 7 having a through hole 9 with a diameter of 100 μm was formed by using a photolithography technique.
【００４１】そして、金属層８は、有機樹脂素子９、無
機化合物層７上および貫通孔９内に、膜厚０．２μｍの
Ｔｉ層、膜厚１．０μｍのＮｉ層、及び膜厚０．１μｍ
の半田密着層Ａｕをスパッタ法で形成した後、貫通孔９
の底面及び端面（内壁面）、および無機化合物層７の貫
通孔９開口周囲が残留するように、貫通孔９を中心に直
径１２０μｍの形状にフォトリソグラフィを用いて加工
して形成した。The metal layer 8 has a Ti layer with a thickness of 0.2 μm, a Ni layer with a thickness of 1.0 μm, and a thickness of 0. 1 μm
After forming the solder adhesion layer Au of 9 by the sputtering method, the through hole 9 is formed.
Was formed by photolithography to have a diameter of 120 μm centered on the through hole 9 so that the bottom surface and the end surface (inner wall surface) and the periphery of the opening of the through hole 9 of the inorganic compound layer 7 remained.
【００４２】最後に、スクリーン印刷を用いて半田密着
層上にＳｎとＡｇからなるＰｂフリー半田ペーストを転
写し、リフローを行い、半田バンプからなる外部端子を
形成し、図１に示したような薄膜コンデンサを得た。Finally, a Pb-free solder paste composed of Sn and Ag is transferred onto the solder adhesion layer by screen printing and reflowed to form external terminals composed of solder bumps, as shown in FIG. A thin film capacitor was obtained.
【００４３】得られた薄膜コンデンサの有効電極層面積
は、例えば１．４ｍｍ2であり、周波数１ＭＨｚでの静
電容量は約４０ｎＦであった。The effective electrode layer area of the obtained thin film capacitor was, for example, 1.4 mm 2 , and the electrostatic capacity at a frequency of 1 MHz was about 40 nF.
【００４４】比較例として、無機化合物層７、金属層８
を形成せず作製した薄膜コンデンサを作製した（試料番
号１７）。As a comparative example, the inorganic compound layer 7 and the metal layer 8
A thin film capacitor was prepared without forming (Sample No. 17).
【００４５】また、無機化合物層、金属層の材質以外は
全く構成の同じ薄膜コンデンサも同様に作製した。Further, a thin film capacitor having the same structure except for the materials of the inorganic compound layer and the metal layer was similarly prepared.
【００４６】耐湿性評価の加速試験として、温度１２０
℃、湿度８５％、１．７気圧、電圧１．８Ｖのプレッシ
ャークッカー試験（以下ＰＣＢＴ）４８時間後の絶縁抵
抗１００ＭΩ以上を判定基準とした。結果を表１に示
す。As an accelerated test for moisture resistance evaluation, a temperature of 120
An insulation resistance of 100 MΩ or more after 48 hours of pressure cooker test (hereinafter referred to as PCBT) at a temperature of 85 ° C., a humidity of 85%, a pressure of 1.7 atm and a voltage of 1.8 V was used as a criterion. The results are shown in Table 1.
【００４７】[0047]
【表１】 [Table 1]
【００４８】表１に示したように、耐湿性保護膜を形成
しない試料を除いては、加速条件の耐湿特性を満足して
いることがわかる。As shown in Table 1, it is understood that the moisture resistance characteristics under the acceleration conditions are satisfied except for the sample in which the moisture resistance protective film is not formed.
【００４９】[0049]
【発明の効果】以上の詳述したように、本発明によれ
ば、支持基板上に、電極層および誘電体層を有する薄膜
素子を設けるとともに、該薄膜素子を耐湿性保護膜で被
覆してなり、該耐湿性保護膜に、前記電極層と電気的に
接続する外部電極層が設けられる貫通孔を形成してなる
薄膜電子部品において、前記耐湿性保護膜が有機樹脂
層、無機化合物層、金属層を順次積層した積層構造で構
成することにより、貫通孔部の水分浸入に対するシール
性が向上し、耐湿試験下においても水分の浸入を抑制で
き、薄膜電子部品の絶縁劣化を抑制することが可能とな
る。As described in detail above, according to the present invention, a thin film element having an electrode layer and a dielectric layer is provided on a supporting substrate, and the thin film element is covered with a moisture resistant protective film. In the thin-film electronic component, wherein the moisture-resistant protective film has a through hole provided with an external electrode layer electrically connected to the electrode layer, the moisture-resistant protective film is an organic resin layer, an inorganic compound layer, By constructing a laminated structure in which the metal layers are sequentially laminated, the sealing performance against moisture intrusion of the through-hole portion is improved, moisture ingress can be suppressed even under the humidity resistance test, and insulation deterioration of the thin film electronic component can be suppressed. It will be possible.
【図１】本発明の薄膜電子部品の断面図である。FIG. 1 is a cross-sectional view of a thin film electronic component of the present invention.
【図２】本発明の他の薄膜電子部品を示す断面図であ
る。FIG. 2 is a cross-sectional view showing another thin film electronic component of the present invention.
【図３】本発明の別の薄膜電子部品の断面図である。FIG. 3 is a cross-sectional view of another thin film electronic component of the present invention.
【図４】本発明のさらに別の薄膜電子部品の断面図であ
る。FIG. 4 is a cross-sectional view of still another thin film electronic component of the present invention.
【図５】薄膜電子部品の外観斜視図である。FIG. 5 is an external perspective view of a thin film electronic component.
【図６】従来の薄膜電子部品の断面図である。FIG. 6 is a cross-sectional view of a conventional thin film electronic component.
１・・・支持基板 ３・・・誘電体層 ２、４・・電極層 ５・・・耐湿性保護膜 ６・・・有機樹脂層 ７・・・無機化合物層 ８・・・金属層 ９・・・貫通孔 ２０・・・耐磨耗性保護膜 1 ... Support substrate 3 ... Dielectric layer 2, 4, ... Electrode layer 5: Moisture resistant protective film 6 ... Organic resin layer 7 ... Inorganic compound layer 8 ... Metal layer 9 ... through hole 20 ... Abrasion resistant protective film
Claims (7)
からなる該薄膜素子を形成し、該薄膜素子を耐湿性保護
膜で被覆するとともに、前記耐湿性保護膜に前記電極層
と電気的に接続する外部電極が設けられる貫通孔を形成
して成る薄膜電子部品において、 前記耐湿性保護膜は、薄膜素子側より有機樹脂層、無機
化合物層、金属層が順次積層した積層構造であることを
特徴とする薄膜電子部品。1. A thin film element comprising an electrode layer and a thin film component body is formed on a supporting substrate, the thin film element is covered with a moisture resistant protective film, and the moisture resistant protective film is electrically connected to the electrode layer. In a thin film electronic component formed by forming a through hole provided with an external electrode to be electrically connected, the moisture-resistant protective film has a laminated structure in which an organic resin layer, an inorganic compound layer, and a metal layer are sequentially laminated from the thin film element side. A thin-film electronic component characterized in that
とを特徴とする請求項１記載の薄膜電子部品。2. The thin-film electronic component according to claim 1, wherein the thin-film component body is a thin-film dielectric layer.
とを特徴とする請求項１記載の薄膜電子部品。3. The thin-film electronic component according to claim 1, wherein the thin-film component body is a thin-film resistor layer.
前記貫通孔の内部及び該貫通孔の開口周囲に独立して形
成されていることを特徴とする請求項１記載の薄膜電子
部品。4. The metal layer constituting the moisture-resistant protective film layer,
The thin film electronic component according to claim 1, wherein the thin film electronic component is independently formed inside the through hole and around the opening of the through hole.
ポリイミド、ベンゾシクロブテンから選ばれる少なくと
も１種以上の材料で形成されていることを特徴とする請
求項１記載の薄膜電子部品。5. The thin-film electronic component according to claim 1, wherein the organic resin layer constituting the moisture-resistant protective film is made of at least one material selected from polyimide and benzocyclobutene.
がＳｉＯ2、ＳｉＮx、から選ばれる少なくとも１種以上
の材料で形成されていることを特徴とする請求項１記載
の薄膜電子部品。6. The thin-film electronic component according to claim 1, wherein the inorganic compound layer constituting the moisture-resistant protective film is made of at least one material selected from SiO 2 and SiNx.
ｉ、Ｃｒ、Ｎｉ、Ａｕから選ばれる少なくとも２種以上
の材料で形成されていることを特徴とする請求項１記載
の薄膜電子部品。7. The metal layer constituting the moisture-resistant protective film is T
The thin film electronic component according to claim 1, which is formed of at least two kinds of materials selected from i, Cr, Ni, and Au.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001298648A JP4009078B2 (en) | 2001-09-27 | 2001-09-27 | Thin film electronic components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001298648A JP4009078B2 (en) | 2001-09-27 | 2001-09-27 | Thin film electronic components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003109844A true JP2003109844A (en) | 2003-04-11 |
| JP4009078B2 JP4009078B2 (en) | 2007-11-14 |
Family
ID=19119518
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001298648A Expired - Fee Related JP4009078B2 (en) | 2001-09-27 | 2001-09-27 | Thin film electronic components |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007234843A (en) * | 2006-03-01 | 2007-09-13 | Fujitsu Ltd | Thin-film capacitor element, interposer, manufacturing method therefor, and semiconductor device |
| JP2013153129A (en) * | 2011-09-29 | 2013-08-08 | Rohm Co Ltd | Chip resistor and electronic equipment having resistor network |
| JP2013153130A (en) * | 2011-12-28 | 2013-08-08 | Rohm Co Ltd | Chip resistor |
| JP2013232620A (en) * | 2012-01-27 | 2013-11-14 | Rohm Co Ltd | Chip component |
| JP2016025310A (en) * | 2014-07-24 | 2016-02-08 | Tdk株式会社 | Thin film capacitor |
| US9831039B2 (en) | 2014-12-05 | 2017-11-28 | Tdk Corporation | Thin film capacitor |
-
2001
- 2001-09-27 JP JP2001298648A patent/JP4009078B2/en not_active Expired - Fee Related
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007234843A (en) * | 2006-03-01 | 2007-09-13 | Fujitsu Ltd | Thin-film capacitor element, interposer, manufacturing method therefor, and semiconductor device |
| JP2013153129A (en) * | 2011-09-29 | 2013-08-08 | Rohm Co Ltd | Chip resistor and electronic equipment having resistor network |
| US10224391B2 (en) | 2011-09-29 | 2019-03-05 | Rohm Co., Ltd. | Chip resistor and electronic equipment having resistance circuit network |
| US10833145B2 (en) | 2011-09-29 | 2020-11-10 | Rohm Co., Ltd. | Chip resistor and electronic equipment having resistance circuit network |
| JP2013153130A (en) * | 2011-12-28 | 2013-08-08 | Rohm Co Ltd | Chip resistor |
| US10410772B2 (en) | 2011-12-28 | 2019-09-10 | Rohm Co., Ltd. | Chip resistor |
| JP2013232620A (en) * | 2012-01-27 | 2013-11-14 | Rohm Co Ltd | Chip component |
| US10210971B2 (en) | 2012-01-27 | 2019-02-19 | Rohm Co., Ltd. | Chip component |
| US10763016B2 (en) | 2012-01-27 | 2020-09-01 | Rohm Co., Ltd. | Method of manufacturing a chip component |
| JP2016025310A (en) * | 2014-07-24 | 2016-02-08 | Tdk株式会社 | Thin film capacitor |
| US9831039B2 (en) | 2014-12-05 | 2017-11-28 | Tdk Corporation | Thin film capacitor |
Also Published As
| Publication number | Publication date |
|---|---|
| JP4009078B2 (en) | 2007-11-14 |
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