JP2003107526A - Liquid crystal display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-quality liquid crystal display device capable of eliminating failure due the disconnection of a source wiring in a liquid crystal display panel using thin film transistors. SOLUTION: In this display panel, a source backup wiring 12 whose center line is aligned with that of a source wiring 11 is arranged on the same layer as that of a gate wiring 2 at the upper layer or the lower layer of the film of the source wiring 11 other than a part where the source wiring 11, the gate wiring 2 and an auxiliary capacitance intersect and when the disconnection occurs in the source wiring 11, a source signal can be transmitted to the thin film transistors without being interrupted by shorting the source wiring 11 and the source backup wiring 12 with a laser beam or the like or by preliminarily making them short-circuited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel using a thin film transistor, and more particularly to a liquid crystal display panel capable of easily relieving a disconnection in a source wiring.

[0002]

2. Description of the Related Art A conventional liquid crystal display panel of this type will be described with reference to FIGS. FIG. 4 is a plan view of a part of a thin film transistor (hereinafter referred to as TFT) array substrate of a conventional liquid crystal display panel in the order of steps, and FIG. 5 is a cross-sectional view of the TFT part in the order of steps.

In FIGS. 4 and 5, first, the gate wiring 2 is formed on the glass substrate 1 using a metal such as aluminum or chromium ((a) of FIGS. 4 and 5). The gate wiring 2 extends in the row direction. After that, the resistivity changes depending on the potentials of the silicon nitride film 3 functioning as a gate insulating film and the gate electrode.
A semiconductor film 4 that causes the FT to function as a switch, and an n ⁺ semiconductor film 5 that makes ohmic contact between the semiconductor film 4 and the source and drain electrodes are successively deposited. Then, a pattern composed of the semiconductor film 4 and the n ⁺ semiconductor film 5 is formed on the TFT portion ((b) of FIGS. 4 and 5).

Next, the source electrode 6a, the drain electrode 6b, and the auxiliary capacitance 7 are formed of a conductor film of titanium, aluminum or the like (FIG. 4 and FIG. 5 (c)). Wiring connected to the source electrode 6a (hereinafter referred to as source wiring 11)
Extend in the column direction. At this time, as shown in FIG. 5C, by using the source electrode 6a and the drain electrode 6b as a mask, the n ⁺ semiconductor film 5 and the semiconductor film 4 existing between the source electrode and the drain electrode are partially etched. Remove. Further, the auxiliary capacitance 7 overlaps with the gate wiring 2 with the interlayer insulating film (silicon nitride film 3) interposed therebetween,
Form a capacity between and. Alternatively, a wiring independent of the gate wiring may be provided so as to pass through the central portion of the pixel to form a capacitor. The drain electrode 6b overlaps with the gate wiring 2 with the interlayer insulating film (silicon nitride film 3) and the semiconductor layer interposed therebetween.

Next, a silicon nitride film 8 functioning as an insulating protection film is deposited, and a contact hole 8a is formed on the silicon nitride film on the drain electrode 6b and a contact hole 8b is formed on the auxiliary capacitor 7 (FIGS. 4 and 5). (D)). Finally, the pixel electrode 9 made of transparent ITO is formed ((e) of FIGS. 4 and 5). The pixel electrode 9 is
Contact holes 8a, 8 formed in the silicon nitride film 8
It is connected to the drain electrode 6b and the auxiliary capacitance 7 via b. A signal is input to the pixel electrode 9 from the source wiring 6a through a TFT that functions as a switch.

[0006]

However, when the source wiring 11 is broken in the middle of the display area,
The signal cannot be input from the part where the wire is broken, and the display cannot be performed. In such a case, conventionally, a plurality of rescue lines are arranged outside the display area so as to intersect with the source lines, the same signal as the broken source line is passed through the rescue line, and the signal from the opposite side of the broken source line is passed. Has been taken to eliminate the hidden area.

However, there is a limit to the number of rescue lines, and there is a limit to the number of lines that can be broken, so it was impossible to fix all of them.

The present invention solves the above-mentioned conventional problems, and an object thereof is to provide a liquid crystal display panel having a high yield by eliminating defects due to disconnection of source wiring.

[0009]

In order to achieve this object, the present invention is to arrange the source backup wiring on the same layer as the gate wiring on or under the film of the source wiring. Even if the source wiring is disconnected, the source signal can be sent without interruption if the source wiring and the source backup wiring are electrically connected or if they are electrically connected in advance.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(First Embodiment) FIG. 1 shows a partial plan view of a liquid crystal display panel according to a first embodiment of the present invention, in which 11 is a source wiring and 12 is a source backup wiring. The other reference numerals are the same as those in the conventional example of FIG.

The type shown in FIG. 1 is a type having no auxiliary capacitance in a pixel, and has a gate line 2 and a source line 11.
The source backup wiring 12 is arranged in the same layer as the gate wiring in the film upper layer or the film lower layer of the source wiring 11 excluding the portion where and intersect.

When the source backup wiring 12 is arranged under the film of the source wiring 11, the source backup wiring 12 is patterned at the same time when the gate wiring 2 is patterned. The line width at this time is about 5 μm. Then, after that, the silicon nitride film 3, T is formed as a gate insulating film.
A semiconductor film 4 that causes the FT to function as a switch and an n ⁺ semiconductor film 5 that makes ohmic contact with the semiconductor film and the source and drain electrodes are successively deposited to form a pattern composed of the semiconductor film 4 and the n ⁺ semiconductor film 5 in the TFT portion. To do. After that, the source electrode 6a, the drain electrode 6b and the auxiliary capacitor 7 are formed of a conductor film of titanium, aluminum or the like. The line width of the source wiring 11 at this time is set to about 4 μm, which is narrower than that of the source backup wiring 12, to prevent disconnection of the source wiring 11 due to the step of the source backup wiring 12. At this time, the center lines of the source backup wiring 12 and the source wiring 11 are aligned in order to prevent disconnection of the source wiring due to a step. When the source wiring 11 is broken due to the resist being cut off or due to a foreign substance, the source wiring 11 and the source backup wiring 12 are short-circuited by a laser or the like. Alternatively, a step of removing the gate insulating film on the source backup wiring 12 is performed before forming the source wiring 11, and the source backup wiring 12 and the source wiring 11 are short-circuited from the beginning so that the source signal is not interrupted. To do.

When the source backup wiring 12 is formed after the source wiring 11, the line width of the source wiring 11 is 5 μm and the line width of the source backup wiring 12 is 4 μm.
Each of them is formed with a thickness of about μm.

As a modification of the first embodiment, FIG.
As shown in FIG. 5, in the type having the auxiliary capacitance 7 in the pixel electrode, the source wiring 11 is formed on the upper layer or the lower layer of the source wiring 11 excluding the portion where the gate wiring 2 and the auxiliary capacitance wiring intersect with the source wiring 11. The source backup wiring 12 is arranged on the same layer as the gate wiring.

(Second Embodiment) FIG. 3 shows a partial plan view of a liquid crystal display panel according to a second embodiment of the present invention, in which 11 is a source wiring and 13 is a source backup wiring. The other reference numerals are the same as those in FIG.

In this example, the pixel does not have a storage capacitor, but the pixel may have a storage capacitor as shown in FIG. Then, the source line 11 and the pixel electrode 9 are formed on the same layer as the gate line 2 in a film upper layer or a film lower layer of a part of the source line 11 excluding the intersection of the source line 11, the gate line 2 and the auxiliary capacitance. The source backup wiring 13 protruding from the source wiring 11 is arranged so as to prevent light leakage (domain) that occurs during the period. In this case, the source wiring 11 and the source backup wiring 13
The respective center lines of may be deviated.

When arranging the source backup wiring under the film of the source wiring, the source backup wiring is first patterned when the gate wiring is patterned. The line width at this time is about 6 μm. After that, a silicon nitride film as a gate insulating film, a semiconductor film 4 as a switch for the TFT, and an n ⁺ semiconductor film 5 for making ohmic contact with the semiconductor film and the source and drain electrodes are successively deposited, and the semiconductor film and n ^{+ A} pattern made of a semiconductor film is formed. After that, the source electrode 6a and the drain electrode 6b are formed of a conductor film of titanium, aluminum or the like.

At this time, the line width of the source wiring 11 is about 4 μm, which is thinner than the source backup wiring 13. At this time, the center lines of the source backup wiring 13 and the source wiring 11 are shifted to the right or left by 0.5 μm so that the source wiring 11 does not protrude from the source backup wiring 13 in order to prevent disconnection due to the step of the source wiring 11. To do.

By offsetting the respective center lines of the source wiring and the source backup wiring, a large amount of the right or left source backup wiring shields the light leakage portion formed between the source wiring and the 11 pixel electrode 9. Since it is possible to reduce the black matrix on the color filter side, a pixel shape with a high aperture can be adopted.

When the source wiring is broken due to the resist being cut off or due to a foreign substance, the source wiring 11 and the source backup wiring 13 are short-circuited by a laser, or the gate insulating film on the source backup wiring is formed before the source wiring is formed. In order to prevent the source signal from being interrupted, the source backup wiring and the source wiring are short-circuited from the beginning.

[0022]

As described above, according to the present invention,
Even with a very large screen and narrow frame panel, even if the number of rescue lines is limited or cannot be arranged, defects due to disconnection of the source wiring can be eliminated and a high yield liquid crystal panel can be manufactured. There is an effect that can be.

Further, by widening the line width of the source backup wiring, light leakage (domain) formed between the source wiring and the pixel electrode by the source backup wiring.
There is an effect that a part can be shielded from light, a high opening can be obtained, defects due to disconnection of the source wiring can be eliminated, and a liquid crystal panel with a high yield can be manufactured.

[Brief description of drawings]

FIG. 1 is a diagram showing a partial plan view of a liquid crystal display panel according to Embodiment 1 of the present invention.

FIG. 2 is a diagram showing a modification of FIG.

FIG. 3 is a diagram showing a partial plan view of a liquid crystal display panel according to Embodiment 2 of the present invention.

FIG. 4 is a plan view showing a partial process sequence of a TFT array substrate in a conventional liquid crystal display panel.

FIG. 5 is a cross-sectional view in order of steps of a TFT portion of a conventional TFT array substrate of a liquid crystal display panel.

[Explanation of symbols]

1 glass substrate 2 gate wiring 3 silicon nitride film 4 semiconductor film 5 n ⁺ semiconductor film 6a source electrode 6b drain electrode 7 auxiliary capacitors 8a, 8b contact hole 9 pixel electrode 11 source wiring 12, 13 source backup wiring

Continued front page    F term (reference) 2H092 JA24 JA41 JB31 JB33 JB52                       JB71 JB73 NA16 NA29                 5F033 HH08 HH18 MM15 VV00 VV15                       XX36                 5F110 AA27 BB01 CC07 FF03 GG42                       HK03 HK04 HK08 HK21 HK32                       HM19 NN72 NN73

Claims (2)

[Claims] 1. A plurality of gate wirings, a plurality of source wirings orthogonal to the gate wirings, a thin film transistor arranged at each intersection of the gate wiring and the source wiring, and a drain electrode of the thin film transistor. A liquid crystal display panel further including a pixel electrode, or further including an auxiliary capacitance portion, in a film upper layer of a part of the source wiring excluding a portion where the source wiring, the gate wiring, and the auxiliary capacitance intersect, or A liquid crystal display panel, characterized in that a source backup wiring whose center line is aligned with the source wiring is arranged in the same layer as the gate wiring under the film. 2. A plurality of gate wirings, a plurality of source wirings orthogonal to the gate wirings, a thin film transistor arranged at each intersection of the gate wiring and the source wiring, and a drain electrode of the thin film transistor. A liquid crystal display panel further including a pixel electrode, or further including an auxiliary capacitance portion, in a film upper layer of a part of the source wiring excluding a portion where the source wiring, the gate wiring, and the auxiliary capacitance intersect, or A liquid crystal display characterized by arranging a source backup line protruding from the source line so as to prevent light leakage (domain) formed between the source line and the pixel electrode in the same layer as the gate line below the film. panel.