JP2003051561A - デバイス基板上のデバイス間のクロストークを低減するためのパッケージとその製造方法 - Google Patents

デバイス基板上のデバイス間のクロストークを低減するためのパッケージとその製造方法

Info

Publication number
JP2003051561A
JP2003051561A JP2002155593A JP2002155593A JP2003051561A JP 2003051561 A JP2003051561 A JP 2003051561A JP 2002155593 A JP2002155593 A JP 2002155593A JP 2002155593 A JP2002155593 A JP 2002155593A JP 2003051561 A JP2003051561 A JP 2003051561A
Authority
JP
Japan
Prior art keywords
cavity
cap
layer
barrier material
devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2002155593A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003051561A5 (enExample
Inventor
Yanling Sun
スン ヤンリン
Theo C Tieman
シー．ティーマン テオ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems LLC filed Critical Agere Systems LLC
Publication of JP2003051561A publication Critical patent/JP2003051561A/ja
Publication of JP2003051561A5 publication Critical patent/JP2003051561A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/16235—Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Micromachines (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP2002155593A 2001-05-29 2002-05-29 デバイス基板上のデバイス間のクロストークを低減するためのパッケージとその製造方法 Withdrawn JP2003051561A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US29406601P 2001-05-29 2001-05-29
US60/294066 2001-05-29
US10/154047 2002-05-23
US10/154,047 US20020180032A1 (en) 2001-05-29 2002-05-23 Package for reducing cross-talk between devices on a device substrate and a method of manufacture therefor

Publications (2)

Publication Number Publication Date
JP2003051561A true JP2003051561A (ja) 2003-02-21
JP2003051561A5 JP2003051561A5 (enExample) 2005-04-14

Family

ID=26851098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002155593A Withdrawn JP2003051561A (ja) 2001-05-29 2002-05-29 デバイス基板上のデバイス間のクロストークを低減するためのパッケージとその製造方法

Country Status (3)

Country Link
US (1) US20020180032A1 (enExample)
EP (1) EP1263044A2 (enExample)
JP (1) JP2003051561A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006095681A (ja) * 2004-09-28 2006-04-13 Commissariat A L'energie Atomique 集積微小電気機械システムのカプセル封じ部品及びその部品の製造プロセス
JP2012191627A (ja) * 2006-05-05 2012-10-04 Marvell World Trade Ltd 複数のアクセスポイントおよび複数のクライアントステーションを実装するためのネットワークデバイス
JP2016012737A (ja) * 2015-10-06 2016-01-21 三菱電機株式会社 半導体装置

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10132683A1 (de) * 2001-07-05 2003-01-16 Bosch Gmbh Robert Mikromechanische Kappenstruktur und entsprechendes Herstellungsverfahren
US7383058B2 (en) * 2002-07-16 2008-06-03 Intel Corporation RF/microwave system with a system on a chip package or the like
US7301408B2 (en) 2002-10-15 2007-11-27 Marvell World Trade Ltd. Integrated circuit with low dielectric loss packaging material
US8559570B2 (en) * 2005-06-30 2013-10-15 Silicon Laboratories Inc. Cancellation of undesired portions of audio signals
EP1760780A3 (en) * 2005-09-06 2013-05-15 Marvell World Trade Ltd. Integrated circuit including silicon wafer with annealed glass paste
US20070178666A1 (en) * 2006-01-31 2007-08-02 Stats Chippac Ltd. Integrated circuit system with waferscale spacer system
US7414310B2 (en) * 2006-02-02 2008-08-19 Stats Chippac Ltd. Waferscale package system
DE102006016260B4 (de) * 2006-04-06 2024-07-18 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Vielfach-Bauelement mit mehreren aktive Strukturen enthaltenden Bauteilen (MEMS) zum späteren Vereinzeln, flächiges Substrat oder flächig ausgebildete Kappenstruktur, in der Mikrosystemtechnik einsetzbares Bauteil mit aktiven Strukturen, Einzelsubstrat oder Kappenstruktur mit aktiven Strukturen und Verfahren zum Herstellen eines Vielfach-Bauelements
US7636245B2 (en) * 2007-06-25 2009-12-22 Novatel Wireless, Inc. Electronic component cover and arrangement
TWI328563B (en) * 2007-08-28 2010-08-11 Ind Tech Res Inst A stacked package structure for reducing package volume of an acoustic microsensor
DE102008016004B4 (de) * 2008-03-27 2024-07-25 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Mikroelektromechanischer Inertialsensor mit atmosphärischer Bedämpfung
JP5732203B2 (ja) * 2010-05-21 2015-06-10 日立オートモティブシステムズ株式会社 複合センサの製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2998662B2 (ja) * 1996-11-15 2000-01-11 日本電気株式会社 半導体装置
SE511926C2 (sv) * 1997-04-16 1999-12-20 Ericsson Telefon Ab L M Skärmningshölje jämte förfarande för framställning och användning av ett skärmningshölje samt mobiltelefon med skärmningshölje

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006095681A (ja) * 2004-09-28 2006-04-13 Commissariat A L'energie Atomique 集積微小電気機械システムのカプセル封じ部品及びその部品の製造プロセス
JP2012191627A (ja) * 2006-05-05 2012-10-04 Marvell World Trade Ltd 複数のアクセスポイントおよび複数のクライアントステーションを実装するためのネットワークデバイス
JP2016012737A (ja) * 2015-10-06 2016-01-21 三菱電機株式会社 半導体装置

Also Published As

Publication number Publication date
EP1263044A2 (en) 2002-12-04
US20020180032A1 (en) 2002-12-05

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