JP2003040979A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2003040979A
JP2003040979A JP2001229791A JP2001229791A JP2003040979A JP 2003040979 A JP2003040979 A JP 2003040979A JP 2001229791 A JP2001229791 A JP 2001229791A JP 2001229791 A JP2001229791 A JP 2001229791A JP 2003040979 A JP2003040979 A JP 2003040979A
Authority
JP
Japan
Prior art keywords
epoxy resin
semiconductor device
area
less
resin composition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001229791A
Other languages
Japanese (ja)
Inventor
Shigeyuki Maeda
重之 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Bakelite Co Ltd
Original Assignee
Sumitomo Bakelite Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Bakelite Co Ltd filed Critical Sumitomo Bakelite Co Ltd
Priority to JP2001229791A priority Critical patent/JP2003040979A/en
Publication of JP2003040979A publication Critical patent/JP2003040979A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PROBLEM TO BE SOLVED: To provide an area-mounting semiconductor device having small warpage after a molding and in a soldering process. SOLUTION: The area-mounting semiconductor device is characterized in that a semiconductor device obtained by sealing a semiconductor element with the following epoxy resin compositions has an area of the element 40% or more based on an area of the device. In the epoxy resin composition having (A) an epoxy resin, (B) a phenolic resin, (C) an inorganic filler and (D) a curing promoter as essential components and the filler of 65-95 wt.% based on a total of the composition, a glass transition temperature of a cured material of the composition is less than 130 deg.C, a flexural modulus is (1) less than 20,000 N/mm<2> at a temperature range of 25 deg.C to 'the glass transition temperature + 5 deg.C', (2) less than 8,000 N/mm<2> at a temperature range of 'the glass transition temperature + 5 deg.C' to 140 deg.C and (3) less than 1, 000 N/mm<2> at a temperature range of 140 deg.C to 175 deg.C and a heat shrinkage rate at a range of the glass transition temperature to 25 deg.C is less than 0.2%.

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、半導体装置面積に
対する半導体素子面積が40%以上であるエリア実装型
半導体装置に関するものである。 【0002】 【従来の技術】近年、LSIを搭載した電子機器におい
て、情報処理量が膨大になり、高速動作が強く要求され
ている。これに伴いLSIの必要端子数が急激に増えて
いる。半導体装置の外部端子を広いピッチで多数配置す
るには、半導体装置の下面を利用するのが有効であり、
この部分に半田バンプをマトリクス状に配置するエリア
アレイ型の面実装半導体装置がBGA(Ball Gr
id Array)である。一方、携帯機器の小型化、
薄型化、軽量化が進んでおり、このため半導体素子にも
低パワー、高機能化が求められており、この半導体素子
が封止された半導体装置にも小型化、薄型化、軽量化が
要求され、その結果として実用化されてきたのがCSP
(Chip Size Package)である。これ
は、基本的にはBGAの端子ピッチを低コストの民生実
装が可能な範囲で縮小して、ほぼ半導体素子サイズにま
で半導体装置の外形を小さくしたものである。しかし、
現在半導体装置は大きな変革時期を迎えており、コスト
パフォーマンスの追求からCSPの構造も多様化してい
る。それと共に半導体封止用エポキシ樹脂組成物に求め
られる要求も高まっている。 【0003】これらエリア実装型半導体装置の構造は、
基板の半導体素子搭載面のみをエポキシ樹脂組成物で封
止し、半田ボール形成面側は封止しないという片面封止
の形態をとっている。ごく稀に、リードフレーム等の金
属基板等では、半田ボール形成面でも数十μm程度の封
止樹脂層が存在することもあるが、半導体素子搭載面で
は数百μmから数mm程度の封止樹脂層が形成されるた
め、実質的に片面封止となっている。このため有機基板
や金属基板とエポキシ樹脂組成物の硬化物との間での熱
膨張、熱収縮の不整合或いはエポキシ樹脂組成物の成形
硬化時の硬化収縮による影響で、これらの半導体装置で
は成形直後から反りが発生し易い。更に、これらの半導
体装置を実装する回路基板上に半田接合を行う場合、2
00℃以上の加熱工程を経るが、この際にも半導体装置
の反りが発生し、多数の半田ボールが平坦にならないた
め、半導体装置を実装する回路基板から浮き上がってし
まい電気的接合信頼性が低下するという問題が起きる。 【0004】半導体装置面積に対する半導体素子面積の
小さいエリア実装型半導体装置において反りを低減する
には、基板の線膨張係数とエポキシ樹脂組成物の硬化物
の線膨張係数を近づけること、及びエポキシ樹脂組成物
の硬化収縮量を小さくするといった手法がある。基板と
しては、有機基板ではビスマレイミド・トリアジン樹脂
やポリイミド樹脂の様な高いガラス転移温度を有する樹
脂が広く用いられており、これらはエポキシ樹脂組成物
の成形温度である170℃近辺よりも高いガラス転移温
度を有するため、成形温度から室温までの冷却過程で
は、有機基板の線膨張係数α1(以下、α1という)の
領域のみで収縮する。従ってエポキシ樹脂組成物の硬化
物もガラス転移温度が高く、α1が有機基板と同じであ
り、更に硬化収縮量がゼロであれば反りはほぼゼロであ
ると考えられる。しかし半導体装置の小型化、薄型化、
軽量化の要求が高まり、半導体装置面積に対する半導体
素子面積が大きくなってくると有機基板の線膨張係数と
エポキシ樹脂組成物の硬化物の線膨張係数の差及びエポ
キシ樹脂組成物の硬化収縮量という観点のみから反りの
問題を解決することが出来なくなっている。 【0005】 【発明が解決しようとする課題】本発明は、特定の曲げ
弾性率、熱収縮率の特性を有するエポキシ樹脂組成物を
用いて、半導体装置面積に対する半導体素子面積が40
%以上となる半導体素子を封止して得られる、成形後や
半田処理時の反りが小さいエリア実装型半導体装置を提
供するものである。 【0006】 【課題を解決するための手段】本発明は、[1] 下記
のエポキシ樹脂組成物を用いて、半導体素子を封止して
得られる半導体装置が、半導体装置面積に対する半導体
素子面積(以下、半導体素子占有面積という)が40%
以上であることを特徴とするエリア実装型半導体装置。 (A)エポキシ樹脂、(B)フェノール樹脂、(C)無
機充填材及び(D)硬化促進剤を必須成分とし、全エポ
キシ樹脂組成物中に無機充填材を65〜95重量%含有
するエポキシ樹脂組成物において、該エポキシ樹脂組成
物の硬化物のガラス転移温度が130℃未満、曲げ弾性
率が、 25℃から「ガラス転移温度+5℃」の温度範囲内に
おいて20000N/mm2未満、 「ガラス転移温度+5℃」から140℃の温度範囲内
において8000N/mm2未満、 140℃から175℃の温度範囲内において1000
N/mm2未満で、かつガラス転移温度から25℃まで
の熱収縮率が0.2%未満であるエポキシ樹脂組成物、
である。 【0007】 【発明の実施の形態】本発明は、半導体素子占有面積が
40%以上である半導体装置を封止する際に、25℃か
ら175℃の温度範囲内での曲げ弾性率、ガラス転移温
度(以下、Tgという)から25℃まで冷却される際の
熱収縮率を制御することにより、成形後や半田処理時の
反りを小さくすることができるということを見出し、特
定の範囲の曲げ弾性率、熱収縮率特性を有するエポキシ
樹脂組成物を用いて封止されたエリア実装型半導体装置
である。 【0008】半導体素子占有面積を40%以上とする理
由は、半導体素子占有面積が40%未満では基板とエポ
キシ樹脂組成物の硬化物との二層構造に近づき、前述の
様なエポキシ樹脂組成物の硬化物のTgを高くして基板
の線膨張係数とエポキシ樹脂組成物の硬化物の線膨張係
数を近づけることにより、成形硬化後の熱収縮率を小さ
くし、かつエポキシ樹脂組成物の硬化物の硬化収縮率を
小さくするという手法が既に確立されているからであ
る。しかし半導体素子占有面積が40%以上になると、
全体に占める半導体素子の面積も無視できなくなり、半
導体装置は半導体素子、基板、エポキシ樹脂組成物の硬
化物との三層構造として考える必要がある。半導体素子
の線膨張係数は、室温から成形温度の範囲では殆ど変化
がなく、基板、エポキシ樹脂組成物の硬化物に比べて著
しく高剛性、低線膨張係数である。従って反りを低減す
るということは、如何に半導体素子の変形を抑えるかで
あり、成形温度以下でのエポキシ樹脂組成物の硬化物の
剛性が大きく影響する。 【0009】エポキシ樹脂組成物の硬化物の25℃から
「Tg+5℃」の温度範囲内において曲げ弾性率200
00N/mm2以上、もしくは「Tg+5℃」から14
0℃の温度範囲内において曲げ弾性率8000N/mm
2以上、又は140℃から175℃の温度範囲内におい
て曲げ弾性率1000N/mm2以上になると、熱収縮
によるエポキシ樹脂組成物の硬化物側への曲げモーメン
トが大きくなるため、基板の半田ボール搭載面を下にし
て凹状の反りが生じ易くなる。更に、エポキシ樹脂組成
物の硬化物のTgが130℃以上だとTgから室温まで
の温度範囲が広くなり、曲げ弾性率の大きい領域での熱
収縮率が大きくなり、エポキシ樹脂組成物の硬化物側に
大きな曲げモーメントを生じ易くなってしまうからであ
る。 【0010】エポキシ樹脂組成物の硬化物の曲げ弾性率
を小さくするには、無機充填材の含有量を少なくすれば
よい。エポキシ樹脂、フェノール樹脂、硬化促進剤等の
成分が同一ならば無機充填材の含有量を少なくする程、
曲げ弾性率は小さくなる傾向がある。しかし無機充填材
の含有量を少なくする程、成形性は良好だが半導体装置
の吸湿水分の膨張等が原因となって、半田処理時に半導
体装置にクラックが発生するといった問題を引き起こし
易くなり、無機充填材の含有量が65重量%未満だと好
ましくない。一方、半導体装置の熱収縮率を小さくした
り、耐半田クラック性を向上さすには、無機充填材の含
有量を多くすることが効果的だが、曲げ弾性率が上昇し
易くなると共に成形性(充填性、ボイド、フローマー
ク、金線変形等)が低下し、無機充填材の含有量が95
重量%を越えるとこの現象が顕著となるので好ましくな
い。 【0011】本発明で用いるエポキシ樹脂組成物は、エ
ポキシ樹脂、フェノール樹脂、無機充填材及び硬化促進
剤を必須成分とするが、エポキシ樹脂としては、例えば
ビスフェノールA型エポキシ樹脂、ビスフェノールF型
エポキシ樹脂、スチルベン型エポキシ樹脂、フェノール
ノボラック型エポキシ樹脂、オルソクレゾールノボラッ
ク型エポキシ樹脂、ナフトールノボラック型エポキシ樹
脂、トリフェノールメタン型エポキシ樹脂、ジシクロペ
ンタジエン変性フェノール型エポキシ樹脂、テルペン変
性フェノール型エポキシ樹脂、ハイドロキノン型エポキ
シ樹脂等が挙げられるが、これらに限定されるものでは
ない。フェノール樹脂としては、例えばフェノールノボ
ラック樹脂、クレゾールノボラック樹脂、ジシクロペン
タジエン変性フェノール樹脂、フェノールアラルキル樹
脂、テルペン変性フェノール樹脂、トリフェノールメタ
ン型樹脂等が挙げられるが、これらに限定されるもので
はない。 【0012】無機充填材としては、例えば溶融破砕シリ
カ、溶融球状シリカ、結晶シリカ、2次凝集シリカ、ア
ルミナ、チタンホワイト、水酸化アルミニウム等が挙げ
られ、特に溶融球状シリカが好ましい。球状シリカの形
状としては、流動性改善のために限りなく真球状であ
り、かつ粒度分布がブロードであることが好ましい。硬
化促進剤としては、例えば1,8−ジアザビシクロ
(5,4,0)ウンデセン−7、トリフェニルホスフィ
ン、ベンジルジメチルアミン、2−メチルイミダゾール
等を単独でも混合して用いてもよい。 【0013】本発明に用いるエポキシ樹脂組成物は、
(A)〜(D)成分の他、必要に応じて臭素化エポキシ
樹脂、酸化アンチモン等の難燃剤、酸化ビスマス水和物
等の無機イオン交換体、γ−グリシドキシプロピルトリ
メトキシシラン等のカップリング剤、カーボンブラッ
ク、ベンガラ等の着色剤、シリコーンオイル、シリコー
ンゴム等の低応力成分、天然ワックス、合成ワックス、
高級脂肪酸及びその金属塩類もしくはパラフィン等の離
型剤、酸化防止剤等の各種添加剤を適宜配合してもよ
い。更に必要に応じて無機充填材をカップリング剤やエ
ポキシ樹脂あるいはフェノール樹脂で予め処理して用い
てもよく、処理の方法としては、溶剤を用いて混合した
後に溶媒を除去する方法や直接無機充填材に添加し、混
合機を用いて処理する方法等がある。 【0014】本発明に用いるエポキシ樹脂組成物は、
(A)〜(D)成分、その他の添加剤等をミキサーを用
いて常温混合し、ロール、ニーダー等の押出機等の混練
機で溶融混練し、冷却後粉砕して得られる。本発明のエ
ポキシ樹脂組成物を用いて、半導体素子を封止し、エリ
ア実装型半導体装置を製造するには、トランスファーモ
ールド、コンプレッションモールド、インジェクション
モールド等の成形方法で硬化成形すればよい。本発明で
のエリア実装型半導体装置としては、BGA、LGA
(Land Grid Array Packag
e)、QFN(Quad FlatpackNon−l
eaded Package)等が挙げられる。 【0015】 【実施例】以下に、実施例を挙げて本発明を説明する
が、これらの実施例に限定されるものではない。 実施例1 溶融球状シリカ(平均粒径15μm、比表面積2.2m2/g) 70.00重量部 テトラメチルビフェニルジグリシジルエーテル(油化シェルエポキシ(株)、 YX−4000K、融点108℃、エポキシ当量185) 12.48重量部 フェノールアラルキル樹脂1(三井化学(株)製、XL−225、軟化点71 ℃、水酸基当量174) 6.56重量部 式(1)で示されるフェノール樹脂(軟化点87℃、水酸基当量210) 6.56重量部 【0016】 【化1】 【0017】 1,8−ジアザビシクロ(5,4,0)ウンデセン−7(以下、DBUという ) 2.00重量部 臭素化ビスフェノールA型エポキシ樹脂 0.50重量部 三酸化アンチモン 1.00重量部 γ−グリシジルプロピルトリメトキシシラン 0.20重量部 カルナバワックス 0.40重量部 カーボンブラック 0.30重量部 を、常温においてミキサーで混合し、70〜120℃で
2本ロールにより混練し、冷却後粉砕してエポキシ樹脂
組成物を得た。得られたエポキシ樹脂組成物を以下の方
法で評価した。結果を表1に示す。 【0018】評価方法 スパイラルフロー:EMMI−1−66に準じたスパイ
ラルフロー測定用の金型を用い、金型温度175℃、注
入圧力6.9MPa、硬化時間2分で測定した。単位は
cm。 Tg:トランスファー成形機を用い、金型温度175
℃、注入圧力9.8MPa、硬化時間2分で4mm×4
mm×15mmの大きさに成形した試験片を、熱機械分
析装置(セイコー電子工業(株)製、TMA100)を
用いて測定温度範囲0〜320℃、昇温速度5℃/分で
測定した時のチャートより、α1、α2を決定し、その
延長線の交点をTgとした。単位は℃。 熱収縮率:トランスファー成形機を用い、金型温度17
5℃、注入圧力9.8MPa、硬化時間2分で4mm×
4mm×15mmの大きさに成形した試験片を、熱機械
分析装置(セイコー電子工業(株)製、TMA100)
を用いて測定温度範囲0〜320℃、昇温速度5℃/分
で測定した。単位は%。 曲げ弾性率:JIS K 6911の試験条件に準じて
測定した。試験片は、金型温度175℃、注入圧力9.
8MPa、硬化時間2分でトランスファー成形機を用い
て成形し、175℃、8時間で後硬化して作成した。こ
の試験片を測定台(スパン幅64mm)に設置し、測定
温度に保持した槽内で6分間予熱した後測定した。測定
温度は、25℃、130℃、140℃、175℃。単位
はN/mm2。 反り量:トランスファー成形機を用い、金型温度175
℃、注入圧力7.8MPa、硬化時間2分で352pB
GA(基板は厚さ0.56mmのビスマレイミド・トリ
アジン樹脂/ガラスクロス基板、半導体装置のサイズは
30mm×30mm、厚さ1.17mm、半導体素子の
サイズは20mm×20mm、厚さ0.35mm、半導
体素子と回路基板のボンディングパッドを25μm径の
金線でボンディングしている。)を成形し、175℃、
8時間で後硬化した。冷却後、半導体装置のゲートから
対角線方向に表面粗さ計を用いて高さ方向の変位を測定
し、変位量の最も大きい値を反り量とした。単位はμ
m。 吸水率:トランスファー成形機を用い、金型温度175
℃、注入圧力9.8MPa、硬化時間2分で直径50m
m、厚さ3mmの円盤を成形し、175℃、8時間で後
硬化し、得られた成形品を85℃、相対湿度60%の環
境下で168時間放置し、重量変化を測定して吸水率を
求めた。単位は重量%。 耐半田クラック性:トランスファー成形機を用い、金型
温度175℃、注入圧力7.8MPa、硬化時間2分で
352pBGA(基板は厚さ0.56mmのビスマレイ
ミド・トリアジン樹脂/ガラスクロス基板、半導体装置
のサイズは30mm×30mm、厚さ1.17mm、半
導体素子のサイズ20mm×20mm、厚さ0.35m
m、半導体素子と回路基板のボンディングパッドを25
μm径の金線でボンディングしている。半導体素子占有
面積44.4%)を成形し、175℃、8時間で後硬化
した。得られた半導体装置10個を、85℃、相対湿度
60%の環境下で168時間放置した後、IRリフロー
処理(240℃)を行った(以下、L2とする)。処理
後の内部の剥離及びクラックの有無を超音波探傷機で観
察し、不良半導体装置の個数を数えた。不良半導体装置
の個数がn個であるとき、n/10と表示する。 【0019】実施例 2〜7、比較例 1〜3 表1、表2の配合に従い、実施例1と同様にしてエポキ
シ樹脂組成物を得、同様に評価した。これらの評価結果
を表1、表2に示す。実施例1以外で用いた樹脂を以下
に示す。 フェノールアラルキル樹脂2(三井化学(株)製、XL
−225、軟化点62℃、水酸基当量167) トリフェノールメタン型フェノール樹脂(明和化成
(株)製、MEH−7500、軟化点110℃、水酸基
当量97) シリコーンゴム1(ショアA硬度30、最大粒径10μ
m、平均粒径5μm) 【0020】 【表1】 【0021】 【表2】【0022】 【発明の効果】本発明に従うと、特定のTg、曲げ弾性
率、熱収縮率特性を有するエポキシ樹脂組成物を用い
て、半導体装置面積に対して半導体素子占有面積が40
%以上となるような半導体素子を封止してなるエリア実
装型半導体装置は、成形後や半田処理時の反りが小さ
く、産業上有用である。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an area mounting type semiconductor device in which a semiconductor element area is at least 40% of a semiconductor device area. 2. Description of the Related Art In recent years, the amount of information processing has become enormous in electronic devices equipped with LSI, and high-speed operation has been strongly demanded. Accordingly, the required number of terminals of the LSI has been rapidly increasing. In order to arrange a large number of external terminals of a semiconductor device at a wide pitch, it is effective to use the lower surface of the semiconductor device.
An area array type surface mounting semiconductor device in which solder bumps are arranged in a matrix in this portion is a BGA (Ball Gr).
id Array). Meanwhile, miniaturization of mobile devices,
As semiconductor devices are becoming thinner and lighter, semiconductor devices are also required to have lower power and higher functionality. Semiconductor devices in which these semiconductor devices are encapsulated are also required to be smaller, thinner, and lighter. CSP has been put to practical use as a result.
(Chip Size Package). Basically, the terminal pitch of the BGA is reduced to the extent that low-cost consumer mounting is possible, and the outer shape of the semiconductor device is reduced to almost the size of a semiconductor element. But,
Currently, the semiconductor device is undergoing a major transformation, and the structure of the CSP has been diversified in pursuit of cost performance. At the same time, demands for epoxy resin compositions for semiconductor encapsulation have been increasing. The structure of these area-mounted semiconductor devices is as follows:
A single-sided sealing configuration is adopted in which only the semiconductor element mounting surface of the substrate is sealed with the epoxy resin composition and the solder ball forming surface is not sealed. Very rarely, on a metal substrate such as a lead frame, a sealing resin layer of about several tens of μm may exist even on the surface on which the solder balls are formed, but on a semiconductor element mounting surface, a sealing of several hundred μm to several mm. Since the resin layer is formed, the one side is substantially sealed. Therefore, due to the thermal expansion and thermal contraction mismatch between the organic substrate or metal substrate and the cured product of the epoxy resin composition, or the influence of curing shrinkage during the molding and curing of the epoxy resin composition, these semiconductor devices cannot be molded. Warpage tends to occur immediately after. In addition, when soldering is performed on a circuit board on which these semiconductor devices are mounted,
The semiconductor device goes through a heating process at a temperature of 00 ° C. or higher. However, warping of the semiconductor device occurs at this time, and a large number of solder balls are not flattened. The problem arises. In order to reduce the warpage in an area-mounted semiconductor device having a small semiconductor element area with respect to the semiconductor device area, the linear expansion coefficient of the substrate and the linear expansion coefficient of the cured product of the epoxy resin composition must be close to each other. There is a method of reducing the amount of curing shrinkage of an object. As the substrate, resins having a high glass transition temperature, such as bismaleimide / triazine resins and polyimide resins, are widely used in organic substrates, and these are glass substrates having a temperature higher than 170 ° C., which is the molding temperature of the epoxy resin composition. Since the organic substrate has a transition temperature, in the cooling process from the molding temperature to room temperature, the organic substrate contracts only in a region having a linear expansion coefficient α1 (hereinafter referred to as α1). Therefore, the cured product of the epoxy resin composition also has a high glass transition temperature, α1 is the same as that of the organic substrate, and if the curing shrinkage is zero, the warpage is considered to be almost zero. However, miniaturization and thinning of semiconductor devices,
As the demand for weight reduction increases and the semiconductor element area increases with respect to the semiconductor device area, the difference between the coefficient of linear expansion of the organic substrate and the coefficient of linear expansion of the cured product of the epoxy resin composition and the amount of cure shrinkage of the epoxy resin composition are called It is no longer possible to solve the warpage problem from the viewpoint alone. SUMMARY OF THE INVENTION The present invention relates to an epoxy resin composition having specific flexural modulus and heat shrinkage characteristics, wherein the area of a semiconductor element is 40 to the area of a semiconductor device.
An area mounting type semiconductor device which is obtained by sealing a semiconductor element of not less than% and has a small warpage after molding or soldering. According to the present invention, there is provided [1] a semiconductor device obtained by encapsulating a semiconductor element using the following epoxy resin composition. Hereinafter, the area occupied by the semiconductor element) is 40%.
An area mounting type semiconductor device characterized by the above. An epoxy resin containing (A) an epoxy resin, (B) a phenol resin, (C) an inorganic filler, and (D) a curing accelerator as essential components, and containing 65 to 95% by weight of an inorganic filler in the entire epoxy resin composition. In the composition, the cured product of the epoxy resin composition has a glass transition temperature of less than 130 ° C. and a flexural modulus of less than 20,000 N / mm 2 within a temperature range of 25 ° C. to “glass transition temperature + 5 ° C.” Temperature + 5 ° C ”to less than 8000 N / mm 2 in the temperature range of 140 ° C, 1000 in the temperature range of 140 ° C to 175 ° C
An epoxy resin composition having a heat shrinkage of less than 0.2% from N / mm 2 and from the glass transition temperature to 25 ° C.,
It is. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention relates to a method for sealing a semiconductor device having an area occupied by a semiconductor element of 40% or more, when bending an elastic modulus and a glass transition within a temperature range of 25 ° C. to 175 ° C. By controlling the heat shrinkage when cooled from a temperature (hereinafter, referred to as Tg) to 25 ° C., it was found that warpage after molding and during soldering could be reduced, and a specific range of flexural elasticity was found. This is an area-mounted semiconductor device sealed with an epoxy resin composition having the characteristics of heat shrinkage and heat shrinkage. [0008] The reason that the area occupied by the semiconductor element is 40% or more is that if the area occupied by the semiconductor element is less than 40%, the epoxy resin composition approaches the two-layer structure of the substrate and the cured product of the epoxy resin composition. By increasing the Tg of the cured product of the above to make the coefficient of linear expansion of the substrate close to the linear expansion coefficient of the cured product of the epoxy resin composition, the heat shrinkage after molding and curing is reduced, and the cured product of the epoxy resin composition is reduced. This is because a technique of reducing the curing shrinkage of the resin has already been established. However, when the occupied area of the semiconductor element exceeds 40%,
The area of the semiconductor element occupying the entire area cannot be ignored, and the semiconductor device must be considered as a three-layer structure including the semiconductor element, the substrate, and the cured product of the epoxy resin composition. The linear expansion coefficient of the semiconductor element hardly changes in the range from room temperature to the molding temperature, and has a significantly higher rigidity and a lower linear expansion coefficient than the cured product of the substrate and the epoxy resin composition. Therefore, reducing the warpage means how to suppress the deformation of the semiconductor element, and the rigidity of the cured product of the epoxy resin composition at a molding temperature or lower greatly affects. The cured product of the epoxy resin composition has a flexural modulus of 200 in the temperature range from 25 ° C. to “Tg + 5 ° C.”.
00N / mm 2 or more, or 14 from “Tg + 5 ° C”
Flexural modulus 8000 N / mm in the temperature range of 0 ° C
When the bending elastic modulus is 1000 N / mm 2 or more in the temperature range of 140 ° C. to 175 ° C. or more, the bending moment of the epoxy resin composition toward the cured product due to heat shrinkage becomes large, so that the solder balls are mounted on the substrate. The concave warpage is likely to occur with the surface facing down. Further, when the Tg of the cured product of the epoxy resin composition is 130 ° C. or higher, the temperature range from Tg to room temperature is widened, the heat shrinkage in the region where the flexural modulus is large is large, and the cured product of the epoxy resin composition is This is because a large bending moment is easily generated on the side. In order to reduce the flexural modulus of the cured product of the epoxy resin composition, the content of the inorganic filler may be reduced. If the components such as epoxy resin, phenolic resin and curing accelerator are the same, the less the content of the inorganic filler,
Flexural modulus tends to be small. However, as the content of the inorganic filler is reduced, the moldability is better but the problem of cracking of the semiconductor device during the soldering process due to expansion of the moisture absorption of the semiconductor device is liable to be caused. If the content of the material is less than 65% by weight, it is not preferable. On the other hand, it is effective to increase the content of the inorganic filler in order to reduce the heat shrinkage of the semiconductor device and improve the solder crack resistance, but the bending elastic modulus is easily increased and the moldability ( Fillability, voids, flow marks, gold wire deformation, etc.) and the content of inorganic filler is 95
If the content exceeds% by weight, this phenomenon becomes remarkable, which is not preferable. The epoxy resin composition used in the present invention contains an epoxy resin, a phenol resin, an inorganic filler and a curing accelerator as essential components. Examples of the epoxy resin include bisphenol A epoxy resin and bisphenol F epoxy resin. , Stilbene type epoxy resin, phenol novolak type epoxy resin, orthocresol novolak type epoxy resin, naphthol novolak type epoxy resin, triphenolmethane type epoxy resin, dicyclopentadiene modified phenol type epoxy resin, terpene modified phenol type epoxy resin, hydroquinone type Examples include, but are not limited to, epoxy resins. Examples of the phenol resin include, but are not limited to, phenol novolak resin, cresol novolak resin, dicyclopentadiene-modified phenol resin, phenol aralkyl resin, terpene-modified phenol resin, and triphenolmethane resin. Examples of the inorganic filler include fused silica, fused spherical silica, crystalline silica, secondary aggregated silica, alumina, titanium white, aluminum hydroxide, and the like, and fused spherical silica is particularly preferred. As the shape of the spherical silica, it is preferable that the shape is infinitely spherical and the particle size distribution is broad in order to improve fluidity. As the curing accelerator, for example, 1,8-diazabicyclo (5,4,0) undecene-7, triphenylphosphine, benzyldimethylamine, 2-methylimidazole, or the like may be used alone or in combination. The epoxy resin composition used in the present invention comprises:
In addition to the components (A) to (D), if necessary, brominated epoxy resins, flame retardants such as antimony oxide, inorganic ion exchangers such as bismuth oxide hydrate, and γ-glycidoxypropyltrimethoxysilane. Coupling agents, colorants such as carbon black and red bean, low-stress components such as silicone oil and silicone rubber, natural wax, synthetic wax,
Release agents such as higher fatty acids and metal salts thereof or paraffin, and various additives such as antioxidants may be appropriately blended. Furthermore, if necessary, the inorganic filler may be pre-treated with a coupling agent, an epoxy resin or a phenol resin and used, and the treatment may be carried out by removing the solvent after mixing with a solvent or directly using the inorganic filler. There is a method of adding to a material and treating using a mixer. The epoxy resin composition used in the present invention comprises:
The components (A) to (D), other additives, and the like are mixed at room temperature using a mixer, melt-kneaded in a kneader such as an extruder such as a roll or a kneader, cooled, and pulverized. In order to manufacture an area-mounted semiconductor device by encapsulating a semiconductor element using the epoxy resin composition of the present invention, it is sufficient to cure and mold by a molding method such as a transfer mold, a compression mold, and an injection mold. BGA, LGA and the like are available as area-mounted semiconductor devices in the present invention.
(Land Grid Array Package
e), QFN (Quad Flatpack Non-1)
Eaded Package). The present invention will be described below with reference to examples, but the present invention is not limited to these examples. Example 1 Fused spherical silica (average particle size: 15 μm, specific surface area: 2.2 m 2 / g) 70.00 parts by weight Tetramethylbiphenyl diglycidyl ether (Yuka Shell Epoxy Co., Ltd., YX-4000K, melting point: 108 ° C., epoxy) Equivalent 185) 12.48 parts by weight Phenol aralkyl resin 1 (manufactured by Mitsui Chemicals, Inc., XL-225, softening point 71 ° C., hydroxyl equivalent 174) 6.56 parts by weight Phenolic resin represented by the formula (1) (softening point) 87 ° C., hydroxyl equivalent 210) 6.56 parts by weight 1,8-diazabicyclo (5,4,0) undecene-7 (hereinafter referred to as DBU) 2.00 parts by weight Brominated bisphenol A type epoxy resin 0.50 parts by weight Antimony trioxide 1.00 parts by weight γ -Glycidylpropyltrimethoxysilane 0.20 parts by weight Carnauba wax 0.40 parts by weight Carbon black 0.30 parts by weight is mixed at room temperature with a mixer, kneaded at 70 to 120 ° C with two rolls, cooled and ground. Thus, an epoxy resin composition was obtained. The obtained epoxy resin composition was evaluated by the following method. Table 1 shows the results. Evaluation method Spiral flow: Using a mold for measuring spiral flow according to EMMI-1-66, the measurement was performed at a mold temperature of 175 ° C., an injection pressure of 6.9 MPa, and a curing time of 2 minutes. The unit is cm. Tg: Using a transfer molding machine, mold temperature 175
° C, injection pressure 9.8MPa, curing time 2 minutes, 4mm × 4
When a test piece molded into a size of mm × 15 mm is measured using a thermomechanical analyzer (TMA100, manufactured by Seiko Instruments Inc.) at a measurement temperature range of 0 to 320 ° C. and a heating rate of 5 ° C./min. Α1 and α2 were determined from the chart, and the intersection of the extended lines was defined as Tg. The unit is ° C. Heat shrinkage: Using a transfer molding machine, mold temperature 17
4mm x 5 ° C, injection pressure 9.8MPa, curing time 2 minutes
A test piece molded into a size of 4 mm × 15 mm was subjected to a thermomechanical analyzer (TMA100, manufactured by Seiko Instruments Inc.).
The measurement was carried out at a measurement temperature range of 0 to 320 ° C. and a heating rate of 5 ° C./min. Units%. Flexural modulus: measured in accordance with JIS K 6911 test conditions. The test piece was used at a mold temperature of 175 ° C. and an injection pressure of 9.
Molding was performed using a transfer molding machine at 8 MPa and a curing time of 2 minutes, and post-curing was performed at 175 ° C. for 8 hours to prepare. The test piece was placed on a measuring table (span width 64 mm), preheated in a bath maintained at the measuring temperature for 6 minutes, and then measured. The measurement temperatures were 25 ° C, 130 ° C, 140 ° C, and 175 ° C. The unit is N / mm 2 . Warpage: Using a transfer molding machine, mold temperature 175
° C, injection pressure: 7.8 MPa, curing time: 2 minutes, 352 pB
GA (substrate is bismaleimide / triazine resin / glass cloth substrate having a thickness of 0.56 mm, semiconductor device size is 30 mm × 30 mm, thickness 1.17 mm, semiconductor element size is 20 mm × 20 mm, thickness 0.35 mm, The semiconductor element and the bonding pad of the circuit board are bonded with a gold wire having a diameter of 25 μm).
Post-cured in 8 hours. After cooling, the displacement in the height direction was measured diagonally from the gate of the semiconductor device using a surface roughness meter, and the largest value of the displacement was defined as the amount of warpage. Unit is μ
m. Water absorption: Using a transfer molding machine, mold temperature 175
° C, injection pressure 9.8MPa, curing time 2 minutes, diameter 50m
m, a disk having a thickness of 3 mm, and post-cured at 175 ° C. for 8 hours. The obtained molded product is left for 168 hours at an environment of 85 ° C. and a relative humidity of 60%. The rate was determined. The unit is% by weight. Solder crack resistance: 352 pBGA using a transfer molding machine at a mold temperature of 175 ° C., an injection pressure of 7.8 MPa, and a curing time of 2 minutes (substrate is 0.56 mm thick bismaleimide triazine resin / glass cloth substrate, semiconductor device) Has a size of 30 mm × 30 mm, a thickness of 1.17 mm, a size of a semiconductor element of 20 mm × 20 mm, and a thickness of 0.35 m
m, 25 bonding pads between the semiconductor element and the circuit board
Bonding is performed with a gold wire having a diameter of μm. The semiconductor device occupied area was 44.4%) and post-cured at 175 ° C. for 8 hours. After 10 semiconductor devices thus obtained were left in an environment of 85 ° C. and a relative humidity of 60% for 168 hours, IR reflow treatment (240 ° C.) was performed (hereinafter referred to as L2). The presence or absence of internal peeling and cracking after the treatment was observed with an ultrasonic flaw detector, and the number of defective semiconductor devices was counted. When the number of defective semiconductor devices is n, it is indicated as n / 10. Examples 2 to 7, Comparative Examples 1 to 3 Epoxy resin compositions were obtained and evaluated in the same manner as in Example 1 according to the formulations in Tables 1 and 2. Tables 1 and 2 show the evaluation results. The resins used in other than Example 1 are shown below. Phenol aralkyl resin 2 (manufactured by Mitsui Chemicals, Inc., XL
-225, softening point 62 ° C, hydroxyl equivalent 167) Triphenol methane type phenol resin (MEH-7500, manufactured by Meiwa Kasei Co., Ltd., softening point 110 ° C, hydroxyl equivalent 97) Silicone rubber 1 (Shore A hardness 30, maximum particle size) Diameter 10μ
m, average particle size 5 μm) [Table 2] According to the present invention, the area occupied by a semiconductor element with respect to the area of a semiconductor device is reduced to 40 using an epoxy resin composition having a specific Tg, flexural modulus and heat shrinkage characteristic.
%, The area-mount type semiconductor device in which the semiconductor element is sealed is less warped after molding or soldering, and is industrially useful.

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4J002 CC04X CC05X CC07X CC08X CD04W CD05W CD06W CD07W CD16W CD18W DE136 DE146 DJ016 EN027 EU117 EU137 EW137 FA086 FD016 FD090 FD130 FD14X FD157 FD160 GQ05 4J036 AA01 AC01 AC02 AC05 AC07 AD08 AF05 AF06 AF08 CD04 CD23 DA02 DA05 DC05 DC40 DC46 DD07 FA01 FA03 FA05 FB07 JA07 4M109 AA01 BA03 CA21 CA22 EA02 EB03 EB04 EB06 EB07 EB08 EB09 EB13 EB18 EB19 EC04   ────────────────────────────────────────────────── ─── Continuation of front page    F-term (reference) 4J002 CC04X CC05X CC07X CC08X                       CD04W CD05W CD06W CD07W                       CD16W CD18W DE136 DE146                       DJ016 EN027 EU117 EU137                       EW137 FA086 FD016 FD090                       FD130 FD14X FD157 FD160                       GQ05                 4J036 AA01 AC01 AC02 AC05 AC07                       AD08 AF05 AF06 AF08 CD04                       CD23 DA02 DA05 DC05 DC40                       DC46 DD07 FA01 FA03 FA05                       FB07 JA07                 4M109 AA01 BA03 CA21 CA22 EA02                       EB03 EB04 EB06 EB07 EB08                       EB09 EB13 EB18 EB19 EC04

Claims (1)

【特許請求の範囲】 【請求項1】 下記のエポキシ樹脂組成物を用いて、半
導体素子を封止して得られる半導体装置が、半導体装置
面積に対する半導体素子面積が40%以上であることを
特徴とするエリア実装型半導体装置。 (A)エポキシ樹脂、(B)フェノール樹脂、(C)無
機充填材及び(D)硬化促進剤を必須成分とし、全エポ
キシ樹脂組成物中に無機充填材を65〜95重量%含有
するエポキシ樹脂組成物において、該エポキシ樹脂組成
物の硬化物のガラス転移温度が130℃未満、曲げ弾性
率が、 25℃から「ガラス転移温度+5℃」の温度範囲内に
おいて20000N/mm2未満、 「ガラス転移温度+5℃」から140℃の温度範囲内
において8000N/mm2未満、 140℃から175℃の温度範囲内において1000
N/mm2未満で、かつガラス転移温度から25℃まで
の熱収縮率が0.2%未満であるエポキシ樹脂組成物。
Claims 1. A semiconductor device obtained by sealing a semiconductor element using the following epoxy resin composition has a semiconductor element area of 40% or more of the semiconductor device area. Area-mounted semiconductor device. An epoxy resin containing (A) an epoxy resin, (B) a phenol resin, (C) an inorganic filler, and (D) a curing accelerator as essential components, and containing 65 to 95% by weight of an inorganic filler in the entire epoxy resin composition. In the composition, the cured product of the epoxy resin composition has a glass transition temperature of less than 130 ° C. and a flexural modulus of less than 20,000 N / mm 2 within a temperature range of 25 ° C. to “glass transition temperature + 5 ° C.” Temperature + 5 ° C ”to less than 8000 N / mm 2 in the temperature range of 140 ° C, 1000 in the temperature range of 140 ° C to 175 ° C
An epoxy resin composition having an N / mm 2 of less than 0.2% and a heat shrinkage from the glass transition temperature to 25 ° C. of less than 0.2%.
JP2001229791A 2001-07-30 2001-07-30 Semiconductor device Pending JP2003040979A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001229791A JP2003040979A (en) 2001-07-30 2001-07-30 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001229791A JP2003040979A (en) 2001-07-30 2001-07-30 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2003040979A true JP2003040979A (en) 2003-02-13

Family

ID=19062090

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001229791A Pending JP2003040979A (en) 2001-07-30 2001-07-30 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2003040979A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006117711A (en) * 2004-10-19 2006-05-11 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor apparatus
CN112226041A (en) * 2020-10-12 2021-01-15 江苏华海诚科新材料股份有限公司 High-thermal-conductivity epoxy resin composition and preparation method thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04173828A (en) * 1990-11-07 1992-06-22 Hitachi Chem Co Ltd Epoxy resin molding material for sealing electric part
JPH09255812A (en) * 1996-03-21 1997-09-30 Toray Ind Inc Resin composition
JPH1192629A (en) * 1997-09-18 1999-04-06 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device
JP2000103840A (en) * 1998-09-25 2000-04-11 Matsushita Electric Works Ltd Sealing resin composition and semiconductor device
JP2000229791A (en) * 1999-02-10 2000-08-22 Yamaha Livingtec Corp Lifting cabinet
JP2000281878A (en) * 1999-03-30 2000-10-10 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device
JP2002194058A (en) * 2000-12-22 2002-07-10 Sumitomo Bakelite Co Ltd Semiconductor device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04173828A (en) * 1990-11-07 1992-06-22 Hitachi Chem Co Ltd Epoxy resin molding material for sealing electric part
JPH09255812A (en) * 1996-03-21 1997-09-30 Toray Ind Inc Resin composition
JPH1192629A (en) * 1997-09-18 1999-04-06 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device
JP2000103840A (en) * 1998-09-25 2000-04-11 Matsushita Electric Works Ltd Sealing resin composition and semiconductor device
JP2000229791A (en) * 1999-02-10 2000-08-22 Yamaha Livingtec Corp Lifting cabinet
JP2000281878A (en) * 1999-03-30 2000-10-10 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device
JP2002194058A (en) * 2000-12-22 2002-07-10 Sumitomo Bakelite Co Ltd Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006117711A (en) * 2004-10-19 2006-05-11 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor apparatus
JP4645147B2 (en) * 2004-10-19 2011-03-09 住友ベークライト株式会社 Epoxy resin composition and semiconductor device
CN112226041A (en) * 2020-10-12 2021-01-15 江苏华海诚科新材料股份有限公司 High-thermal-conductivity epoxy resin composition and preparation method thereof

Similar Documents

Publication Publication Date Title
JP4692885B2 (en) Epoxy resin composition and semiconductor device
KR100663680B1 (en) Epoxy resin composition and semiconductor device
JP3334998B2 (en) Epoxy resin composition
JP4736506B2 (en) Epoxy resin composition and semiconductor device
JP2006152185A (en) Epoxy resin composition and semiconductor device
JP4622221B2 (en) Epoxy resin composition and semiconductor device
JP2004018790A (en) Epoxy resin composition and semiconductor device
JP4710200B2 (en) Manufacturing method of area mounting type semiconductor sealing epoxy resin composition and area mounting type semiconductor device
JP2004292514A (en) Epoxy resin composition and semiconductor device
JP2003040979A (en) Semiconductor device
JP4770024B2 (en) Epoxy resin composition and semiconductor device
JP4759994B2 (en) Epoxy resin composition and semiconductor device
JP5055778B2 (en) Epoxy resin composition, epoxy resin molding material and semiconductor device
JP4543638B2 (en) Epoxy resin composition and semiconductor device
JP2000169677A (en) Epoxy resin composition and semiconductor apparatus
JP2001146511A (en) Epoxy resin composition and semiconductor device
JP2862777B2 (en) Epoxy resin composition
JP3956717B2 (en) Epoxy resin composition for sealing and single-side sealed semiconductor device
JP2002121357A (en) Epoxy resin composition and semiconductor device
JP2000281748A (en) Epoxy resin composition and semiconductor device
JPH11130937A (en) Epoxy resin composition and semiconductor device
JPH1192629A (en) Epoxy resin composition and semiconductor device
JP2002121356A (en) Epoxy resin composition and semiconductor device
JPH1160901A (en) Epoxy resin composition and semiconductor device
JP3932254B2 (en) Epoxy resin composition and semiconductor device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080509

A977 Report on retrieval

Effective date: 20101005

Free format text: JAPANESE INTERMEDIATE CODE: A971007

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20101012

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20110426