JP2003036128A5 - - Google Patents

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Publication number
JP2003036128A5
JP2003036128A5 JP2002156691A JP2002156691A JP2003036128A5 JP 2003036128 A5 JP2003036128 A5 JP 2003036128A5 JP 2002156691 A JP2002156691 A JP 2002156691A JP 2002156691 A JP2002156691 A JP 2002156691A JP 2003036128 A5 JP2003036128 A5 JP 2003036128A5
Authority
JP
Japan
Prior art keywords
backplane
signal lines
backplane device
isolation circuit
common bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002156691A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003036128A (ja
Filing date
Publication date
Priority claimed from US09/872,924 external-priority patent/US6910089B2/en
Application filed filed Critical
Publication of JP2003036128A publication Critical patent/JP2003036128A/ja
Publication of JP2003036128A5 publication Critical patent/JP2003036128A5/ja
Pending legal-status Critical Current

Links

JP2002156691A 2001-06-01 2002-05-30 可用性の高いストレージエンクロージャ用のフォールトトレランスのバス Pending JP2003036128A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/872924 2001-06-01
US09/872,924 US6910089B2 (en) 2001-06-01 2001-06-01 Fault tolerant bus for highly available storage enclosure

Publications (2)

Publication Number Publication Date
JP2003036128A JP2003036128A (ja) 2003-02-07
JP2003036128A5 true JP2003036128A5 (enExample) 2005-11-04

Family

ID=25360609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002156691A Pending JP2003036128A (ja) 2001-06-01 2002-05-30 可用性の高いストレージエンクロージャ用のフォールトトレランスのバス

Country Status (6)

Country Link
US (1) US6910089B2 (enExample)
EP (1) EP1262877B1 (enExample)
JP (1) JP2003036128A (enExample)
KR (1) KR20020092232A (enExample)
DE (1) DE60207144T2 (enExample)
TW (1) TW589564B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7281063B2 (en) * 2003-07-22 2007-10-09 Hewlett-Packard Development Company, L.P. Signal routing circuit board coupling controller and storage array circuit board for storage system
US20050289284A1 (en) * 2004-06-24 2005-12-29 Ge Chang High speed memory modules
US7461101B2 (en) 2004-07-13 2008-12-02 International Business Machines Corporation Method for reducing data loss and unavailability by integrating multiple levels of a storage hierarchy
PL2927815T3 (pl) 2008-05-21 2017-11-30 Hewlett-Packard Development Company, L.P. Wielopunktowa szyna szeregowa z wykrywaniem położenia i sposób wykrywania położenia
US20100262753A1 (en) * 2009-04-08 2010-10-14 Fujitsu Limited Method and apparatus for connecting multiple memory devices to a controller
US9454504B2 (en) 2010-09-30 2016-09-27 Hewlett-Packard Development Company, L.P. Slave device bit sequence zero driver
US9548808B2 (en) 2014-11-11 2017-01-17 International Business Machines Corporation Dynamic optical channel sparing in an industry standard input/output subsystem

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4445048A (en) * 1980-04-04 1984-04-24 Rolm Corporation High speed ribbon cable bus
JP2845480B2 (ja) * 1989-03-14 1999-01-13 株式会社東芝 信号分配方式
DE69024313T2 (de) * 1989-10-20 1996-06-13 Matsushita Electric Ind Co Ltd Oberflächenmontierbare Netzwerkvorrichtung
US5019728A (en) * 1990-09-10 1991-05-28 Ncr Corporation High speed CMOS backpanel transceiver
US5382841A (en) * 1991-12-23 1995-01-17 Motorola, Inc. Switchable active bus termination circuit
US5767695A (en) 1993-12-28 1998-06-16 Takekuma; Toshitsugu Fast transmission line implemented with receiver, driver, terminator and IC arrangements
JP2882266B2 (ja) * 1993-12-28 1999-04-12 株式会社日立製作所 信号伝送装置及び回路ブロック
GB9405855D0 (en) 1994-03-24 1994-05-11 Int Computers Ltd Computer system
US5564024A (en) * 1994-08-02 1996-10-08 Pemberton; Adam C. Apparatus for connecting and disconnecting peripheral devices to a powered bus
US5612634A (en) 1994-09-26 1997-03-18 Zilog, Inc. Circuit for sensing whether or not an add-in board is inserted into a bus connector of a mother board
US5620331A (en) * 1994-12-15 1997-04-15 Methode Electronics, Inc. Feed-thru IDC terminator
US5578940A (en) * 1995-04-04 1996-11-26 Rambus, Inc. Modular bus with single or double parallel termination
US5568060A (en) 1995-07-20 1996-10-22 Transwitch Corporation Circuit board insertion circuitry for high reliability backplanes
US5721497A (en) * 1996-01-23 1998-02-24 Sun Microsystems, Inc. Cold termination for a bus
US5955703A (en) * 1996-02-28 1999-09-21 Methode Electronics, Inc. Circuitized electrical cable and method of assembling same
US5945886A (en) * 1996-09-20 1999-08-31 Sldram, Inc. High-speed bus structure for printed circuit boards
US6265912B1 (en) * 1997-08-06 2001-07-24 Nec Corporation High-speed bus capable of effectively suppressing a noise on a bus line
US6011710A (en) * 1997-10-30 2000-01-04 Hewlett-Packard Company Capacitance reducing memory system, device and method
JP3964528B2 (ja) * 1998-03-02 2007-08-22 富士通株式会社 シリアルバス高速化回路
JP2000122761A (ja) * 1998-10-14 2000-04-28 Hitachi Ltd バスシステム及びそれを用いたメモリシステム
US6198307B1 (en) * 1998-10-26 2001-03-06 Rambus Inc. Output driver circuit with well-controlled output impedance
US6222389B1 (en) * 1999-03-25 2001-04-24 International Business Machines Corporation Assisted gunning transceiver logic (AGTL) bus driver
US6434647B1 (en) * 1999-05-27 2002-08-13 Microsoft Corporation Reflected-wave bus termination
US6603323B1 (en) * 2000-07-10 2003-08-05 Formfactor, Inc. Closed-grid bus architecture for wafer interconnect structure
US6369605B1 (en) * 2000-09-18 2002-04-09 Intel Corporation Self-terminated driver to prevent signal reflections of transmissions between electronic devices

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