JP2003036057A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the power consumption of a display device. SOLUTION: Switches SW1-SW4 are provided between a D/A converter 7a and a resistor Rb for setting a reference electric potential of gradation, and the connection of the switch is selected by a control signal SWC1 for selecting display. While the control signal SWC1 is active (in low power consumption mode), connection is switched to additional binary-display resistors R3 and R4, so that the current flowing the resistor Rb for setting the reference electric potential is cut to reduce power consumption.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device for inputting digital image data to display an image, and more particularly to a technique for reducing power consumption of a liquid crystal display device.

[0002]

2. Description of the Related Art Conventionally, display devices for portable information terminals such as mobile phones and pagers (registered trademark) have been aimed at displaying simple characters such as numbers and characters, but the recent leap in IT technology has taken place. With the rapid development, it has been desired to put a small-sized, lightweight, thin, low-power-consumption display device that can display a color image with high definition into a portable information terminal into practical use.

Normally, a display device performs a display operation by converting a digital video signal input from the outside into an analog signal and supplying the analog video signal generated based on the analog signal to a corresponding pixel. .

FIG. 6 shows a part of a drive circuit for performing the display operation of the display device, and FIG. 7 shows an enlarged view of a portion C in FIG.

Explaining with reference to FIG. 6, clock monitoring /
The shift register 4 has a clock CL corresponding to a pixel signal.
A signal obtained by sequentially shifting the start signal ST according to K is output. The data register 5 receives the input data signals R, G, according to the output signal of the clock monitoring / shift register 4.
B is recorded, and the recorded data is sequentially latched by the latch 6. As a result, a predetermined number (one block) of R, G, B data of the video signal lines of the liquid crystal display section is latched in the latch 6. The D / A converter unit 7 includes the D / A converter shown in FIG.
The A converters are provided by the predetermined number of video signal lines. The D / A converter unit 7 generates a voltage corresponding to each input digital data latched by the latch 6 according to the reference potential generated by the reference potential setting unit 9. D
The output voltage of the / A converter unit 7 is amplified by the output amplifier unit 8 and a predetermined number of analog video signals are simultaneously output.

[0006]

In this case, it is general to use a resistor connected in series as shown in FIG. 7 as the reference potential setting section 9, and to switch when the gradation changes. Since it takes time to set the output level for charging the circuit in the latter stage of the group SW10, the settling time may increase, and it is necessary to allow a certain amount of current to flow through this resistor.

By the way, for example, in the case of a battery-powered product for mobile use, when the remaining battery capacity becomes low and the voltage drops, the overall contrast decreases, making it difficult to read, and suddenly There is a risk of inconvenience in use such as stoppage and interruption of work, and further reduction in power consumption of the display device is desired.

Therefore, it is an object of the present invention to realize low power consumption of a display device.

[0009]

In order to achieve the above object, the DAC circuit of the present invention is provided with a switch between the D / A converter and the reference potential setting resistor, and the control signal for switching the display is a low power display. In the case of, the resistance is switched to the binary display resistor additionally provided to limit the current flowing in the reference potential generation unit to reduce the power consumption.

When the display is switched to binary display, the display screen appears to be in a coordinated and coordinated form, which naturally lacks in smoothness, but the power consumption can be reduced without significantly impairing the contents of the screen.

That is, according to the present invention, a display cell provided with a plurality of display elements arranged in a matrix on a substrate and performing a display operation of a predetermined gradation number based on a corresponding analog video signal, and the display element are driven. And a drive circuit for converting the digital video signal supplied from the outside into an analog signal by using a predetermined number of reference potentials, and corresponding to the analog signal based on the analog signal. A display device comprising: a digital / analog conversion circuit that outputs an analog video signal supplied to a display element; and a reference potential setting unit that outputs the predetermined number of reference potentials to the digital / analog converter.
The reference potential setting section outputs the predetermined number of reference potentials when displaying the first gradation of the predetermined number of gradations, and outputs the predetermined number of reference potentials when displaying the second gradation of the second gradation number smaller than the predetermined gradation number. It is characterized in that a number of reference potentials smaller than a predetermined number is output.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION A liquid crystal display device as an example of a flat display device of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing the structure of a liquid crystal display device. The liquid crystal display device can be roughly divided into an external drive circuit 13 and a screen display section, that is, a liquid crystal cell 12.

The external drive circuit 13 is, for example, a PCB (pri
A control circuit and a video signal input from a signal source generate a signal for driving the liquid crystal cell 12 and various power supply voltages. The external drive circuit 13 is a control IC 17 that generates a synchronizing signal for the entire circuit and a control signal that drives the liquid crystal cell 12, and an analog video signal that drives the liquid crystal cell 12 based on a digital video signal input from a signal source. A DAC circuit 18 that outputs a DC voltage, a DC / DC converter 19 that supplies various power supply voltages to the drive circuit and each part of the liquid crystal cell 12, and a reference voltage is generated from the power supply voltage output from the DC / DC converter 19, and the DAC circuit 18 It includes a reference potential setting unit 9 and the like for outputting to.

On the other hand, the liquid crystal cell 12 includes a plurality of signal lines 101 on an insulating substrate such as glass, a scanning line 102 arranged substantially orthogonal to the signal line 101, and a pixel switch 103 arranged near the intersection of these signal lines 101. And an array substrate including a pixel electrode 104 connected to the pixel switch 103, an opposing substrate disposed opposite to the array substrate and having an opposing electrode 105, and a liquid crystal material sandwiched between these substrates. A display region 14 is configured by arranging display elements each having a liquid crystal layer as a light modulation layer 106 between 104 and the counter electrode 105 in a matrix. A video signal line driving circuit 16 that outputs an analog video signal from the DAC circuit 18 to the corresponding signal line 101 and a scanning signal line driving circuit 15 that drives the scanning lines 102 are provided on a portion other than the display area 14 on the array substrate. Is formed integrally with the drive area.

In this liquid crystal display device, each display element displays a predetermined gradation based on a digital video signal input from the outside, and the number of gradations to be displayed is varied as necessary. Then, the number of outputs from the reference potential setting unit is controlled according to the number of display gradations to reduce power consumption.

For example, in this embodiment, a liquid crystal display device for performing multi-gradation display in 6-bit mode and low-gradation display in 2-bit mode will be described. These modes are switched based on the remaining battery level, and when the remaining battery level falls below a predetermined value set by the user, the multi-gradation display is switched to the low gradation display.

FIG. 2 shows a part of the external drive circuit of FIG. 1 (see FIG. 1).
It is a figure explaining inside A) in detail.

This liquid crystal display device, as shown in FIG.
The DAC circuit 18 converts the digital video signal input from the control IC 17 into an analog signal, and outputs the analog video signal according to the number of outputs to the liquid crystal cell corresponding to the predetermined number of video signal lines 101.

Further, the display switching unit 1 arranged on the PCB
1 refers to the DAC from the reference potential setting unit 9 based on the remaining battery level.
Control signal SW for controlling the number of outputs of the reference voltage to the circuit 18
Output C1.

FIG. 3 is a diagram showing a portion B in FIG.
D / A converter 7 corresponding to one output from the circuit 18
a and an output amplifier A corresponding to one output of the output amplifier unit 8
1 and the reference potential setting unit 9 and the display switching unit 11. Here, a resistance type D / A converter will be described as an example of the D / A converter.

The reference potential setting section 9 includes a first output system for outputting a reference voltage when performing multi-gradation display in the first gradation display state, and a low gradation display in the second gradation display state. And a second output system that outputs a reference voltage when performing The first output system and the second output system have power supply voltages VDDa and VDDa.
The switches SW1 and SW2 and the switch group SW4 provided between these nodes electrically connect the D / A converter 7a and the reference potential setting unit 9 to each other.

More specifically, the first output system of the reference potential setting section 9 divides the voltage between the power supplies VDDa and VDDb by a plurality of reference potential setting resistors Rb and outputs a predetermined reference voltage. , The reference potential setting unit 9 and the D / A converter 7a are connected to each node N1, N2, ... Nn of the resistor Ra in the D / A converter 7a and the reference potential setting unit 9.
This is performed by the switch group SW4 provided between the nodes of the reference potential setting resistor Rb. The selection of the first output system is performed by a switch SW3 provided between the power supply VDDa and the reference potential setting resistor Rb and a switch SW5 provided between the power supply VDDb and the reference potential setting resistor Rb.

The second output system has a reference voltage for extracting the voltage of the power supply VDDa through the resistor R3 and the power supply VDDb.
Is output via the resistor R4 and two reference voltages are output. The reference voltage setting unit 9 and D /
The connection with the A converter 7a is made by a switch SW1 connected to the power supply VDDa via a resistor R3 and a switch SW2 connected to the power supply VDDb via a resistor R4.

Therefore, when outputting the first output system,
The switches SW3 and SW5 are turned on and connected to the power supplies VDDa and VDDb, respectively, the switch group SW4 is turned on and connected to the D / A converter 7a, and the switches SW1 and SW2 are turned off,
The output of the second output system stops. Similarly, switch S
W1 and SW2 are turned on, and switches SW3 and SW
If the switch 5 is in the OFF state and the switch group SW4 connecting the first output system and the D / A converter is also in the OFF state, the second output system can be connected to the power supplies VDDa and VDDb.

The power supplies VDDa and VDDb are, for example, 5V
Power supply and GND (0V). Then, the switches SW1 and SW2 or the switch SW for selecting these output systems
The control input of 3, SW5 and the switch group SW4 is performed based on the display switching unit 11.

Next, the operation of the display device according to the present embodiment will be described.

The display switching unit determines whether to perform the normal operation or the low power consumption operation, and outputs the control signal SWC1.

During normal operation (6-bit mode), the switch SW1 is switched by the control signal SWC1 (for example, low level).
And SW2 are opened (OFF state), and the switch SW3, the switch group SW4, and the switch SW5 are closed (ON state) by the control signal SWC2 obtained by inverting the control signal SWC1. As described above, in the normal operation, the reference potential setting unit selects the first output system.

Here, the resistance R1 is 91Ω and the resistance R2 is 5
If the resistance is 6Ω, the total resistance between the resistors R1 and R2 is 468.
Ω and resistance Ra 3 kΩ, the reference potential setting unit, D /
The current Ivref flowing between the A converters is 9 mA and consumes 45 mW.

On the other hand, during the low power consumption operation (2-bit mode), the display switching control signal SWC1 becomes active (for example, high level) and the switches SW1 and SW2.
Is closed (ON state), and the switch SW3, the switch group SW4, and the switch SW5 are opened (OFF state) by the control signal SWC2. That is, in the low power consumption operation, the reference potential setting circuit unit is switched to the second output system by the control signals SWC1 and SWC2, and the reference potential setting resistor Rb is separated from the power supplies VDDa and VDDb.
In other words, in normal operation, the D / A converter 7a receives n
Although the reference potentials have been supplied, two reference potentials (node N1 and node N) less than n are supplied during low power consumption operation.
n potential) is supplied.

In this case, as the data input signal, for example, the most significant bit of each pixel data composed of a plurality of bits can be used. When the most significant bit is "1", SW10a of the switch SW10 is ON, and the other switches are OFF. Also, the most significant bit is "
When it is 0 ", SW10b of the switch SW10 is ON.
Other switches are off. Therefore, during the low power consumption operation, two switches SW10a and SW10b of the switch group SW10 are turned on / off, and the other switches are all opened. During this low power consumption operation, the switch SW10 can be controlled by using all bits of the data input signal as in the conventional case.

Power supply VDDa is 5V, VDDb is GND, resistance R3 is 680Ω, and resistance Ra in the D / A converter is Ra.
Is about 3 kΩ and the resistance R4 is 430 Ω, the current Ivref flowing through the resistance Ra is about 1.2 mA, and the power consumption can be reduced to 6.1 mW. In this case, the maximum reference potential (node N1 potential) and the minimum reference potential (node Nn potential) during normal operation and low power consumption operation are almost unchanged (4.18 → 4.17 V, 0.51 → 0). .52V),
It also meets the specifications of the specific IC (must be a certain distance away from the power supply voltage).

In the above embodiment, the operation mode (normal operation and low consumption display operation) is switched based on the remaining battery level.

That is, in the case of using the battery remaining amount monitor signal, the user can set in advance how much the remaining amount should be before switching to the low consumption mode. When the remaining amount falls below a predetermined amount, a control signal is output and 6
Switch from bit mode to 2-bit mode display.

The operation mode may be switched by an external light sensor according to the usage environment. When an external light sensor is used, especially in the case of a reflection type, it is used as follows. In other words, if the illuminance is below a certain level, the screen becomes difficult to read, and unnecessary gradation display is useless. If the binary display is used, the contrast of the image is coordinated, the minimum use is possible even when the screen is dark, the user's application is expanded, and the power consumption is reduced.

The switching illuminance is set to about 20 cd / m 2, and the switching is made to have a certain degree of hysteresis so that the switching between the normal operation and the low consumption operation is performed when the same state continues for, for example, 1 ms or more. Good to do.

As described above, the number of outputs of the reference potential setting section can be made variable according to the gradation.

As described above, when the number of display gray scales is switched and the low gray scale operation is performed, the number of outputs of the reference potential setting section can be reduced and power consumption can be reduced.

In the above embodiments, the D / A converter called a resistance type is used for description, but the present invention is not limited to this, and a capacitance type D / A converter may be used.

Next, a second embodiment of the present invention will be described.

In the above-described first embodiment, the display device in which the number of gradations is made variable as necessary and the power consumption of the reference potential setting unit is suppressed according to the number of gradations has been described. The reduction of power consumption of the DAC circuit according to the number of gradations will be described.

Therefore, in the second embodiment, when performing color (gray) display or monochrome binary display, the display operation is performed using dedicated circuit blocks.

More specifically, as shown in FIG. 4, D
The AC circuit 21 includes a clock monitoring / shift register 4, a color display block and a black and white binary display block for serial-parallel converting a video signal based on the output of the clock monitoring / shift register 4, and amplifies signals from these blocks. And an output amplifier section 8 for outputting the output. A data video signal is input to the DAC circuit 21 in two systems, a multi-bit signal corresponding to color display and a 1-bit signal corresponding to monochrome display.

Either one of the color display block and the black and white binary block is selectively operated based on the output of the display switching unit 11, and is divided into a color display block and a black and white binary display block. A power switch is provided, and color display and monochrome binary display are switched by the control signal SWC3, and the color display block is not operated during monochrome binary display.

The color display block receives a multi-bit digital video signal supplied from the outside, and a data register 5 for sequentially converting the digital video signals R, G, B from serial to parallel based on the output of the shift register 4. The output from the data register 5 is sequentially latched, and the D / A converter unit 7
And a D / A converter section 7 for analog-converting these digital video signals R, G, B and outputting them to the output amplifier section 8.

On the other hand, the black and white binary display block is a binary digital video signal B / W supplied from the outside.
A data register 10 for performing serial-to-parallel conversion of the data, and a latch 6 provided in common with the color display block,
The latched video signal B / W is output to the output amplifier section 8.

In this way, when performing the black and white binary display,
By performing the display operation using the black-and-white binary display block excluding the circuits unnecessary for the black-and-white binary display, it is possible to suppress unnecessary power consumption.

Switching between color display and black-and-white binary display is performed based on the output of the display switching section, and the power supply to each block is controlled.

That is, in the color display block, the switch SW is provided between the power supply VDD1 and the data register 5.
6, switches SW7 and SW8 are provided between the power supply VDD2 and the D / A converter unit 7 and the reference potential setting unit 9, respectively, and these switches control the power supply to the color display block. A switch SW9 is provided between the data register of the black and white display block and the power supply VDD1 to control the power supply to the black and white binary display block.
Color display block switches SW6, SW7, SW8
Is controlled by the control signal SWC3 output from the display switching unit 11, and the switch SW9 of the monochrome binary display block is
Is controlled by a control signal SWC4 which is the inverted control signal SWC3, and one of the blocks operates.

During color operation, SW6, SW7, S
W8 is closed (ON state) and SW9 is open (OFF state). The operation in this case is the conventional DA shown in FIG.
It is the same as the C conversion circuit.

On the contrary, in the case of the binary display of black and white, SW6 and S
W7 and SW8 are opened (OFF state), and SW9 is closed (ON state). In this case, the data register 5, the D / A converter unit 7, and the external reference potential setting unit 9 do not operate.
The data signal B / W can be generated using any one bit of the input data signals R, G and B. As a result,
According to the black and white (H / L) set by the latch 6, a predetermined number of black and white video signals are simultaneously output from the output amplifier section 8.

Switching between color display and monochrome binary display is
This is performed by the control signal SWC3, and the display switching control signal SWC3 is generated from the display switching unit 11 including a power supply monitoring unit, an illuminance detecting optical sensor, or the like.

When displaying in black and white binary, the data register 5
Can be simplified compared to the color 6-bit version, and the D / A converter section 7 and the reference potential setting section 9 are unnecessary. Therefore, power consumption can be reduced by stopping the operation (power supply) of such a circuit.

When the remaining battery level monitor signal is used as the control signal SWC3, the user can set in advance how much the remaining battery level should be switched to the monochrome display mode, as described above. When the remaining amount becomes less than the predetermined amount, the control signal SWC3 becomes low level, and the control signal SWC4 becomes high level, and the color (gray) display is switched to the black and white binary display, here the 8-color display.

When an external light sensor is used, especially when a reflective liquid crystal display unit is used, the screen becomes difficult to read when the surroundings are dark. If the binary display is used, the contrast of the image is coordinated, the minimum use is possible even when the screen is dark, the user's application is expanded, and the power consumption is reduced.

Similar to the first embodiment, the illuminance for switching is set to about 20 cd / m 2, and if the switching is kept in the same state for 1 ms or more so that the switching has hysteresis to some extent, the normal and binary values are set. It is good to set it so that the display is switched.

FIG. 5 is a schematic block diagram showing another structure of the liquid crystal display device. In the case of this liquid crystal display device, the DAC circuit 18 is formed on the array substrate of the liquid crystal cell 12. The DAC circuit may be in the form of an IC, or may be integrally formed on an insulating substrate with a TFT formed in the same step as other transistors forming the liquid crystal cell 12. Thus, if the DAC circuit is integrally formed on the glass substrate, the external drive circuit 13 can be downsized and the external drive circuit 13 can be downsized.
It is possible to reduce the number of core wires of the cable 22 connecting the liquid crystal cell 12 and the liquid crystal cell 12.

[0059]

As described above, according to the present invention, the power consumption of the display device can be reduced.

[Brief description of drawings]

FIG. 1 is a schematic block diagram of a liquid crystal display device showing an embodiment of the present invention.

FIG. 2 is a schematic block diagram showing a partial configuration of an external drive circuit according to the first embodiment of the present invention.

FIG. 3 is a schematic block diagram showing a partial configuration of an external drive circuit according to the first embodiment of the present invention.

FIG. 4 is a schematic block diagram showing a partial configuration of an external drive circuit according to a second embodiment of the present invention.

FIG. 5 is a schematic block diagram of a liquid crystal display device according to another embodiment of the present invention.

FIG. 6 is a schematic block diagram showing a partial configuration of a conventional external drive circuit.

FIG. 7 is a schematic block diagram in which a C portion in FIG. 6 is enlarged.

[Explanation of symbols]

Ra, Rb, R1 to R4 ... Resistors, SWa, SW1 to SW
10 ... Switch, A1 ... Output amplifier, 4 ... Clock monitoring / shift register, 5 ... Data register, 6 ... Latch,
7 ... D / A converter section, 8 ... Output amplifier section, 9 ... Reference potential setting section, 10 ... Data register, 11 ... Display switching section

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/20 G09G 3/20 612G 623 623F 641 641C 642 642F F term (reference) 2H093 NA53 NC03 NC21 NC24 ND39 5C006 AA16 AF51 AF53 AF54 AF63 AF68 AF69 AF83 AF84 BB16 BC12 BF25 BF39 BF43 FA47 5C080 AA10 BB05 DD26 EE28 FF03 FF11 JJ02 JJ03

Claims (6)

[Claims] 1. A display cell having a plurality of display elements arranged in a matrix on a substrate and performing a display operation of a predetermined gradation number based on a corresponding analog video signal, and a drive circuit for driving the display element. The drive circuit includes a digital / analog converter that converts a digital video signal supplied from the outside into an analog signal by using a predetermined number of reference potentials, and the display device corresponding to the analog signal based on the analog signal. A display device comprising: a digital / analog conversion circuit that outputs an analog video signal to be supplied; and a reference potential setting unit that outputs the predetermined number of reference potentials to the digital / analog converter, the reference potential setting unit Outputs the predetermined number of reference potentials during the first gradation display of the predetermined gradation number, and displays the second gradation number of the second gradation number smaller than the predetermined gradation number. The display device and outputs a smaller number of reference potential than the predetermined number. 2. The display device further includes a display switching unit,
The display device according to claim 1, wherein the first gradation display and the second gradation display are switched based on an output signal of the display switching unit. 3. The display switching unit outputs the output signal to perform the second gradation display when the remaining battery capacity is below a predetermined value, based on the remaining battery capacity of the display device. The display device according to claim 2, wherein the display device is a display device. 4. The display switching unit has an external light sensor, and outputs the output signal so as to perform the second gradation display when the use environment of the display device is below a certain illuminance. The display device according to claim 2. 5. A display cell having a plurality of display elements arranged in a matrix on a substrate and performing a multi-gradation display operation based on corresponding video signals, and a drive circuit for driving the display elements. The driving circuit includes a digital / analog converter that converts a digital video signal supplied from the outside into an analog signal, and outputs a digital video signal that is supplied to the corresponding display element based on the analog signal. A display device including a conversion circuit, wherein the digital / analog converter stops the operation when each of the display elements is in a binary display operation, and the digital / analog converter is in a digital / analog converter during the multi-gradation display operation larger than two values. A display device characterized by performing analog conversion. 6. The display device according to claim 5, wherein the drive circuit stops power supply to the digital / analog converter during the binary display operation.