JP2003035909A - Method for manufacturing plane display element and plane display element - Google Patents

Method for manufacturing plane display element and plane display element

Info

Publication number
JP2003035909A
JP2003035909A JP2001223248A JP2001223248A JP2003035909A JP 2003035909 A JP2003035909 A JP 2003035909A JP 2001223248 A JP2001223248 A JP 2001223248A JP 2001223248 A JP2001223248 A JP 2001223248A JP 2003035909 A JP2003035909 A JP 2003035909A
Authority
JP
Japan
Prior art keywords
frame
substrate
electrode
layer
display element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001223248A
Other languages
Japanese (ja)
Inventor
Hiroyuki Osada
洋之 長田
Takeshi Yamamoto
武志 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2001223248A priority Critical patent/JP2003035909A/en
Publication of JP2003035909A publication Critical patent/JP2003035909A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Optical Filters (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve a display contrast by preventing the reaction of a light modulating layer in a picture frame region caused by a leakage electric field from the drive circuit during drive, and promptly removing electric charges accumulated in the picture frame region caused by the leakage electric field during power source off in a drive circuit integrated plane display element in which the drive circuit is disposed in the picture frame region. SOLUTION: A picture frame light shielding layer 23 is formed of the same material as a blue (B) colored layer 20c on a circumference drive circuit 21 disposed in the picture frame region [B] of an array substrate 11, and at the same time a picture frame electrode 27 is formed of the same material as the pixel electrode 24 on the light shielding layer 23. The picture frame electrode 27 is connected to a common electrode 22 which is connected to a common electrode 32 of a counter substrate 12 and grounded. Thereby, the potential of the picture frame electrode 27 and the common electrode 32 becomes the same, the reaction of the liquid crystal layer 16 is prevented, and the accumulated electric charges are promptly removed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は平面表示素子に係
り、特に駆動回路一体型の平面表示素子及び平面表示素
子の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat display element, and more particularly to a flat display element integrated with a drive circuit and a method for manufacturing the flat display element.

【0002】[0002]

【従来の技術】近年、パソコン端末、モニター等に用い
られる表示素子として、マトリクス状に配列される画素
電極及びこの画素電極を駆動するための薄膜トランジス
タ(以下TFTと略称する。)からなるスイッチング素
子を有するアレイ基板と、共通電極を有しアレイ基板に
対向配置される対向基板のいずれか一方の基板に、赤
(R)、緑(G)、青(B)の3原色の着色層からなる
カラーフィルタ層を有し、シール剤でかこまれた間隙
に、例えば液晶等の光変調層を備えてなる平面表示素子
が多用されている。
2. Description of the Related Art In recent years, as a display element used for a personal computer terminal, a monitor, etc., a switching element composed of pixel electrodes arranged in a matrix and thin film transistors (hereinafter abbreviated as TFT) for driving the pixel electrodes is used. A color composed of three primary color layers of red (R), green (G), and blue (B) on one of the array substrate having the common electrode and the counter substrate having a common electrode and arranged to face the array substrate. A flat display element having a filter layer and having a light modulation layer such as liquid crystal in a gap surrounded by a sealant is often used.

【0003】更にこの様な平面表示素子にあっては、ア
レイ基板上の画素電極周囲の額縁領域にポリシリコン
(以下p−Siと略称する。)を半導体層としたp−S
iTFTを用いて画素電極のスイッチング素子に駆動信
号を送る駆動回路を形成する駆動回路一体型の平面表示
素子の実用化が図られている。
Further, in such a flat display element, p-S using polysilicon (hereinafter abbreviated as p-Si) as a semiconductor layer in a frame region around the pixel electrodes on the array substrate.
Practical application of a flat display element integrated with a drive circuit, in which a drive circuit for sending a drive signal to a switching element of a pixel electrode is formed using an iTFT, has been attempted.

【0004】一方、この様な駆動回路一体型の平面表示
素子において、例えば、電源オフ時に白表示するノーマ
リーホワイト型表示素子であるTN(Twisted
Nematic)型液晶表示素子に加えて、電源オフ時
に黒表示するノーマリーブラック型表示素子であるVA
(Vertical Aligned)型液晶表示素子
等が広く用いられるようになった。ノーマリーブラック
型表示素子の場合は、液晶と偏光板の働きにより、電源
がオフの時は光を透過せず黒を表示させることから、表
示領域周囲の額縁領域に設ける額縁遮光層は、ノーマリ
ーホワイト型表示素子に用いる額縁遮光層に比べると、
額縁遮光層の光学濃度(以下ODと略称する。)が低く
ても液晶表示素子全体としては黒く見える。従って従来
ノーマリーブラック型表示素子を製造する際、額縁遮光
層にはODの高い真っ黒な遮光材料では無く、遮光性は
有するもののODが低くてフォトリソグラフィによる加
工が容易な遮光材料を用いその実用化を図っていた。
On the other hand, in such a flat display element integrated with a driving circuit, for example, a normally white type display element TN (Twisted) which displays white when the power is off.
VA, which is a normally black type display element that displays black when the power is turned off, in addition to the Nematic) type liquid crystal display element.
(Vertical Aligned) type liquid crystal display devices have been widely used. In the case of a normally black display element, the liquid crystal and the polarizing plate function to display black without transmitting light when the power is off.Therefore, the frame light-shielding layer provided in the frame area around the display area is Compared with the frame light-shielding layer used for the Marie-white type display element,
Even if the optical density (hereinafter abbreviated as OD) of the frame light-shielding layer is low, the liquid crystal display element as a whole looks black. Therefore, when a normally black type display device is conventionally manufactured, a light-shielding material having a light-shielding property but a low OD and easily processed by photolithography is used for a frame light-shielding layer, instead of a black light-shielding material having a high OD. I was trying to make it.

【0005】実際には、表示領域に形成するカラーフィ
ルタ層の着色層の中でODの高い青(B)色の着色層を
額縁遮光層として用い、青(B)色着色層の形成工程時
に同時に額縁遮光層を形成する事により、その層形成工
程数を削減し製造時間の短縮ひいては製造コストの低減
を図っていた。
In practice, among the colored layers of the color filter layer formed in the display area, a blue (B) colored layer having a high OD is used as a frame light-shielding layer, and the blue (B) colored layer is formed during the process. At the same time, by forming the frame light-shielding layer, the number of layer forming steps was reduced, the manufacturing time was shortened, and the manufacturing cost was reduced.

【0006】[0006]

【発明が解決しようとする課題】しかしながら上記駆動
回路一体型且つノーマリーブラックの平面表示素子に
て、 ODの低い遮光材料で額縁遮光層を形成すると、
額縁遮光層の加工性を向上でき製造コストの低減を得ら
れる反面、額縁領域で光漏れを発生するという問題を生
じていた。
However, in the above-mentioned drive circuit integrated type and normally black flat display element, if the frame light-shielding layer is formed of a light-shielding material having a low OD,
While the workability of the frame light-shielding layer can be improved and the manufacturing cost can be reduced, there has been a problem that light leakage occurs in the frame region.

【0007】この額縁領域での光漏れを詳細に観察した
ところ、光漏れの種類は2種類あることが判明した。一
つは額縁領域に設けられた駆動回路の配線等の電極両端
を中心として発生するものであり、もうひとつは駆動回
路の電極位置とは関係なく発生するものである。
When the light leakage in this frame area was observed in detail, it was found that there were two types of light leakage. One is generated at both ends of electrodes such as wiring of the drive circuit provided in the frame area, and the other is generated regardless of the electrode position of the drive circuit.

【0008】駆動回路の電極両端を中心に発生する光漏
れは通電時に発生した。これは、駆動回路一体型の液晶
表示素子の額縁領域に設けられる駆動回路は、当然なが
ら表示領域のスイッチング素子を駆動するXドライバ、
Yドライバ等を有してなっている。このため画像表示時
を行うための表示領域への通電時には、これら駆動回路
へも通電され、額縁領域の下の配線等の電極両端から電
界が漏れ、その電圧が液晶のしきい値電圧以上になると
液晶が応答して光漏れが生じると推定された。
Light leakage, which occurs at both ends of the electrodes of the drive circuit, occurs during energization. This is because the drive circuit provided in the frame area of the liquid crystal display element integrated with the drive circuit is an X driver for driving the switching element in the display area.
It has a Y driver and the like. For this reason, when the display area for displaying an image is energized, these drive circuits are also energized, the electric field leaks from both ends of the electrodes such as wiring under the frame area, and the voltage exceeds the threshold voltage of the liquid crystal. Then, it was estimated that the liquid crystal would respond to cause light leakage.

【0009】もう一方の光漏れ、すなわち電極位置とは
関係なく発生する光漏れは、主に電源オフ時に発生し
た。これは、アレイ基板側の額縁領域に電極が無いため
に、漏れ電界により発生していた電荷が電源オフ時に額
縁領域に留まり逃げることができずに保持され、この保
持電荷が液晶のしきい値電圧以上になると液晶が応答し
て光漏れが生じると推定された。
The other light leak, that is, the light leak that occurs regardless of the electrode position, occurs mainly when the power is turned off. This is because, since there is no electrode in the frame area on the array substrate side, the electric charges generated by the leakage electric field are retained in the frame area when the power is turned off and cannot escape. It was presumed that the liquid crystal responds and light leakage occurs when the voltage exceeds the voltage.

【0010】そしてこれら額縁領域の光漏れは、電源オ
フ時には画面周囲が多少明るくなる程度で特に問題無い
ものの、通電時である画像表示時には、表示領域周縁で
コントラストの低下を来たし、表示品位を著しく低下す
るという問題を生じていた。
The light leakage in these frame regions causes no problem in that the periphery of the screen becomes slightly brighter when the power is off, but when the image is displayed while the power is on, the contrast is lowered at the periphery of the display region and the display quality is remarkably reduced. There was a problem of decrease.

【0011】そこで本発明は上記課題を除去するもので
あり、駆動回路一体型の平面表示素子にて、 駆動回路
から発生される漏れ電界による光変調層への影響を防止
すると共に額縁領域に発生された電荷を速やかに除去す
ることにより、額縁遮光層の加工性を損なうことなく額
縁領域での光漏れが発生するのを防止して、全面にわた
り表示コントラストの良い良好な表示品位を有する平面
表示素子及び平面表示素子の製造方法を提供することを
目的とする、
Therefore, the present invention is to eliminate the above-mentioned problems, and in a flat display element integrated with a driving circuit, the influence of a leakage electric field generated from the driving circuit on the light modulation layer is prevented, and at the same time, it is generated in the frame region. By quickly removing the accumulated charges, light leakage is prevented from occurring in the frame area without impairing the workability of the frame light-shielding layer, and flat display with good display quality with good display contrast over the entire surface An object is to provide a method for manufacturing an element and a flat display element,

【0012】[0012]

【課題を解決するための手段】本発明は上記課題を解決
するための手段として、一主面上にスイッチング素子に
より駆動される画素電極をマトリクス状に配列してなる
表示領域及びこの表示領域周囲に形成される駆動回路を
有する第1の基板と、一主面上に共通電極を有し前記第
1の基板に対向配置される第2の基板とをシール剤で貼
り合せ、スペーサにより保持される前記第1の基板及び
前記第2の基板の間隙に光変調層を封入する平面表示素
子において、前記第1の基板にて前記駆動回路の上層に
形成され、前記共通電極と同電位に設定される額縁電極
を設けるものである。
As a means for solving the above problems, the present invention provides a display area in which pixel electrodes driven by switching elements are arranged in a matrix on one main surface, and a periphery of the display area. A first substrate having a drive circuit formed on the second substrate and a second substrate having a common electrode on one main surface and arranged to face the first substrate are bonded together with a sealant and held by a spacer. In a flat panel display device in which a light modulation layer is enclosed in the gap between the first substrate and the second substrate, the flat substrate is formed on the drive circuit on the first substrate and set to the same potential as the common electrode. The frame electrode is provided.

【0013】又本発明は上記課題を解決するための手段
として、一主面上にスイッチング素子により駆動される
画素電極をマトリクス状に配列してなる表示領域及びこ
の表示領域周囲に形成される駆動回路を有する第1の基
板と、一主面上に共通電極を有し前記第1の基板に対向
配置される第2の基板とをシール剤で貼り合せ、スペー
サにより保持される前記第1の基板及び前記第2の基板
の間隙に光変調層を封入する平面表示素子の製造方法に
おいて、前記画素電極形成と同時に前記駆動回路領域上
層に額縁電極とを形成する工程と、前記共通電極と前記
額縁電極とを電気的に同電位に設定する工程とを実施す
るものである。
Further, as a means for solving the above problems, the present invention provides a display area in which pixel electrodes driven by switching elements are arranged in a matrix on one main surface and a drive formed around the display area. A first substrate having a circuit and a second substrate having a common electrode on one main surface and arranged to face the first substrate are bonded together with a sealant, and the first substrate is held by a spacer. In a method of manufacturing a flat panel display device in which a light modulation layer is sealed in a gap between a substrate and the second substrate, a step of forming a frame electrode in an upper layer of the drive circuit region at the same time as forming the pixel electrode, the common electrode and the And a step of electrically setting the frame electrode to the same electric potential.

【0014】上記構成により本発明は、表示領域周囲の
駆動回路から漏れ電界が生じるのに関わらず、共通電極
との間に電位差を生じることがなく、且つ、漏れ電界に
より発生された電荷を速やかに逃がすことにより光変調
層の応答を防止し、額縁遮光層に加工性の良いODの低
い材料を用いた場合であっても光漏れを生じることな
く、コントラストの良い、表示品位の高い平面表示素子
の実用化を図るものである。
With the above structure, the present invention does not generate a potential difference between the drive circuit around the display area and the common electrode, and quickly generates the electric charge generated by the leakage electric field. To prevent the light modulation layer from responding to light and prevent the light from leaking even when a material having a good workability and a low OD is used for the frame light-shielding layer, and has a high contrast and a high display quality. It is intended to put the device into practical use.

【0015】[0015]

【発明の実施の形態】以下、本発明を図1及び図2に示
す第1の実施の形態を参照して説明する。図1は平面表
示素子であり、縦768ピクセル、横1024×3
(R、G、B)の表示領域[A]を有する駆動回路一体
型且つノーマリーブラック型の液晶表示素子10を示す
概略断面図である。液晶表示素子10は、第1の基板で
あるアレイ基板11及び第2の基板である対向基板12
をスペーサ13を介して対向配置し、シール剤14にて
周囲を接着して成る間隙に液晶層16を封入し、更にア
レイ基板11及び対向基板12外面にはそれぞれ偏光板
11a,12aがノーマリーブラックとなる方向で貼り
付けられている。
DETAILED DESCRIPTION OF THE INVENTION The present invention will be described below with reference to the first embodiment shown in FIGS. FIG. 1 shows a flat display element, which has a length of 768 pixels and a width of 1024 × 3.
FIG. 2 is a schematic cross-sectional view showing a normally black type liquid crystal display element 10 integrated with a drive circuit, which has a display area [A] of (R, G, B). The liquid crystal display element 10 includes an array substrate 11 which is a first substrate and a counter substrate 12 which is a second substrate.
Are opposed to each other with a spacer 13 interposed therebetween, and a liquid crystal layer 16 is sealed in a gap formed by adhering the periphery with a sealant 14. Further, polarizing plates 11a and 12a are normally provided on the outer surfaces of the array substrate 11 and the counter substrate 12, respectively. It is pasted in the direction that it becomes black.

【0016】アレイ基板11は、ガラス基板17の表示
領域[A]において、図示しない走査線及び信号線の交
点近傍に液晶駆動用のp−Siを半導体層とするTFT
素子18を有し、TFT素子18の上には赤(R)、緑
(G)、青(B)それぞれの着色層20a、20b、2
0cをストライプ状に配置されてなるカラーフィルタ層
20が配置されている。又ガラス基板17の表示領域
[A]周囲の額縁領域[B]には、p−Siを半導体層
とするTFT素子からなるバッファ回路、レベルシフ
タ、MRC、シフトレジスタ、アナログスイッチ等の各
種回路21a及び、これらを接続する配線21b更に
は、接地されるコモン電極22を有する周辺駆動回路2
1が形成され、周辺駆動回路21の上には青(B)色着
色層20cと同一材料からなる額縁遮光層23が配置さ
れている。
The array substrate 11 has a TFT having a semiconductor layer of p-Si for driving liquid crystal in the vicinity of the intersection of a scanning line and a signal line (not shown) in the display area [A] of the glass substrate 17.
The TFT 18 has the element 18, and the red (R), green (G), and blue (B) colored layers 20 a, 20 b, and 2 are provided on the TFT element 18.
A color filter layer 20 in which 0c is arranged in a stripe shape is arranged. Further, in the frame area [B] around the display area [A] of the glass substrate 17, various circuits 21a such as a buffer circuit, a level shifter, an MRC, a shift register, an analog switch, etc., each including a TFT element having p-Si as a semiconductor layer, and , A peripheral drive circuit 2 having a wiring 21b connecting them and a common electrode 22 grounded
1 is formed, and the frame light shielding layer 23 made of the same material as the blue (B) color coloring layer 20c is disposed on the peripheral drive circuit 21.

【0017】カラーフィルタ層20上であって図示しな
い走査線及び信号線で囲まれる領域には、768×10
24×3個のインジウム錫酸化物(以下ITOと称す
る。)膜からなる画素電極24がマトリクス状にパター
ン形成されている。画素電極24はカラーフィルタ層2
0に形成されるコンタクトホール26を介してTFT素
子18のソース電極(図示せず)に接続し、TFT素子
18により駆動される。一方、額縁遮光層23上には、
ITO膜からなる額縁電極27がパターン形成されてい
て、額縁電極27は額縁遮光層23に形成されるコンタ
クトホール28を介してコモン電極22に接続される。
画素電極24及び額縁電極27上には透明な柱状のスペ
ーサ13が形成され、その上から配向膜30が成膜され
ている。
In a region on the color filter layer 20 surrounded by scanning lines and signal lines (not shown), 768 × 10
Pixel electrodes 24 made of 24 × 3 indium tin oxide (hereinafter referred to as ITO) films are patterned in a matrix. The pixel electrode 24 is the color filter layer 2
It is connected to the source electrode (not shown) of the TFT element 18 through the contact hole 26 formed in 0, and is driven by the TFT element 18. On the other hand, on the frame light-shielding layer 23,
A frame electrode 27 made of an ITO film is patterned, and the frame electrode 27 is connected to the common electrode 22 via a contact hole 28 formed in the frame light shielding layer 23.
A transparent columnar spacer 13 is formed on the pixel electrode 24 and the frame electrode 27, and an alignment film 30 is formed thereon.

【0018】一方対向基板12は、ガラス基板31上に
ITO膜からなる共通電極32が形成され、その上から
配向膜33が成膜されている。共通電極32は、トラン
スファ剤38に接続され、トランスファ電極36及び図
示しない配線を介し周辺駆動回路21のコモン電極22
に接続されている。
On the other hand, in the counter substrate 12, a common electrode 32 made of an ITO film is formed on a glass substrate 31, and an alignment film 33 is formed thereon. The common electrode 32 is connected to the transfer agent 38, and is connected to the common electrode 22 of the peripheral drive circuit 21 via the transfer electrode 36 and wiring not shown.
It is connected to the.

【0019】次に液晶表示素子10の製造方法について
述べる。まずアレイ基板11に通常のフォトリソグラフ
ィ工程によるパターニングを繰り返してガラス基板17
の表示領域[A]に768×1024×3このTFT素
子18を形成すると同時にガラス基板17の額縁領域
[B]に周辺駆動回路21を形成する。
Next, a method of manufacturing the liquid crystal display element 10 will be described. First, the glass substrate 17 is formed by repeating patterning on the array substrate 11 by a normal photolithography process.
768 × 1024 × 3 This TFT element 18 is formed in the display area [A], and at the same time, the peripheral drive circuit 21 is formed in the frame area [B] of the glass substrate 17.

【0020】次いで、赤(R)色の顔料を分散させた紫
外線硬化型アクリル樹脂レジストCR−2000(富士
フィルムオーリン(株)製)をスピンナーにて全面塗布
し、カラーフィルタ層20の赤(R)色を着色したい部
分に光を照射するフォトマスクを介し365nmの波長
の紫外線を100mJ/cm照射し、水酸化カリウム
(KOH)の1%水溶液で10秒間現像し、焼成後、そ
の部分に3.0μm厚の赤(R)色着色層20aを形成
する。次に着色材料CG−2000(富士フィルムオー
リン(株)製)を用いて同様に3.0μm厚の緑(G)
色着色層20bを形成する。
Next, a UV-curable acrylic resin resist CR-2000 (manufactured by Fuji Film Orin Co., Ltd.) in which a red (R) color pigment is dispersed is applied over the entire surface by a spinner, and the red (R) color filter layer 20 is coated. ) 100 mJ / cm 2 of ultraviolet ray having a wavelength of 365 nm is irradiated through a photomask for irradiating light to a portion to be colored, and it is developed with a 1% aqueous solution of potassium hydroxide (KOH) for 10 seconds, and after baking, the portion is irradiated. A red (R) colored layer 20a having a thickness of 3.0 μm is formed. Next, using a coloring material CG-2000 (manufactured by Fuji Film Orin Co., Ltd.), green (G) having a thickness of 3.0 μm was similarly formed.
The colored layer 20b is formed.

【0021】更に、CB−2000(富士フィルムオー
リン(株)製)をスピンナーにて全面塗布し、カラーフ
ィルタ層20の青(B)色を着色したい部分及び額縁領
域[B]とに光を照射するフォトマスクを介し365n
mの波長の紫外線を100mJ/cm照射し、水酸化
カリウム(KOH)の1%水溶液で10秒間現像し、焼
成後、カラーフィルタ層20の青(B)色部分に3.0
μm厚の青(B)色着色層20cを形成し、額縁領域
[B]に3.0μm厚の青(B)色の額縁遮光層23を
形成する。この額縁遮光層23の単独でのOD値は1.
0であり、周辺駆動回路21を加えた額縁領域[B]で
のOD値は1.3〜1.7を得られた。
Further, CB-2000 (manufactured by Fuji Film Orin Co., Ltd.) is coated on the entire surface with a spinner, and light is irradiated to a portion of the color filter layer 20 to be colored blue (B) and a frame region [B]. 365n through a photo mask
Irradiation with 100 mJ / cm 2 of ultraviolet light having a wavelength of m, development with a 1% aqueous solution of potassium hydroxide (KOH) for 10 seconds, and after baking, 3.0 (3.0) on the blue (B) portion of the color filter layer 20.
The blue (B) colored layer 20c having a thickness of μm is formed, and the frame light-shielding layer 23 of blue (B) having a thickness of 3.0 μm is formed in the frame region [B]. The OD value of the frame light-shielding layer 23 alone is 1.
The OD value in the frame region [B] including the peripheral drive circuit 21 was 1.3 to 1.7.

【0022】上記現像時には、カラーフィルタ層20の
TFT素子18上に15×15μmのコンタクトホール
26及び、額縁遮光層23のコモン電極22上に15×
15μmのコンタクトホール28が形成されている。こ
の後ITO膜を1500Åスパッタ法にて成膜し、フォ
トリソグラフィ工程によってパターニングし、表示領域
[A]に画素電極24をパターン形成し、額縁領域
[B]に額縁電極27をパターン形成する。画素電極2
4はコンタクトホール26を介しTFT素子18に接続
し、額縁電極27はコンタクトホール28を介しコモン
電極22に接続する。
At the time of development, 15 × 15 μm contact holes 26 are formed on the TFT elements 18 of the color filter layer 20, and 15 × are formed on the common electrodes 22 of the frame light-shielding layer 23.
A contact hole 28 of 15 μm is formed. After that, an ITO film is formed by a 1500 Å sputtering method and patterned by a photolithography process to pattern the pixel electrode 24 in the display area [A] and the frame electrode 27 in the frame area [B]. Pixel electrode 2
4 is connected to the TFT element 18 via the contact hole 26, and the frame electrode 27 is connected to the common electrode 22 via the contact hole 28.

【0023】更に透明感光性樹脂(富士フィルムオーリ
ン(株)製)をスピンナーを用いて4.2μmの厚みに
塗布し、90℃で10分乾燥後、スペーサ13形成部分
に光を照射するフォトマスクを用いて365nmの波長
の紫外線を、200mJ/cm照射したあとpH1
1.5のアルカリ水溶液にて現像し、200℃で60分
焼成して高さ3.6μmの柱状のスペーサ13を形成し
する。その後、垂直配向膜材料を500Å塗布し、配向
膜30を形成する。
Further, a transparent photosensitive resin (manufactured by Fuji Film Olin Co., Ltd.) is applied to a thickness of 4.2 μm by using a spinner, dried at 90 ° C. for 10 minutes, and then a photomask for irradiating light to the spacer 13 forming portion. UV light having a wavelength of 365 nm is irradiated with 200 mJ / cm 2 using
It is developed with an alkaline aqueous solution of 1.5 and baked at 200 ° C. for 60 minutes to form a columnar spacer 13 having a height of 3.6 μm. After that, a vertical alignment film material is applied by 500 Å to form the alignment film 30.

【0024】一方ガラス基板31に、ITO膜を150
0Åスパッタ法にて成膜し、共通電極32をパターン形
成後、この上に垂直配向膜材料を500Å塗布し、配向
膜33を形成し、対向基板12を形成する。
On the other hand, an ITO film is formed on the glass substrate 31 by 150
After forming a film by the 0Å sputtering method and forming a pattern of the common electrode 32, a vertical alignment film material is applied thereon by 500Å to form an alignment film 33 to form the counter substrate 12.

【0025】この後、アレイ基板11の駆動領域[B]
外周に、注入口(図示せず)を設けてシール剤14を塗
布し、コモン電極22と共通電極32とを接続するため
のトランスファ剤38をシール剤14周辺のトランスフ
ァ電極36上に塗布する。次にアレイ基板11と対向基
板12を対向配置し、加熱してシール剤14を硬化して
貼り合わせ液晶セルを形成する。次にシール剤14の注
入口(図示せず)より負の誘電異方性をもつn型液晶組
成物を注入し、この後注入口を紫外線硬化樹脂で封止
し、液晶層16を封入後、アレイ基板11及び対向基板
12の外面にそれぞれ偏光板11a、12aを互いに偏
光軸が90°の角度となるように貼付けて液晶表示素子
10を完成する。
After this, the drive area [B] of the array substrate 11
An injection port (not shown) is provided on the outer periphery to apply the sealant 14, and a transfer agent 38 for connecting the common electrode 22 and the common electrode 32 is applied on the transfer electrode 36 around the sealant 14. Next, the array substrate 11 and the counter substrate 12 are arranged so as to face each other and heated to cure the sealant 14 to form a bonded liquid crystal cell. Next, an n-type liquid crystal composition having a negative dielectric anisotropy is injected from an injection port (not shown) of the sealant 14, and then the injection port is sealed with an ultraviolet curable resin, and the liquid crystal layer 16 is sealed. The polarizing plates 11a and 12a are attached to the outer surfaces of the array substrate 11 and the counter substrate 12 so that their polarization axes form an angle of 90 ° to complete the liquid crystal display element 10.

【0026】この様にして製造した、駆動回路一体型且
つノーマリーブラック型の液晶表示素子10の製造当初
の額縁領域[B]のODは3.8〜4.2であった。こ
の後、液晶表示素子10の表示テストを行い額縁領域
[B]の光漏れ状況を観察したところ、画像表示を行う
通電時あるいは、電源オフ時のいずれにおいても、額縁
領域[B]のODは製造当初と同様の3.8〜4.2を
保持し、光漏れが見られず、額縁領域[B]は十分な遮
光性を確保出来、画像表示時には全面にわたり高いコン
トラストを得られ、電源オフ時には均一なブラック画面
を保持した。
The OD of the frame region [B] at the beginning of the production of the normally black type liquid crystal display device 10 integrated with the drive circuit thus produced was 3.8 to 4.2. After that, a display test of the liquid crystal display element 10 was performed and the light leakage state of the frame area [B] was observed. As a result, the OD of the frame area [B] was found to be irrespective of whether the image display was conducted or the power was turned off. The same 3.8 to 4.2 as in the beginning of manufacturing was maintained, no light leakage was observed, the frame area [B] was able to secure a sufficient light-shielding property, high contrast was obtained over the entire surface during image display, and the power was turned off. At times it held a uniform black screen.

【0027】これは、額縁領域[B]に額縁電極27が
形成され、この額縁電極27がコモン電極22、トラン
スファ剤38を介し共通電極32に電気的に接続されて
いるので、通電時に周辺駆動回路21による漏れ電界が
生じていても、液晶層16に電圧が掛からないことによ
る。又電源オフ時には、漏れ電界により生じた電荷が額
縁電極27からコモン電極22を介し直ちに放電される
ので、液晶層16に電圧が掛からないことによる。
This is because the frame electrode 27 is formed in the frame region [B], and the frame electrode 27 is electrically connected to the common electrode 32 via the common electrode 22 and the transfer agent 38, so that the peripheral driving is performed at the time of energization. This is because no voltage is applied to the liquid crystal layer 16 even if a leakage electric field is generated by the circuit 21. Further, when the power is turned off, the electric charge generated by the leakage electric field is immediately discharged from the frame electrode 27 through the common electrode 22, so that no voltage is applied to the liquid crystal layer 16.

【0028】これに対し(比較例)として、額縁領域
[B]の額縁遮光層23上に額縁電極27を形成しない
事以外は第1の実施の形態と全く同様にして図3に示す
液晶表示素子41を製造した。
On the other hand, as a (comparative example), the liquid crystal display shown in FIG. 3 is performed in exactly the same manner as in the first embodiment except that the frame electrode 27 is not formed on the frame light shielding layer 23 in the frame region [B]. Element 41 was manufactured.

【0029】この(比較例)の液晶表示素子41の製造
当初の額縁領域[B]のODは3.8〜4.2と、第1
の実施の形態とであった。しかしながらこの後、液晶表
示素子41の表示テストを行い額縁領域[B]の光漏れ
状況を観察したところ、画像表示を行う通電時には、額
縁領域[B]のODは2.6〜3.0に低下し、光漏れ
を生じ、表示領域[A]周縁のコントラストの低下を来
たし、表示品位を著しく低下してしまった。この光漏れ
は、通電時に周辺駆動回路21から漏れた電界が額縁領
域[B]に蓄積され、共通電極32との間の電圧が液晶
層16のしきい値電圧以上になったために液晶が応答し
たために生じたものである。
The OD of the frame region [B] at the beginning of manufacture of the liquid crystal display element 41 of this (comparative example) was 3.8 to 4.2, which was the first.
And the embodiment. However, after that, when the liquid crystal display element 41 was subjected to a display test and the light leakage state in the frame region [B] was observed, the OD of the frame region [B] was 2.6 to 3.0 when the image display was energized. And the light leakage occurred, the contrast at the periphery of the display area [A] was lowered, and the display quality was significantly lowered. This light leakage is caused by the electric field leaked from the peripheral drive circuit 21 during energization being accumulated in the frame region [B], and the voltage between the common electrode 32 and the liquid crystal layer 16 becomes equal to or higher than the threshold voltage of the liquid crystal, so that the liquid crystal responds. It was caused by doing.

【0030】上記の構成により第1の実施の形態にあっ
ては、カラーフィルタ層20に用いるのと同じ材質のO
Dが低くフォトリソグラフィによる加工性の良い青
(B)色着色層20cを用いて、カラーフィルタ層20
の形成と同時に額縁遮光層23を形成した際に、額縁遮
光層23上に額縁電極27を設けて、この額縁電極27
を対向基板12の共通電極32と電気的に接続して同電
位としている。従って、駆動回路一体型の液晶表示素子
10にて、周辺駆動回路21から漏れ電界が発生される
のにかかわらず、額縁領域[B]にあっては液晶層16
に電界がかかることが無く、漏れ電界による額縁領域
[B]での光漏れを防止出来、良好なコントラストを有
する表示品位の高い液晶表示素子を得られる。しかも電
源がオフされると、漏れ電界により発生され溜まってい
た電荷は、コモン電極22から速やかに放電される。
又、額縁遮光層23は、従来のようにODが高くフォト
リソグラフィによる加工に劣る遮光材料を用いて単独に
形成するのではなく、カラーフィルタ層20の形成工程
と同時に形成することにより、単独の製造工程を省略出
来、製造工程数の低減により生産性向上ひいてはコスト
の低減を図れる。
In the first embodiment having the above-mentioned structure, the same material as that used for the color filter layer 20 is used.
Using the blue (B) colored layer 20c having a low D and good workability by photolithography, the color filter layer 20
When the frame light-shielding layer 23 is formed simultaneously with the formation of the frame light-shielding layer 23, a frame electrode 27 is provided on the frame light-shielding layer 23.
Are electrically connected to the common electrode 32 of the counter substrate 12 to have the same potential. Therefore, in the liquid crystal display element 10 integrated with the drive circuit, the liquid crystal layer 16 is provided in the frame region [B] regardless of the leakage electric field generated from the peripheral drive circuit 21.
No electric field is applied to the liquid crystal display device, light leakage in the frame region [B] due to a leakage electric field can be prevented, and a liquid crystal display element having a good contrast and high display quality can be obtained. Moreover, when the power is turned off, the charges generated and accumulated by the leakage electric field are quickly discharged from the common electrode 22.
Further, the frame light-shielding layer 23 is not formed individually using a light-shielding material that has a high OD and is inferior in processing by photolithography as in the related art, but is formed independently at the same time as the step of forming the color filter layer 20. Since the manufacturing process can be omitted, the productivity can be improved and the cost can be reduced by reducing the number of manufacturing processes.

【0031】次に本発明を図4に示す第2の実施の形態
を参照して説明する。本実施の形態は、第1の実施の形
態において、カラーフィルタ層20の赤(R)、緑
(G)、青(B)それぞれの着色層20a、20b、2
0cの製造順序を緑(G)→青(B)→赤(R)の順に
し、更に額縁領域[B]の青(B)色着色層20c上に
赤(R)色着色層20aを重ねたものであり、他は第1
の実施の形態と同一であることから、第1の実施の形態
と同一部分については同一符号を付しその説明を省略す
る。
Next, the present invention will be described with reference to the second embodiment shown in FIG. This embodiment is the same as the first embodiment except that the color layers 20a, 20b, and 2 of the red (R), green (G), and blue (B) of the color filter layer 20 are respectively formed.
0c is manufactured in the order of green (G) → blue (B) → red (R), and the red (R) colored layer 20a is further laid on the blue (B) colored layer 20c in the frame region [B]. Others are first
Since it is the same as that of the first embodiment, the same parts as those of the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

【0032】本実施の形態においては、液晶表示素子4
7のアレイ基板42上でのカラーフィルタ層20及び額
縁遮光層43の形成時、先ずカラーフィルタ層20の緑
(G)色を着色したい部分に緑(G)色着色層20bを
形成する。次いで、カラーフィルタ層20の青(B)色
を着色したい部分と額縁領域[B]に青(B)色着色層
20cを形成する。更にカラーフィルタ層20の赤
(R)色を着色したい部分と額縁領域[B]に赤(R)
色着色層20aを形成して、表示領域[A]にカラーフ
ィルター層20を形成すると共に、額縁領域[B]に青
(B)色着色層20cと赤(R)色着色層20aとを重
ねた額縁遮光層43を形成する。
In the present embodiment, the liquid crystal display element 4
When the color filter layer 20 and the frame light-shielding layer 43 are formed on the array substrate 42 of No. 7, first, the green (G) colored layer 20b is formed on the portion of the color filter layer 20 where the green (G) color is desired to be colored. Next, a blue (B) color coloring layer 20c is formed in the portion of the color filter layer 20 to be colored in blue (B) and the frame region [B]. Further, the portion of the color filter layer 20 to be colored red (R) and the frame region [B] are red (R).
The color coloring layer 20a is formed, the color filter layer 20 is formed in the display area [A], and the blue (B) coloring layer 20c and the red (R) coloring layer 20a are overlapped in the frame area [B]. The frame light shielding layer 43 is formed.

【0033】そして第1の実施の形態と同様、表示領域
[A]に画素電極24をパターン形成するのと同時に額
縁領域[B]に額縁電極46をパターン形成し、コンタ
クトホール44を介しコモン電極22に接続する。
Similar to the first embodiment, the pixel electrode 24 is patterned in the display area [A] and at the same time, the frame electrode 46 is patterned in the frame area [B], and the common electrode is formed through the contact hole 44. 22 is connected.

【0034】この様な額縁遮光層43を有する液晶表示
素子47は、製造当初の額縁領域[B]のODは4.6
〜5.0であった。この後、液晶表示素子47の表示テ
ストを行い額縁領域[B]の光漏れ状況を観察したとこ
ろ、画像表示を行う通電時あるいは、電源オフ時のいず
れにおいても、額縁領域[B]のODは製造当初と同様
の4.6〜5.0を保持し、光漏れが見られず、額縁領
域[B]は十分な遮光性を確保出来、画像表示時には全
面にわたり高いコントラストを得られ、電源オフ時には
均一なブラック画面を得られた。特に反射光がある場合
に、第1の実施の形態にあっては額縁領域[B]が青味
がかかって見える時があったが、この第2の実施の形態
では、反射光がある場合、額縁領域[B]は濃紫になり
色味が改善された。
In the liquid crystal display element 47 having such a frame light-shielding layer 43, the OD of the frame region [B] at the time of manufacture is 4.6.
It was ~ 5.0. After that, a display test of the liquid crystal display element 47 was performed and the light leakage state of the frame area [B] was observed. As a result, the OD of the frame area [B] was found to be irrespective of whether the image display was energized or the power was off. The same 4.6-5.0 as in the beginning of manufacturing was maintained, no light leakage was observed, the frame area [B] was able to secure a sufficient light-shielding property, high contrast was obtained over the entire surface during image display, and the power was turned off. Sometimes I got a uniform black screen. In particular, when there is reflected light, in the first embodiment, the frame region [B] may appear to have a bluish tint, but in the second embodiment, when there is reflected light. , The frame area [B] became dark purple and the color tone was improved.

【0035】上記の構成によりこの第2の実施の形態
は、第1の実施の形態と同様、カラーフィルタ層20に
用いるのと同一材料を用いて、カラーフィルタ層20の
形成と同時に額縁遮光層43を形成した際に、額縁遮光
層43上に共通電極32と電気的に接続される額縁電極
27を設けることにより、周辺駆動回路21から漏れ電
界が発生されるのにかかわらず、額縁領域[B]での光
漏れを防止出来、良好なコントラストを有する表示品位
の高い駆動回路一体型の液晶表示素子を得られ、又電源
がオフされた場合には、漏れ電界により発生され溜まっ
ていた電荷は、コモン電極22から速やかに放電可能と
なる。又、額縁遮光層43はカラーフィルタ層20の形
成工程と同時に形成されるので、専用の製造工程を省略
出来、製造工程数の低減により生産性向上ひいてはコス
トの低減を図れる。
With the above-described structure, in the second embodiment, as in the first embodiment, the same material as that used for the color filter layer 20 is used, and at the same time when the color filter layer 20 is formed, the frame light-shielding layer is formed. By providing the frame electrode 27 electrically connected to the common electrode 32 on the frame light-shielding layer 43 when the frame 43 is formed, the frame region [ [B] can prevent light leakage, can obtain a liquid crystal display element integrated with a drive circuit, which has a good contrast and has a high display quality. Further, when the power is turned off, the electric charge generated by the leakage electric field is accumulated. Can be quickly discharged from the common electrode 22. Further, since the frame light-shielding layer 43 is formed at the same time as the step of forming the color filter layer 20, a dedicated manufacturing process can be omitted, and the productivity can be improved and the cost can be reduced by reducing the number of manufacturing processes.

【0036】次に本発明を図5に示す第3の実施の形態
を参照して説明する。本実施の形態は、第1の実施の形
態において、カラーフィルタ層20の赤(R)、緑
(G)、青(B)それぞれの着色層20a、20b、2
0cの製造順序を青(B)→赤(R)→緑(G)の順と
すると共に、スペーサ13に換えて、カラーフィルタ層
20形成時に赤(R)、緑(G)、青(B)それぞれの
着色層20a、20b、20cを重ねあわせてスペーサ
を形成するものであり、他は第1の実施の形態と同一で
あることから、第1の実施の形態と同一部分については
同一符号を付しその説明を省略する。
Next, the present invention will be described with reference to the third embodiment shown in FIG. This embodiment is the same as the first embodiment except that the color layers 20a, 20b, and 2 of the red (R), green (G), and blue (B) of the color filter layer 20 are respectively formed.
0c is manufactured in the order of blue (B) → red (R) → green (G), and the spacer 13 is replaced with red (R), green (G), and blue (B) when the color filter layer 20 is formed. ) Since the colored layers 20a, 20b, 20c are overlapped to form a spacer, and the others are the same as those in the first embodiment, the same parts as those in the first embodiment are designated by the same reference numerals. Is attached and its description is omitted.

【0037】本実施の形態の液晶表示素子50は、アレ
イ基板51上でのカラーフィルタ層20及び額縁遮光層
23の形成時、先ずカラーフィルタ層20の青(B)色
を着色したい部分と額縁領域[B]に青(B)色着色層
20cを形成する。次いで、カラーフィルタ層20の赤
(R)色を着色したい部分に赤(R)色着色層20aを
形成すると共に青(B)色の着色層20c上であってス
ペーサ48形成領域に、20μm×20μmの赤(R)
色着色層20aのスペーサパターン48aを作成する。
更にカラーフィルタ層20の緑(G)色を着色したい部
分に緑(G)色着色層20bを形成すると共にスペーサ
48形成領域の赤(R)色の着色層20aのスペーサパ
ターン48a上に、12μm×12μmの緑(G)色の
着色層20bのスペーサパターン48bを形成する。こ
れにより表示領域[A]にカラーフィルター層20を形
成すると同時に額縁領域[B]に額縁遮光層23を形成
し、更に、表示領域[A]あるいは額縁領域[B]に、
青(B)色の着色層20cをベースとするスペーサ48
を形成する。
In the liquid crystal display element 50 of this embodiment, when the color filter layer 20 and the frame light-shielding layer 23 are formed on the array substrate 51, first, the portion of the color filter layer 20 to be colored blue (B) and the frame are formed. The blue (B) colored layer 20c is formed in the region [B]. Next, a red (R) color coloring layer 20a is formed on a portion of the color filter layer 20 where the red (R) color is desired to be colored, and 20 μm × is formed on the spacer 48 forming region on the blue (B) color coloring layer 20c. 20μm red (R)
The spacer pattern 48a of the colored layer 20a is created.
Further, a green (G) color coloring layer 20b is formed on the portion of the color filter layer 20 where the green (G) color is desired to be colored, and 12 μm is formed on the spacer pattern 48a of the red (R) color coloring layer 20a in the spacer 48 forming region. The spacer pattern 48b of the green (G) colored layer 20b of × 12 μm is formed. Thereby, the color filter layer 20 is formed in the display area [A], and at the same time, the frame light-shielding layer 23 is formed in the frame area [B], and further, in the display area [A] or the frame area [B].
Spacer 48 based on the blue (B) colored layer 20c
To form.

【0038】この液晶表示素子50は、製造当初の額縁
領域[B]のODは第1の実施の形態と同様3.8〜
4.2であった。この後、液晶表示素子50の表示テス
トを行い額縁領域[B]の光漏れ状況を観察したとこ
ろ、画像表示を行う通電時あるいは、電源オフ時のいず
れにおいても、額縁領域[B]のODは製造当初と同様
の3.8〜4.2を保持し、光漏れが見られず、額縁領
域[B]は十分な遮光性を確保出来、画像表示時には高
いコントラストを得られ、電源オフ時には全面にわたり
均一なブラック画面を得られた。
In the liquid crystal display device 50, the OD of the frame region [B] at the beginning of manufacture is 3.8 to 138 as in the first embodiment.
It was 4.2. After that, a display test of the liquid crystal display element 50 was performed and the light leakage state of the frame region [B] was observed. As a result, the OD of the frame region [B] was found to be irrespective of whether the image display was energized or the power was off. The same 3.8 to 4.2 as in the beginning of manufacturing is maintained, no light leakage is seen, the frame area [B] can secure a sufficient light-shielding property, high contrast can be obtained at the time of image display, and the entire surface at the time of power off. A uniform black screen was obtained.

【0039】上記の構成によりこの第3の実施の形態
は、第1の実施の形態と同様、カラーフィルタ層20に
用いるのと同一材料を用いて、カラーフィルタ層20の
形成と同時に形成される額縁遮光層23上に、共通電極
32と電気的に接続される額縁電極27を設けることに
より、周辺駆動回路21からの漏れ電界の発生にかかわ
らず、額縁領域[B]での光漏れを防止出来、良好なコ
ントラストを有する表示品位の高い駆動回路一体型の液
晶表示素子を得られ、又電源がオフされた場合には、漏
れ電界により発生され溜まっていた電荷がコモン電極2
2から速やかに放電可能となる。更に、カラーフィルタ
層20形成と同時に額縁遮光層23を形成し又スペーサ
48を形成する事から、額縁遮光層23及びスペーサ4
8を製造するための専用の製造工程を省略出来、製造工
程数の低減により生産性向上ひいてはコストの低減を図
れる。
With the above structure, the third embodiment is formed at the same time when the color filter layer 20 is formed by using the same material as that used for the color filter layer 20, as in the first embodiment. By providing the frame electrode 27 electrically connected to the common electrode 32 on the frame light-shielding layer 23, light leakage in the frame region [B] is prevented regardless of occurrence of a leakage electric field from the peripheral drive circuit 21. It is possible to obtain a liquid crystal display device integrated with a drive circuit which has a good contrast and a high display quality, and when the power is turned off, the charges accumulated due to the leakage electric field are accumulated in the common electrode 2.
It is possible to discharge quickly from 2. Further, since the frame light-shielding layer 23 and the spacer 48 are formed simultaneously with the formation of the color filter layer 20, the frame light-shielding layer 23 and the spacer 4 are formed.
The dedicated manufacturing process for manufacturing 8 can be omitted, and the productivity can be improved and the cost can be reduced by reducing the number of manufacturing processes.

【0040】次に本発明を図6に示す第4の実施の形態
を参照して説明する。本実施の形態は、第1の実施の形
態において、スペーサを黒色とし、さらに額縁遮光層
を、スペーサと同一材料を用いて同時に形成するもので
あり、他は第1の実施の形態と同一であることから、第
1の実施の形態と同一部分については同一符号を付しそ
の説明を省略する。
Next, the present invention will be described with reference to the fourth embodiment shown in FIG. This embodiment is the same as the first embodiment except that the spacer is black and the frame light-shielding layer is simultaneously formed using the same material as the spacer in the first embodiment. Therefore, the same parts as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

【0041】本実施の形態の液晶表示素子52は、第1
の実施の形態と同様にして、アレイ基板53の表示領域
[A]に赤(R)、緑(G)、青(B)の着色層20
a、20b、20cからなるカラーフィルタ層20を形
成する。但しこの時、青(B)色着色層20cによる額
縁遮光層の形成は行わない。次いで、黒色感光性樹脂C
K−2000(富士フィルムオーリン(株)製)をスピ
ンナーを用いて4.2μmの厚みに全面塗布し、90℃
で10分の乾燥後、スペーサ54形成部分及び額縁領域
[B]とに光を照射するフォトマスクを用いて365n
mの波長の紫外線を500mJ/cmの露光量で露光
したあとpH11.5のアルカリ水溶液にて現像し、2
00℃で60分焼成して高さ3.6μmのスペーサ54
を形成する。これと同時に額縁領域[B]に3.6μm
厚の黒(BK)色の額縁遮光層56を形成する。この額
縁遮光層56単独でのOD値は2.0であり、周辺駆動
回路21を加えた額縁領域[B]でのOD値は2.3〜
2.7を得られた。
The liquid crystal display element 52 of this embodiment is the first
In the same manner as in the above embodiment, the red (R), green (G), and blue (B) colored layers 20 are provided in the display area [A] of the array substrate 53.
A color filter layer 20 composed of a, 20b, and 20c is formed. However, at this time, the frame light-shielding layer is not formed by the blue (B) colored layer 20c. Then, the black photosensitive resin C
K-2000 (manufactured by Fuji Film Orin Co., Ltd.) was coated on the entire surface to a thickness of 4.2 μm using a spinner, and the temperature was 90 ° C.
After drying for 10 minutes at 365 nm using a photomask for irradiating the spacer 54 forming portion and the frame region [B] with light.
UV light with a wavelength of m is exposed at an exposure dose of 500 mJ / cm 2 and then developed with an alkaline aqueous solution having a pH of 11.5.
Spacer 54 with a height of 3.6 μm after firing at 00 ° C. for 60 minutes
To form. At the same time, 3.6 μm in the frame area [B]
A thick black (BK) frame light shielding layer 56 is formed. The OD value of the frame light-shielding layer 56 alone is 2.0, and the OD value in the frame region [B] including the peripheral drive circuit 21 is 2.3 to.
2.7 was obtained.

【0042】上記現像時に、額縁遮光層56のコモン電
極22上に15×15μmのコンタクトホール57が作
成されている。次にITO膜を1500Åスパッタ法に
て成膜し、フォトリソグラフィ工程によってパターニン
グし、表示領域[A]に画素電極24をパターン形成
し、額縁領域[B]に額縁電極58をパターン形成す
る。画素電極24はコンタクトホール26を介しTFT
素子18に接続し、額縁電極58はコンタクトホール5
7を介しコモン電極22に接続する。この後垂直配向膜
材料を500Å塗布し、配向膜61を形成する。
At the time of the development, a 15 × 15 μm contact hole 57 is formed on the common electrode 22 of the frame light-shielding layer 56. Next, an ITO film is formed by a 1500 Å sputtering method and patterned by a photolithography process to pattern the pixel electrode 24 in the display area [A] and the frame electrode 58 in the frame area [B]. The pixel electrode 24 is connected to the TFT through the contact hole 26.
The frame electrode 58 connected to the element 18 has the contact hole 5
7 to the common electrode 22. After that, a vertical alignment film material is applied in an amount of 500 L to form an alignment film 61.

【0043】この液晶表示素子52は、製造当初の額縁
領域[B]のODは4.8〜5.2と高く、この後液晶
表示素子52の表示テストを行い額縁領域[B]の光漏
れ状況を観察したところ、画像表示が成される通電時あ
るいは、電源オフ時のいずれにおいても、額縁領域
[B]のODは製造当初と同様の4.8〜5.2を保持
し、光漏れが見られず、額縁領域[B]は十分な遮光性
を確保出来、画像表示時には全面にわたり良好なコント
ラストを得られ、電源オフ時には均一なブラック画面を
得られた。
The liquid crystal display element 52 has a high OD of 4.8 to 5.2 in the frame area [B] at the beginning of manufacture, and then a display test of the liquid crystal display element 52 is performed to cause light leakage in the frame area [B]. Observing the situation, the OD of the frame area [B] retains 4.8 to 5.2, which is the same as that at the beginning of the production, and the light leakage does not occur even when the image is displayed and the power is turned on or when the power is turned off. In the frame region [B], a sufficient light-shielding property was secured, good contrast was obtained over the entire surface when an image was displayed, and a uniform black screen was obtained when the power was turned off.

【0044】上記の構成によりこの第4の実施の形態
は、額縁遮光層56を、単独に形成するのではなく、ス
ペーサ54に用いるのと同一材料の黒色ではあるものの
ODが2.0と低くフォトリソグラフィによる加工性の
比較的良い黒色感光性樹脂を用いて、スペーサ54の形
成と同時に形成した際に、額縁電極58を設けることに
より、周辺駆動回路21からの漏れ電界の発生にかかわ
らず、額縁領域[B]での光漏れを防止出来、良好なコ
ントラストを有する表示品位の高い駆動回路一体型の液
晶表示素子を得られ、又電源がオフされた場合には、漏
れ電界により発生され溜まっていた電荷は、コモン電極
22から速やかに放電可能となる。又、スペーサ54の
形成と同時に額縁遮光層56を形成する事から額縁遮光
層56を製造するための専用の製造工程を省略出来、製
造工程数の低減により生産性向上ひいてはコストの低減
を図れる。
In the fourth embodiment having the above-mentioned structure, the frame light-shielding layer 56 is not formed independently, but the OD is as low as 2.0 although the same material as that used for the spacer 54 is black. By providing the frame electrode 58 when the spacer 54 is formed at the same time as the spacer 54 is formed by using the black photosensitive resin having relatively good workability by photolithography, regardless of the generation of the leakage electric field from the peripheral drive circuit 21, It is possible to obtain a liquid crystal display element integrated with a drive circuit, which can prevent light leakage in the frame region [B] and has a good contrast, and when the power is turned off, it is generated and accumulated by a leakage electric field. The electric charge that has been discharged can be quickly discharged from the common electrode 22. Further, since the frame light-shielding layer 56 is formed simultaneously with the formation of the spacers 54, a dedicated manufacturing process for manufacturing the frame light-shielding layer 56 can be omitted, and the productivity can be improved and the cost can be reduced by reducing the number of manufacturing processes.

【0045】尚本発明は上記実施の形態に限られるもの
で無く、その趣旨を変えない範囲での変更は可能であっ
て、例えば、ノーマリーブラック表示を行うための光変
調層の種類等任意であり、TN型液晶を用い、偏光板を
平行に配置する事によりノーマリーブラック表示を行う
ものであっても良い。又、カラーフィルタ層や額縁遮光
層に用いる着色層材料や膜厚等任意であり、そのODも
限定されない。更に、カラーフィルタ層や額縁遮光層
は、平面表示素子のいずれの基板側に配置しても良く、
対向基板側に設けても良い。
The present invention is not limited to the above-described embodiment, and changes can be made without departing from the spirit of the present invention. For example, the type of the light modulation layer for normally black display is arbitrary. Therefore, normally black display may be performed by using a TN type liquid crystal and arranging polarizing plates in parallel. Further, the color layer material used for the color filter layer and the frame light-shielding layer, the film thickness and the like are arbitrary, and the OD thereof is not limited. Furthermore, the color filter layer and the frame light-shielding layer may be arranged on any substrate side of the flat display element,
It may be provided on the counter substrate side.

【0046】[0046]

【発明の効果】以上説明したように本発明によれば、駆
動回路一体型の平面表示素子にて、画像表示時にあって
は駆動回路からの漏れ電界により光変調層が反応するの
を防止すると共に、電源オフ時には漏れ電界を速やかに
除去できる。従って駆動回路が配置される額縁領域で光
漏れを生じることが無く、良好なコントラストを有する
表示品位の高い駆動回路一体型の平面表示素子の実用化
を得られる。
As described above, according to the present invention, in the flat display element integrated with the drive circuit, the light modulation layer is prevented from reacting due to the electric field leaked from the drive circuit at the time of displaying an image. At the same time, the leakage electric field can be promptly removed when the power is turned off. Therefore, light leakage does not occur in the frame region in which the drive circuit is arranged, and a flat display element integrated with a drive circuit and having high display quality and good contrast can be put to practical use.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施の形態の液晶表示素子を示
す概略構成図である。
FIG. 1 is a schematic configuration diagram showing a liquid crystal display element according to a first embodiment of the present invention.

【図2】本発明の第1の実施の形態の液晶表示素子を平
面から見た概略説明図である。
FIG. 2 is a schematic explanatory view of the liquid crystal display element according to the first embodiment of the present invention as seen from a plane.

【図3】(比較例)の液晶表示素子を示す概略構成図で
ある。
FIG. 3 is a schematic configuration diagram showing a liquid crystal display element of (Comparative example).

【図4】本発明の第2の実施の形態の液晶表示素子を示
す概略構成図である。
FIG. 4 is a schematic configuration diagram showing a liquid crystal display element according to a second embodiment of the present invention.

【図5】本発明の第3の実施の形態の液晶表示素子を示
す概略構成図である。
FIG. 5 is a schematic configuration diagram showing a liquid crystal display element of a third embodiment of the present invention.

【図6】本発明の第4の実施の形態の液晶表示素子を示
す概略構成図である。
FIG. 6 is a schematic configuration diagram showing a liquid crystal display element according to a fourth embodiment of the present invention.

【符号の説明】[Explanation of symbols]

10…液晶表示素子 11…アレイ基板 11a…偏光板 12…対向基板 12a…偏光板 13…スペーサ 14…シール剤 16…液晶層 17…ガラス基板 18…TFT素子 20…カラーフィルタ層 20a…赤(R)色着色層 20b…緑(G)色着色層 20c…青(B)色着色層 21…周辺駆動回路 22…コモン電極 23…額縁遮光層 24…画素電極 26、28…コンタクトホール 27…額縁電極 32…共通電極 36…トランスファ電極 38…トランスファ剤 10 ... Liquid crystal display element 11 ... Array substrate 11a ... Polarizing plate 12 ... Counter substrate 12a ... Polarizing plate 13 ... Spacer 14 ... Sealing agent 16 ... Liquid crystal layer 17 ... Glass substrate 18 ... TFT element 20 ... Color filter layer 20a ... Red (R) colored layer 20b ... Green (G) colored layer 20c ... Blue (B) colored layer 21 ... Peripheral drive circuit 22 ... Common electrode 23 ... Frame light-shielding layer 24 ... Pixel electrode 26, 28 ... Contact holes 27 ... Frame electrode 32 ... Common electrode 36 ... Transfer electrode 38 ... Transfer agent

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) G02F 1/1368 G02F 1/1368 Fターム(参考) 2H048 BA11 BB01 BB44 2H091 FA02Y FA34Y GA01 GA03 GA08 GA11 GA13 LA17 2H092 JA24 PA01 PA03 PA06 PA08 PA09 ─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. 7 Identification code FI theme coat (reference) G02F 1/1368 G02F 1/1368 F term (reference) 2H048 BA11 BB01 BB44 2H091 FA02Y FA34Y GA01 GA03 GA08 GA11 GA13 LA17 2H092 JA24 PA01 PA03 PA06 PA08 PA09

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】 一主面上にスイッチング素子により駆動
される画素電極をマトリクス状に配列してなる表示領域
及びこの表示領域周囲に形成される駆動回路を有する第
1の基板と、一主面上に共通電極を有し前記第1の基板
に対向配置される第2の基板とをシール剤で貼り合せ、
スペーサにより保持される前記第1の基板及び前記第2
の基板の間隙に光変調層を封入する平面表示素子におい
て、 前記第1の基板にて前記駆動回路の上層に形成され、前
記共通電極と同電位に設定される額縁電極を具備するこ
とを特徴とする平面表示素子。
1. A first substrate having a display area in which pixel electrodes driven by switching elements are arranged in a matrix on one main surface and a drive circuit formed around the display area, and one main surface. A second substrate, which has a common electrode on it and is arranged to face the first substrate, is bonded with a sealant,
The first substrate and the second substrate held by spacers
A flat display element in which a light modulation layer is enclosed in a gap between the substrates, the frame display electrode being formed on an upper layer of the drive circuit on the first substrate and set to the same potential as the common electrode. Flat display element.
【請求項2】 前記平面表示素子が前記第1の基板ある
いは前記第2の基板のいずれか一方であって前記表示領
域に相当する領域に形成される着色層と、 前記第1の基板あるいは前記第2の基板のいずれか一方
であって前記表示領域周囲に形成される額縁遮光層とを
有しノーマリーブラック型であることを特徴とする請求
項1記載の平面表示素子。
2. A colored layer formed in a region corresponding to the display region, wherein the flat display element is one of the first substrate and the second substrate, and the first substrate or the 2. The flat display element according to claim 1, wherein the flat display element is a normally black type having at least one of the second substrate and a frame light shielding layer formed around the display area.
【請求項3】 前記額縁電極が前記画素電極と同一材に
て同時に形成されることを特徴とする請求項1記載の平
面表示素子。
3. The flat panel display device according to claim 1, wherein the frame electrode and the pixel electrode are formed of the same material at the same time.
【請求項4】 前記着色層及び前記額縁遮光層とが前記
第1の基板に形成され、前記額縁電極が前記額縁遮光層
の上層に形成され前記共通電極と同電位に設定される事
を特徴とする請求項1記載の平面表示素子。
4. The colored layer and the frame light-shielding layer are formed on the first substrate, the frame electrode is formed on an upper layer of the frame light-shielding layer, and set to the same potential as the common electrode. The flat display element according to claim 1.
【請求項5】 前記額縁遮光層が、前記着色層と同一材
にて同時に形成されることを特徴とする請求項1記載の
平面表示素子。
5. The flat display element according to claim 1, wherein the frame light shielding layer is formed of the same material as the colored layer at the same time.
【請求項6】 前記額縁遮光層が、前記スペーサと同一
材にて同時に形成される事を特徴とする請求項1記載の
平面表示素子。
6. The flat display element according to claim 1, wherein the frame light-shielding layer is formed of the same material as the spacer at the same time.
【請求項7】 一主面上にスイッチング素子により駆動
される画素電極をマトリクス状に配列してなる表示領域
及びこの表示領域周囲に形成される駆動回路を有する第
1の基板と、一主面上に共通電極を有し前記第1の基板
に対向配置される第2の基板とをシール剤で貼り合せ、
スペーサにより保持される前記第1の基板及び前記第2
の基板の間隙に光変調層を封入する平面表示素子の製造
方法において、 前記画素電極形成と同時に前記駆動回路領域上層に額縁
電極とを形成する工程と、 前記共通電極と前記額縁電極とを電気的に同電位に設定
する工程とを具備することを特徴とする平面表示素子の
製造方法。
7. A first substrate having a display area in which pixel electrodes driven by switching elements are arranged in a matrix on one main surface and a drive circuit formed around the display area, and one main surface. A second substrate, which has a common electrode on it and is arranged to face the first substrate, is bonded with a sealant,
The first substrate and the second substrate held by spacers
In the method for manufacturing a flat display element in which a light modulation layer is enclosed in the gap between the substrates, a step of forming a frame electrode in the drive circuit region upper layer at the same time as the formation of the pixel electrode, and the common electrode and the frame electrode are electrically connected. And a step of physically setting the same potential, the method for manufacturing a flat panel display device.
【請求項8】 前記第1の基板あるいは前記第2の基板
のいずれか一方の前記表示領域に相当する領域に着色層
を形成すると同時に、前記表示領域周囲に前記着色層と
同一材にて額縁遮光層を形成する工程と、前記共通電極
と前記額縁電極とを電気的に接続する工程とを具備する
ことを特徴とする請求項7記載の平面表示素子の製造方
法。
8. A colored layer is formed in a region corresponding to the display region of either the first substrate or the second substrate, and at the same time, a frame is made of the same material as the colored layer around the display region. The method for manufacturing a flat display element according to claim 7, further comprising: a step of forming a light shielding layer; and a step of electrically connecting the common electrode and the frame electrode.
【請求項9】 前記着色層及び前記額縁遮光層を前記第
1の基板に形成し、前記額縁電極を、前記画素電極形成
と同時に前記額縁遮光層上層に形成する事を特徴とする
請求項8記載の平面表示素子の製造方法。
9. The color layer and the frame light shielding layer are formed on the first substrate, and the frame electrode is formed on the frame light shielding layer upper layer at the same time when the pixel electrode is formed. A method for manufacturing the flat display element described.
【請求項10】 前記第1の基板あるいは前記第2の基
板のいずれか一方の基板に前記スペーサを形成すると同
時に、前記表示領域周囲に前記スペーサと同一材にて額
縁遮光層を形成する工程とを具備することを特徴とする
請求項7記載の平面表示素子の製造方法。
10. A step of forming the spacer on one of the first substrate and the second substrate and simultaneously forming a frame light shielding layer around the display region with the same material as the spacer. The method for manufacturing a flat display element according to claim 7, further comprising:
【請求項11】 前記スペーサ及び前記額縁遮光層を前
記第1の基板に形成し、前記額縁電極を、前記画素電極
形成と同時に前記額縁遮光層上層に形成する事を特徴と
する請求項10記載の平面表示素子の製造方法。
11. The spacer and the frame light-shielding layer are formed on the first substrate, and the frame electrode is formed on the frame light-shielding layer at the same time when the pixel electrode is formed. Of manufacturing the flat display element of.
JP2001223248A 2001-07-24 2001-07-24 Method for manufacturing plane display element and plane display element Pending JP2003035909A (en)

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