JP2003031918A - Electronic component assembly - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic component assemble that can increase the density of a main substrate and can improve workability. SOLUTION: This electronic component assembly includes the main substrate 10, a first wiring pattern 11 formed on the substrate 10, and a second wiring pattern 12 formed on the substrate 10 and divided into sections by the first wiring pattern 11. This assembly also includes first lands 12a and 12b, respectively connected to the end sections of the divided sections of the second wiring pattern 12, an auxiliary substrate 20 mounted on the main substrate 10, and a third wiring pattern 23 formed on the substrate 20. In addition, this assembly also includes second lands 23a and 23b, respectively connected to the end sections of the third wiring pattern 23 and conductor members, which electrically connects the first lands 12a and 12b to the second lands 23a and 23b.

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component structure in which ends of one wiring pattern divided by one wiring pattern are connected without short-circuiting. About. 2. Description of the Related Art Conventionally, in the field of printed wiring boards, each end of a second wiring pattern divided by a first wiring pattern on a substrate is electrically connected to each other by a jumper wire straddling the first wiring pattern. Connected. In the above-mentioned conventional method, it is necessary to form a land having a large area corresponding to the size of the jumper line so as to be connected to each end of the second wiring pattern. Therefore, the interval between adjacent wirings connected to the land is determined by the shape of the land.
The distance between each wiring of the second wiring pattern becomes wide,
It has been difficult to further increase the density of the printed wiring board. In addition, since it is necessary to perform a connection operation of a jumper wire for each wiring, workability is poor. Therefore, an object of the present invention is to achieve a higher density of wiring patterns of an electronic component. [0004] The problems to be solved by the present invention are as described above. Next, means for solving the problems will be described. That is, in the first aspect, the electronic component structure includes a main substrate, a first wiring pattern formed on the main substrate, and a second wiring pattern formed on the main substrate and divided by the first wiring pattern. A wiring pattern, a first land connected to each end of the divided wiring of the second wiring pattern, a sub-board mounted on the main board, and a third wiring pattern formed on the sub-board, It includes a second land connected to each end of the third wiring pattern, and a conductor member for electrically connecting the first land and the second land. Next, an embodiment of the present invention will be described. FIG. 1 is a perspective view of an electronic component structure according to an embodiment of the present invention, and FIG. 2 is a sectional view thereof. As shown in FIGS. 1 and 2, circuit patterns such as a first wiring pattern 11 and a second wiring pattern 12 formed of a conductive member such as a copper foil are formed on one surface of a substrate. Sub-substrate 20 is attached to main substrate 10 which is a single-sided substrate.
Alternatively, electronic components such as the IC chip 30 and the like are mounted, and these are soldered to the main substrate 10, whereby an electronic component structure is manufactured. The second wiring pattern 12 is divided by the first wiring pattern 11, and the divided one end of the second wiring pattern 12 and the end of the other wiring are connected to a sub-board having a configuration described later. 20 are electrically connected. The main substrate may be a double-sided substrate. The solder resist 13 is, for example, an insulating resin film, and covers the surface of the main substrate 10 except for uncovered portions such as land formation portions. This is a process for preventing the solder from adhering or flowing to portions other than the above-described coating portion during soldering. Note that, on one surface of the main substrate 10, first lands 12 a and 12 b are formed at one end of the second wiring pattern 12 and one end of the other wiring of the second wiring pattern 12 divided by the first wiring pattern 11. It is formed continuously. The first lands 12a and 12b have a shorter shape in the width direction of the continuous portion of the second wiring pattern than in the prior art. More specifically, the first land 12a
The ellipse 12b is preferably short in the width direction and long in the stretching direction perpendicular to the width direction. The sub-substrate 20 is disposed on one of the surfaces of the main substrate 10 (on the surface on which the electronic components are mounted) and at the part where the second wiring pattern 12 is divided. )
Is formed with a third wiring pattern 23 for connecting the separated one-side wiring and the other-side wiring of the second wiring pattern 12. Further, at both ends of the third wiring pattern 23,
Through holes 22.2 penetrating sub-substrate 20 in the thickness direction
2 are formed. And the through hole 2
A conductor plating layer 24 made of a conductive material such as copper is formed on the inner periphery of the conductor 2. The conductor plating layer 24 includes a third wiring pattern 23 on the front surface side of the
And the second lands 23a and 23b formed on the back side of
Electrically connected. The second lands 23a and 23b are
As will be described later, the through hole 22 is formed around the opening on the back surface side. The front and back surfaces of the sub-substrate 20 are also
In the same manner as described above, it is covered with the solder resist 13. Then, the through holes 22 on the back side of the sub-substrate 20 are provided.
The second lands 23a and 23b, which are not covered with the solder resist 13 and are exposed, are formed around the opening. In addition, the through holes 22.2 on the surface of the sub-substrate 20
The land around the openings 2 (third wiring pattern 23) may be formed without printing the solder resist 13, or may be coated by printing the solder resist 13. The second lands 23a and 23b are connected to the main substrate 10
The first lands 12a and 12b are connected to each other via a conductor member described later. As a result, the separated one-side wiring and the other-side wiring of the second wiring pattern 12 are connected to the third conductor pattern 23 in a conductive manner. Here, conventionally, a land having a large area in the shape of a circle corresponding to the size of the jumper wire is formed.
Although defined by the shape or area of this land, in the present invention, the second lands 23a and 23
b, since the second wiring pattern is electrically connected via the through hole 22 and the third wiring pattern 23,
No jumper wire is required. For this reason, there is no need to secure a large land area on the main substrate, and the first land 12a
-The area of 12b can be reduced, and accordingly, the interval between each wiring of the second wiring pattern 12 can be narrowed, and the density of the main substrate 10 can be increased. Preferably, the back surface of the sub-substrate 20 is covered with an insulating layer. That is, the main board 10 and the sub-board 20
Interposed between the sub-substrate 20 and the
A wiring pattern can also be formed on the back surface (on the side of the main substrate 10). Further, an electronic component such as an IC chip may be mounted on the sub-board 20. When the main board 10 is a double-sided board, the portion where the sub-board 20 is provided can be used as a three-layer or four-layer printed board. When mounting the sub-board 20 on the main board 10, the second lands 23a and 23b on the sub-board 20 are brought into contact with the first lands 12a and 12b on the main board 10, and reflow soldering is performed. Alternatively, by connecting the first lands 12a and 12b and the second lands 23a and 23b by flow soldering, a plurality of second conductor patterns 12 can be connected together. That is, the above-described conductor member that connects the first lands 12a and 12b and the second lands 23a and 23b is solder used in reflow soldering or flow soldering. Further, each lead terminal 31 of an electronic component such as an IC chip 30 is placed on a corresponding land, and reflow soldering or flow soldering is performed in the same manner. Can be collectively mounted on the main board 10. Therefore, the number of production steps can be reduced, and workability can be improved. The present invention is configured as described above.
The following effects are obtained. That is, as described in claim 1, the electronic component structure includes a main substrate, a first wiring pattern formed on the main substrate, and a first wiring pattern formed on the main substrate and divided by the first wiring pattern. Two wiring patterns, a first land connected to each end of the divided wiring of the second wiring pattern, a sub-board mounted on the main board, and a third wiring pattern formed on the sub-board Since it includes a second land connected to each end of the third wiring pattern and a conductor member for electrically connecting the first land and the second land, a jumper wire is not required and the area of the land is reduced. Accordingly, the distance between the wirings can be reduced, and the density of the main substrate can be increased. Also, by connecting the first land and the second land by reflow soldering or flow soldering, a plurality of second pattern wirings can be connected together. Furthermore, since the sub-board and the electronic component can be mounted on the main board at one time, the number of production steps can be reduced, and workability can be improved.

[Brief description of the drawings] FIG. 1 is a perspective view of an electronic component structure of the present invention. FIG. 2 is a cross-sectional view of the electronic component constituting body of the present invention. [Explanation of symbols] 10 Main board 11 First wiring pattern 12 Second wiring pattern 12a ・ 12b First Land 20 Sub-board 23 Third wiring pattern 23a ・ 23b 2nd land

Claims (1)

Claims: 1. A main substrate, a first wiring pattern formed on the main substrate, a second wiring pattern formed on the main substrate and divided by the first wiring pattern, A first land connected to each end of the divided wiring of the wiring pattern, a sub-substrate mounted on the main substrate, a third wiring pattern formed on the sub-substrate, and each of the third wiring patterns An electronic component structure comprising: a second land connected to an end; and a conductor member that electrically connects the first land and the second land.