JP2003015111A - Manufacturing method for planar display device - Google Patents

Manufacturing method for planar display device

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Publication number
JP2003015111A
JP2003015111A JP2001194653A JP2001194653A JP2003015111A JP 2003015111 A JP2003015111 A JP 2003015111A JP 2001194653 A JP2001194653 A JP 2001194653A JP 2001194653 A JP2001194653 A JP 2001194653A JP 2003015111 A JP2003015111 A JP 2003015111A
Authority
JP
Japan
Prior art keywords
display device
substrate
manufacturing
thinning
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001194653A
Other languages
Japanese (ja)
Other versions
JP4750969B2 (en
Inventor
Hiroyoshi Nakamura
弘喜 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2001194653A priority Critical patent/JP4750969B2/en
Publication of JP2003015111A publication Critical patent/JP2003015111A/en
Application granted granted Critical
Publication of JP4750969B2 publication Critical patent/JP4750969B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)
  • Surface Treatment Of Optical Elements (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method for a planar display device wherein the thickness precision can be highly accurately controlled and no minute pit is generated. SOLUTION: A minute pit generating factor layer on at least one surface of insulation substrates 21 and 22 is removed. At least one insulation substrate 22 is made to be a thin plate having a desired substrate thickness by a chemical polishing method. The number of the minute pits on the surface of the insulation substrate 22 after polishing can be suppressed and the planar display device having high quality can be formed in a short time and at a low cost.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、歩留りを向上した
平面表示装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a flat panel display device with improved yield.

【0002】[0002]

【従来の技術】一般に、高精細な投射型表示装置や軽量
性を要求される表示装置には、一対の絶縁性基板間に液
晶などで表示素子を形成したいわゆる平面表示装置が用
いられる。この平面表示装置の製造に際しては、効率化
のために、まず、一対の絶縁性基板として多面取り用の
大板を用い、これら一対の絶縁性基板間に複数の表示素
子を形成する。この後、軽量化などのために機械研磨も
しくはケミカル研磨のいずれかによって絶縁性基板を所
望の基板厚さまで研磨している。
2. Description of the Related Art Generally, a so-called flat display device in which a display element is formed by a liquid crystal or the like between a pair of insulating substrates is used for a high-definition projection display device or a display device which is required to be lightweight. In order to improve efficiency in manufacturing the flat panel display device, first, a large plate for multi-chambering is used as a pair of insulating substrates, and a plurality of display elements are formed between the pair of insulating substrates. After that, the insulating substrate is polished to a desired substrate thickness by either mechanical polishing or chemical polishing in order to reduce the weight.

【0003】また、高精細な投射型表示装置を製造する
場合は、平面表示装置を構成する一対の絶縁性基板のう
ち、少なくとも光入射側となる一方の絶縁性基板につい
ては、研磨する際に厚さの精度を高精度に制御する必要
がある。これは、この後にマイクロレンズ基板を貼り付
けるためである。すなわち、マイクロレンズ基板による
光の利用効率の改善や、混色率の低減、制御のために、
光入射側の絶縁性基板の厚さ精度を±10μmないし2
0μmに保つ必要があり、厚さ制御は重要である。
Further, in the case of manufacturing a high-definition projection display device, at least one insulating substrate on the light incident side of the pair of insulating substrates forming the flat display device is polished. It is necessary to control the thickness accuracy with high accuracy. This is because the microlens substrate is attached after this. That is, in order to improve the light utilization efficiency of the microlens substrate, reduce the color mixture ratio, and control,
The thickness accuracy of the insulating substrate on the light incident side is ± 10 μm to 2
It is necessary to keep it at 0 μm, and thickness control is important.

【0004】この場合、機械研磨では厚さ制御が難し
く、厚さの精度を高精度に制御することは困難である。
また、研磨量は数100μmとなることから、機械研磨
の場合、荒削りおよび鏡面研磨の二段階研磨が必要とな
り、時間とコストが多くかかるとともに、絶縁性基板内
で均一性を維持することが難しい。
In this case, it is difficult to control the thickness by mechanical polishing, and it is difficult to control the thickness accuracy with high accuracy.
In addition, since the polishing amount is several 100 μm, in the case of mechanical polishing, two-step polishing of rough cutting and mirror polishing is required, which takes a lot of time and cost, and it is difficult to maintain uniformity in the insulating substrate. .

【0005】これに対しケミカル研磨の場合、フッ酸系
のエッチング液を用いるため均一で基板厚制御も可能で
ある。しかし、図5で示すように、絶縁性基板11の表面
にマイクロクラック12や変質などがあると、その影響で
矢印で示すケミカル研磨の進行に伴い、円形窪み、直径
20μmないし100μm程度の微小ピット13が発生し
て視認され不良となる。
On the other hand, in the case of chemical polishing, since a hydrofluoric acid type etching solution is used, the substrate thickness can be controlled uniformly. However, as shown in FIG. 5, if there are microcracks 12 or alteration on the surface of the insulating substrate 11, a circular pit or a minute pit having a diameter of about 20 μm to 100 μm is generated due to the progress of chemical polishing indicated by the arrow due to the influence. 13 is generated and is visually recognized to be defective.

【0006】通常、絶縁性基板11の表面には、製造中の
各工程によってマイクロクラック12が発生したり、変質
が生じ易く、ケミカル研磨により微小ピット13の発生は
避けられない。
[0006] Usually, microcracks 12 are apt to be generated or deteriorated on each surface of the insulating substrate 11 due to each process during manufacturing, and the generation of minute pits 13 is inevitable by chemical polishing.

【0007】[0007]

【発明が解決しようとする課題】このように従来技術で
は、絶縁性基板を研磨する場合、機械研磨すると厚さ精
度を高精度に制御しにくく、また、荒削りおよび鏡面研
磨の二段階研磨が必要となり時間とコストがかかるとと
もに均一性が難しい。これに対しケミカル研磨すると、
均一で基板厚制御も可能であるが、マイクロクラックな
どによる微小ピットが生じて不良となるおそれがある問
題を有している。
As described above, in the prior art, when polishing an insulating substrate, mechanical polishing makes it difficult to control the thickness accuracy with high precision, and requires two-step polishing of roughing and mirror polishing. It takes time and cost, and the uniformity is difficult. On the other hand, if chemical polishing is used,
Although it is possible to uniformly control the substrate thickness, there is a problem in that minute pits due to microcracks or the like may be generated and defective.

【0008】本発明は、上記問題点に鑑みなされたもの
で、厚さ精度を高精度にコントロールでき、しかも微小
ピットを生じることなく絶縁性基板を研磨できる平面表
示装置の製造方法を提供することを目的とする。
The present invention has been made in view of the above problems, and provides a method for manufacturing a flat display device capable of controlling the thickness accuracy with high accuracy and polishing an insulating substrate without producing minute pits. With the goal.

【0009】[0009]

【課題を解決するための手段】本発明は、一対の絶縁性
基板間に表示素子を形成した後、少なくとも一方の絶縁
性基板を薄板化する平面表示装置の製造方法であって、
前記少なくとも一方の絶縁性基板表面の微小ピット発生
要因層を除去する除去工程と、この除去工程の後に前記
少なくとも一方の絶縁性基板をケミカル研磨法により所
望の基板厚さに薄板化する薄板化工程とを具備したり、
前記少なくとも一方の絶縁性基板をケミカル研磨法によ
り所望の基板厚さに薄板化する薄板化工程と、この薄板
化工程の後に前記少なくとも一方の絶縁性基板表面の微
小ピットを機械的に除去する除去工程とを具備したりす
ることにより、絶縁性基板表面における微小ピットを抑
制する。
The present invention is a method for manufacturing a flat display device, which comprises forming a display element between a pair of insulating substrates and then thinning at least one of the insulating substrates.
A removing step of removing the minute pit generation factor layer on the surface of the at least one insulating substrate, and a thinning step of thinning the at least one insulating substrate to a desired substrate thickness by a chemical polishing method after the removing step And
A thinning step of thinning the at least one insulating substrate to a desired substrate thickness by a chemical polishing method, and mechanically removing fine pits on the surface of the at least one insulating substrate after the thinning step And the like, the fine pits on the surface of the insulating substrate are suppressed.

【0010】[0010]

【発明の実施の形態】以下、本発明の一実施の形態を、
平面表示装置の製造過程を示す図面を参照して説明す
る。
BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below.
The process of manufacturing the flat panel display device will be described with reference to the drawings.

【0011】図1は大板、多面取り状態に形成された平
面表示装置を示しており、図1において、21,22は一対
の絶縁性基板で、たとえば絶縁性基板21は表示素子側基
板のアレイ基板となり、絶縁性基板22は光入射側基板の
対向基板となる。これら一対の絶縁性基板21,22は、そ
れぞれ複数の平面表示装置分の面積を有し、これら絶縁
性基板21,22間には複数の表示素子が形成されている。
また、23は各表示素子毎の封止材で、後工程の分離工程
において、大板の絶縁性基板21,22は、この封止材23部
分で表示素子毎にカッティングされ、個別の平面表示装
置として分離される。また、これら一対の絶縁性基板2
1,22間の周囲は、後工程のケミカル研磨時に液が浸入
しないように、一重または二重の基板端封止材24によっ
てシールされている。
FIG. 1 shows a flat panel display device formed in a large-panel, multi-cavity state. In FIG. 1, reference numerals 21 and 22 denote a pair of insulating substrates, for example, the insulating substrate 21 is a display element side substrate. It serves as an array substrate, and the insulating substrate 22 serves as a counter substrate of the light incident side substrate. The pair of insulating substrates 21 and 22 each have an area for a plurality of flat display devices, and a plurality of display elements are formed between the insulating substrates 21 and 22.
In addition, 23 is a sealing material for each display element, and in the separation step of the subsequent process, the large insulating substrates 21 and 22 are cut by the sealing material 23 for each display element to provide an individual flat display. Separated as a device. In addition, a pair of these insulating substrates 2
The periphery between 1 and 22 is sealed by a single or double substrate end sealing material 24 so that the liquid does not enter during the chemical polishing in the subsequent process.

【0012】このような大板、多面取り状態に形成され
た一対の絶縁性基板21,22の表面を、図2で示すよう
に、機械研磨Aによって、1μmないし100μm、望
ましくは3μmないし30μm鏡面研磨する。この機械
研磨工程は、絶縁性基板21,22の表面に生じるマイクロ
クラックなどを生じる微小ピット発生要因層を除去する
除去工程である。
As shown in FIG. 2, the surfaces of the pair of insulating substrates 21 and 22 formed in such a large plate and multi-chamfered state are subjected to mechanical polishing A to a mirror surface of 1 μm to 100 μm, preferably 3 μm to 30 μm. Grind. This mechanical polishing step is a removal step of removing the fine pit generation factor layer that causes microcracks or the like generated on the surfaces of the insulating substrates 21 and 22.

【0013】次に、表面を鏡面研磨された一対の絶縁性
基板21,22をフッ酸系の液槽にディッピングして、図3
で示すようにケミカル研磨Bし、当初の絶縁性基板21,
22の厚さたとえば約0.7mmを、所望の厚さたとえば
0.38mmまで研磨する。このケミカル研磨Bする場
合、特に光入射側となる絶縁性基板22は、厚さが揃って
いるものを測定により選別し、これらを同時処理するこ
とが厚さのばらつきを低減するためには必要である。
Next, the pair of insulating substrates 21 and 22 whose surfaces are mirror-polished are dipped in a hydrofluoric acid-based liquid bath, and then, as shown in FIG.
As shown in, chemical polishing B is performed and the original insulating substrate 21,
The thickness of 22, eg about 0.7 mm, is ground to the desired thickness, eg 0.38 mm. In the case of this chemical polishing B, it is necessary to select the insulating substrate 22 on the light incident side, which has a uniform thickness, by measurement, and to simultaneously process these in order to reduce the variation in thickness. Is.

【0014】図3の工程を経た大板、多面取り状態の一
対の絶縁性基板21,22は、封止材23部分で表示素子毎に
カッティングされ、個別の平面表示装置に分離される。
その後、分離された絶縁性基板21,22間に液晶25を注入
する液晶注入工程、封止工程を経た後、図4に示すよう
に、マイクロレンズ基板26と組み合される。すなわち、
マイクロレンズ基板26は、光入射側基板となる絶縁性基
板22上の所定位置に、封止材27を介して位置合せされ、
この封止材27を硬化させることにより固定される。この
後、マイクロレンズ基板26と絶縁性基板22との間に低屈
折率材28を注入して封止することにより、投射型の高精
細平面表示装置が構成される。
The large plate and the pair of insulating substrates 21 and 22 in the multi-cavity state, which have undergone the process of FIG. 3, are cut by the sealing material 23 for each display element and separated into individual flat display devices.
Then, after a liquid crystal injecting step of injecting the liquid crystal 25 between the separated insulating substrates 21 and 22, and a sealing step, the microlens substrate 26 is assembled as shown in FIG. That is,
The microlens substrate 26 is aligned with a predetermined position on the insulating substrate 22 which is the light incident side substrate via the sealing material 27,
The sealing material 27 is fixed by being cured. After that, a low refractive index material 28 is injected between the microlens substrate 26 and the insulating substrate 22 to seal the microlens substrate 26 and the insulating substrate 22, thereby forming a projection type high-definition flat display device.

【0015】ここで、図1で示した大板、多面取りの平
面表示装置を形成した状態では、一対の絶縁性基板21,
22の表面には、それまでの長い製造プロセス上で、図5
で示したようにマイクロクラック12が発生したり、変質
が生じたりする。これを従来のように、そのままフッ酸
系の液槽にディッピングしてケミカル研磨Bすると、マ
イクロクラック12や表面変質等の影響で、直径20μm
ないし100μmの円形窪みである微小ピット13が多数
発生し、不良となってしまう。
Here, in the state in which the large plate shown in FIG. 1 and the flat panel display having multiple surfaces are formed, a pair of insulating substrates 21,
The surface of 22 has a long manufacturing process until then, as shown in FIG.
As indicated by, the microcracks 12 are generated or the quality is changed. If this is subjected to chemical polishing B by dipping it into a hydrofluoric acid-based liquid tank as in the conventional case, the diameter is 20 μm due to the influence of microcracks 12 and surface alteration.
Or, a large number of minute pits 13 which are circular depressions of 100 μm are generated, resulting in a defect.

【0016】しかし、この実施の形態では、図2で示す
ように、一対の絶縁性基板21,22の表面を機械研磨Aに
より鏡面研磨して、マイクロクラック12や変質部分など
に基づく微小ピット発生要因層を除去してしまう。この
ため、図3で示すケミカル研磨Bをしても微小ピットが
13が発生することはほとんどなく、不良発生を抑制して
歩留まりを向上できる。
However, in this embodiment, as shown in FIG. 2, the surfaces of the pair of insulating substrates 21 and 22 are mirror-polished by mechanical polishing A, and micro pits are formed due to the microcracks 12 and altered portions. The factor layer is removed. Therefore, even if the chemical polishing B shown in FIG.
Almost no 13 occurs, so that it is possible to suppress the occurrence of defects and improve the yield.

【0017】なお、微小ピット発生要因層除去工程に用
いる研磨法として機械研磨Aを示したが、この機械研磨
Aに限定されるものではなく、他の研磨方法を用いても
よい。
Although mechanical polishing A is shown as the polishing method used in the step of removing the fine pit generation factor layer, it is not limited to this mechanical polishing A, and other polishing methods may be used.

【0018】また、上記実施の形態では、機械研磨工程
をケミカル研磨工程の前に実施したが、研磨の順番を逆
にして、ケミカル研磨後に微小ピット13が既に生じた微
小ピット発生要因層を機械研磨により研磨し、微小ピッ
ト13そのものを除去してもよい。
Further, in the above embodiment, the mechanical polishing step was performed before the chemical polishing step. However, the polishing order is reversed, and the fine pit generation factor layer in which the fine pits 13 have already formed after chemical polishing is machined. The fine pits 13 themselves may be removed by polishing by polishing.

【0019】さらに、上記実施の形態では、製造される
平面表示装置として、図4に示すマイクロレンズ基板26
を貼り合せる投射型の高精細平面表示装置を示したが、
これ以外の平面表示装置にも同様に適用できる。たとえ
ば平面表示装置に対する軽量化要求から、直視型平面表
示装置を構成する一対の絶縁性基板を薄くして軽量化す
ることがあるが、この場合にも適用できる。
Further, in the above-described embodiment, the microlens substrate 26 shown in FIG. 4 is used as a flat display device to be manufactured.
The projection-type high-definition flat display device in which the
Other flat display devices can be similarly applied. For example, in order to reduce the weight of the flat panel display device, a pair of insulating substrates forming the direct-view flat panel display device may be thinned to reduce the weight, but the invention can also be applied to this case.

【0020】一般に、円形窪みなどの微小ピット13は、
プロセス的に長く、多くの熱工程を経て表示装置を形成
する絶縁性基板側で、より発生しやすいことから、投射
型の平面表示装置では、光入射側のマイクロレンズ基板
26が貼り合される側の絶縁性基板22を薄板化することが
重要である。これに対し、反対側の表示素子側絶縁性基
板21の薄板化は必ずしも必要ではない。
Generally, the small pits 13 such as circular depressions are
In the projection type flat display device, the light-incident side microlens substrate is used because it is long in the process and more likely to occur on the insulating substrate side where the display device is formed through many heat steps.
It is important to thin the insulating substrate 22 on the side where the 26 is bonded. On the other hand, it is not always necessary to thin the display element side insulating substrate 21 on the opposite side.

【0021】この場合、薄板化を必ずしも要しない表示
素子側の絶縁性基板21には、ケミカル研磨Bの前工程で
表面に保護フィルムを貼り合せ、ケミカル研磨B後にこ
の保護フィルムを剥離するとよい。このようにすれば、
薄板化が重要な光入射側の絶縁性基板22のみをケミカル
研磨Bによって薄板化できる。
In this case, it is advisable to attach a protective film to the surface of the insulating substrate 21 on the display element side, which does not necessarily need to be thinned, in the step before the chemical polishing B, and peel the protective film after the chemical polishing B. If you do this,
Only the insulating substrate 22 on the light incident side, which is important to be thin, can be thinned by chemical polishing B.

【0022】[0022]

【発明の効果】本発明によれば、絶縁性基板の薄板化に
ケミカル研磨法を用いても微小ピット発生による歩留ま
り低下を抑止でき、高品質に効率よく製造できる。
According to the present invention, even if a chemical polishing method is used for thinning an insulating substrate, it is possible to suppress the yield reduction due to the generation of minute pits, and it is possible to efficiently manufacture high quality.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の平面表示装置の製造方法の一実施の形
態の一工程を示す説明図である。
FIG. 1 is an explanatory diagram showing a step of an embodiment of a method for manufacturing a flat panel display device of the present invention.

【図2】同上図1の次の工程を示す説明図である。FIG. 2 is an explanatory diagram showing the next step of FIG. 1 above.

【図3】同上図2の次の工程を示す説明図である。FIG. 3 is an explanatory view showing the next step of FIG. 2 above.

【図4】同上平面表示装置を示す断面図である。FIG. 4 is a sectional view showing the above flat display device.

【図5】従来例の問題点を示す説明図である。FIG. 5 is an explanatory diagram showing a problem of the conventional example.

【符号の説明】[Explanation of symbols]

21,22 絶縁性基板 21, 22 Insulating substrate

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 2H090 HD01 JB02 JC01 JC07 JC18 JC19 JD01 JD14 JD15 LA12 2K009 BB02 DD12 DD16 EE00 5C094 AA10 AA15 AA42 AA43 AA46 BA16 BA43 CA19 DA11 EA05 EB02 ED01 FA02 GB10 JA08 5G435 AA03 AA17 AA18 BB13 CC09 DD04 EE12 GG02 KK05    ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 2H090 HD01 JB02 JC01 JC07 JC18                       JC19 JD01 JD14 JD15 LA12                 2K009 BB02 DD12 DD16 EE00                 5C094 AA10 AA15 AA42 AA43 AA46                       BA16 BA43 CA19 DA11 EA05                       EB02 ED01 FA02 GB10 JA08                 5G435 AA03 AA17 AA18 BB13 CC09                       DD04 EE12 GG02 KK05

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 一対の絶縁性基板間に表示素子を形成し
た後、少なくとも一方の絶縁性基板を薄板化する平面表
示装置の製造方法であって、 前記少なくとも一方の絶縁性基板表面の微小ピット発生
要因層を除去する除去工程と、 この除去工程の後に前記少なくとも一方の絶縁性基板を
ケミカル研磨法により所望の基板厚さに薄板化する薄板
化工程とを具備することを特徴とする平面表示装置の製
造方法。
1. A method for manufacturing a flat display device, comprising forming a display element between a pair of insulating substrates and then thinning at least one of the insulating substrates. A flat panel display comprising: a removing step of removing the generation factor layer; and a thinning step of thinning the at least one insulating substrate to a desired substrate thickness by a chemical polishing method after the removing step. Device manufacturing method.
【請求項2】 微小ピット発生要因層を除去する除去工
程の除去量が1μm〜100μmであることを特徴とす
る請求項1記載の平面表示装置の製造方法。
2. The method for manufacturing a flat panel display device according to claim 1, wherein the removal amount in the removal step of removing the fine pit generation factor layer is 1 μm to 100 μm.
【請求項3】 一対の絶縁性基板間に表示素子を形成し
た後、少なくとも一方の絶縁性基板を薄板化する平面表
示装置の製造方法であって、 前記少なくとも一方の絶縁性基板をケミカル研磨法によ
り所望の基板厚さに薄板化する薄板化工程と、 この薄板化工程の後に前記少なくとも一方の絶縁性基板
表面の微小ピットを機械的に除去する除去工程とを具備
することを特徴とする平面表示装置の製造方法。
3. A method of manufacturing a flat display device, comprising forming a display element between a pair of insulating substrates and then thinning at least one of the insulating substrates, wherein the at least one insulating substrate is chemically polished. And a thinning step of thinning the substrate to a desired substrate thickness by the step of: and a removing step of mechanically removing the minute pits on the surface of the at least one insulating substrate after the thinning step. Manufacturing method of display device.
【請求項4】 一対の絶縁性基板のうち、薄板化しない
絶縁性基板に保護フィルムを貼り合せる貼合工程と、 薄板化工程後に前記保護フィルムを剥離する剥離工程と
を有することを特徴とする請求項1または2記載の平面
表示装置の製造方法。
4. A bonding step of bonding a protective film to an insulating substrate that is not thinned out of a pair of insulating substrates, and a peeling step of peeling the protective film after the thinning step. A method for manufacturing a flat panel display device according to claim 1.
JP2001194653A 2001-06-27 2001-06-27 Method for manufacturing flat display device Expired - Fee Related JP4750969B2 (en)

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JP2005077945A (en) * 2003-09-02 2005-03-24 Toshiba Matsushita Display Technology Co Ltd Method for manufacturing display device
JP2010138000A (en) * 2008-12-09 2010-06-24 Densho Engineering Co Ltd Method and apparatus for etching glass substrate
US7903192B2 (en) 2007-08-13 2011-03-08 Hitachi Displays, Ltd. Display device and method of manufacturing the same
JP2011216492A (en) * 2004-04-19 2011-10-27 Samsung Mobile Display Co Ltd Method for manufacturing flat display device
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CN113345938A (en) * 2021-05-17 2021-09-03 深圳市华星光电半导体显示技术有限公司 Display panel, strengthening method thereof and display device

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JP2001142412A (en) * 1999-11-15 2001-05-25 Sharp Corp Manufacturing method of planar display panel, planar display panel and holding jig

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JP2000112399A (en) * 1998-10-08 2000-04-21 Sharp Corp Preparation of planar display panel
JP2000241803A (en) * 1999-02-18 2000-09-08 Toshiba Corp Production of liquid crystal display element
JP2001142412A (en) * 1999-11-15 2001-05-25 Sharp Corp Manufacturing method of planar display panel, planar display panel and holding jig

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005077945A (en) * 2003-09-02 2005-03-24 Toshiba Matsushita Display Technology Co Ltd Method for manufacturing display device
US7289185B2 (en) 2003-09-02 2007-10-30 Toshiba Matsushita Display Technology Co., Ltd. Method of manufacturing a display including chemically polishing, dividing and mechanically polishing a substrate
JP2011216492A (en) * 2004-04-19 2011-10-27 Samsung Mobile Display Co Ltd Method for manufacturing flat display device
US7903192B2 (en) 2007-08-13 2011-03-08 Hitachi Displays, Ltd. Display device and method of manufacturing the same
JP2010138000A (en) * 2008-12-09 2010-06-24 Densho Engineering Co Ltd Method and apparatus for etching glass substrate
WO2012111517A1 (en) * 2011-02-18 2012-08-23 シャープ株式会社 Image display panel correction method
CN103348397A (en) * 2011-02-18 2013-10-09 夏普株式会社 Image display panel correction method
CN113345938A (en) * 2021-05-17 2021-09-03 深圳市华星光电半导体显示技术有限公司 Display panel, strengthening method thereof and display device

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